2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
36 #include <linux/slab.h>
38 #include <asm/delay.h>
44 /* Board/System/Debug information/definition ---------------- */
46 #define DM9000_PHY 0x40 /* PHY address 0x01 */
48 #define CARDNAME "dm9000"
49 #define DRV_VERSION "1.31"
52 * Transmit timeout, default 5 seconds.
54 static int watchdog
= 5000;
55 module_param(watchdog
, int, 0400);
56 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
58 /* DM9000 register address locking.
60 * The DM9000 uses an address register to control where data written
61 * to the data register goes. This means that the address register
62 * must be preserved over interrupts or similar calls.
64 * During interrupt and other critical calls, a spinlock is used to
65 * protect the system, but the calls themselves save the address
66 * in the address register in case they are interrupting another
67 * access to the device.
69 * For general accesses a lock is provided so that calls which are
70 * allowed to sleep are serialised so that the address register does
71 * not need to be saved. This lock also serves to serialise access
72 * to the EEPROM and PHY access registers which are shared between
76 /* The driver supports the original DM9000E, and now the two newer
77 * devices, DM9000A and DM9000B.
81 TYPE_DM9000E
, /* original DM9000 */
86 /* Structure/enum declaration ------------------------------- */
87 typedef struct board_info
{
89 void __iomem
*io_addr
; /* Register I/O base address */
90 void __iomem
*io_data
; /* Data I/O address */
98 u8 io_mode
; /* 0:word, 2:byte */
103 unsigned int in_suspend
:1;
104 unsigned int wake_supported
:1;
107 enum dm9000_type type
;
109 void (*inblk
)(void __iomem
*port
, void *data
, int length
);
110 void (*outblk
)(void __iomem
*port
, void *data
, int length
);
111 void (*dumpblk
)(void __iomem
*port
, int length
);
113 struct device
*dev
; /* parent device */
115 struct resource
*addr_res
; /* resources found */
116 struct resource
*data_res
;
117 struct resource
*addr_req
; /* resources requested */
118 struct resource
*data_req
;
119 struct resource
*irq_res
;
123 struct mutex addr_lock
; /* phy and eeprom access lock */
125 struct delayed_work phy_poll
;
126 struct net_device
*ndev
;
130 struct mii_if_info mii
;
139 #define dm9000_dbg(db, lev, msg...) do { \
140 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
141 (lev) < db->debug_level) { \
142 dev_dbg(db->dev, msg); \
146 static inline board_info_t
*to_dm9000_board(struct net_device
*dev
)
148 return netdev_priv(dev
);
151 /* DM9000 network board routine ---------------------------- */
154 dm9000_reset(board_info_t
* db
)
156 dev_dbg(db
->dev
, "resetting device\n");
159 writeb(DM9000_NCR
, db
->io_addr
);
161 writeb(NCR_RST
, db
->io_data
);
166 * Read a byte from I/O port
169 ior(board_info_t
* db
, int reg
)
171 writeb(reg
, db
->io_addr
);
172 return readb(db
->io_data
);
176 * Write a byte to I/O port
180 iow(board_info_t
* db
, int reg
, int value
)
182 writeb(reg
, db
->io_addr
);
183 writeb(value
, db
->io_data
);
186 /* routines for sending block to chip */
188 static void dm9000_outblk_8bit(void __iomem
*reg
, void *data
, int count
)
190 writesb(reg
, data
, count
);
193 static void dm9000_outblk_16bit(void __iomem
*reg
, void *data
, int count
)
195 writesw(reg
, data
, (count
+1) >> 1);
198 static void dm9000_outblk_32bit(void __iomem
*reg
, void *data
, int count
)
200 writesl(reg
, data
, (count
+3) >> 2);
203 /* input block from chip to memory */
205 static void dm9000_inblk_8bit(void __iomem
*reg
, void *data
, int count
)
207 readsb(reg
, data
, count
);
211 static void dm9000_inblk_16bit(void __iomem
*reg
, void *data
, int count
)
213 readsw(reg
, data
, (count
+1) >> 1);
216 static void dm9000_inblk_32bit(void __iomem
*reg
, void *data
, int count
)
218 readsl(reg
, data
, (count
+3) >> 2);
221 /* dump block from chip to null */
223 static void dm9000_dumpblk_8bit(void __iomem
*reg
, int count
)
228 for (i
= 0; i
< count
; i
++)
232 static void dm9000_dumpblk_16bit(void __iomem
*reg
, int count
)
237 count
= (count
+ 1) >> 1;
239 for (i
= 0; i
< count
; i
++)
243 static void dm9000_dumpblk_32bit(void __iomem
*reg
, int count
)
248 count
= (count
+ 3) >> 2;
250 for (i
= 0; i
< count
; i
++)
256 * select the specified set of io routines to use with the
260 static void dm9000_set_io(struct board_info
*db
, int byte_width
)
262 /* use the size of the data resource to work out what IO
263 * routines we want to use
266 switch (byte_width
) {
268 db
->dumpblk
= dm9000_dumpblk_8bit
;
269 db
->outblk
= dm9000_outblk_8bit
;
270 db
->inblk
= dm9000_inblk_8bit
;
275 dev_dbg(db
->dev
, ": 3 byte IO, falling back to 16bit\n");
277 db
->dumpblk
= dm9000_dumpblk_16bit
;
278 db
->outblk
= dm9000_outblk_16bit
;
279 db
->inblk
= dm9000_inblk_16bit
;
284 db
->dumpblk
= dm9000_dumpblk_32bit
;
285 db
->outblk
= dm9000_outblk_32bit
;
286 db
->inblk
= dm9000_inblk_32bit
;
291 static void dm9000_schedule_poll(board_info_t
*db
)
293 if (db
->type
== TYPE_DM9000E
)
294 schedule_delayed_work(&db
->phy_poll
, HZ
* 2);
297 static int dm9000_ioctl(struct net_device
*dev
, struct ifreq
*req
, int cmd
)
299 board_info_t
*dm
= to_dm9000_board(dev
);
301 if (!netif_running(dev
))
304 return generic_mii_ioctl(&dm
->mii
, if_mii(req
), cmd
, NULL
);
308 dm9000_read_locked(board_info_t
*db
, int reg
)
313 spin_lock_irqsave(&db
->lock
, flags
);
315 spin_unlock_irqrestore(&db
->lock
, flags
);
320 static int dm9000_wait_eeprom(board_info_t
*db
)
323 int timeout
= 8; /* wait max 8msec */
325 /* The DM9000 data sheets say we should be able to
326 * poll the ERRE bit in EPCR to wait for the EEPROM
327 * operation. From testing several chips, this bit
328 * does not seem to work.
330 * We attempt to use the bit, but fall back to the
331 * timeout (which is why we do not return an error
332 * on expiry) to say that the EEPROM operation has
337 status
= dm9000_read_locked(db
, DM9000_EPCR
);
339 if ((status
& EPCR_ERRE
) == 0)
345 dev_dbg(db
->dev
, "timeout waiting EEPROM\n");
354 * Read a word data from EEPROM
357 dm9000_read_eeprom(board_info_t
*db
, int offset
, u8
*to
)
361 if (db
->flags
& DM9000_PLATF_NO_EEPROM
) {
367 mutex_lock(&db
->addr_lock
);
369 spin_lock_irqsave(&db
->lock
, flags
);
371 iow(db
, DM9000_EPAR
, offset
);
372 iow(db
, DM9000_EPCR
, EPCR_ERPRR
);
374 spin_unlock_irqrestore(&db
->lock
, flags
);
376 dm9000_wait_eeprom(db
);
378 /* delay for at-least 150uS */
381 spin_lock_irqsave(&db
->lock
, flags
);
383 iow(db
, DM9000_EPCR
, 0x0);
385 to
[0] = ior(db
, DM9000_EPDRL
);
386 to
[1] = ior(db
, DM9000_EPDRH
);
388 spin_unlock_irqrestore(&db
->lock
, flags
);
390 mutex_unlock(&db
->addr_lock
);
394 * Write a word data to SROM
397 dm9000_write_eeprom(board_info_t
*db
, int offset
, u8
*data
)
401 if (db
->flags
& DM9000_PLATF_NO_EEPROM
)
404 mutex_lock(&db
->addr_lock
);
406 spin_lock_irqsave(&db
->lock
, flags
);
407 iow(db
, DM9000_EPAR
, offset
);
408 iow(db
, DM9000_EPDRH
, data
[1]);
409 iow(db
, DM9000_EPDRL
, data
[0]);
410 iow(db
, DM9000_EPCR
, EPCR_WEP
| EPCR_ERPRW
);
411 spin_unlock_irqrestore(&db
->lock
, flags
);
413 dm9000_wait_eeprom(db
);
415 mdelay(1); /* wait at least 150uS to clear */
417 spin_lock_irqsave(&db
->lock
, flags
);
418 iow(db
, DM9000_EPCR
, 0);
419 spin_unlock_irqrestore(&db
->lock
, flags
);
421 mutex_unlock(&db
->addr_lock
);
426 static void dm9000_get_drvinfo(struct net_device
*dev
,
427 struct ethtool_drvinfo
*info
)
429 board_info_t
*dm
= to_dm9000_board(dev
);
431 strcpy(info
->driver
, CARDNAME
);
432 strcpy(info
->version
, DRV_VERSION
);
433 strcpy(info
->bus_info
, to_platform_device(dm
->dev
)->name
);
436 static u32
dm9000_get_msglevel(struct net_device
*dev
)
438 board_info_t
*dm
= to_dm9000_board(dev
);
440 return dm
->msg_enable
;
443 static void dm9000_set_msglevel(struct net_device
*dev
, u32 value
)
445 board_info_t
*dm
= to_dm9000_board(dev
);
447 dm
->msg_enable
= value
;
450 static int dm9000_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
452 board_info_t
*dm
= to_dm9000_board(dev
);
454 mii_ethtool_gset(&dm
->mii
, cmd
);
458 static int dm9000_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
460 board_info_t
*dm
= to_dm9000_board(dev
);
462 return mii_ethtool_sset(&dm
->mii
, cmd
);
465 static int dm9000_nway_reset(struct net_device
*dev
)
467 board_info_t
*dm
= to_dm9000_board(dev
);
468 return mii_nway_restart(&dm
->mii
);
471 static int dm9000_set_features(struct net_device
*dev
, u32 features
)
473 board_info_t
*dm
= to_dm9000_board(dev
);
474 u32 changed
= dev
->features
^ features
;
477 if (!(changed
& NETIF_F_RXCSUM
))
480 spin_lock_irqsave(&dm
->lock
, flags
);
481 iow(dm
, DM9000_RCSR
, (features
& NETIF_F_RXCSUM
) ? RCSR_CSUM
: 0);
482 spin_unlock_irqrestore(&dm
->lock
, flags
);
487 static u32
dm9000_get_link(struct net_device
*dev
)
489 board_info_t
*dm
= to_dm9000_board(dev
);
492 if (dm
->flags
& DM9000_PLATF_EXT_PHY
)
493 ret
= mii_link_ok(&dm
->mii
);
495 ret
= dm9000_read_locked(dm
, DM9000_NSR
) & NSR_LINKST
? 1 : 0;
500 #define DM_EEPROM_MAGIC (0x444D394B)
502 static int dm9000_get_eeprom_len(struct net_device
*dev
)
507 static int dm9000_get_eeprom(struct net_device
*dev
,
508 struct ethtool_eeprom
*ee
, u8
*data
)
510 board_info_t
*dm
= to_dm9000_board(dev
);
511 int offset
= ee
->offset
;
515 /* EEPROM access is aligned to two bytes */
517 if ((len
& 1) != 0 || (offset
& 1) != 0)
520 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
523 ee
->magic
= DM_EEPROM_MAGIC
;
525 for (i
= 0; i
< len
; i
+= 2)
526 dm9000_read_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
531 static int dm9000_set_eeprom(struct net_device
*dev
,
532 struct ethtool_eeprom
*ee
, u8
*data
)
534 board_info_t
*dm
= to_dm9000_board(dev
);
535 int offset
= ee
->offset
;
539 /* EEPROM access is aligned to two bytes */
541 if ((len
& 1) != 0 || (offset
& 1) != 0)
544 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
547 if (ee
->magic
!= DM_EEPROM_MAGIC
)
550 for (i
= 0; i
< len
; i
+= 2)
551 dm9000_write_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
556 static void dm9000_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*w
)
558 board_info_t
*dm
= to_dm9000_board(dev
);
560 memset(w
, 0, sizeof(struct ethtool_wolinfo
));
562 /* note, we could probably support wake-phy too */
563 w
->supported
= dm
->wake_supported
? WAKE_MAGIC
: 0;
564 w
->wolopts
= dm
->wake_state
;
567 static int dm9000_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*w
)
569 board_info_t
*dm
= to_dm9000_board(dev
);
571 u32 opts
= w
->wolopts
;
574 if (!dm
->wake_supported
)
577 if (opts
& ~WAKE_MAGIC
)
580 if (opts
& WAKE_MAGIC
)
583 mutex_lock(&dm
->addr_lock
);
585 spin_lock_irqsave(&dm
->lock
, flags
);
586 iow(dm
, DM9000_WCR
, wcr
);
587 spin_unlock_irqrestore(&dm
->lock
, flags
);
589 mutex_unlock(&dm
->addr_lock
);
591 if (dm
->wake_state
!= opts
) {
592 /* change in wol state, update IRQ state */
595 irq_set_irq_wake(dm
->irq_wake
, 1);
596 else if (dm
->wake_state
& !opts
)
597 irq_set_irq_wake(dm
->irq_wake
, 0);
600 dm
->wake_state
= opts
;
604 static const struct ethtool_ops dm9000_ethtool_ops
= {
605 .get_drvinfo
= dm9000_get_drvinfo
,
606 .get_settings
= dm9000_get_settings
,
607 .set_settings
= dm9000_set_settings
,
608 .get_msglevel
= dm9000_get_msglevel
,
609 .set_msglevel
= dm9000_set_msglevel
,
610 .nway_reset
= dm9000_nway_reset
,
611 .get_link
= dm9000_get_link
,
612 .get_wol
= dm9000_get_wol
,
613 .set_wol
= dm9000_set_wol
,
614 .get_eeprom_len
= dm9000_get_eeprom_len
,
615 .get_eeprom
= dm9000_get_eeprom
,
616 .set_eeprom
= dm9000_set_eeprom
,
619 static void dm9000_show_carrier(board_info_t
*db
,
620 unsigned carrier
, unsigned nsr
)
622 struct net_device
*ndev
= db
->ndev
;
623 unsigned ncr
= dm9000_read_locked(db
, DM9000_NCR
);
626 dev_info(db
->dev
, "%s: link up, %dMbps, %s-duplex, no LPA\n",
627 ndev
->name
, (nsr
& NSR_SPEED
) ? 10 : 100,
628 (ncr
& NCR_FDX
) ? "full" : "half");
630 dev_info(db
->dev
, "%s: link down\n", ndev
->name
);
634 dm9000_poll_work(struct work_struct
*w
)
636 struct delayed_work
*dw
= to_delayed_work(w
);
637 board_info_t
*db
= container_of(dw
, board_info_t
, phy_poll
);
638 struct net_device
*ndev
= db
->ndev
;
640 if (db
->flags
& DM9000_PLATF_SIMPLE_PHY
&&
641 !(db
->flags
& DM9000_PLATF_EXT_PHY
)) {
642 unsigned nsr
= dm9000_read_locked(db
, DM9000_NSR
);
643 unsigned old_carrier
= netif_carrier_ok(ndev
) ? 1 : 0;
644 unsigned new_carrier
;
646 new_carrier
= (nsr
& NSR_LINKST
) ? 1 : 0;
648 if (old_carrier
!= new_carrier
) {
649 if (netif_msg_link(db
))
650 dm9000_show_carrier(db
, new_carrier
, nsr
);
653 netif_carrier_off(ndev
);
655 netif_carrier_on(ndev
);
658 mii_check_media(&db
->mii
, netif_msg_link(db
), 0);
660 if (netif_running(ndev
))
661 dm9000_schedule_poll(db
);
664 /* dm9000_release_board
666 * release a board, and any mapped resources
670 dm9000_release_board(struct platform_device
*pdev
, struct board_info
*db
)
672 /* unmap our resources */
674 iounmap(db
->io_addr
);
675 iounmap(db
->io_data
);
677 /* release the resources */
679 release_resource(db
->data_req
);
682 release_resource(db
->addr_req
);
686 static unsigned char dm9000_type_to_char(enum dm9000_type type
)
689 case TYPE_DM9000E
: return 'e';
690 case TYPE_DM9000A
: return 'a';
691 case TYPE_DM9000B
: return 'b';
698 * Set DM9000 multicast address
701 dm9000_hash_table_unlocked(struct net_device
*dev
)
703 board_info_t
*db
= netdev_priv(dev
);
704 struct netdev_hw_addr
*ha
;
708 u8 rcr
= RCR_DIS_LONG
| RCR_DIS_CRC
| RCR_RXEN
;
710 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
712 for (i
= 0, oft
= DM9000_PAR
; i
< 6; i
++, oft
++)
713 iow(db
, oft
, dev
->dev_addr
[i
]);
715 /* Clear Hash Table */
716 for (i
= 0; i
< 4; i
++)
719 /* broadcast address */
720 hash_table
[3] = 0x8000;
722 if (dev
->flags
& IFF_PROMISC
)
725 if (dev
->flags
& IFF_ALLMULTI
)
728 /* the multicast address in Hash Table : 64 bits */
729 netdev_for_each_mc_addr(ha
, dev
) {
730 hash_val
= ether_crc_le(6, ha
->addr
) & 0x3f;
731 hash_table
[hash_val
/ 16] |= (u16
) 1 << (hash_val
% 16);
734 /* Write the hash table to MAC MD table */
735 for (i
= 0, oft
= DM9000_MAR
; i
< 4; i
++) {
736 iow(db
, oft
++, hash_table
[i
]);
737 iow(db
, oft
++, hash_table
[i
] >> 8);
740 iow(db
, DM9000_RCR
, rcr
);
744 dm9000_hash_table(struct net_device
*dev
)
746 board_info_t
*db
= netdev_priv(dev
);
749 spin_lock_irqsave(&db
->lock
, flags
);
750 dm9000_hash_table_unlocked(dev
);
751 spin_unlock_irqrestore(&db
->lock
, flags
);
755 * Initialize dm9000 board
758 dm9000_init_dm9000(struct net_device
*dev
)
760 board_info_t
*db
= netdev_priv(dev
);
764 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
767 db
->io_mode
= ior(db
, DM9000_ISR
) >> 6; /* ISR bit7:6 keeps I/O mode */
770 if (dev
->hw_features
& NETIF_F_RXCSUM
)
772 (dev
->features
& NETIF_F_RXCSUM
) ? RCSR_CSUM
: 0);
774 iow(db
, DM9000_GPCR
, GPCR_GEP_CNTL
); /* Let GPIO0 output */
776 ncr
= (db
->flags
& DM9000_PLATF_EXT_PHY
) ? NCR_EXT_PHY
: 0;
778 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
779 * up dumping the wake events if we disable this. There is already
780 * a wake-mask in DM9000_WCR */
781 if (db
->wake_supported
)
784 iow(db
, DM9000_NCR
, ncr
);
786 /* Program operating register */
787 iow(db
, DM9000_TCR
, 0); /* TX Polling clear */
788 iow(db
, DM9000_BPTR
, 0x3f); /* Less 3Kb, 200us */
789 iow(db
, DM9000_FCR
, 0xff); /* Flow Control */
790 iow(db
, DM9000_SMCR
, 0); /* Special Mode */
791 /* clear TX status */
792 iow(db
, DM9000_NSR
, NSR_WAKEST
| NSR_TX2END
| NSR_TX1END
);
793 iow(db
, DM9000_ISR
, ISR_CLR_STATUS
); /* Clear interrupt status */
795 /* Set address filter table */
796 dm9000_hash_table_unlocked(dev
);
798 imr
= IMR_PAR
| IMR_PTM
| IMR_PRM
;
799 if (db
->type
!= TYPE_DM9000E
)
804 /* Enable TX/RX interrupt mask */
805 iow(db
, DM9000_IMR
, imr
);
807 /* Init Driver variable */
809 db
->queue_pkt_len
= 0;
810 dev
->trans_start
= jiffies
;
813 /* Our watchdog timed out. Called by the networking layer */
814 static void dm9000_timeout(struct net_device
*dev
)
816 board_info_t
*db
= netdev_priv(dev
);
820 /* Save previous register address */
821 spin_lock_irqsave(&db
->lock
, flags
);
822 reg_save
= readb(db
->io_addr
);
824 netif_stop_queue(dev
);
826 dm9000_init_dm9000(dev
);
827 /* We can accept TX packets again */
828 dev
->trans_start
= jiffies
; /* prevent tx timeout */
829 netif_wake_queue(dev
);
831 /* Restore previous register address */
832 writeb(reg_save
, db
->io_addr
);
833 spin_unlock_irqrestore(&db
->lock
, flags
);
836 static void dm9000_send_packet(struct net_device
*dev
,
840 board_info_t
*dm
= to_dm9000_board(dev
);
842 /* The DM9000 is not smart enough to leave fragmented packets alone. */
843 if (dm
->ip_summed
!= ip_summed
) {
844 if (ip_summed
== CHECKSUM_NONE
)
845 iow(dm
, DM9000_TCCR
, 0);
847 iow(dm
, DM9000_TCCR
, TCCR_IP
| TCCR_UDP
| TCCR_TCP
);
848 dm
->ip_summed
= ip_summed
;
851 /* Set TX length to DM9000 */
852 iow(dm
, DM9000_TXPLL
, pkt_len
);
853 iow(dm
, DM9000_TXPLH
, pkt_len
>> 8);
855 /* Issue TX polling command */
856 iow(dm
, DM9000_TCR
, TCR_TXREQ
); /* Cleared after TX complete */
860 * Hardware start transmission.
861 * Send a packet to media from the upper layer.
864 dm9000_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
867 board_info_t
*db
= netdev_priv(dev
);
869 dm9000_dbg(db
, 3, "%s:\n", __func__
);
871 if (db
->tx_pkt_cnt
> 1)
872 return NETDEV_TX_BUSY
;
874 spin_lock_irqsave(&db
->lock
, flags
);
876 /* Move data to DM9000 TX RAM */
877 writeb(DM9000_MWCMD
, db
->io_addr
);
879 (db
->outblk
)(db
->io_data
, skb
->data
, skb
->len
);
880 dev
->stats
.tx_bytes
+= skb
->len
;
883 /* TX control: First packet immediately send, second packet queue */
884 if (db
->tx_pkt_cnt
== 1) {
885 dm9000_send_packet(dev
, skb
->ip_summed
, skb
->len
);
888 db
->queue_pkt_len
= skb
->len
;
889 db
->queue_ip_summed
= skb
->ip_summed
;
890 netif_stop_queue(dev
);
893 spin_unlock_irqrestore(&db
->lock
, flags
);
902 * DM9000 interrupt handler
903 * receive the packet to upper layer, free the transmitted packet
906 static void dm9000_tx_done(struct net_device
*dev
, board_info_t
*db
)
908 int tx_status
= ior(db
, DM9000_NSR
); /* Got TX status */
910 if (tx_status
& (NSR_TX2END
| NSR_TX1END
)) {
911 /* One packet sent complete */
913 dev
->stats
.tx_packets
++;
915 if (netif_msg_tx_done(db
))
916 dev_dbg(db
->dev
, "tx done, NSR %02x\n", tx_status
);
918 /* Queue packet check & send */
919 if (db
->tx_pkt_cnt
> 0)
920 dm9000_send_packet(dev
, db
->queue_ip_summed
,
922 netif_wake_queue(dev
);
926 struct dm9000_rxhdr
{
933 * Received a packet and pass to upper layer
936 dm9000_rx(struct net_device
*dev
)
938 board_info_t
*db
= netdev_priv(dev
);
939 struct dm9000_rxhdr rxhdr
;
945 /* Check packet ready or not */
947 ior(db
, DM9000_MRCMDX
); /* Dummy read */
949 /* Get most updated data */
950 rxbyte
= readb(db
->io_data
);
952 /* Status check: this byte must be 0 or 1 */
953 if (rxbyte
& DM9000_PKT_ERR
) {
954 dev_warn(db
->dev
, "status check fail: %d\n", rxbyte
);
955 iow(db
, DM9000_RCR
, 0x00); /* Stop Device */
956 iow(db
, DM9000_ISR
, IMR_PAR
); /* Stop INT request */
960 if (!(rxbyte
& DM9000_PKT_RDY
))
963 /* A packet ready now & Get status/length */
965 writeb(DM9000_MRCMD
, db
->io_addr
);
967 (db
->inblk
)(db
->io_data
, &rxhdr
, sizeof(rxhdr
));
969 RxLen
= le16_to_cpu(rxhdr
.RxLen
);
971 if (netif_msg_rx_status(db
))
972 dev_dbg(db
->dev
, "RX: status %02x, length %04x\n",
973 rxhdr
.RxStatus
, RxLen
);
975 /* Packet Status check */
978 if (netif_msg_rx_err(db
))
979 dev_dbg(db
->dev
, "RX: Bad Packet (runt)\n");
982 if (RxLen
> DM9000_PKT_MAX
) {
983 dev_dbg(db
->dev
, "RST: RX Len:%x\n", RxLen
);
986 /* rxhdr.RxStatus is identical to RSR register. */
987 if (rxhdr
.RxStatus
& (RSR_FOE
| RSR_CE
| RSR_AE
|
991 if (rxhdr
.RxStatus
& RSR_FOE
) {
992 if (netif_msg_rx_err(db
))
993 dev_dbg(db
->dev
, "fifo error\n");
994 dev
->stats
.rx_fifo_errors
++;
996 if (rxhdr
.RxStatus
& RSR_CE
) {
997 if (netif_msg_rx_err(db
))
998 dev_dbg(db
->dev
, "crc error\n");
999 dev
->stats
.rx_crc_errors
++;
1001 if (rxhdr
.RxStatus
& RSR_RF
) {
1002 if (netif_msg_rx_err(db
))
1003 dev_dbg(db
->dev
, "length error\n");
1004 dev
->stats
.rx_length_errors
++;
1008 /* Move data from DM9000 */
1010 ((skb
= dev_alloc_skb(RxLen
+ 4)) != NULL
)) {
1011 skb_reserve(skb
, 2);
1012 rdptr
= (u8
*) skb_put(skb
, RxLen
- 4);
1014 /* Read received packet from RX SRAM */
1016 (db
->inblk
)(db
->io_data
, rdptr
, RxLen
);
1017 dev
->stats
.rx_bytes
+= RxLen
;
1019 /* Pass to upper layer */
1020 skb
->protocol
= eth_type_trans(skb
, dev
);
1021 if (dev
->features
& NETIF_F_RXCSUM
) {
1022 if ((((rxbyte
& 0x1c) << 3) & rxbyte
) == 0)
1023 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1025 skb_checksum_none_assert(skb
);
1028 dev
->stats
.rx_packets
++;
1031 /* need to dump the packet's data */
1033 (db
->dumpblk
)(db
->io_data
, RxLen
);
1035 } while (rxbyte
& DM9000_PKT_RDY
);
1038 static irqreturn_t
dm9000_interrupt(int irq
, void *dev_id
)
1040 struct net_device
*dev
= dev_id
;
1041 board_info_t
*db
= netdev_priv(dev
);
1043 unsigned long flags
;
1046 dm9000_dbg(db
, 3, "entering %s\n", __func__
);
1048 /* A real interrupt coming */
1050 /* holders of db->lock must always block IRQs */
1051 spin_lock_irqsave(&db
->lock
, flags
);
1053 /* Save previous register address */
1054 reg_save
= readb(db
->io_addr
);
1056 /* Disable all interrupts */
1057 iow(db
, DM9000_IMR
, IMR_PAR
);
1059 /* Got DM9000 interrupt status */
1060 int_status
= ior(db
, DM9000_ISR
); /* Got ISR */
1061 iow(db
, DM9000_ISR
, int_status
); /* Clear ISR status */
1063 if (netif_msg_intr(db
))
1064 dev_dbg(db
->dev
, "interrupt status %02x\n", int_status
);
1066 /* Received the coming packet */
1067 if (int_status
& ISR_PRS
)
1070 /* Trnasmit Interrupt check */
1071 if (int_status
& ISR_PTS
)
1072 dm9000_tx_done(dev
, db
);
1074 if (db
->type
!= TYPE_DM9000E
) {
1075 if (int_status
& ISR_LNKCHNG
) {
1076 /* fire a link-change request */
1077 schedule_delayed_work(&db
->phy_poll
, 1);
1081 /* Re-enable interrupt mask */
1082 iow(db
, DM9000_IMR
, db
->imr_all
);
1084 /* Restore previous register address */
1085 writeb(reg_save
, db
->io_addr
);
1087 spin_unlock_irqrestore(&db
->lock
, flags
);
1092 static irqreturn_t
dm9000_wol_interrupt(int irq
, void *dev_id
)
1094 struct net_device
*dev
= dev_id
;
1095 board_info_t
*db
= netdev_priv(dev
);
1096 unsigned long flags
;
1099 spin_lock_irqsave(&db
->lock
, flags
);
1101 nsr
= ior(db
, DM9000_NSR
);
1102 wcr
= ior(db
, DM9000_WCR
);
1104 dev_dbg(db
->dev
, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__
, nsr
, wcr
);
1106 if (nsr
& NSR_WAKEST
) {
1107 /* clear, so we can avoid */
1108 iow(db
, DM9000_NSR
, NSR_WAKEST
);
1110 if (wcr
& WCR_LINKST
)
1111 dev_info(db
->dev
, "wake by link status change\n");
1112 if (wcr
& WCR_SAMPLEST
)
1113 dev_info(db
->dev
, "wake by sample packet\n");
1114 if (wcr
& WCR_MAGICST
)
1115 dev_info(db
->dev
, "wake by magic packet\n");
1116 if (!(wcr
& (WCR_LINKST
| WCR_SAMPLEST
| WCR_MAGICST
)))
1117 dev_err(db
->dev
, "wake signalled with no reason? "
1118 "NSR=0x%02x, WSR=0x%02x\n", nsr
, wcr
);
1122 spin_unlock_irqrestore(&db
->lock
, flags
);
1124 return (nsr
& NSR_WAKEST
) ? IRQ_HANDLED
: IRQ_NONE
;
1127 #ifdef CONFIG_NET_POLL_CONTROLLER
1131 static void dm9000_poll_controller(struct net_device
*dev
)
1133 disable_irq(dev
->irq
);
1134 dm9000_interrupt(dev
->irq
, dev
);
1135 enable_irq(dev
->irq
);
1140 * Open the interface.
1141 * The interface is opened whenever "ifconfig" actives it.
1144 dm9000_open(struct net_device
*dev
)
1146 board_info_t
*db
= netdev_priv(dev
);
1147 unsigned long irqflags
= db
->irq_res
->flags
& IRQF_TRIGGER_MASK
;
1149 if (netif_msg_ifup(db
))
1150 dev_dbg(db
->dev
, "enabling %s\n", dev
->name
);
1152 /* If there is no IRQ type specified, default to something that
1153 * may work, and tell the user that this is a problem */
1155 if (irqflags
== IRQF_TRIGGER_NONE
)
1156 dev_warn(db
->dev
, "WARNING: no IRQ resource flags set.\n");
1158 irqflags
|= IRQF_SHARED
;
1160 if (request_irq(dev
->irq
, dm9000_interrupt
, irqflags
, dev
->name
, dev
))
1163 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1164 iow(db
, DM9000_GPR
, 0); /* REG_1F bit0 activate phyxcer */
1165 mdelay(1); /* delay needs by DM9000B */
1167 /* Initialize DM9000 board */
1169 dm9000_init_dm9000(dev
);
1171 /* Init driver variable */
1174 mii_check_media(&db
->mii
, netif_msg_link(db
), 1);
1175 netif_start_queue(dev
);
1177 dm9000_schedule_poll(db
);
1183 * Sleep, either by using msleep() or if we are suspending, then
1184 * use mdelay() to sleep.
1186 static void dm9000_msleep(board_info_t
*db
, unsigned int ms
)
1195 * Read a word from phyxcer
1198 dm9000_phy_read(struct net_device
*dev
, int phy_reg_unused
, int reg
)
1200 board_info_t
*db
= netdev_priv(dev
);
1201 unsigned long flags
;
1202 unsigned int reg_save
;
1205 mutex_lock(&db
->addr_lock
);
1207 spin_lock_irqsave(&db
->lock
,flags
);
1209 /* Save previous register address */
1210 reg_save
= readb(db
->io_addr
);
1212 /* Fill the phyxcer register into REG_0C */
1213 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1215 iow(db
, DM9000_EPCR
, EPCR_ERPRR
| EPCR_EPOS
); /* Issue phyxcer read command */
1217 writeb(reg_save
, db
->io_addr
);
1218 spin_unlock_irqrestore(&db
->lock
,flags
);
1220 dm9000_msleep(db
, 1); /* Wait read complete */
1222 spin_lock_irqsave(&db
->lock
,flags
);
1223 reg_save
= readb(db
->io_addr
);
1225 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer read command */
1227 /* The read data keeps on REG_0D & REG_0E */
1228 ret
= (ior(db
, DM9000_EPDRH
) << 8) | ior(db
, DM9000_EPDRL
);
1230 /* restore the previous address */
1231 writeb(reg_save
, db
->io_addr
);
1232 spin_unlock_irqrestore(&db
->lock
,flags
);
1234 mutex_unlock(&db
->addr_lock
);
1236 dm9000_dbg(db
, 5, "phy_read[%02x] -> %04x\n", reg
, ret
);
1241 * Write a word to phyxcer
1244 dm9000_phy_write(struct net_device
*dev
,
1245 int phyaddr_unused
, int reg
, int value
)
1247 board_info_t
*db
= netdev_priv(dev
);
1248 unsigned long flags
;
1249 unsigned long reg_save
;
1251 dm9000_dbg(db
, 5, "phy_write[%02x] = %04x\n", reg
, value
);
1252 mutex_lock(&db
->addr_lock
);
1254 spin_lock_irqsave(&db
->lock
,flags
);
1256 /* Save previous register address */
1257 reg_save
= readb(db
->io_addr
);
1259 /* Fill the phyxcer register into REG_0C */
1260 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1262 /* Fill the written data into REG_0D & REG_0E */
1263 iow(db
, DM9000_EPDRL
, value
);
1264 iow(db
, DM9000_EPDRH
, value
>> 8);
1266 iow(db
, DM9000_EPCR
, EPCR_EPOS
| EPCR_ERPRW
); /* Issue phyxcer write command */
1268 writeb(reg_save
, db
->io_addr
);
1269 spin_unlock_irqrestore(&db
->lock
, flags
);
1271 dm9000_msleep(db
, 1); /* Wait write complete */
1273 spin_lock_irqsave(&db
->lock
,flags
);
1274 reg_save
= readb(db
->io_addr
);
1276 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer write command */
1278 /* restore the previous address */
1279 writeb(reg_save
, db
->io_addr
);
1281 spin_unlock_irqrestore(&db
->lock
, flags
);
1282 mutex_unlock(&db
->addr_lock
);
1286 dm9000_shutdown(struct net_device
*dev
)
1288 board_info_t
*db
= netdev_priv(dev
);
1291 dm9000_phy_write(dev
, 0, MII_BMCR
, BMCR_RESET
); /* PHY RESET */
1292 iow(db
, DM9000_GPR
, 0x01); /* Power-Down PHY */
1293 iow(db
, DM9000_IMR
, IMR_PAR
); /* Disable all interrupt */
1294 iow(db
, DM9000_RCR
, 0x00); /* Disable RX */
1298 * Stop the interface.
1299 * The interface is stopped when it is brought.
1302 dm9000_stop(struct net_device
*ndev
)
1304 board_info_t
*db
= netdev_priv(ndev
);
1306 if (netif_msg_ifdown(db
))
1307 dev_dbg(db
->dev
, "shutting down %s\n", ndev
->name
);
1309 cancel_delayed_work_sync(&db
->phy_poll
);
1311 netif_stop_queue(ndev
);
1312 netif_carrier_off(ndev
);
1314 /* free interrupt */
1315 free_irq(ndev
->irq
, ndev
);
1317 dm9000_shutdown(ndev
);
1322 static const struct net_device_ops dm9000_netdev_ops
= {
1323 .ndo_open
= dm9000_open
,
1324 .ndo_stop
= dm9000_stop
,
1325 .ndo_start_xmit
= dm9000_start_xmit
,
1326 .ndo_tx_timeout
= dm9000_timeout
,
1327 .ndo_set_multicast_list
= dm9000_hash_table
,
1328 .ndo_do_ioctl
= dm9000_ioctl
,
1329 .ndo_change_mtu
= eth_change_mtu
,
1330 .ndo_set_features
= dm9000_set_features
,
1331 .ndo_validate_addr
= eth_validate_addr
,
1332 .ndo_set_mac_address
= eth_mac_addr
,
1333 #ifdef CONFIG_NET_POLL_CONTROLLER
1334 .ndo_poll_controller
= dm9000_poll_controller
,
1339 * Search DM9000 board, allocate space and register it
1341 static int __devinit
1342 dm9000_probe(struct platform_device
*pdev
)
1344 struct dm9000_plat_data
*pdata
= pdev
->dev
.platform_data
;
1345 struct board_info
*db
; /* Point a board information structure */
1346 struct net_device
*ndev
;
1347 const unsigned char *mac_src
;
1353 /* Init network device */
1354 ndev
= alloc_etherdev(sizeof(struct board_info
));
1356 dev_err(&pdev
->dev
, "could not allocate device.\n");
1360 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1362 dev_dbg(&pdev
->dev
, "dm9000_probe()\n");
1364 /* setup board info structure */
1365 db
= netdev_priv(ndev
);
1367 db
->dev
= &pdev
->dev
;
1370 spin_lock_init(&db
->lock
);
1371 mutex_init(&db
->addr_lock
);
1373 INIT_DELAYED_WORK(&db
->phy_poll
, dm9000_poll_work
);
1375 db
->addr_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1376 db
->data_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1377 db
->irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1379 if (db
->addr_res
== NULL
|| db
->data_res
== NULL
||
1380 db
->irq_res
== NULL
) {
1381 dev_err(db
->dev
, "insufficient resources\n");
1386 db
->irq_wake
= platform_get_irq(pdev
, 1);
1387 if (db
->irq_wake
>= 0) {
1388 dev_dbg(db
->dev
, "wakeup irq %d\n", db
->irq_wake
);
1390 ret
= request_irq(db
->irq_wake
, dm9000_wol_interrupt
,
1391 IRQF_SHARED
, dev_name(db
->dev
), ndev
);
1393 dev_err(db
->dev
, "cannot get wakeup irq (%d)\n", ret
);
1396 /* test to see if irq is really wakeup capable */
1397 ret
= irq_set_irq_wake(db
->irq_wake
, 1);
1399 dev_err(db
->dev
, "irq %d cannot set wakeup (%d)\n",
1403 irq_set_irq_wake(db
->irq_wake
, 0);
1404 db
->wake_supported
= 1;
1409 iosize
= resource_size(db
->addr_res
);
1410 db
->addr_req
= request_mem_region(db
->addr_res
->start
, iosize
,
1413 if (db
->addr_req
== NULL
) {
1414 dev_err(db
->dev
, "cannot claim address reg area\n");
1419 db
->io_addr
= ioremap(db
->addr_res
->start
, iosize
);
1421 if (db
->io_addr
== NULL
) {
1422 dev_err(db
->dev
, "failed to ioremap address reg\n");
1427 iosize
= resource_size(db
->data_res
);
1428 db
->data_req
= request_mem_region(db
->data_res
->start
, iosize
,
1431 if (db
->data_req
== NULL
) {
1432 dev_err(db
->dev
, "cannot claim data reg area\n");
1437 db
->io_data
= ioremap(db
->data_res
->start
, iosize
);
1439 if (db
->io_data
== NULL
) {
1440 dev_err(db
->dev
, "failed to ioremap data reg\n");
1445 /* fill in parameters for net-dev structure */
1446 ndev
->base_addr
= (unsigned long)db
->io_addr
;
1447 ndev
->irq
= db
->irq_res
->start
;
1449 /* ensure at least we have a default set of IO routines */
1450 dm9000_set_io(db
, iosize
);
1452 /* check to see if anything is being over-ridden */
1453 if (pdata
!= NULL
) {
1454 /* check to see if the driver wants to over-ride the
1455 * default IO width */
1457 if (pdata
->flags
& DM9000_PLATF_8BITONLY
)
1458 dm9000_set_io(db
, 1);
1460 if (pdata
->flags
& DM9000_PLATF_16BITONLY
)
1461 dm9000_set_io(db
, 2);
1463 if (pdata
->flags
& DM9000_PLATF_32BITONLY
)
1464 dm9000_set_io(db
, 4);
1466 /* check to see if there are any IO routine
1469 if (pdata
->inblk
!= NULL
)
1470 db
->inblk
= pdata
->inblk
;
1472 if (pdata
->outblk
!= NULL
)
1473 db
->outblk
= pdata
->outblk
;
1475 if (pdata
->dumpblk
!= NULL
)
1476 db
->dumpblk
= pdata
->dumpblk
;
1478 db
->flags
= pdata
->flags
;
1481 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1482 db
->flags
|= DM9000_PLATF_SIMPLE_PHY
;
1487 /* try multiple times, DM9000 sometimes gets the read wrong */
1488 for (i
= 0; i
< 8; i
++) {
1489 id_val
= ior(db
, DM9000_VIDL
);
1490 id_val
|= (u32
)ior(db
, DM9000_VIDH
) << 8;
1491 id_val
|= (u32
)ior(db
, DM9000_PIDL
) << 16;
1492 id_val
|= (u32
)ior(db
, DM9000_PIDH
) << 24;
1494 if (id_val
== DM9000_ID
)
1496 dev_err(db
->dev
, "read wrong id 0x%08x\n", id_val
);
1499 if (id_val
!= DM9000_ID
) {
1500 dev_err(db
->dev
, "wrong id: 0x%08x\n", id_val
);
1505 /* Identify what type of DM9000 we are working on */
1507 id_val
= ior(db
, DM9000_CHIPR
);
1508 dev_dbg(db
->dev
, "dm9000 revision 0x%02x\n", id_val
);
1512 db
->type
= TYPE_DM9000A
;
1515 db
->type
= TYPE_DM9000B
;
1518 dev_dbg(db
->dev
, "ID %02x => defaulting to DM9000E\n", id_val
);
1519 db
->type
= TYPE_DM9000E
;
1522 /* dm9000a/b are capable of hardware checksum offload */
1523 if (db
->type
== TYPE_DM9000A
|| db
->type
== TYPE_DM9000B
) {
1524 ndev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
;
1525 ndev
->features
|= ndev
->hw_features
;
1528 /* from this point we assume that we have found a DM9000 */
1530 /* driver system function */
1533 ndev
->netdev_ops
= &dm9000_netdev_ops
;
1534 ndev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1535 ndev
->ethtool_ops
= &dm9000_ethtool_ops
;
1537 db
->msg_enable
= NETIF_MSG_LINK
;
1538 db
->mii
.phy_id_mask
= 0x1f;
1539 db
->mii
.reg_num_mask
= 0x1f;
1540 db
->mii
.force_media
= 0;
1541 db
->mii
.full_duplex
= 0;
1543 db
->mii
.mdio_read
= dm9000_phy_read
;
1544 db
->mii
.mdio_write
= dm9000_phy_write
;
1548 /* try reading the node address from the attached EEPROM */
1549 for (i
= 0; i
< 6; i
+= 2)
1550 dm9000_read_eeprom(db
, i
/ 2, ndev
->dev_addr
+i
);
1552 if (!is_valid_ether_addr(ndev
->dev_addr
) && pdata
!= NULL
) {
1553 mac_src
= "platform data";
1554 memcpy(ndev
->dev_addr
, pdata
->dev_addr
, 6);
1557 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
1558 /* try reading from mac */
1561 for (i
= 0; i
< 6; i
++)
1562 ndev
->dev_addr
[i
] = ior(db
, i
+DM9000_PAR
);
1565 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
1566 dev_warn(db
->dev
, "%s: Invalid ethernet MAC address. Please "
1567 "set using ifconfig\n", ndev
->name
);
1569 random_ether_addr(ndev
->dev_addr
);
1574 platform_set_drvdata(pdev
, ndev
);
1575 ret
= register_netdev(ndev
);
1578 printk(KERN_INFO
"%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1579 ndev
->name
, dm9000_type_to_char(db
->type
),
1580 db
->io_addr
, db
->io_data
, ndev
->irq
,
1581 ndev
->dev_addr
, mac_src
);
1585 dev_err(db
->dev
, "not found (%d).\n", ret
);
1587 dm9000_release_board(pdev
, db
);
1594 dm9000_drv_suspend(struct device
*dev
)
1596 struct platform_device
*pdev
= to_platform_device(dev
);
1597 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1601 db
= netdev_priv(ndev
);
1604 if (!netif_running(ndev
))
1607 netif_device_detach(ndev
);
1609 /* only shutdown if not using WoL */
1610 if (!db
->wake_state
)
1611 dm9000_shutdown(ndev
);
1617 dm9000_drv_resume(struct device
*dev
)
1619 struct platform_device
*pdev
= to_platform_device(dev
);
1620 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1621 board_info_t
*db
= netdev_priv(ndev
);
1624 if (netif_running(ndev
)) {
1625 /* reset if we were not in wake mode to ensure if
1626 * the device was powered off it is in a known state */
1627 if (!db
->wake_state
) {
1629 dm9000_init_dm9000(ndev
);
1632 netif_device_attach(ndev
);
1640 static const struct dev_pm_ops dm9000_drv_pm_ops
= {
1641 .suspend
= dm9000_drv_suspend
,
1642 .resume
= dm9000_drv_resume
,
1645 static int __devexit
1646 dm9000_drv_remove(struct platform_device
*pdev
)
1648 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1650 platform_set_drvdata(pdev
, NULL
);
1652 unregister_netdev(ndev
);
1653 dm9000_release_board(pdev
, netdev_priv(ndev
));
1654 free_netdev(ndev
); /* free device structure */
1656 dev_dbg(&pdev
->dev
, "released and freed device\n");
1660 static struct platform_driver dm9000_driver
= {
1663 .owner
= THIS_MODULE
,
1664 .pm
= &dm9000_drv_pm_ops
,
1666 .probe
= dm9000_probe
,
1667 .remove
= __devexit_p(dm9000_drv_remove
),
1673 printk(KERN_INFO
"%s Ethernet Driver, V%s\n", CARDNAME
, DRV_VERSION
);
1675 return platform_driver_register(&dm9000_driver
);
1679 dm9000_cleanup(void)
1681 platform_driver_unregister(&dm9000_driver
);
1684 module_init(dm9000_init
);
1685 module_exit(dm9000_cleanup
);
1687 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1688 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1689 MODULE_LICENSE("GPL");
1690 MODULE_ALIAS("platform:dm9000");