2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
45 #include "sym_nvram.h"
48 #define SYM_DEBUG_GENERIC_SUPPORT
52 * Needed function prototypes.
54 static void sym_int_ma (struct sym_hcb
*np
);
55 static void sym_int_sir(struct sym_hcb
*);
56 static struct sym_ccb
*sym_alloc_ccb(struct sym_hcb
*np
);
57 static struct sym_ccb
*sym_ccb_from_dsa(struct sym_hcb
*np
, u32 dsa
);
58 static void sym_alloc_lcb_tags (struct sym_hcb
*np
, u_char tn
, u_char ln
);
59 static void sym_complete_error (struct sym_hcb
*np
, struct sym_ccb
*cp
);
60 static void sym_complete_ok (struct sym_hcb
*np
, struct sym_ccb
*cp
);
61 static int sym_compute_residual(struct sym_hcb
*np
, struct sym_ccb
*cp
);
64 * Print a buffer in hexadecimal format with a ".\n" at end.
66 static void sym_printl_hex(u_char
*p
, int n
)
73 static void sym_print_msg(struct sym_ccb
*cp
, char *label
, u_char
*msg
)
76 sym_print_addr(cp
->cmd
, "%s: ", label
);
78 sym_print_addr(cp
->cmd
, "");
84 static void sym_print_nego_msg(struct sym_hcb
*np
, int target
, char *label
, u_char
*msg
)
86 struct sym_tcb
*tp
= &np
->target
[target
];
87 dev_info(&tp
->starget
->dev
, "%s: ", label
);
94 * Print something that tells about extended errors.
96 void sym_print_xerr(struct scsi_cmnd
*cmd
, int x_status
)
98 if (x_status
& XE_PARITY_ERR
) {
99 sym_print_addr(cmd
, "unrecovered SCSI parity error.\n");
101 if (x_status
& XE_EXTRA_DATA
) {
102 sym_print_addr(cmd
, "extraneous data discarded.\n");
104 if (x_status
& XE_BAD_PHASE
) {
105 sym_print_addr(cmd
, "illegal scsi phase (4/5).\n");
107 if (x_status
& XE_SODL_UNRUN
) {
108 sym_print_addr(cmd
, "ODD transfer in DATA OUT phase.\n");
110 if (x_status
& XE_SWIDE_OVRUN
) {
111 sym_print_addr(cmd
, "ODD transfer in DATA IN phase.\n");
116 * Return a string for SCSI BUS mode.
118 static char *sym_scsi_bus_mode(int mode
)
121 case SMODE_HVD
: return "HVD";
122 case SMODE_SE
: return "SE";
123 case SMODE_LVD
: return "LVD";
129 * Soft reset the chip.
131 * Raising SRST when the chip is running may cause
132 * problems on dual function chips (see below).
133 * On the other hand, LVD devices need some delay
134 * to settle and report actual BUS mode in STEST4.
136 static void sym_chip_reset (struct sym_hcb
*np
)
138 OUTB(np
, nc_istat
, SRST
);
141 OUTB(np
, nc_istat
, 0);
143 udelay(2000); /* For BUS MODE to settle */
147 * Really soft reset the chip.:)
149 * Some 896 and 876 chip revisions may hang-up if we set
150 * the SRST (soft reset) bit at the wrong time when SCRIPTS
152 * So, we need to abort the current operation prior to
153 * soft resetting the chip.
155 static void sym_soft_reset (struct sym_hcb
*np
)
160 if (!(np
->features
& FE_ISTAT1
) || !(INB(np
, nc_istat1
) & SCRUN
))
163 OUTB(np
, nc_istat
, CABRT
);
164 for (i
= 100000 ; i
; --i
) {
165 istat
= INB(np
, nc_istat
);
169 else if (istat
& DIP
) {
170 if (INB(np
, nc_dstat
) & ABRT
)
175 OUTB(np
, nc_istat
, 0);
177 printf("%s: unable to abort current chip operation, "
178 "ISTAT=0x%02x.\n", sym_name(np
), istat
);
184 * Start reset process.
186 * The interrupt handler will reinitialize the chip.
188 static void sym_start_reset(struct sym_hcb
*np
)
190 sym_reset_scsi_bus(np
, 1);
193 int sym_reset_scsi_bus(struct sym_hcb
*np
, int enab_int
)
198 sym_soft_reset(np
); /* Soft reset the chip */
200 OUTW(np
, nc_sien
, RST
);
202 * Enable Tolerant, reset IRQD if present and
203 * properly set IRQ mode, prior to resetting the bus.
205 OUTB(np
, nc_stest3
, TE
);
206 OUTB(np
, nc_dcntl
, (np
->rv_dcntl
& IRQM
));
207 OUTB(np
, nc_scntl1
, CRST
);
211 if (!SYM_SETUP_SCSI_BUS_CHECK
)
214 * Check for no terminators or SCSI bus shorts to ground.
215 * Read SCSI data bus, data parity bits and control signals.
216 * We are expecting RESET to be TRUE and other signals to be
219 term
= INB(np
, nc_sstat0
);
220 term
= ((term
& 2) << 7) + ((term
& 1) << 17); /* rst sdp0 */
221 term
|= ((INB(np
, nc_sstat2
) & 0x01) << 26) | /* sdp1 */
222 ((INW(np
, nc_sbdl
) & 0xff) << 9) | /* d7-0 */
223 ((INW(np
, nc_sbdl
) & 0xff00) << 10) | /* d15-8 */
224 INB(np
, nc_sbcl
); /* req ack bsy sel atn msg cd io */
229 if (term
!= (2<<7)) {
230 printf("%s: suspicious SCSI data while resetting the BUS.\n",
232 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
233 "0x%lx, expecting 0x%lx\n",
235 (np
->features
& FE_WIDE
) ? "dp1,d15-8," : "",
236 (u_long
)term
, (u_long
)(2<<7));
237 if (SYM_SETUP_SCSI_BUS_CHECK
== 1)
241 OUTB(np
, nc_scntl1
, 0);
246 * Select SCSI clock frequency
248 static void sym_selectclock(struct sym_hcb
*np
, u_char scntl3
)
251 * If multiplier not present or not selected, leave here.
253 if (np
->multiplier
<= 1) {
254 OUTB(np
, nc_scntl3
, scntl3
);
258 if (sym_verbose
>= 2)
259 printf ("%s: enabling clock multiplier\n", sym_name(np
));
261 OUTB(np
, nc_stest1
, DBLEN
); /* Enable clock multiplier */
263 * Wait for the LCKFRQ bit to be set if supported by the chip.
264 * Otherwise wait 50 micro-seconds (at least).
266 if (np
->features
& FE_LCKFRQ
) {
268 while (!(INB(np
, nc_stest4
) & LCKFRQ
) && --i
> 0)
271 printf("%s: the chip cannot lock the frequency\n",
277 OUTB(np
, nc_stest3
, HSC
); /* Halt the scsi clock */
278 OUTB(np
, nc_scntl3
, scntl3
);
279 OUTB(np
, nc_stest1
, (DBLEN
|DBLSEL
));/* Select clock multiplier */
280 OUTB(np
, nc_stest3
, 0x00); /* Restart scsi clock */
285 * Determine the chip's clock frequency.
287 * This is essential for the negotiation of the synchronous
290 * Note: we have to return the correct value.
291 * THERE IS NO SAFE DEFAULT VALUE.
293 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
294 * 53C860 and 53C875 rev. 1 support fast20 transfers but
295 * do not have a clock doubler and so are provided with a
296 * 80 MHz clock. All other fast20 boards incorporate a doubler
297 * and so should be delivered with a 40 MHz clock.
298 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
299 * clock and provide a clock quadrupler (160 Mhz).
303 * calculate SCSI clock frequency (in KHz)
305 static unsigned getfreq (struct sym_hcb
*np
, int gen
)
311 * Measure GEN timer delay in order
312 * to calculate SCSI clock frequency
314 * This code will never execute too
315 * many loop iterations (if DELAY is
316 * reasonably correct). It could get
317 * too low a delay (too high a freq.)
318 * if the CPU is slow executing the
319 * loop for some reason (an NMI, for
320 * example). For this reason we will
321 * if multiple measurements are to be
322 * performed trust the higher delay
323 * (lower frequency returned).
325 OUTW(np
, nc_sien
, 0); /* mask all scsi interrupts */
326 INW(np
, nc_sist
); /* clear pending scsi interrupt */
327 OUTB(np
, nc_dien
, 0); /* mask all dma interrupts */
328 INW(np
, nc_sist
); /* another one, just to be sure :) */
330 * The C1010-33 core does not report GEN in SIST,
331 * if this interrupt is masked in SIEN.
332 * I don't know yet if the C1010-66 behaves the same way.
334 if (np
->features
& FE_C10
) {
335 OUTW(np
, nc_sien
, GEN
);
336 OUTB(np
, nc_istat1
, SIRQD
);
338 OUTB(np
, nc_scntl3
, 4); /* set pre-scaler to divide by 3 */
339 OUTB(np
, nc_stime1
, 0); /* disable general purpose timer */
340 OUTB(np
, nc_stime1
, gen
); /* set to nominal delay of 1<<gen * 125us */
341 while (!(INW(np
, nc_sist
) & GEN
) && ms
++ < 100000)
342 udelay(1000/4); /* count in 1/4 of ms */
343 OUTB(np
, nc_stime1
, 0); /* disable general purpose timer */
345 * Undo C1010-33 specific settings.
347 if (np
->features
& FE_C10
) {
348 OUTW(np
, nc_sien
, 0);
349 OUTB(np
, nc_istat1
, 0);
352 * set prescaler to divide by whatever 0 means
353 * 0 ought to choose divide by 2, but appears
354 * to set divide by 3.5 mode in my 53c810 ...
356 OUTB(np
, nc_scntl3
, 0);
359 * adjust for prescaler, and convert into KHz
361 f
= ms
? ((1 << gen
) * (4340*4)) / ms
: 0;
364 * The C1010-33 result is biased by a factor
365 * of 2/3 compared to earlier chips.
367 if (np
->features
& FE_C10
)
370 if (sym_verbose
>= 2)
371 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
372 sym_name(np
), gen
, ms
/4, f
);
377 static unsigned sym_getfreq (struct sym_hcb
*np
)
382 getfreq (np
, gen
); /* throw away first result */
383 f1
= getfreq (np
, gen
);
384 f2
= getfreq (np
, gen
);
385 if (f1
> f2
) f1
= f2
; /* trust lower result */
390 * Get/probe chip SCSI clock frequency
392 static void sym_getclock (struct sym_hcb
*np
, int mult
)
394 unsigned char scntl3
= np
->sv_scntl3
;
395 unsigned char stest1
= np
->sv_stest1
;
401 * True with 875/895/896/895A with clock multiplier selected
403 if (mult
> 1 && (stest1
& (DBLEN
+DBLSEL
)) == DBLEN
+DBLSEL
) {
404 if (sym_verbose
>= 2)
405 printf ("%s: clock multiplier found\n", sym_name(np
));
406 np
->multiplier
= mult
;
410 * If multiplier not found or scntl3 not 7,5,3,
411 * reset chip and get frequency from general purpose timer.
412 * Otherwise trust scntl3 BIOS setting.
414 if (np
->multiplier
!= mult
|| (scntl3
& 7) < 3 || !(scntl3
& 1)) {
415 OUTB(np
, nc_stest1
, 0); /* make sure doubler is OFF */
416 f1
= sym_getfreq (np
);
419 printf ("%s: chip clock is %uKHz\n", sym_name(np
), f1
);
421 if (f1
< 45000) f1
= 40000;
422 else if (f1
< 55000) f1
= 50000;
425 if (f1
< 80000 && mult
> 1) {
426 if (sym_verbose
>= 2)
427 printf ("%s: clock multiplier assumed\n",
429 np
->multiplier
= mult
;
432 if ((scntl3
& 7) == 3) f1
= 40000;
433 else if ((scntl3
& 7) == 5) f1
= 80000;
436 f1
/= np
->multiplier
;
440 * Compute controller synchronous parameters.
442 f1
*= np
->multiplier
;
447 * Get/probe PCI clock frequency
449 static int sym_getpciclock (struct sym_hcb
*np
)
454 * For now, we only need to know about the actual
455 * PCI BUS clock frequency for C1010-66 chips.
458 if (np
->features
& FE_66MHZ
) {
462 OUTB(np
, nc_stest1
, SCLK
); /* Use the PCI clock as SCSI clock */
464 OUTB(np
, nc_stest1
, 0);
472 * SYMBIOS chip clock divisor table.
474 * Divisors are multiplied by 10,000,000 in order to make
475 * calculations more simple.
478 static const u32 div_10M
[] = {2*_5M
, 3*_5M
, 4*_5M
, 6*_5M
, 8*_5M
, 12*_5M
, 16*_5M
};
481 * Get clock factor and sync divisor for a given
482 * synchronous factor period.
485 sym_getsync(struct sym_hcb
*np
, u_char dt
, u_char sfac
, u_char
*divp
, u_char
*fakp
)
487 u32 clk
= np
->clock_khz
; /* SCSI clock frequency in kHz */
488 int div
= np
->clock_divn
; /* Number of divisors supported */
489 u32 fak
; /* Sync factor in sxfer */
490 u32 per
; /* Period in tenths of ns */
491 u32 kpc
; /* (per * clk) */
495 * Compute the synchronous period in tenths of nano-seconds
497 if (dt
&& sfac
<= 9) per
= 125;
498 else if (sfac
<= 10) per
= 250;
499 else if (sfac
== 11) per
= 303;
500 else if (sfac
== 12) per
= 500;
501 else per
= 40 * sfac
;
509 * For earliest C10 revision 0, we cannot use extra
510 * clocks for the setting of the SCSI clocking.
511 * Note that this limits the lowest sync data transfer
512 * to 5 Mega-transfers per second and may result in
513 * using higher clock divisors.
516 if ((np
->features
& (FE_C10
|FE_U3EN
)) == FE_C10
) {
518 * Look for the lowest clock divisor that allows an
519 * output speed not faster than the period.
523 if (kpc
> (div_10M
[div
] << 2)) {
528 fak
= 0; /* No extra clocks */
529 if (div
== np
->clock_divn
) { /* Are we too fast ? */
539 * Look for the greatest clock divisor that allows an
540 * input speed faster than the period.
543 if (kpc
>= (div_10M
[div
] << 2)) break;
546 * Calculate the lowest clock factor that allows an output
547 * speed not faster than the period, and the max output speed.
548 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
549 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
552 fak
= (kpc
- 1) / (div_10M
[div
] << 1) + 1 - 2;
553 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
555 fak
= (kpc
- 1) / div_10M
[div
] + 1 - 4;
556 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
560 * Check against our hardware limits, or bugs :).
568 * Compute and return sync parameters.
577 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
578 * 128 transfers. All chips support at least 16 transfers
579 * bursts. The 825A, 875 and 895 chips support bursts of up
580 * to 128 transfers and the 895A and 896 support bursts of up
581 * to 64 transfers. All other chips support up to 16
584 * For PCI 32 bit data transfers each transfer is a DWORD.
585 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
587 * We use log base 2 (burst length) as internal code, with
588 * value 0 meaning "burst disabled".
592 * Burst length from burst code.
594 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
597 * Burst code from io register bits.
599 #define burst_code(dmode, ctest4, ctest5) \
600 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
603 * Set initial io register bits from burst code.
605 static inline void sym_init_burst(struct sym_hcb
*np
, u_char bc
)
607 np
->rv_ctest4
&= ~0x80;
608 np
->rv_dmode
&= ~(0x3 << 6);
609 np
->rv_ctest5
&= ~0x4;
612 np
->rv_ctest4
|= 0x80;
616 np
->rv_dmode
|= ((bc
& 0x3) << 6);
617 np
->rv_ctest5
|= (bc
& 0x4);
622 * Save initial settings of some IO registers.
623 * Assumed to have been set by BIOS.
624 * We cannot reset the chip prior to reading the
625 * IO registers, since informations will be lost.
626 * Since the SCRIPTS processor may be running, this
627 * is not safe on paper, but it seems to work quite
630 static void sym_save_initial_setting (struct sym_hcb
*np
)
632 np
->sv_scntl0
= INB(np
, nc_scntl0
) & 0x0a;
633 np
->sv_scntl3
= INB(np
, nc_scntl3
) & 0x07;
634 np
->sv_dmode
= INB(np
, nc_dmode
) & 0xce;
635 np
->sv_dcntl
= INB(np
, nc_dcntl
) & 0xa8;
636 np
->sv_ctest3
= INB(np
, nc_ctest3
) & 0x01;
637 np
->sv_ctest4
= INB(np
, nc_ctest4
) & 0x80;
638 np
->sv_gpcntl
= INB(np
, nc_gpcntl
);
639 np
->sv_stest1
= INB(np
, nc_stest1
);
640 np
->sv_stest2
= INB(np
, nc_stest2
) & 0x20;
641 np
->sv_stest4
= INB(np
, nc_stest4
);
642 if (np
->features
& FE_C10
) { /* Always large DMA fifo + ultra3 */
643 np
->sv_scntl4
= INB(np
, nc_scntl4
);
644 np
->sv_ctest5
= INB(np
, nc_ctest5
) & 0x04;
647 np
->sv_ctest5
= INB(np
, nc_ctest5
) & 0x24;
652 * - LVD capable chips (895/895A/896/1010) report the current BUS mode
653 * through the STEST4 IO register.
654 * - For previous generation chips (825/825A/875), the user has to tell us
655 * how to check against HVD, since a 100% safe algorithm is not possible.
657 static void sym_set_bus_mode(struct sym_hcb
*np
, struct sym_nvram
*nvram
)
662 np
->scsi_mode
= SMODE_SE
;
663 if (np
->features
& (FE_ULTRA2
|FE_ULTRA3
))
664 np
->scsi_mode
= (np
->sv_stest4
& SMODE
);
665 else if (np
->features
& FE_DIFF
) {
666 if (SYM_SETUP_SCSI_DIFF
== 1) {
668 if (np
->sv_stest2
& 0x20)
669 np
->scsi_mode
= SMODE_HVD
;
670 } else if (nvram
->type
== SYM_SYMBIOS_NVRAM
) {
671 if (!(INB(np
, nc_gpreg
) & 0x08))
672 np
->scsi_mode
= SMODE_HVD
;
674 } else if (SYM_SETUP_SCSI_DIFF
== 2)
675 np
->scsi_mode
= SMODE_HVD
;
677 if (np
->scsi_mode
== SMODE_HVD
)
678 np
->rv_stest2
|= 0x20;
682 * Prepare io register values used by sym_start_up()
683 * according to selected and supported features.
685 static int sym_prepare_setting(struct Scsi_Host
*shost
, struct sym_hcb
*np
, struct sym_nvram
*nvram
)
687 struct sym_data
*sym_data
= shost_priv(shost
);
688 struct pci_dev
*pdev
= sym_data
->pdev
;
693 np
->maxwide
= (np
->features
& FE_WIDE
) ? 1 : 0;
696 * Guess the frequency of the chip's clock.
698 if (np
->features
& (FE_ULTRA3
| FE_ULTRA2
))
699 np
->clock_khz
= 160000;
700 else if (np
->features
& FE_ULTRA
)
701 np
->clock_khz
= 80000;
703 np
->clock_khz
= 40000;
706 * Get the clock multiplier factor.
708 if (np
->features
& FE_QUAD
)
710 else if (np
->features
& FE_DBLR
)
716 * Measure SCSI clock frequency for chips
717 * it may vary from assumed one.
719 if (np
->features
& FE_VARCLK
)
720 sym_getclock(np
, np
->multiplier
);
723 * Divisor to be used for async (timer pre-scaler).
725 i
= np
->clock_divn
- 1;
727 if (10ul * SYM_CONF_MIN_ASYNC
* np
->clock_khz
> div_10M
[i
]) {
735 * The C1010 uses hardwired divisors for async.
736 * So, we just throw away, the async. divisor.:-)
738 if (np
->features
& FE_C10
)
742 * Minimum synchronous period factor supported by the chip.
743 * Btw, 'period' is in tenths of nanoseconds.
745 period
= (4 * div_10M
[0] + np
->clock_khz
- 1) / np
->clock_khz
;
747 if (period
<= 250) np
->minsync
= 10;
748 else if (period
<= 303) np
->minsync
= 11;
749 else if (period
<= 500) np
->minsync
= 12;
750 else np
->minsync
= (period
+ 40 - 1) / 40;
753 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
755 if (np
->minsync
< 25 &&
756 !(np
->features
& (FE_ULTRA
|FE_ULTRA2
|FE_ULTRA3
)))
758 else if (np
->minsync
< 12 &&
759 !(np
->features
& (FE_ULTRA2
|FE_ULTRA3
)))
763 * Maximum synchronous period factor supported by the chip.
765 period
= (11 * div_10M
[np
->clock_divn
- 1]) / (4 * np
->clock_khz
);
766 np
->maxsync
= period
> 2540 ? 254 : period
/ 10;
769 * If chip is a C1010, guess the sync limits in DT mode.
771 if ((np
->features
& (FE_C10
|FE_ULTRA3
)) == (FE_C10
|FE_ULTRA3
)) {
772 if (np
->clock_khz
== 160000) {
775 np
->maxoffs_dt
= nvram
->type
? 62 : 31;
780 * 64 bit addressing (895A/896/1010) ?
782 if (np
->features
& FE_DAC
) {
784 np
->rv_ccntl1
|= (DDAC
);
785 else if (SYM_CONF_DMA_ADDRESSING_MODE
== 1)
786 np
->rv_ccntl1
|= (XTIMOD
| EXTIBMV
);
787 else if (SYM_CONF_DMA_ADDRESSING_MODE
== 2)
788 np
->rv_ccntl1
|= (0 | EXTIBMV
);
792 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
794 if (np
->features
& FE_NOPM
)
795 np
->rv_ccntl0
|= (ENPMJ
);
798 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
799 * In dual channel mode, contention occurs if internal cycles
800 * are used. Disable internal cycles.
802 if (pdev
->device
== PCI_DEVICE_ID_LSI_53C1010_33
&&
803 pdev
->revision
< 0x1)
804 np
->rv_ccntl0
|= DILS
;
807 * Select burst length (dwords)
809 burst_max
= SYM_SETUP_BURST_ORDER
;
810 if (burst_max
== 255)
811 burst_max
= burst_code(np
->sv_dmode
, np
->sv_ctest4
,
815 if (burst_max
> np
->maxburst
)
816 burst_max
= np
->maxburst
;
819 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
820 * This chip and the 860 Rev 1 may wrongly use PCI cache line
821 * based transactions on LOAD/STORE instructions. So we have
822 * to prevent these chips from using such PCI transactions in
823 * this driver. The generic ncr driver that does not use
824 * LOAD/STORE instructions does not need this work-around.
826 if ((pdev
->device
== PCI_DEVICE_ID_NCR_53C810
&&
827 pdev
->revision
>= 0x10 && pdev
->revision
<= 0x11) ||
828 (pdev
->device
== PCI_DEVICE_ID_NCR_53C860
&&
829 pdev
->revision
<= 0x1))
830 np
->features
&= ~(FE_WRIE
|FE_ERL
|FE_ERMP
);
833 * Select all supported special features.
834 * If we are using on-board RAM for scripts, prefetch (PFEN)
835 * does not help, but burst op fetch (BOF) does.
836 * Disabling PFEN makes sure BOF will be used.
838 if (np
->features
& FE_ERL
)
839 np
->rv_dmode
|= ERL
; /* Enable Read Line */
840 if (np
->features
& FE_BOF
)
841 np
->rv_dmode
|= BOF
; /* Burst Opcode Fetch */
842 if (np
->features
& FE_ERMP
)
843 np
->rv_dmode
|= ERMP
; /* Enable Read Multiple */
845 if ((np
->features
& FE_PFEN
) && !np
->ram_ba
)
847 if (np
->features
& FE_PFEN
)
849 np
->rv_dcntl
|= PFEN
; /* Prefetch Enable */
850 if (np
->features
& FE_CLSE
)
851 np
->rv_dcntl
|= CLSE
; /* Cache Line Size Enable */
852 if (np
->features
& FE_WRIE
)
853 np
->rv_ctest3
|= WRIE
; /* Write and Invalidate */
854 if (np
->features
& FE_DFS
)
855 np
->rv_ctest5
|= DFS
; /* Dma Fifo Size */
860 np
->rv_ctest4
|= MPEE
; /* Master parity checking */
861 np
->rv_scntl0
|= 0x0a; /* full arb., ena parity, par->ATN */
864 * Get parity checking, host ID and verbose mode from NVRAM
868 sym_nvram_setup_host(shost
, np
, nvram
);
871 * Get SCSI addr of host adapter (set by bios?).
873 if (np
->myaddr
== 255) {
874 np
->myaddr
= INB(np
, nc_scid
) & 0x07;
876 np
->myaddr
= SYM_SETUP_HOST_ID
;
880 * Prepare initial io register bits for burst length
882 sym_init_burst(np
, burst_max
);
884 sym_set_bus_mode(np
, nvram
);
887 * Set LED support from SCRIPTS.
888 * Ignore this feature for boards known to use a
889 * specific GPIO wiring and for the 895A, 896
890 * and 1010 that drive the LED directly.
892 if ((SYM_SETUP_SCSI_LED
||
893 (nvram
->type
== SYM_SYMBIOS_NVRAM
||
894 (nvram
->type
== SYM_TEKRAM_NVRAM
&&
895 pdev
->device
== PCI_DEVICE_ID_NCR_53C895
))) &&
896 !(np
->features
& FE_LEDC
) && !(np
->sv_gpcntl
& 0x01))
897 np
->features
|= FE_LED0
;
902 switch(SYM_SETUP_IRQ_MODE
& 3) {
904 np
->rv_dcntl
|= IRQM
;
907 np
->rv_dcntl
|= (np
->sv_dcntl
& IRQM
);
914 * Configure targets according to driver setup.
915 * If NVRAM present get targets setup from NVRAM.
917 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
918 struct sym_tcb
*tp
= &np
->target
[i
];
920 tp
->usrflags
|= (SYM_DISC_ENABLED
| SYM_TAGS_ENABLED
);
921 tp
->usrtags
= SYM_SETUP_MAX_TAG
;
922 tp
->usr_width
= np
->maxwide
;
925 sym_nvram_setup_target(tp
, i
, nvram
);
928 tp
->usrflags
&= ~SYM_TAGS_ENABLED
;
932 * Let user know about the settings.
934 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np
),
935 sym_nvram_type(nvram
), np
->myaddr
,
936 (np
->features
& FE_ULTRA3
) ? 80 :
937 (np
->features
& FE_ULTRA2
) ? 40 :
938 (np
->features
& FE_ULTRA
) ? 20 : 10,
939 sym_scsi_bus_mode(np
->scsi_mode
),
940 (np
->rv_scntl0
& 0xa) ? "parity checking" : "NO parity");
942 * Tell him more on demand.
945 printf("%s: %s IRQ line driver%s\n",
947 np
->rv_dcntl
& IRQM
? "totem pole" : "open drain",
948 np
->ram_ba
? ", using on-chip SRAM" : "");
949 printf("%s: using %s firmware.\n", sym_name(np
), np
->fw_name
);
950 if (np
->features
& FE_NOPM
)
951 printf("%s: handling phase mismatch from SCRIPTS.\n",
957 if (sym_verbose
>= 2) {
958 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
959 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
960 sym_name(np
), np
->sv_scntl3
, np
->sv_dmode
, np
->sv_dcntl
,
961 np
->sv_ctest3
, np
->sv_ctest4
, np
->sv_ctest5
);
963 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
964 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
965 sym_name(np
), np
->rv_scntl3
, np
->rv_dmode
, np
->rv_dcntl
,
966 np
->rv_ctest3
, np
->rv_ctest4
, np
->rv_ctest5
);
973 * Test the pci bus snoop logic :-(
975 * Has to be called with interrupts disabled.
977 #ifdef CONFIG_SCSI_SYM53C8XX_MMIO
978 static int sym_regtest(struct sym_hcb
*np
)
980 register volatile u32 data
;
982 * chip registers may NOT be cached.
983 * write 0xffffffff to a read only register area,
984 * and try to read it back.
987 OUTL(np
, nc_dstat
, data
);
988 data
= INL(np
, nc_dstat
);
990 if (data
== 0xffffffff) {
992 if ((data
& 0xe2f0fffd) != 0x02000080) {
994 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1001 static inline int sym_regtest(struct sym_hcb
*np
)
1007 static int sym_snooptest(struct sym_hcb
*np
)
1009 u32 sym_rd
, sym_wr
, sym_bk
, host_rd
, host_wr
, pc
, dstat
;
1012 err
= sym_regtest(np
);
1017 * Enable Master Parity Checking as we intend
1018 * to enable it for normal operations.
1020 OUTB(np
, nc_ctest4
, (np
->rv_ctest4
& MPEE
));
1024 pc
= SCRIPTZ_BA(np
, snooptest
);
1028 * Set memory and register.
1030 np
->scratch
= cpu_to_scr(host_wr
);
1031 OUTL(np
, nc_temp
, sym_wr
);
1033 * Start script (exchange values)
1035 OUTL(np
, nc_dsa
, np
->hcb_ba
);
1038 * Wait 'til done (with timeout)
1040 for (i
=0; i
<SYM_SNOOP_TIMEOUT
; i
++)
1041 if (INB(np
, nc_istat
) & (INTF
|SIP
|DIP
))
1043 if (i
>=SYM_SNOOP_TIMEOUT
) {
1044 printf ("CACHE TEST FAILED: timeout.\n");
1048 * Check for fatal DMA errors.
1050 dstat
= INB(np
, nc_dstat
);
1051 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1052 if ((dstat
& MDPE
) && (np
->rv_ctest4
& MPEE
)) {
1053 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1054 "DISABLING MASTER DATA PARITY CHECKING.\n",
1056 np
->rv_ctest4
&= ~MPEE
;
1060 if (dstat
& (MDPE
|BF
|IID
)) {
1061 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat
);
1065 * Save termination position.
1067 pc
= INL(np
, nc_dsp
);
1069 * Read memory and register.
1071 host_rd
= scr_to_cpu(np
->scratch
);
1072 sym_rd
= INL(np
, nc_scratcha
);
1073 sym_bk
= INL(np
, nc_temp
);
1075 * Check termination position.
1077 if (pc
!= SCRIPTZ_BA(np
, snoopend
)+8) {
1078 printf ("CACHE TEST FAILED: script execution failed.\n");
1079 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1080 (u_long
) SCRIPTZ_BA(np
, snooptest
), (u_long
) pc
,
1081 (u_long
) SCRIPTZ_BA(np
, snoopend
) +8);
1087 if (host_wr
!= sym_rd
) {
1088 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1089 (int) host_wr
, (int) sym_rd
);
1092 if (host_rd
!= sym_wr
) {
1093 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1094 (int) sym_wr
, (int) host_rd
);
1097 if (sym_bk
!= sym_wr
) {
1098 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1099 (int) sym_wr
, (int) sym_bk
);
1107 * log message for real hard errors
1109 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1110 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1112 * exception register:
1117 * so: control lines as driven by chip.
1118 * si: control lines as seen by chip.
1119 * sd: scsi data lines as seen by chip.
1122 * sx: sxfer (see the manual)
1123 * s3: scntl3 (see the manual)
1124 * s4: scntl4 (see the manual)
1126 * current script command:
1127 * dsp: script address (relative to start of script).
1128 * dbc: first word of script command.
1130 * First 24 register of the chip:
1133 static void sym_log_hard_error(struct Scsi_Host
*shost
, u_short sist
, u_char dstat
)
1135 struct sym_hcb
*np
= sym_get_hcb(shost
);
1140 u_char
*script_base
;
1143 dsp
= INL(np
, nc_dsp
);
1145 if (dsp
> np
->scripta_ba
&&
1146 dsp
<= np
->scripta_ba
+ np
->scripta_sz
) {
1147 script_ofs
= dsp
- np
->scripta_ba
;
1148 script_size
= np
->scripta_sz
;
1149 script_base
= (u_char
*) np
->scripta0
;
1150 script_name
= "scripta";
1152 else if (np
->scriptb_ba
< dsp
&&
1153 dsp
<= np
->scriptb_ba
+ np
->scriptb_sz
) {
1154 script_ofs
= dsp
- np
->scriptb_ba
;
1155 script_size
= np
->scriptb_sz
;
1156 script_base
= (u_char
*) np
->scriptb0
;
1157 script_name
= "scriptb";
1162 script_name
= "mem";
1165 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1166 sym_name(np
), (unsigned)INB(np
, nc_sdid
)&0x0f, dstat
, sist
,
1167 (unsigned)INB(np
, nc_socl
), (unsigned)INB(np
, nc_sbcl
),
1168 (unsigned)INB(np
, nc_sbdl
), (unsigned)INB(np
, nc_sxfer
),
1169 (unsigned)INB(np
, nc_scntl3
),
1170 (np
->features
& FE_C10
) ? (unsigned)INB(np
, nc_scntl4
) : 0,
1171 script_name
, script_ofs
, (unsigned)INL(np
, nc_dbc
));
1173 if (((script_ofs
& 3) == 0) &&
1174 (unsigned)script_ofs
< script_size
) {
1175 printf ("%s: script cmd = %08x\n", sym_name(np
),
1176 scr_to_cpu((int) *(u32
*)(script_base
+ script_ofs
)));
1179 printf("%s: regdump:", sym_name(np
));
1180 for (i
= 0; i
< 24; i
++)
1181 printf(" %02x", (unsigned)INB_OFF(np
, i
));
1187 if (dstat
& (MDPE
|BF
))
1188 sym_log_bus_error(shost
);
1191 void sym_dump_registers(struct Scsi_Host
*shost
)
1193 struct sym_hcb
*np
= sym_get_hcb(shost
);
1197 sist
= INW(np
, nc_sist
);
1198 dstat
= INB(np
, nc_dstat
);
1199 sym_log_hard_error(shost
, sist
, dstat
);
1202 static struct sym_chip sym_dev_table
[] = {
1203 {PCI_DEVICE_ID_NCR_53C810
, 0x0f, "810", 4, 8, 4, 64,
1206 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1207 {PCI_DEVICE_ID_NCR_53C810
, 0xff, "810a", 4, 8, 4, 1,
1211 {PCI_DEVICE_ID_NCR_53C810
, 0xff, "810a", 4, 8, 4, 1,
1212 FE_CACHE_SET
|FE_LDSTR
|FE_PFEN
|FE_BOF
}
1215 {PCI_DEVICE_ID_NCR_53C815
, 0xff, "815", 4, 8, 4, 64,
1218 {PCI_DEVICE_ID_NCR_53C825
, 0x0f, "825", 6, 8, 4, 64,
1219 FE_WIDE
|FE_BOF
|FE_ERL
|FE_DIFF
}
1221 {PCI_DEVICE_ID_NCR_53C825
, 0xff, "825a", 6, 8, 4, 2,
1222 FE_WIDE
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|FE_RAM
|FE_DIFF
}
1224 {PCI_DEVICE_ID_NCR_53C860
, 0xff, "860", 4, 8, 5, 1,
1225 FE_ULTRA
|FE_CACHE_SET
|FE_BOF
|FE_LDSTR
|FE_PFEN
}
1227 {PCI_DEVICE_ID_NCR_53C875
, 0x01, "875", 6, 16, 5, 2,
1228 FE_WIDE
|FE_ULTRA
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1229 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1231 {PCI_DEVICE_ID_NCR_53C875
, 0xff, "875", 6, 16, 5, 2,
1232 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1233 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1235 {PCI_DEVICE_ID_NCR_53C875J
, 0xff, "875J", 6, 16, 5, 2,
1236 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1237 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1239 {PCI_DEVICE_ID_NCR_53C885
, 0xff, "885", 6, 16, 5, 2,
1240 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1241 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1243 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1244 {PCI_DEVICE_ID_NCR_53C895
, 0xff, "895", 6, 31, 7, 2,
1245 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|
1249 {PCI_DEVICE_ID_NCR_53C895
, 0xff, "895", 6, 31, 7, 2,
1250 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1254 {PCI_DEVICE_ID_NCR_53C896
, 0xff, "896", 6, 31, 7, 4,
1255 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1256 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1258 {PCI_DEVICE_ID_LSI_53C895A
, 0xff, "895a", 6, 31, 7, 4,
1259 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1260 FE_RAM
|FE_RAM8K
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1262 {PCI_DEVICE_ID_LSI_53C875A
, 0xff, "875a", 6, 31, 7, 4,
1263 FE_WIDE
|FE_ULTRA
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1264 FE_RAM
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1266 {PCI_DEVICE_ID_LSI_53C1010_33
, 0x00, "1010-33", 6, 31, 7, 8,
1267 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1268 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_CRC
|
1271 {PCI_DEVICE_ID_LSI_53C1010_33
, 0xff, "1010-33", 6, 31, 7, 8,
1272 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1273 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_CRC
|
1276 {PCI_DEVICE_ID_LSI_53C1010_66
, 0xff, "1010-66", 6, 31, 7, 8,
1277 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1278 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_66MHZ
|FE_CRC
|
1281 {PCI_DEVICE_ID_LSI_53C1510
, 0xff, "1510d", 6, 31, 7, 4,
1282 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1283 FE_RAM
|FE_IO256
|FE_LEDC
}
1286 #define sym_num_devs (ARRAY_SIZE(sym_dev_table))
1289 * Look up the chip table.
1291 * Return a pointer to the chip entry if found,
1295 sym_lookup_chip_table (u_short device_id
, u_char revision
)
1297 struct sym_chip
*chip
;
1300 for (i
= 0; i
< sym_num_devs
; i
++) {
1301 chip
= &sym_dev_table
[i
];
1302 if (device_id
!= chip
->device_id
)
1304 if (revision
> chip
->revision_id
)
1312 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1314 * Lookup the 64 bit DMA segments map.
1315 * This is only used if the direct mapping
1316 * has been unsuccessful.
1318 int sym_lookup_dmap(struct sym_hcb
*np
, u32 h
, int s
)
1325 /* Look up existing mappings */
1326 for (i
= SYM_DMAP_SIZE
-1; i
> 0; i
--) {
1327 if (h
== np
->dmap_bah
[i
])
1330 /* If direct mapping is free, get it */
1331 if (!np
->dmap_bah
[s
])
1333 /* Collision -> lookup free mappings */
1334 for (s
= SYM_DMAP_SIZE
-1; s
> 0; s
--) {
1335 if (!np
->dmap_bah
[s
])
1339 panic("sym: ran out of 64 bit DMA segment registers");
1342 np
->dmap_bah
[s
] = h
;
1348 * Update IO registers scratch C..R so they will be
1349 * in sync. with queued CCB expectations.
1351 static void sym_update_dmap_regs(struct sym_hcb
*np
)
1355 if (!np
->dmap_dirty
)
1357 o
= offsetof(struct sym_reg
, nc_scrx
[0]);
1358 for (i
= 0; i
< SYM_DMAP_SIZE
; i
++) {
1359 OUTL_OFF(np
, o
, np
->dmap_bah
[i
]);
1366 /* Enforce all the fiddly SPI rules and the chip limitations */
1367 static void sym_check_goals(struct sym_hcb
*np
, struct scsi_target
*starget
,
1368 struct sym_trans
*goal
)
1370 if (!spi_support_wide(starget
))
1373 if (!spi_support_sync(starget
)) {
1381 if (spi_support_dt(starget
)) {
1382 if (spi_support_dt_only(starget
))
1385 if (goal
->offset
== 0)
1391 /* Some targets fail to properly negotiate DT in SE mode */
1392 if ((np
->scsi_mode
!= SMODE_LVD
) || !(np
->features
& FE_U3EN
))
1396 /* all DT transfers must be wide */
1398 if (goal
->offset
> np
->maxoffs_dt
)
1399 goal
->offset
= np
->maxoffs_dt
;
1400 if (goal
->period
< np
->minsync_dt
)
1401 goal
->period
= np
->minsync_dt
;
1402 if (goal
->period
> np
->maxsync_dt
)
1403 goal
->period
= np
->maxsync_dt
;
1405 goal
->iu
= goal
->qas
= 0;
1406 if (goal
->offset
> np
->maxoffs
)
1407 goal
->offset
= np
->maxoffs
;
1408 if (goal
->period
< np
->minsync
)
1409 goal
->period
= np
->minsync
;
1410 if (goal
->period
> np
->maxsync
)
1411 goal
->period
= np
->maxsync
;
1416 * Prepare the next negotiation message if needed.
1418 * Fill in the part of message buffer that contains the
1419 * negotiation and the nego_status field of the CCB.
1420 * Returns the size of the message in bytes.
1422 static int sym_prepare_nego(struct sym_hcb
*np
, struct sym_ccb
*cp
, u_char
*msgptr
)
1424 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
1425 struct scsi_target
*starget
= tp
->starget
;
1426 struct sym_trans
*goal
= &tp
->tgoal
;
1430 sym_check_goals(np
, starget
, goal
);
1433 * Many devices implement PPR in a buggy way, so only use it if we
1436 if (goal
->renego
== NS_PPR
|| (goal
->offset
&&
1437 (goal
->iu
|| goal
->dt
|| goal
->qas
|| (goal
->period
< 0xa)))) {
1439 } else if (goal
->renego
== NS_WIDE
|| goal
->width
) {
1441 } else if (goal
->renego
== NS_SYNC
|| goal
->offset
) {
1444 goal
->check_nego
= 0;
1450 msglen
+= spi_populate_sync_msg(msgptr
+ msglen
, goal
->period
,
1454 msglen
+= spi_populate_width_msg(msgptr
+ msglen
, goal
->width
);
1457 msglen
+= spi_populate_ppr_msg(msgptr
+ msglen
, goal
->period
,
1458 goal
->offset
, goal
->width
,
1459 (goal
->iu
? PPR_OPT_IU
: 0) |
1460 (goal
->dt
? PPR_OPT_DT
: 0) |
1461 (goal
->qas
? PPR_OPT_QAS
: 0));
1465 cp
->nego_status
= nego
;
1468 tp
->nego_cp
= cp
; /* Keep track a nego will be performed */
1469 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
1470 sym_print_nego_msg(np
, cp
->target
,
1471 nego
== NS_SYNC
? "sync msgout" :
1472 nego
== NS_WIDE
? "wide msgout" :
1473 "ppr msgout", msgptr
);
1481 * Insert a job into the start queue.
1483 void sym_put_start_queue(struct sym_hcb
*np
, struct sym_ccb
*cp
)
1487 #ifdef SYM_CONF_IARB_SUPPORT
1489 * If the previously queued CCB is not yet done,
1490 * set the IARB hint. The SCRIPTS will go with IARB
1491 * for this job when starting the previous one.
1492 * We leave devices a chance to win arbitration by
1493 * not using more than 'iarb_max' consecutive
1494 * immediate arbitrations.
1496 if (np
->last_cp
&& np
->iarb_count
< np
->iarb_max
) {
1497 np
->last_cp
->host_flags
|= HF_HINT_IARB
;
1505 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1507 * Make SCRIPTS aware of the 64 bit DMA
1508 * segment registers not being up-to-date.
1511 cp
->host_xflags
|= HX_DMAP_DIRTY
;
1515 * Insert first the idle task and then our job.
1516 * The MBs should ensure proper ordering.
1518 qidx
= np
->squeueput
+ 2;
1519 if (qidx
>= MAX_QUEUE
*2) qidx
= 0;
1521 np
->squeue
[qidx
] = cpu_to_scr(np
->idletask_ba
);
1522 MEMORY_WRITE_BARRIER();
1523 np
->squeue
[np
->squeueput
] = cpu_to_scr(cp
->ccb_ba
);
1525 np
->squeueput
= qidx
;
1527 if (DEBUG_FLAGS
& DEBUG_QUEUE
)
1528 scmd_printk(KERN_DEBUG
, cp
->cmd
, "queuepos=%d\n",
1532 * Script processor may be waiting for reselect.
1535 MEMORY_WRITE_BARRIER();
1536 OUTB(np
, nc_istat
, SIGP
|np
->istat_sem
);
1539 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1541 * Start next ready-to-start CCBs.
1543 void sym_start_next_ccbs(struct sym_hcb
*np
, struct sym_lcb
*lp
, int maxn
)
1549 * Paranoia, as usual. :-)
1551 assert(!lp
->started_tags
|| !lp
->started_no_tag
);
1554 * Try to start as many commands as asked by caller.
1555 * Prevent from having both tagged and untagged
1556 * commands queued to the device at the same time.
1559 qp
= sym_remque_head(&lp
->waiting_ccbq
);
1562 cp
= sym_que_entry(qp
, struct sym_ccb
, link2_ccbq
);
1563 if (cp
->tag
!= NO_TAG
) {
1564 if (lp
->started_no_tag
||
1565 lp
->started_tags
>= lp
->started_max
) {
1566 sym_insque_head(qp
, &lp
->waiting_ccbq
);
1569 lp
->itlq_tbl
[cp
->tag
] = cpu_to_scr(cp
->ccb_ba
);
1571 cpu_to_scr(SCRIPTA_BA(np
, resel_tag
));
1574 if (lp
->started_no_tag
|| lp
->started_tags
) {
1575 sym_insque_head(qp
, &lp
->waiting_ccbq
);
1578 lp
->head
.itl_task_sa
= cpu_to_scr(cp
->ccb_ba
);
1580 cpu_to_scr(SCRIPTA_BA(np
, resel_no_tag
));
1581 ++lp
->started_no_tag
;
1584 sym_insque_tail(qp
, &lp
->started_ccbq
);
1585 sym_put_start_queue(np
, cp
);
1588 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1591 * The chip may have completed jobs. Look at the DONE QUEUE.
1593 * On paper, memory read barriers may be needed here to
1594 * prevent out of order LOADs by the CPU from having
1595 * prefetched stale data prior to DMA having occurred.
1597 static int sym_wakeup_done (struct sym_hcb
*np
)
1606 /* MEMORY_READ_BARRIER(); */
1608 dsa
= scr_to_cpu(np
->dqueue
[i
]);
1612 if ((i
= i
+2) >= MAX_QUEUE
*2)
1615 cp
= sym_ccb_from_dsa(np
, dsa
);
1617 MEMORY_READ_BARRIER();
1618 sym_complete_ok (np
, cp
);
1622 printf ("%s: bad DSA (%x) in done queue.\n",
1623 sym_name(np
), (u_int
) dsa
);
1631 * Complete all CCBs queued to the COMP queue.
1633 * These CCBs are assumed:
1634 * - Not to be referenced either by devices or
1635 * SCRIPTS-related queues and datas.
1636 * - To have to be completed with an error condition
1639 * The device queue freeze count is incremented
1640 * for each CCB that does not prevent this.
1641 * This function is called when all CCBs involved
1642 * in error handling/recovery have been reaped.
1644 static void sym_flush_comp_queue(struct sym_hcb
*np
, int cam_status
)
1649 while ((qp
= sym_remque_head(&np
->comp_ccbq
)) != NULL
) {
1650 struct scsi_cmnd
*cmd
;
1651 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
1652 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
1653 /* Leave quiet CCBs waiting for resources */
1654 if (cp
->host_status
== HS_WAIT
)
1658 sym_set_cam_status(cmd
, cam_status
);
1659 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1660 if (sym_get_cam_status(cmd
) == DID_SOFT_ERROR
) {
1661 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
1662 struct sym_lcb
*lp
= sym_lp(tp
, cp
->lun
);
1664 sym_remque(&cp
->link2_ccbq
);
1665 sym_insque_tail(&cp
->link2_ccbq
,
1668 if (cp
->tag
!= NO_TAG
)
1671 --lp
->started_no_tag
;
1678 sym_free_ccb(np
, cp
);
1679 sym_xpt_done(np
, cmd
);
1684 * Complete all active CCBs with error.
1685 * Used on CHIP/SCSI RESET.
1687 static void sym_flush_busy_queue (struct sym_hcb
*np
, int cam_status
)
1690 * Move all active CCBs to the COMP queue
1691 * and flush this queue.
1693 sym_que_splice(&np
->busy_ccbq
, &np
->comp_ccbq
);
1694 sym_que_init(&np
->busy_ccbq
);
1695 sym_flush_comp_queue(np
, cam_status
);
1702 * 0: initialisation.
1703 * 1: SCSI BUS RESET delivered or received.
1704 * 2: SCSI BUS MODE changed.
1706 void sym_start_up(struct Scsi_Host
*shost
, int reason
)
1708 struct sym_data
*sym_data
= shost_priv(shost
);
1709 struct pci_dev
*pdev
= sym_data
->pdev
;
1710 struct sym_hcb
*np
= sym_data
->ncb
;
1715 * Reset chip if asked, otherwise just clear fifos.
1720 OUTB(np
, nc_stest3
, TE
|CSF
);
1721 OUTONB(np
, nc_ctest3
, CLF
);
1727 phys
= np
->squeue_ba
;
1728 for (i
= 0; i
< MAX_QUEUE
*2; i
+= 2) {
1729 np
->squeue
[i
] = cpu_to_scr(np
->idletask_ba
);
1730 np
->squeue
[i
+1] = cpu_to_scr(phys
+ (i
+2)*4);
1732 np
->squeue
[MAX_QUEUE
*2-1] = cpu_to_scr(phys
);
1735 * Start at first entry.
1742 phys
= np
->dqueue_ba
;
1743 for (i
= 0; i
< MAX_QUEUE
*2; i
+= 2) {
1745 np
->dqueue
[i
+1] = cpu_to_scr(phys
+ (i
+2)*4);
1747 np
->dqueue
[MAX_QUEUE
*2-1] = cpu_to_scr(phys
);
1750 * Start at first entry.
1755 * Install patches in scripts.
1756 * This also let point to first position the start
1757 * and done queue pointers used from SCRIPTS.
1759 np
->fw_patch(shost
);
1762 * Wakeup all pending jobs.
1764 sym_flush_busy_queue(np
, DID_RESET
);
1769 OUTB(np
, nc_istat
, 0x00); /* Remove Reset, abort */
1771 udelay(2000); /* The 895 needs time for the bus mode to settle */
1773 OUTB(np
, nc_scntl0
, np
->rv_scntl0
| 0xc0);
1774 /* full arb., ena parity, par->ATN */
1775 OUTB(np
, nc_scntl1
, 0x00); /* odd parity, and remove CRST!! */
1777 sym_selectclock(np
, np
->rv_scntl3
); /* Select SCSI clock */
1779 OUTB(np
, nc_scid
, RRE
|np
->myaddr
); /* Adapter SCSI address */
1780 OUTW(np
, nc_respid
, 1ul<<np
->myaddr
); /* Id to respond to */
1781 OUTB(np
, nc_istat
, SIGP
); /* Signal Process */
1782 OUTB(np
, nc_dmode
, np
->rv_dmode
); /* Burst length, dma mode */
1783 OUTB(np
, nc_ctest5
, np
->rv_ctest5
); /* Large fifo + large burst */
1785 OUTB(np
, nc_dcntl
, NOCOM
|np
->rv_dcntl
); /* Protect SFBR */
1786 OUTB(np
, nc_ctest3
, np
->rv_ctest3
); /* Write and invalidate */
1787 OUTB(np
, nc_ctest4
, np
->rv_ctest4
); /* Master parity checking */
1789 /* Extended Sreq/Sack filtering not supported on the C10 */
1790 if (np
->features
& FE_C10
)
1791 OUTB(np
, nc_stest2
, np
->rv_stest2
);
1793 OUTB(np
, nc_stest2
, EXT
|np
->rv_stest2
);
1795 OUTB(np
, nc_stest3
, TE
); /* TolerANT enable */
1796 OUTB(np
, nc_stime0
, 0x0c); /* HTH disabled STO 0.25 sec */
1799 * For now, disable AIP generation on C1010-66.
1801 if (pdev
->device
== PCI_DEVICE_ID_LSI_53C1010_66
)
1802 OUTB(np
, nc_aipcntl1
, DISAIP
);
1805 * C10101 rev. 0 errata.
1806 * Errant SGE's when in narrow. Write bits 4 & 5 of
1807 * STEST1 register to disable SGE. We probably should do
1808 * that from SCRIPTS for each selection/reselection, but
1809 * I just don't want. :)
1811 if (pdev
->device
== PCI_DEVICE_ID_LSI_53C1010_33
&&
1813 OUTB(np
, nc_stest1
, INB(np
, nc_stest1
) | 0x30);
1816 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1817 * Disable overlapped arbitration for some dual function devices,
1818 * regardless revision id (kind of post-chip-design feature. ;-))
1820 if (pdev
->device
== PCI_DEVICE_ID_NCR_53C875
)
1821 OUTB(np
, nc_ctest0
, (1<<5));
1822 else if (pdev
->device
== PCI_DEVICE_ID_NCR_53C896
)
1823 np
->rv_ccntl0
|= DPR
;
1826 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1827 * and/or hardware phase mismatch, since only such chips
1828 * seem to support those IO registers.
1830 if (np
->features
& (FE_DAC
|FE_NOPM
)) {
1831 OUTB(np
, nc_ccntl0
, np
->rv_ccntl0
);
1832 OUTB(np
, nc_ccntl1
, np
->rv_ccntl1
);
1835 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1837 * Set up scratch C and DRS IO registers to map the 32 bit
1838 * DMA address range our data structures are located in.
1841 np
->dmap_bah
[0] = 0; /* ??? */
1842 OUTL(np
, nc_scrx
[0], np
->dmap_bah
[0]);
1843 OUTL(np
, nc_drs
, np
->dmap_bah
[0]);
1848 * If phase mismatch handled by scripts (895A/896/1010),
1849 * set PM jump addresses.
1851 if (np
->features
& FE_NOPM
) {
1852 OUTL(np
, nc_pmjad1
, SCRIPTB_BA(np
, pm_handle
));
1853 OUTL(np
, nc_pmjad2
, SCRIPTB_BA(np
, pm_handle
));
1857 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1858 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1860 if (np
->features
& FE_LED0
)
1861 OUTB(np
, nc_gpcntl
, INB(np
, nc_gpcntl
) & ~0x01);
1862 else if (np
->features
& FE_LEDC
)
1863 OUTB(np
, nc_gpcntl
, (INB(np
, nc_gpcntl
) & ~0x41) | 0x20);
1868 OUTW(np
, nc_sien
, STO
|HTH
|MA
|SGE
|UDC
|RST
|PAR
);
1869 OUTB(np
, nc_dien
, MDPE
|BF
|SSI
|SIR
|IID
);
1872 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1873 * Try to eat the spurious SBMC interrupt that may occur when
1874 * we reset the chip but not the SCSI BUS (at initialization).
1876 if (np
->features
& (FE_ULTRA2
|FE_ULTRA3
)) {
1877 OUTONW(np
, nc_sien
, SBMC
);
1883 np
->scsi_mode
= INB(np
, nc_stest4
) & SMODE
;
1887 * Fill in target structure.
1888 * Reinitialize usrsync.
1889 * Reinitialize usrwide.
1890 * Prepare sync negotiation according to actual SCSI bus mode.
1892 for (i
=0;i
<SYM_CONF_MAX_TARGET
;i
++) {
1893 struct sym_tcb
*tp
= &np
->target
[i
];
1897 tp
->head
.wval
= np
->rv_scntl3
;
1902 * Download SCSI SCRIPTS to on-chip RAM if present,
1903 * and start script processor.
1904 * We do the download preferently from the CPU.
1905 * For platforms that may not support PCI memory mapping,
1906 * we use simple SCRIPTS that performs MEMORY MOVEs.
1908 phys
= SCRIPTA_BA(np
, init
);
1910 if (sym_verbose
>= 2)
1911 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np
));
1912 memcpy_toio(np
->s
.ramaddr
, np
->scripta0
, np
->scripta_sz
);
1913 if (np
->features
& FE_RAM8K
) {
1914 memcpy_toio(np
->s
.ramaddr
+ 4096, np
->scriptb0
, np
->scriptb_sz
);
1915 phys
= scr_to_cpu(np
->scr_ram_seg
);
1916 OUTL(np
, nc_mmws
, phys
);
1917 OUTL(np
, nc_mmrs
, phys
);
1918 OUTL(np
, nc_sfs
, phys
);
1919 phys
= SCRIPTB_BA(np
, start64
);
1925 OUTL(np
, nc_dsa
, np
->hcb_ba
);
1929 * Notify the XPT about the RESET condition.
1932 sym_xpt_async_bus_reset(np
);
1936 * Switch trans mode for current job and its target.
1938 static void sym_settrans(struct sym_hcb
*np
, int target
, u_char opts
, u_char ofs
,
1939 u_char per
, u_char wide
, u_char div
, u_char fak
)
1942 u_char sval
, wval
, uval
;
1943 struct sym_tcb
*tp
= &np
->target
[target
];
1945 assert(target
== (INB(np
, nc_sdid
) & 0x0f));
1947 sval
= tp
->head
.sval
;
1948 wval
= tp
->head
.wval
;
1949 uval
= tp
->head
.uval
;
1952 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1953 sval
, wval
, uval
, np
->rv_scntl3
);
1958 if (!(np
->features
& FE_C10
))
1959 sval
= (sval
& ~0x1f) | ofs
;
1961 sval
= (sval
& ~0x3f) | ofs
;
1964 * Set the sync divisor and extra clock factor.
1967 wval
= (wval
& ~0x70) | ((div
+1) << 4);
1968 if (!(np
->features
& FE_C10
))
1969 sval
= (sval
& ~0xe0) | (fak
<< 5);
1971 uval
= uval
& ~(XCLKH_ST
|XCLKH_DT
|XCLKS_ST
|XCLKS_DT
);
1972 if (fak
>= 1) uval
|= (XCLKH_ST
|XCLKH_DT
);
1973 if (fak
>= 2) uval
|= (XCLKS_ST
|XCLKS_DT
);
1978 * Set the bus width.
1985 * Set misc. ultra enable bits.
1987 if (np
->features
& FE_C10
) {
1988 uval
= uval
& ~(U3EN
|AIPCKEN
);
1990 assert(np
->features
& FE_U3EN
);
1994 wval
= wval
& ~ULTRA
;
1995 if (per
<= 12) wval
|= ULTRA
;
1999 * Stop there if sync parameters are unchanged.
2001 if (tp
->head
.sval
== sval
&&
2002 tp
->head
.wval
== wval
&&
2003 tp
->head
.uval
== uval
)
2005 tp
->head
.sval
= sval
;
2006 tp
->head
.wval
= wval
;
2007 tp
->head
.uval
= uval
;
2010 * Disable extended Sreq/Sack filtering if per < 50.
2011 * Not supported on the C1010.
2013 if (per
< 50 && !(np
->features
& FE_C10
))
2014 OUTOFFB(np
, nc_stest2
, EXT
);
2017 * set actual value and sync_status
2019 OUTB(np
, nc_sxfer
, tp
->head
.sval
);
2020 OUTB(np
, nc_scntl3
, tp
->head
.wval
);
2022 if (np
->features
& FE_C10
) {
2023 OUTB(np
, nc_scntl4
, tp
->head
.uval
);
2027 * patch ALL busy ccbs of this target.
2029 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
2031 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
2032 if (cp
->target
!= target
)
2034 cp
->phys
.select
.sel_scntl3
= tp
->head
.wval
;
2035 cp
->phys
.select
.sel_sxfer
= tp
->head
.sval
;
2036 if (np
->features
& FE_C10
) {
2037 cp
->phys
.select
.sel_scntl4
= tp
->head
.uval
;
2042 static void sym_announce_transfer_rate(struct sym_tcb
*tp
)
2044 struct scsi_target
*starget
= tp
->starget
;
2046 if (tp
->tprint
.period
!= spi_period(starget
) ||
2047 tp
->tprint
.offset
!= spi_offset(starget
) ||
2048 tp
->tprint
.width
!= spi_width(starget
) ||
2049 tp
->tprint
.iu
!= spi_iu(starget
) ||
2050 tp
->tprint
.dt
!= spi_dt(starget
) ||
2051 tp
->tprint
.qas
!= spi_qas(starget
) ||
2052 !tp
->tprint
.check_nego
) {
2053 tp
->tprint
.period
= spi_period(starget
);
2054 tp
->tprint
.offset
= spi_offset(starget
);
2055 tp
->tprint
.width
= spi_width(starget
);
2056 tp
->tprint
.iu
= spi_iu(starget
);
2057 tp
->tprint
.dt
= spi_dt(starget
);
2058 tp
->tprint
.qas
= spi_qas(starget
);
2059 tp
->tprint
.check_nego
= 1;
2061 spi_display_xfer_agreement(starget
);
2066 * We received a WDTR.
2067 * Let everything be aware of the changes.
2069 static void sym_setwide(struct sym_hcb
*np
, int target
, u_char wide
)
2071 struct sym_tcb
*tp
= &np
->target
[target
];
2072 struct scsi_target
*starget
= tp
->starget
;
2074 sym_settrans(np
, target
, 0, 0, 0, wide
, 0, 0);
2077 tp
->tgoal
.renego
= NS_WIDE
;
2079 tp
->tgoal
.renego
= 0;
2080 tp
->tgoal
.check_nego
= 0;
2081 tp
->tgoal
.width
= wide
;
2082 spi_offset(starget
) = 0;
2083 spi_period(starget
) = 0;
2084 spi_width(starget
) = wide
;
2085 spi_iu(starget
) = 0;
2086 spi_dt(starget
) = 0;
2087 spi_qas(starget
) = 0;
2089 if (sym_verbose
>= 3)
2090 sym_announce_transfer_rate(tp
);
2094 * We received a SDTR.
2095 * Let everything be aware of the changes.
2098 sym_setsync(struct sym_hcb
*np
, int target
,
2099 u_char ofs
, u_char per
, u_char div
, u_char fak
)
2101 struct sym_tcb
*tp
= &np
->target
[target
];
2102 struct scsi_target
*starget
= tp
->starget
;
2103 u_char wide
= (tp
->head
.wval
& EWS
) ? BUS_16_BIT
: BUS_8_BIT
;
2105 sym_settrans(np
, target
, 0, ofs
, per
, wide
, div
, fak
);
2108 tp
->tgoal
.renego
= NS_WIDE
;
2110 tp
->tgoal
.renego
= NS_SYNC
;
2112 tp
->tgoal
.renego
= 0;
2113 spi_period(starget
) = per
;
2114 spi_offset(starget
) = ofs
;
2115 spi_iu(starget
) = spi_dt(starget
) = spi_qas(starget
) = 0;
2117 if (!tp
->tgoal
.dt
&& !tp
->tgoal
.iu
&& !tp
->tgoal
.qas
) {
2118 tp
->tgoal
.period
= per
;
2119 tp
->tgoal
.offset
= ofs
;
2120 tp
->tgoal
.check_nego
= 0;
2123 sym_announce_transfer_rate(tp
);
2127 * We received a PPR.
2128 * Let everything be aware of the changes.
2131 sym_setpprot(struct sym_hcb
*np
, int target
, u_char opts
, u_char ofs
,
2132 u_char per
, u_char wide
, u_char div
, u_char fak
)
2134 struct sym_tcb
*tp
= &np
->target
[target
];
2135 struct scsi_target
*starget
= tp
->starget
;
2137 sym_settrans(np
, target
, opts
, ofs
, per
, wide
, div
, fak
);
2140 tp
->tgoal
.renego
= NS_PPR
;
2142 tp
->tgoal
.renego
= 0;
2143 spi_width(starget
) = tp
->tgoal
.width
= wide
;
2144 spi_period(starget
) = tp
->tgoal
.period
= per
;
2145 spi_offset(starget
) = tp
->tgoal
.offset
= ofs
;
2146 spi_iu(starget
) = tp
->tgoal
.iu
= !!(opts
& PPR_OPT_IU
);
2147 spi_dt(starget
) = tp
->tgoal
.dt
= !!(opts
& PPR_OPT_DT
);
2148 spi_qas(starget
) = tp
->tgoal
.qas
= !!(opts
& PPR_OPT_QAS
);
2149 tp
->tgoal
.check_nego
= 0;
2151 sym_announce_transfer_rate(tp
);
2155 * generic recovery from scsi interrupt
2157 * The doc says that when the chip gets an SCSI interrupt,
2158 * it tries to stop in an orderly fashion, by completing
2159 * an instruction fetch that had started or by flushing
2160 * the DMA fifo for a write to memory that was executing.
2161 * Such a fashion is not enough to know if the instruction
2162 * that was just before the current DSP value has been
2165 * There are some small SCRIPTS sections that deal with
2166 * the start queue and the done queue that may break any
2167 * assomption from the C code if we are interrupted
2168 * inside, so we reset if this happens. Btw, since these
2169 * SCRIPTS sections are executed while the SCRIPTS hasn't
2170 * started SCSI operations, it is very unlikely to happen.
2172 * All the driver data structures are supposed to be
2173 * allocated from the same 4 GB memory window, so there
2174 * is a 1 to 1 relationship between DSA and driver data
2175 * structures. Since we are careful :) to invalidate the
2176 * DSA when we complete a command or when the SCRIPTS
2177 * pushes a DSA into a queue, we can trust it when it
2180 static void sym_recover_scsi_int (struct sym_hcb
*np
, u_char hsts
)
2182 u32 dsp
= INL(np
, nc_dsp
);
2183 u32 dsa
= INL(np
, nc_dsa
);
2184 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
2187 * If we haven't been interrupted inside the SCRIPTS
2188 * critical pathes, we can safely restart the SCRIPTS
2189 * and trust the DSA value if it matches a CCB.
2191 if ((!(dsp
> SCRIPTA_BA(np
, getjob_begin
) &&
2192 dsp
< SCRIPTA_BA(np
, getjob_end
) + 1)) &&
2193 (!(dsp
> SCRIPTA_BA(np
, ungetjob
) &&
2194 dsp
< SCRIPTA_BA(np
, reselect
) + 1)) &&
2195 (!(dsp
> SCRIPTB_BA(np
, sel_for_abort
) &&
2196 dsp
< SCRIPTB_BA(np
, sel_for_abort_1
) + 1)) &&
2197 (!(dsp
> SCRIPTA_BA(np
, done
) &&
2198 dsp
< SCRIPTA_BA(np
, done_end
) + 1))) {
2199 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* clear dma fifo */
2200 OUTB(np
, nc_stest3
, TE
|CSF
); /* clear scsi fifo */
2202 * If we have a CCB, let the SCRIPTS call us back for
2203 * the handling of the error with SCRATCHA filled with
2204 * STARTPOS. This way, we will be able to freeze the
2205 * device queue and requeue awaiting IOs.
2208 cp
->host_status
= hsts
;
2209 OUTL_DSP(np
, SCRIPTA_BA(np
, complete_error
));
2212 * Otherwise just restart the SCRIPTS.
2215 OUTL(np
, nc_dsa
, 0xffffff);
2216 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
2225 sym_start_reset(np
);
2229 * chip exception handler for selection timeout
2231 static void sym_int_sto (struct sym_hcb
*np
)
2233 u32 dsp
= INL(np
, nc_dsp
);
2235 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("T");
2237 if (dsp
== SCRIPTA_BA(np
, wf_sel_done
) + 8)
2238 sym_recover_scsi_int(np
, HS_SEL_TIMEOUT
);
2240 sym_start_reset(np
);
2244 * chip exception handler for unexpected disconnect
2246 static void sym_int_udc (struct sym_hcb
*np
)
2248 printf ("%s: unexpected disconnect\n", sym_name(np
));
2249 sym_recover_scsi_int(np
, HS_UNEXPECTED
);
2253 * chip exception handler for SCSI bus mode change
2255 * spi2-r12 11.2.3 says a transceiver mode change must
2256 * generate a reset event and a device that detects a reset
2257 * event shall initiate a hard reset. It says also that a
2258 * device that detects a mode change shall set data transfer
2259 * mode to eight bit asynchronous, etc...
2260 * So, just reinitializing all except chip should be enough.
2262 static void sym_int_sbmc(struct Scsi_Host
*shost
)
2264 struct sym_hcb
*np
= sym_get_hcb(shost
);
2265 u_char scsi_mode
= INB(np
, nc_stest4
) & SMODE
;
2270 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np
),
2271 sym_scsi_bus_mode(np
->scsi_mode
), sym_scsi_bus_mode(scsi_mode
));
2274 * Should suspend command processing for a few seconds and
2275 * reinitialize all except the chip.
2277 sym_start_up(shost
, 2);
2281 * chip exception handler for SCSI parity error.
2283 * When the chip detects a SCSI parity error and is
2284 * currently executing a (CH)MOV instruction, it does
2285 * not interrupt immediately, but tries to finish the
2286 * transfer of the current scatter entry before
2287 * interrupting. The following situations may occur:
2289 * - The complete scatter entry has been transferred
2290 * without the device having changed phase.
2291 * The chip will then interrupt with the DSP pointing
2292 * to the instruction that follows the MOV.
2294 * - A phase mismatch occurs before the MOV finished
2295 * and phase errors are to be handled by the C code.
2296 * The chip will then interrupt with both PAR and MA
2299 * - A phase mismatch occurs before the MOV finished and
2300 * phase errors are to be handled by SCRIPTS.
2301 * The chip will load the DSP with the phase mismatch
2302 * JUMP address and interrupt the host processor.
2304 static void sym_int_par (struct sym_hcb
*np
, u_short sist
)
2306 u_char hsts
= INB(np
, HS_PRT
);
2307 u32 dsp
= INL(np
, nc_dsp
);
2308 u32 dbc
= INL(np
, nc_dbc
);
2309 u32 dsa
= INL(np
, nc_dsa
);
2310 u_char sbcl
= INB(np
, nc_sbcl
);
2311 u_char cmd
= dbc
>> 24;
2312 int phase
= cmd
& 7;
2313 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
2315 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2316 sym_name(np
), hsts
, dbc
, sbcl
);
2319 * Check that the chip is connected to the SCSI BUS.
2321 if (!(INB(np
, nc_scntl1
) & ISCON
)) {
2322 sym_recover_scsi_int(np
, HS_UNEXPECTED
);
2327 * If the nexus is not clearly identified, reset the bus.
2328 * We will try to do better later.
2334 * Check instruction was a MOV, direction was INPUT and
2337 if ((cmd
& 0xc0) || !(phase
& 1) || !(sbcl
& 0x8))
2341 * Keep track of the parity error.
2343 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
2344 cp
->xerr_status
|= XE_PARITY_ERR
;
2347 * Prepare the message to send to the device.
2349 np
->msgout
[0] = (phase
== 7) ? M_PARITY
: M_ID_ERROR
;
2352 * If the old phase was DATA IN phase, we have to deal with
2353 * the 3 situations described above.
2354 * For other input phases (MSG IN and STATUS), the device
2355 * must resend the whole thing that failed parity checking
2356 * or signal error. So, jumping to dispatcher should be OK.
2358 if (phase
== 1 || phase
== 5) {
2359 /* Phase mismatch handled by SCRIPTS */
2360 if (dsp
== SCRIPTB_BA(np
, pm_handle
))
2362 /* Phase mismatch handled by the C code */
2365 /* No phase mismatch occurred */
2367 sym_set_script_dp (np
, cp
, dsp
);
2368 OUTL_DSP(np
, SCRIPTA_BA(np
, dispatch
));
2371 else if (phase
== 7) /* We definitely cannot handle parity errors */
2372 #if 1 /* in message-in phase due to the relection */
2373 goto reset_all
; /* path and various message anticipations. */
2375 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
2378 OUTL_DSP(np
, SCRIPTA_BA(np
, dispatch
));
2382 sym_start_reset(np
);
2387 * chip exception handler for phase errors.
2389 * We have to construct a new transfer descriptor,
2390 * to transfer the rest of the current block.
2392 static void sym_int_ma (struct sym_hcb
*np
)
2405 u_char hflags
, hflags0
;
2409 dsp
= INL(np
, nc_dsp
);
2410 dbc
= INL(np
, nc_dbc
);
2411 dsa
= INL(np
, nc_dsa
);
2414 rest
= dbc
& 0xffffff;
2418 * locate matching cp if any.
2420 cp
= sym_ccb_from_dsa(np
, dsa
);
2423 * Donnot take into account dma fifo and various buffers in
2424 * INPUT phase since the chip flushes everything before
2425 * raising the MA interrupt for interrupted INPUT phases.
2426 * For DATA IN phase, we will check for the SWIDE later.
2428 if ((cmd
& 7) != 1 && (cmd
& 7) != 5) {
2431 if (np
->features
& FE_DFBC
)
2432 delta
= INW(np
, nc_dfbc
);
2437 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2439 dfifo
= INL(np
, nc_dfifo
);
2442 * Calculate remaining bytes in DMA fifo.
2443 * (CTEST5 = dfifo >> 16)
2445 if (dfifo
& (DFS
<< 16))
2446 delta
= ((((dfifo
>> 8) & 0x300) |
2447 (dfifo
& 0xff)) - rest
) & 0x3ff;
2449 delta
= ((dfifo
& 0xff) - rest
) & 0x7f;
2453 * The data in the dma fifo has not been transfered to
2454 * the target -> add the amount to the rest
2455 * and clear the data.
2456 * Check the sstat2 register in case of wide transfer.
2459 ss0
= INB(np
, nc_sstat0
);
2460 if (ss0
& OLF
) rest
++;
2461 if (!(np
->features
& FE_C10
))
2462 if (ss0
& ORF
) rest
++;
2463 if (cp
&& (cp
->phys
.select
.sel_scntl3
& EWS
)) {
2464 ss2
= INB(np
, nc_sstat2
);
2465 if (ss2
& OLF1
) rest
++;
2466 if (!(np
->features
& FE_C10
))
2467 if (ss2
& ORF1
) rest
++;
2473 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* dma fifo */
2474 OUTB(np
, nc_stest3
, TE
|CSF
); /* scsi fifo */
2478 * log the information
2480 if (DEBUG_FLAGS
& (DEBUG_TINY
|DEBUG_PHASE
))
2481 printf ("P%x%x RL=%d D=%d ", cmd
&7, INB(np
, nc_sbcl
)&7,
2482 (unsigned) rest
, (unsigned) delta
);
2485 * try to find the interrupted script command,
2486 * and the address at which to continue.
2490 if (dsp
> np
->scripta_ba
&&
2491 dsp
<= np
->scripta_ba
+ np
->scripta_sz
) {
2492 vdsp
= (u32
*)((char*)np
->scripta0
+ (dsp
-np
->scripta_ba
-8));
2495 else if (dsp
> np
->scriptb_ba
&&
2496 dsp
<= np
->scriptb_ba
+ np
->scriptb_sz
) {
2497 vdsp
= (u32
*)((char*)np
->scriptb0
+ (dsp
-np
->scriptb_ba
-8));
2502 * log the information
2504 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2505 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2506 cp
, (unsigned)dsp
, (unsigned)nxtdsp
, vdsp
, cmd
);
2510 printf ("%s: interrupted SCRIPT address not found.\n",
2516 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2522 * get old startaddress and old length.
2524 oadr
= scr_to_cpu(vdsp
[1]);
2526 if (cmd
& 0x10) { /* Table indirect */
2527 tblp
= (u32
*) ((char*) &cp
->phys
+ oadr
);
2528 olen
= scr_to_cpu(tblp
[0]);
2529 oadr
= scr_to_cpu(tblp
[1]);
2532 olen
= scr_to_cpu(vdsp
[0]) & 0xffffff;
2535 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2536 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2537 (unsigned) (scr_to_cpu(vdsp
[0]) >> 24),
2544 * check cmd against assumed interrupted script command.
2545 * If dt data phase, the MOVE instruction hasn't bit 4 of
2548 if (((cmd
& 2) ? cmd
: (cmd
& ~4)) != (scr_to_cpu(vdsp
[0]) >> 24)) {
2549 sym_print_addr(cp
->cmd
,
2550 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2551 cmd
, scr_to_cpu(vdsp
[0]) >> 24);
2557 * if old phase not dataphase, leave here.
2560 sym_print_addr(cp
->cmd
,
2561 "phase change %x-%x %d@%08x resid=%d.\n",
2562 cmd
&7, INB(np
, nc_sbcl
)&7, (unsigned)olen
,
2563 (unsigned)oadr
, (unsigned)rest
);
2564 goto unexpected_phase
;
2568 * Choose the correct PM save area.
2570 * Look at the PM_SAVE SCRIPT if you want to understand
2571 * this stuff. The equivalent code is implemented in
2572 * SCRIPTS for the 895A, 896 and 1010 that are able to
2573 * handle PM from the SCRIPTS processor.
2575 hflags0
= INB(np
, HF_PRT
);
2578 if (hflags
& (HF_IN_PM0
| HF_IN_PM1
| HF_DP_SAVED
)) {
2579 if (hflags
& HF_IN_PM0
)
2580 nxtdsp
= scr_to_cpu(cp
->phys
.pm0
.ret
);
2581 else if (hflags
& HF_IN_PM1
)
2582 nxtdsp
= scr_to_cpu(cp
->phys
.pm1
.ret
);
2584 if (hflags
& HF_DP_SAVED
)
2585 hflags
^= HF_ACT_PM
;
2588 if (!(hflags
& HF_ACT_PM
)) {
2590 newcmd
= SCRIPTA_BA(np
, pm0_data
);
2594 newcmd
= SCRIPTA_BA(np
, pm1_data
);
2597 hflags
&= ~(HF_IN_PM0
| HF_IN_PM1
| HF_DP_SAVED
);
2598 if (hflags
!= hflags0
)
2599 OUTB(np
, HF_PRT
, hflags
);
2602 * fillin the phase mismatch context
2604 pm
->sg
.addr
= cpu_to_scr(oadr
+ olen
- rest
);
2605 pm
->sg
.size
= cpu_to_scr(rest
);
2606 pm
->ret
= cpu_to_scr(nxtdsp
);
2609 * If we have a SWIDE,
2610 * - prepare the address to write the SWIDE from SCRIPTS,
2611 * - compute the SCRIPTS address to restart from,
2612 * - move current data pointer context by one byte.
2614 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2615 if ((cmd
& 7) == 1 && cp
&& (cp
->phys
.select
.sel_scntl3
& EWS
) &&
2616 (INB(np
, nc_scntl2
) & WSR
)) {
2620 * Set up the table indirect for the MOVE
2621 * of the residual byte and adjust the data
2624 tmp
= scr_to_cpu(pm
->sg
.addr
);
2625 cp
->phys
.wresid
.addr
= cpu_to_scr(tmp
);
2626 pm
->sg
.addr
= cpu_to_scr(tmp
+ 1);
2627 tmp
= scr_to_cpu(pm
->sg
.size
);
2628 cp
->phys
.wresid
.size
= cpu_to_scr((tmp
&0xff000000) | 1);
2629 pm
->sg
.size
= cpu_to_scr(tmp
- 1);
2632 * If only the residual byte is to be moved,
2633 * no PM context is needed.
2635 if ((tmp
&0xffffff) == 1)
2639 * Prepare the address of SCRIPTS that will
2640 * move the residual byte to memory.
2642 nxtdsp
= SCRIPTB_BA(np
, wsr_ma_helper
);
2645 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2646 sym_print_addr(cp
->cmd
, "PM %x %x %x / %x %x %x.\n",
2647 hflags0
, hflags
, newcmd
,
2648 (unsigned)scr_to_cpu(pm
->sg
.addr
),
2649 (unsigned)scr_to_cpu(pm
->sg
.size
),
2650 (unsigned)scr_to_cpu(pm
->ret
));
2654 * Restart the SCRIPTS processor.
2656 sym_set_script_dp (np
, cp
, newcmd
);
2657 OUTL_DSP(np
, nxtdsp
);
2661 * Unexpected phase changes that occurs when the current phase
2662 * is not a DATA IN or DATA OUT phase are due to error conditions.
2663 * Such event may only happen when the SCRIPTS is using a
2664 * multibyte SCSI MOVE.
2666 * Phase change Some possible cause
2668 * COMMAND --> MSG IN SCSI parity error detected by target.
2669 * COMMAND --> STATUS Bad command or refused by target.
2670 * MSG OUT --> MSG IN Message rejected by target.
2671 * MSG OUT --> COMMAND Bogus target that discards extended
2672 * negotiation messages.
2674 * The code below does not care of the new phase and so
2675 * trusts the target. Why to annoy it ?
2676 * If the interrupted phase is COMMAND phase, we restart at
2678 * If a target does not get all the messages after selection,
2679 * the code assumes blindly that the target discards extended
2680 * messages and clears the negotiation status.
2681 * If the target does not want all our response to negotiation,
2682 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2683 * bloat for such a should_not_happen situation).
2684 * In all other situation, we reset the BUS.
2685 * Are these assumptions reasonnable ? (Wait and see ...)
2692 case 2: /* COMMAND phase */
2693 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2696 case 3: /* STATUS phase */
2697 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2700 case 6: /* MSG OUT phase */
2702 * If the device may want to use untagged when we want
2703 * tagged, we prepare an IDENTIFY without disc. granted,
2704 * since we will not be able to handle reselect.
2705 * Otherwise, we just don't care.
2707 if (dsp
== SCRIPTA_BA(np
, send_ident
)) {
2708 if (cp
->tag
!= NO_TAG
&& olen
- rest
<= 3) {
2709 cp
->host_status
= HS_BUSY
;
2710 np
->msgout
[0] = IDENTIFY(0, cp
->lun
);
2711 nxtdsp
= SCRIPTB_BA(np
, ident_break_atn
);
2714 nxtdsp
= SCRIPTB_BA(np
, ident_break
);
2716 else if (dsp
== SCRIPTB_BA(np
, send_wdtr
) ||
2717 dsp
== SCRIPTB_BA(np
, send_sdtr
) ||
2718 dsp
== SCRIPTB_BA(np
, send_ppr
)) {
2719 nxtdsp
= SCRIPTB_BA(np
, nego_bad_phase
);
2720 if (dsp
== SCRIPTB_BA(np
, send_ppr
)) {
2721 struct scsi_device
*dev
= cp
->cmd
->device
;
2727 case 7: /* MSG IN phase */
2728 nxtdsp
= SCRIPTA_BA(np
, clrack
);
2734 OUTL_DSP(np
, nxtdsp
);
2739 sym_start_reset(np
);
2743 * chip interrupt handler
2745 * In normal situations, interrupt conditions occur one at
2746 * a time. But when something bad happens on the SCSI BUS,
2747 * the chip may raise several interrupt flags before
2748 * stopping and interrupting the CPU. The additionnal
2749 * interrupt flags are stacked in some extra registers
2750 * after the SIP and/or DIP flag has been raised in the
2751 * ISTAT. After the CPU has read the interrupt condition
2752 * flag from SIST or DSTAT, the chip unstacks the other
2753 * interrupt flags and sets the corresponding bits in
2754 * SIST or DSTAT. Since the chip starts stacking once the
2755 * SIP or DIP flag is set, there is a small window of time
2756 * where the stacking does not occur.
2758 * Typically, multiple interrupt conditions may happen in
2759 * the following situations:
2761 * - SCSI parity error + Phase mismatch (PAR|MA)
2762 * When an parity error is detected in input phase
2763 * and the device switches to msg-in phase inside a
2765 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2766 * When a stupid device does not want to handle the
2767 * recovery of an SCSI parity error.
2768 * - Some combinations of STO, PAR, UDC, ...
2769 * When using non compliant SCSI stuff, when user is
2770 * doing non compliant hot tampering on the BUS, when
2771 * something really bad happens to a device, etc ...
2773 * The heuristic suggested by SYMBIOS to handle
2774 * multiple interrupts is to try unstacking all
2775 * interrupts conditions and to handle them on some
2776 * priority based on error severity.
2777 * This will work when the unstacking has been
2778 * successful, but we cannot be 100 % sure of that,
2779 * since the CPU may have been faster to unstack than
2780 * the chip is able to stack. Hmmm ... But it seems that
2781 * such a situation is very unlikely to happen.
2783 * If this happen, for example STO caught by the CPU
2784 * then UDC happenning before the CPU have restarted
2785 * the SCRIPTS, the driver may wrongly complete the
2786 * same command on UDC, since the SCRIPTS didn't restart
2787 * and the DSA still points to the same command.
2788 * We avoid this situation by setting the DSA to an
2789 * invalid value when the CCB is completed and before
2790 * restarting the SCRIPTS.
2792 * Another issue is that we need some section of our
2793 * recovery procedures to be somehow uninterruptible but
2794 * the SCRIPTS processor does not provides such a
2795 * feature. For this reason, we handle recovery preferently
2796 * from the C code and check against some SCRIPTS critical
2797 * sections from the C code.
2799 * Hopefully, the interrupt handling of the driver is now
2800 * able to resist to weird BUS error conditions, but donnot
2801 * ask me for any guarantee that it will never fail. :-)
2802 * Use at your own decision and risk.
2805 irqreturn_t
sym_interrupt(struct Scsi_Host
*shost
)
2807 struct sym_data
*sym_data
= shost_priv(shost
);
2808 struct sym_hcb
*np
= sym_data
->ncb
;
2809 struct pci_dev
*pdev
= sym_data
->pdev
;
2810 u_char istat
, istatc
;
2815 * interrupt on the fly ?
2816 * (SCRIPTS may still be running)
2818 * A `dummy read' is needed to ensure that the
2819 * clear of the INTF flag reaches the device
2820 * and that posted writes are flushed to memory
2821 * before the scanning of the DONE queue.
2822 * Note that SCRIPTS also (dummy) read to memory
2823 * prior to deliver the INTF interrupt condition.
2825 istat
= INB(np
, nc_istat
);
2827 OUTB(np
, nc_istat
, (istat
& SIGP
) | INTF
| np
->istat_sem
);
2828 istat
|= INB(np
, nc_istat
); /* DUMMY READ */
2829 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("F ");
2830 sym_wakeup_done(np
);
2833 if (!(istat
& (SIP
|DIP
)))
2834 return (istat
& INTF
) ? IRQ_HANDLED
: IRQ_NONE
;
2836 #if 0 /* We should never get this one */
2838 OUTB(np
, nc_istat
, CABRT
);
2842 * PAR and MA interrupts may occur at the same time,
2843 * and we need to know of both in order to handle
2844 * this situation properly. We try to unstack SCSI
2845 * interrupts for that reason. BTW, I dislike a LOT
2846 * such a loop inside the interrupt routine.
2847 * Even if DMA interrupt stacking is very unlikely to
2848 * happen, we also try unstacking these ones, since
2849 * this has no performance impact.
2856 sist
|= INW(np
, nc_sist
);
2858 dstat
|= INB(np
, nc_dstat
);
2859 istatc
= INB(np
, nc_istat
);
2862 /* Prevent deadlock waiting on a condition that may
2864 if (unlikely(sist
== 0xffff && dstat
== 0xff)) {
2865 if (pci_channel_offline(pdev
))
2868 } while (istatc
& (SIP
|DIP
));
2870 if (DEBUG_FLAGS
& DEBUG_TINY
)
2871 printf ("<%d|%x:%x|%x:%x>",
2872 (int)INB(np
, nc_scr0
),
2874 (unsigned)INL(np
, nc_dsp
),
2875 (unsigned)INL(np
, nc_dbc
));
2877 * On paper, a memory read barrier may be needed here to
2878 * prevent out of order LOADs by the CPU from having
2879 * prefetched stale data prior to DMA having occurred.
2880 * And since we are paranoid ... :)
2882 MEMORY_READ_BARRIER();
2885 * First, interrupts we want to service cleanly.
2887 * Phase mismatch (MA) is the most frequent interrupt
2888 * for chip earlier than the 896 and so we have to service
2889 * it as quickly as possible.
2890 * A SCSI parity error (PAR) may be combined with a phase
2891 * mismatch condition (MA).
2892 * Programmed interrupts (SIR) are used to call the C code
2894 * The single step interrupt (SSI) is not used in this
2897 if (!(sist
& (STO
|GEN
|HTH
|SGE
|UDC
|SBMC
|RST
)) &&
2898 !(dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2899 if (sist
& PAR
) sym_int_par (np
, sist
);
2900 else if (sist
& MA
) sym_int_ma (np
);
2901 else if (dstat
& SIR
) sym_int_sir(np
);
2902 else if (dstat
& SSI
) OUTONB_STD();
2903 else goto unknown_int
;
2908 * Now, interrupts that donnot happen in normal
2909 * situations and that we may need to recover from.
2911 * On SCSI RESET (RST), we reset everything.
2912 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2913 * active CCBs with RESET status, prepare all devices
2914 * for negotiating again and restart the SCRIPTS.
2915 * On STO and UDC, we complete the CCB with the corres-
2916 * ponding status and restart the SCRIPTS.
2919 printf("%s: SCSI BUS reset detected.\n", sym_name(np
));
2920 sym_start_up(shost
, 1);
2924 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* clear dma fifo */
2925 OUTB(np
, nc_stest3
, TE
|CSF
); /* clear scsi fifo */
2927 if (!(sist
& (GEN
|HTH
|SGE
)) &&
2928 !(dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2929 if (sist
& SBMC
) sym_int_sbmc(shost
);
2930 else if (sist
& STO
) sym_int_sto (np
);
2931 else if (sist
& UDC
) sym_int_udc (np
);
2932 else goto unknown_int
;
2937 * Now, interrupts we are not able to recover cleanly.
2939 * Log message for hard errors.
2943 sym_log_hard_error(shost
, sist
, dstat
);
2945 if ((sist
& (GEN
|HTH
|SGE
)) ||
2946 (dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2947 sym_start_reset(np
);
2953 * We just miss the cause of the interrupt. :(
2954 * Print a message. The timeout will do the real work.
2956 printf( "%s: unknown interrupt(s) ignored, "
2957 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2958 sym_name(np
), istat
, dstat
, sist
);
2963 * Dequeue from the START queue all CCBs that match
2964 * a given target/lun/task condition (-1 means all),
2965 * and move them from the BUSY queue to the COMP queue
2966 * with DID_SOFT_ERROR status condition.
2967 * This function is used during error handling/recovery.
2968 * It is called with SCRIPTS not running.
2971 sym_dequeue_from_squeue(struct sym_hcb
*np
, int i
, int target
, int lun
, int task
)
2977 * Make sure the starting index is within range.
2979 assert((i
>= 0) && (i
< 2*MAX_QUEUE
));
2982 * Walk until end of START queue and dequeue every job
2983 * that matches the target/lun/task condition.
2986 while (i
!= np
->squeueput
) {
2987 cp
= sym_ccb_from_dsa(np
, scr_to_cpu(np
->squeue
[i
]));
2989 #ifdef SYM_CONF_IARB_SUPPORT
2990 /* Forget hints for IARB, they may be no longer relevant */
2991 cp
->host_flags
&= ~HF_HINT_IARB
;
2993 if ((target
== -1 || cp
->target
== target
) &&
2994 (lun
== -1 || cp
->lun
== lun
) &&
2995 (task
== -1 || cp
->tag
== task
)) {
2996 sym_set_cam_status(cp
->cmd
, DID_SOFT_ERROR
);
2997 sym_remque(&cp
->link_ccbq
);
2998 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
3002 np
->squeue
[j
] = np
->squeue
[i
];
3003 if ((j
+= 2) >= MAX_QUEUE
*2) j
= 0;
3005 if ((i
+= 2) >= MAX_QUEUE
*2) i
= 0;
3007 if (i
!= j
) /* Copy back the idle task if needed */
3008 np
->squeue
[j
] = np
->squeue
[i
];
3009 np
->squeueput
= j
; /* Update our current start queue pointer */
3015 * chip handler for bad SCSI status condition
3017 * In case of bad SCSI status, we unqueue all the tasks
3018 * currently queued to the controller but not yet started
3019 * and then restart the SCRIPTS processor immediately.
3021 * QUEUE FULL and BUSY conditions are handled the same way.
3022 * Basically all the not yet started tasks are requeued in
3023 * device queue and the queue is frozen until a completion.
3025 * For CHECK CONDITION and COMMAND TERMINATED status, we use
3026 * the CCB of the failed command to prepare a REQUEST SENSE
3027 * SCSI command and queue it to the controller queue.
3029 * SCRATCHA is assumed to have been loaded with STARTPOS
3030 * before the SCRIPTS called the C code.
3032 static void sym_sir_bad_scsi_status(struct sym_hcb
*np
, int num
, struct sym_ccb
*cp
)
3035 u_char s_status
= cp
->ssss_status
;
3036 u_char h_flags
= cp
->host_flags
;
3041 * Compute the index of the next job to start from SCRIPTS.
3043 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3046 * The last CCB queued used for IARB hint may be
3047 * no longer relevant. Forget it.
3049 #ifdef SYM_CONF_IARB_SUPPORT
3055 * Now deal with the SCSI status.
3060 if (sym_verbose
>= 2) {
3061 sym_print_addr(cp
->cmd
, "%s\n",
3062 s_status
== S_BUSY
? "BUSY" : "QUEUE FULL\n");
3064 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3065 sym_complete_error (np
, cp
);
3070 * If we get an SCSI error when requesting sense, give up.
3072 if (h_flags
& HF_SENSE
) {
3073 sym_complete_error (np
, cp
);
3078 * Dequeue all queued CCBs for that device not yet started,
3079 * and restart the SCRIPTS processor immediately.
3081 sym_dequeue_from_squeue(np
, i
, cp
->target
, cp
->lun
, -1);
3082 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
3085 * Save some info of the actual IO.
3086 * Compute the data residual.
3088 cp
->sv_scsi_status
= cp
->ssss_status
;
3089 cp
->sv_xerr_status
= cp
->xerr_status
;
3090 cp
->sv_resid
= sym_compute_residual(np
, cp
);
3093 * Prepare all needed data structures for
3094 * requesting sense data.
3097 cp
->scsi_smsg2
[0] = IDENTIFY(0, cp
->lun
);
3101 * If we are currently using anything different from
3102 * async. 8 bit data transfers with that target,
3103 * start a negotiation, since the device may want
3104 * to report us a UNIT ATTENTION condition due to
3105 * a cause we currently ignore, and we donnot want
3106 * to be stuck with WIDE and/or SYNC data transfer.
3108 * cp->nego_status is filled by sym_prepare_nego().
3110 cp
->nego_status
= 0;
3111 msglen
+= sym_prepare_nego(np
, cp
, &cp
->scsi_smsg2
[msglen
]);
3113 * Message table indirect structure.
3115 cp
->phys
.smsg
.addr
= CCB_BA(cp
, scsi_smsg2
);
3116 cp
->phys
.smsg
.size
= cpu_to_scr(msglen
);
3121 cp
->phys
.cmd
.addr
= CCB_BA(cp
, sensecmd
);
3122 cp
->phys
.cmd
.size
= cpu_to_scr(6);
3125 * patch requested size into sense command
3127 cp
->sensecmd
[0] = REQUEST_SENSE
;
3128 cp
->sensecmd
[1] = 0;
3129 if (cp
->cmd
->device
->scsi_level
<= SCSI_2
&& cp
->lun
<= 7)
3130 cp
->sensecmd
[1] = cp
->lun
<< 5;
3131 cp
->sensecmd
[4] = SYM_SNS_BBUF_LEN
;
3132 cp
->data_len
= SYM_SNS_BBUF_LEN
;
3137 memset(cp
->sns_bbuf
, 0, SYM_SNS_BBUF_LEN
);
3138 cp
->phys
.sense
.addr
= CCB_BA(cp
, sns_bbuf
);
3139 cp
->phys
.sense
.size
= cpu_to_scr(SYM_SNS_BBUF_LEN
);
3142 * requeue the command.
3144 startp
= SCRIPTB_BA(np
, sdata_in
);
3146 cp
->phys
.head
.savep
= cpu_to_scr(startp
);
3147 cp
->phys
.head
.lastp
= cpu_to_scr(startp
);
3148 cp
->startp
= cpu_to_scr(startp
);
3149 cp
->goalp
= cpu_to_scr(startp
+ 16);
3151 cp
->host_xflags
= 0;
3152 cp
->host_status
= cp
->nego_status
? HS_NEGOTIATE
: HS_BUSY
;
3153 cp
->ssss_status
= S_ILLEGAL
;
3154 cp
->host_flags
= (HF_SENSE
|HF_DATA_IN
);
3155 cp
->xerr_status
= 0;
3156 cp
->extra_bytes
= 0;
3158 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, select
));
3161 * Requeue the command.
3163 sym_put_start_queue(np
, cp
);
3166 * Give back to upper layer everything we have dequeued.
3168 sym_flush_comp_queue(np
, 0);
3174 * After a device has accepted some management message
3175 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3176 * a device signals a UNIT ATTENTION condition, some
3177 * tasks are thrown away by the device. We are required
3178 * to reflect that on our tasks list since the device
3179 * will never complete these tasks.
3181 * This function move from the BUSY queue to the COMP
3182 * queue all disconnected CCBs for a given target that
3183 * match the following criteria:
3184 * - lun=-1 means any logical UNIT otherwise a given one.
3185 * - task=-1 means any task, otherwise a given one.
3187 int sym_clear_tasks(struct sym_hcb
*np
, int cam_status
, int target
, int lun
, int task
)
3189 SYM_QUEHEAD qtmp
, *qp
;
3194 * Move the entire BUSY queue to our temporary queue.
3196 sym_que_init(&qtmp
);
3197 sym_que_splice(&np
->busy_ccbq
, &qtmp
);
3198 sym_que_init(&np
->busy_ccbq
);
3201 * Put all CCBs that matches our criteria into
3202 * the COMP queue and put back other ones into
3205 while ((qp
= sym_remque_head(&qtmp
)) != NULL
) {
3206 struct scsi_cmnd
*cmd
;
3207 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3209 if (cp
->host_status
!= HS_DISCONNECT
||
3210 cp
->target
!= target
||
3211 (lun
!= -1 && cp
->lun
!= lun
) ||
3213 (cp
->tag
!= NO_TAG
&& cp
->scsi_smsg
[2] != task
))) {
3214 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
3217 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
3219 /* Preserve the software timeout condition */
3220 if (sym_get_cam_status(cmd
) != DID_TIME_OUT
)
3221 sym_set_cam_status(cmd
, cam_status
);
3224 printf("XXXX TASK @%p CLEARED\n", cp
);
3231 * chip handler for TASKS recovery
3233 * We cannot safely abort a command, while the SCRIPTS
3234 * processor is running, since we just would be in race
3237 * As long as we have tasks to abort, we keep the SEM
3238 * bit set in the ISTAT. When this bit is set, the
3239 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3240 * each time it enters the scheduler.
3242 * If we have to reset a target, clear tasks of a unit,
3243 * or to perform the abort of a disconnected job, we
3244 * restart the SCRIPTS for selecting the target. Once
3245 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3246 * If it loses arbitration, the SCRIPTS will interrupt again
3247 * the next time it will enter its scheduler, and so on ...
3249 * On SIR_TARGET_SELECTED, we scan for the more
3250 * appropriate thing to do:
3252 * - If nothing, we just sent a M_ABORT message to the
3253 * target to get rid of the useless SCSI bus ownership.
3254 * According to the specs, no tasks shall be affected.
3255 * - If the target is to be reset, we send it a M_RESET
3257 * - If a logical UNIT is to be cleared , we send the
3258 * IDENTIFY(lun) + M_ABORT.
3259 * - If an untagged task is to be aborted, we send the
3260 * IDENTIFY(lun) + M_ABORT.
3261 * - If a tagged task is to be aborted, we send the
3262 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3264 * Once our 'kiss of death' :) message has been accepted
3265 * by the target, the SCRIPTS interrupts again
3266 * (SIR_ABORT_SENT). On this interrupt, we complete
3267 * all the CCBs that should have been aborted by the
3268 * target according to our message.
3270 static void sym_sir_task_recovery(struct sym_hcb
*np
, int num
)
3274 struct sym_tcb
*tp
= NULL
; /* gcc isn't quite smart enough yet */
3275 struct scsi_target
*starget
;
3276 int target
=-1, lun
=-1, task
;
3281 * The SCRIPTS processor stopped before starting
3282 * the next command in order to allow us to perform
3283 * some task recovery.
3285 case SIR_SCRIPT_STOPPED
:
3287 * Do we have any target to reset or unit to clear ?
3289 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
3290 tp
= &np
->target
[i
];
3292 (tp
->lun0p
&& tp
->lun0p
->to_clear
)) {
3298 for (k
= 1 ; k
< SYM_CONF_MAX_LUN
; k
++) {
3299 if (tp
->lunmp
[k
] && tp
->lunmp
[k
]->to_clear
) {
3309 * If not, walk the busy queue for any
3310 * disconnected CCB to be aborted.
3313 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3314 cp
= sym_que_entry(qp
,struct sym_ccb
,link_ccbq
);
3315 if (cp
->host_status
!= HS_DISCONNECT
)
3318 target
= cp
->target
;
3325 * If some target is to be selected,
3326 * prepare and start the selection.
3329 tp
= &np
->target
[target
];
3330 np
->abrt_sel
.sel_id
= target
;
3331 np
->abrt_sel
.sel_scntl3
= tp
->head
.wval
;
3332 np
->abrt_sel
.sel_sxfer
= tp
->head
.sval
;
3333 OUTL(np
, nc_dsa
, np
->hcb_ba
);
3334 OUTL_DSP(np
, SCRIPTB_BA(np
, sel_for_abort
));
3339 * Now look for a CCB to abort that haven't started yet.
3340 * Btw, the SCRIPTS processor is still stopped, so
3341 * we are not in race.
3345 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3346 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3347 if (cp
->host_status
!= HS_BUSY
&&
3348 cp
->host_status
!= HS_NEGOTIATE
)
3352 #ifdef SYM_CONF_IARB_SUPPORT
3354 * If we are using IMMEDIATE ARBITRATION, we donnot
3355 * want to cancel the last queued CCB, since the
3356 * SCRIPTS may have anticipated the selection.
3358 if (cp
== np
->last_cp
) {
3363 i
= 1; /* Means we have found some */
3368 * We are done, so we donnot need
3369 * to synchronize with the SCRIPTS anylonger.
3370 * Remove the SEM flag from the ISTAT.
3373 OUTB(np
, nc_istat
, SIGP
);
3377 * Compute index of next position in the start
3378 * queue the SCRIPTS intends to start and dequeue
3379 * all CCBs for that device that haven't been started.
3381 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3382 i
= sym_dequeue_from_squeue(np
, i
, cp
->target
, cp
->lun
, -1);
3385 * Make sure at least our IO to abort has been dequeued.
3387 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3388 assert(i
&& sym_get_cam_status(cp
->cmd
) == DID_SOFT_ERROR
);
3390 sym_remque(&cp
->link_ccbq
);
3391 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
3394 * Keep track in cam status of the reason of the abort.
3396 if (cp
->to_abort
== 2)
3397 sym_set_cam_status(cp
->cmd
, DID_TIME_OUT
);
3399 sym_set_cam_status(cp
->cmd
, DID_ABORT
);
3402 * Complete with error everything that we have dequeued.
3404 sym_flush_comp_queue(np
, 0);
3407 * The SCRIPTS processor has selected a target
3408 * we may have some manual recovery to perform for.
3410 case SIR_TARGET_SELECTED
:
3411 target
= INB(np
, nc_sdid
) & 0xf;
3412 tp
= &np
->target
[target
];
3414 np
->abrt_tbl
.addr
= cpu_to_scr(vtobus(np
->abrt_msg
));
3417 * If the target is to be reset, prepare a
3418 * M_RESET message and clear the to_reset flag
3419 * since we donnot expect this operation to fail.
3422 np
->abrt_msg
[0] = M_RESET
;
3423 np
->abrt_tbl
.size
= 1;
3429 * Otherwise, look for some logical unit to be cleared.
3431 if (tp
->lun0p
&& tp
->lun0p
->to_clear
)
3433 else if (tp
->lunmp
) {
3434 for (k
= 1 ; k
< SYM_CONF_MAX_LUN
; k
++) {
3435 if (tp
->lunmp
[k
] && tp
->lunmp
[k
]->to_clear
) {
3443 * If a logical unit is to be cleared, prepare
3444 * an IDENTIFY(lun) + ABORT MESSAGE.
3447 struct sym_lcb
*lp
= sym_lp(tp
, lun
);
3448 lp
->to_clear
= 0; /* We don't expect to fail here */
3449 np
->abrt_msg
[0] = IDENTIFY(0, lun
);
3450 np
->abrt_msg
[1] = M_ABORT
;
3451 np
->abrt_tbl
.size
= 2;
3456 * Otherwise, look for some disconnected job to
3457 * abort for this target.
3461 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3462 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3463 if (cp
->host_status
!= HS_DISCONNECT
)
3465 if (cp
->target
!= target
)
3469 i
= 1; /* Means we have some */
3474 * If we have none, probably since the device has
3475 * completed the command before we won abitration,
3476 * send a M_ABORT message without IDENTIFY.
3477 * According to the specs, the device must just
3478 * disconnect the BUS and not abort any task.
3481 np
->abrt_msg
[0] = M_ABORT
;
3482 np
->abrt_tbl
.size
= 1;
3487 * We have some task to abort.
3488 * Set the IDENTIFY(lun)
3490 np
->abrt_msg
[0] = IDENTIFY(0, cp
->lun
);
3493 * If we want to abort an untagged command, we
3494 * will send a IDENTIFY + M_ABORT.
3495 * Otherwise (tagged command), we will send
3496 * a IDENTITFY + task attributes + ABORT TAG.
3498 if (cp
->tag
== NO_TAG
) {
3499 np
->abrt_msg
[1] = M_ABORT
;
3500 np
->abrt_tbl
.size
= 2;
3502 np
->abrt_msg
[1] = cp
->scsi_smsg
[1];
3503 np
->abrt_msg
[2] = cp
->scsi_smsg
[2];
3504 np
->abrt_msg
[3] = M_ABORT_TAG
;
3505 np
->abrt_tbl
.size
= 4;
3508 * Keep track of software timeout condition, since the
3509 * peripheral driver may not count retries on abort
3510 * conditions not due to timeout.
3512 if (cp
->to_abort
== 2)
3513 sym_set_cam_status(cp
->cmd
, DID_TIME_OUT
);
3514 cp
->to_abort
= 0; /* We donnot expect to fail here */
3518 * The target has accepted our message and switched
3519 * to BUS FREE phase as we expected.
3521 case SIR_ABORT_SENT
:
3522 target
= INB(np
, nc_sdid
) & 0xf;
3523 tp
= &np
->target
[target
];
3524 starget
= tp
->starget
;
3527 ** If we didn't abort anything, leave here.
3529 if (np
->abrt_msg
[0] == M_ABORT
)
3533 * If we sent a M_RESET, then a hardware reset has
3534 * been performed by the target.
3535 * - Reset everything to async 8 bit
3536 * - Tell ourself to negotiate next time :-)
3537 * - Prepare to clear all disconnected CCBs for
3538 * this target from our task list (lun=task=-1)
3542 if (np
->abrt_msg
[0] == M_RESET
) {
3544 tp
->head
.wval
= np
->rv_scntl3
;
3546 spi_period(starget
) = 0;
3547 spi_offset(starget
) = 0;
3548 spi_width(starget
) = 0;
3549 spi_iu(starget
) = 0;
3550 spi_dt(starget
) = 0;
3551 spi_qas(starget
) = 0;
3552 tp
->tgoal
.check_nego
= 1;
3553 tp
->tgoal
.renego
= 0;
3557 * Otherwise, check for the LUN and TASK(s)
3558 * concerned by the cancelation.
3559 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3560 * or an ABORT message :-)
3563 lun
= np
->abrt_msg
[0] & 0x3f;
3564 if (np
->abrt_msg
[1] == M_ABORT_TAG
)
3565 task
= np
->abrt_msg
[2];
3569 * Complete all the CCBs the device should have
3570 * aborted due to our 'kiss of death' message.
3572 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3573 sym_dequeue_from_squeue(np
, i
, target
, lun
, -1);
3574 sym_clear_tasks(np
, DID_ABORT
, target
, lun
, task
);
3575 sym_flush_comp_queue(np
, 0);
3578 * If we sent a BDR, make upper layer aware of that.
3580 if (np
->abrt_msg
[0] == M_RESET
)
3581 starget_printk(KERN_NOTICE
, starget
,
3582 "has been reset\n");
3587 * Print to the log the message we intend to send.
3589 if (num
== SIR_TARGET_SELECTED
) {
3590 dev_info(&tp
->starget
->dev
, "control msgout:");
3591 sym_printl_hex(np
->abrt_msg
, np
->abrt_tbl
.size
);
3592 np
->abrt_tbl
.size
= cpu_to_scr(np
->abrt_tbl
.size
);
3596 * Let the SCRIPTS processor continue.
3602 * Gerard's alchemy:) that deals with with the data
3603 * pointer for both MDP and the residual calculation.
3605 * I didn't want to bloat the code by more than 200
3606 * lines for the handling of both MDP and the residual.
3607 * This has been achieved by using a data pointer
3608 * representation consisting in an index in the data
3609 * array (dp_sg) and a negative offset (dp_ofs) that
3610 * have the following meaning:
3612 * - dp_sg = SYM_CONF_MAX_SG
3613 * we are at the end of the data script.
3614 * - dp_sg < SYM_CONF_MAX_SG
3615 * dp_sg points to the next entry of the scatter array
3616 * we want to transfer.
3618 * dp_ofs represents the residual of bytes of the
3619 * previous entry scatter entry we will send first.
3621 * no residual to send first.
3623 * The function sym_evaluate_dp() accepts an arbitray
3624 * offset (basically from the MDP message) and returns
3625 * the corresponding values of dp_sg and dp_ofs.
3628 static int sym_evaluate_dp(struct sym_hcb
*np
, struct sym_ccb
*cp
, u32 scr
, int *ofs
)
3631 int dp_ofs
, dp_sg
, dp_sgmin
;
3636 * Compute the resulted data pointer in term of a script
3637 * address within some DATA script and a signed byte offset.
3641 if (dp_scr
== SCRIPTA_BA(np
, pm0_data
))
3643 else if (dp_scr
== SCRIPTA_BA(np
, pm1_data
))
3649 dp_scr
= scr_to_cpu(pm
->ret
);
3650 dp_ofs
-= scr_to_cpu(pm
->sg
.size
) & 0x00ffffff;
3654 * If we are auto-sensing, then we are done.
3656 if (cp
->host_flags
& HF_SENSE
) {
3662 * Deduce the index of the sg entry.
3663 * Keep track of the index of the first valid entry.
3664 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3667 tmp
= scr_to_cpu(cp
->goalp
);
3668 dp_sg
= SYM_CONF_MAX_SG
;
3670 dp_sg
-= (tmp
- 8 - (int)dp_scr
) / (2*4);
3671 dp_sgmin
= SYM_CONF_MAX_SG
- cp
->segments
;
3674 * Move to the sg entry the data pointer belongs to.
3676 * If we are inside the data area, we expect result to be:
3679 * dp_ofs = 0 and dp_sg is the index of the sg entry
3680 * the data pointer belongs to (or the end of the data)
3682 * dp_ofs < 0 and dp_sg is the index of the sg entry
3683 * the data pointer belongs to + 1.
3687 while (dp_sg
> dp_sgmin
) {
3689 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3690 n
= dp_ofs
+ (tmp
& 0xffffff);
3698 else if (dp_ofs
> 0) {
3699 while (dp_sg
< SYM_CONF_MAX_SG
) {
3700 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3701 dp_ofs
-= (tmp
& 0xffffff);
3709 * Make sure the data pointer is inside the data area.
3710 * If not, return some error.
3712 if (dp_sg
< dp_sgmin
|| (dp_sg
== dp_sgmin
&& dp_ofs
< 0))
3714 else if (dp_sg
> SYM_CONF_MAX_SG
||
3715 (dp_sg
== SYM_CONF_MAX_SG
&& dp_ofs
> 0))
3719 * Save the extreme pointer if needed.
3721 if (dp_sg
> cp
->ext_sg
||
3722 (dp_sg
== cp
->ext_sg
&& dp_ofs
> cp
->ext_ofs
)) {
3724 cp
->ext_ofs
= dp_ofs
;
3738 * chip handler for MODIFY DATA POINTER MESSAGE
3740 * We also call this function on IGNORE WIDE RESIDUE
3741 * messages that do not match a SWIDE full condition.
3742 * Btw, we assume in that situation that such a message
3743 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3746 static void sym_modify_dp(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
, int ofs
)
3749 u32 dp_scr
= sym_get_script_dp (np
, cp
);
3757 * Not supported for auto-sense.
3759 if (cp
->host_flags
& HF_SENSE
)
3763 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3764 * to the resulted data pointer.
3766 dp_sg
= sym_evaluate_dp(np
, cp
, dp_scr
, &dp_ofs
);
3771 * And our alchemy:) allows to easily calculate the data
3772 * script address we want to return for the next data phase.
3774 dp_ret
= cpu_to_scr(cp
->goalp
);
3775 dp_ret
= dp_ret
- 8 - (SYM_CONF_MAX_SG
- dp_sg
) * (2*4);
3778 * If offset / scatter entry is zero we donnot need
3779 * a context for the new current data pointer.
3787 * Get a context for the new current data pointer.
3789 hflags
= INB(np
, HF_PRT
);
3791 if (hflags
& HF_DP_SAVED
)
3792 hflags
^= HF_ACT_PM
;
3794 if (!(hflags
& HF_ACT_PM
)) {
3796 dp_scr
= SCRIPTA_BA(np
, pm0_data
);
3800 dp_scr
= SCRIPTA_BA(np
, pm1_data
);
3803 hflags
&= ~(HF_DP_SAVED
);
3805 OUTB(np
, HF_PRT
, hflags
);
3808 * Set up the new current data pointer.
3809 * ofs < 0 there, and for the next data phase, we
3810 * want to transfer part of the data of the sg entry
3811 * corresponding to index dp_sg-1 prior to returning
3812 * to the main data script.
3814 pm
->ret
= cpu_to_scr(dp_ret
);
3815 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
-1].addr
);
3816 tmp
+= scr_to_cpu(cp
->phys
.data
[dp_sg
-1].size
) + dp_ofs
;
3817 pm
->sg
.addr
= cpu_to_scr(tmp
);
3818 pm
->sg
.size
= cpu_to_scr(-dp_ofs
);
3821 sym_set_script_dp (np
, cp
, dp_scr
);
3822 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
3826 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
3831 * chip calculation of the data residual.
3833 * As I used to say, the requirement of data residual
3834 * in SCSI is broken, useless and cannot be achieved
3835 * without huge complexity.
3836 * But most OSes and even the official CAM require it.
3837 * When stupidity happens to be so widely spread inside
3838 * a community, it gets hard to convince.
3840 * Anyway, I don't care, since I am not going to use
3841 * any software that considers this data residual as
3842 * a relevant information. :)
3845 int sym_compute_residual(struct sym_hcb
*np
, struct sym_ccb
*cp
)
3847 int dp_sg
, dp_sgmin
, resid
= 0;
3851 * Check for some data lost or just thrown away.
3852 * We are not required to be quite accurate in this
3853 * situation. Btw, if we are odd for output and the
3854 * device claims some more data, it may well happen
3855 * than our residual be zero. :-)
3857 if (cp
->xerr_status
& (XE_EXTRA_DATA
|XE_SODL_UNRUN
|XE_SWIDE_OVRUN
)) {
3858 if (cp
->xerr_status
& XE_EXTRA_DATA
)
3859 resid
-= cp
->extra_bytes
;
3860 if (cp
->xerr_status
& XE_SODL_UNRUN
)
3862 if (cp
->xerr_status
& XE_SWIDE_OVRUN
)
3867 * If all data has been transferred,
3868 * there is no residual.
3870 if (cp
->phys
.head
.lastp
== cp
->goalp
)
3874 * If no data transfer occurs, or if the data
3875 * pointer is weird, return full residual.
3877 if (cp
->startp
== cp
->phys
.head
.lastp
||
3878 sym_evaluate_dp(np
, cp
, scr_to_cpu(cp
->phys
.head
.lastp
),
3880 return cp
->data_len
- cp
->odd_byte_adjustment
;
3884 * If we were auto-sensing, then we are done.
3886 if (cp
->host_flags
& HF_SENSE
) {
3891 * We are now full comfortable in the computation
3892 * of the data residual (2's complement).
3894 dp_sgmin
= SYM_CONF_MAX_SG
- cp
->segments
;
3895 resid
= -cp
->ext_ofs
;
3896 for (dp_sg
= cp
->ext_sg
; dp_sg
< SYM_CONF_MAX_SG
; ++dp_sg
) {
3897 u_int tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3898 resid
+= (tmp
& 0xffffff);
3901 resid
-= cp
->odd_byte_adjustment
;
3904 * Hopefully, the result is not too wrong.
3910 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3912 * When we try to negotiate, we append the negotiation message
3913 * to the identify and (maybe) simple tag message.
3914 * The host status field is set to HS_NEGOTIATE to mark this
3917 * If the target doesn't answer this message immediately
3918 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3919 * will be raised eventually.
3920 * The handler removes the HS_NEGOTIATE status, and sets the
3921 * negotiated value to the default (async / nowide).
3923 * If we receive a matching answer immediately, we check it
3924 * for validity, and set the values.
3926 * If we receive a Reject message immediately, we assume the
3927 * negotiation has failed, and fall back to standard values.
3929 * If we receive a negotiation message while not in HS_NEGOTIATE
3930 * state, it's a target initiated negotiation. We prepare a
3931 * (hopefully) valid answer, set our parameters, and send back
3932 * this answer to the target.
3934 * If the target doesn't fetch the answer (no message out phase),
3935 * we assume the negotiation has failed, and fall back to default
3936 * settings (SIR_NEGO_PROTO interrupt).
3938 * When we set the values, we adjust them in all ccbs belonging
3939 * to this target, in the controller's register, and in the "phys"
3940 * field of the controller's struct sym_hcb.
3944 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3947 sym_sync_nego_check(struct sym_hcb
*np
, int req
, struct sym_ccb
*cp
)
3949 int target
= cp
->target
;
3950 u_char chg
, ofs
, per
, fak
, div
;
3952 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
3953 sym_print_nego_msg(np
, target
, "sync msgin", np
->msgin
);
3957 * Get requested values.
3964 * Check values against our limits.
3967 if (ofs
> np
->maxoffs
)
3968 {chg
= 1; ofs
= np
->maxoffs
;}
3972 if (per
< np
->minsync
)
3973 {chg
= 1; per
= np
->minsync
;}
3977 * Get new chip synchronous parameters value.
3980 if (ofs
&& sym_getsync(np
, 0, per
, &div
, &fak
) < 0)
3983 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
3984 sym_print_addr(cp
->cmd
,
3985 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3986 ofs
, per
, div
, fak
, chg
);
3990 * If it was an answer we want to change,
3991 * then it isn't acceptable. Reject it.
3999 sym_setsync (np
, target
, ofs
, per
, div
, fak
);
4002 * It was an answer. We are done.
4008 * It was a request. Prepare an answer message.
4010 spi_populate_sync_msg(np
->msgout
, per
, ofs
);
4012 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4013 sym_print_nego_msg(np
, target
, "sync msgout", np
->msgout
);
4016 np
->msgin
[0] = M_NOOP
;
4021 sym_setsync (np
, target
, 0, 0, 0, 0);
4025 static void sym_sync_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4031 * Request or answer ?
4033 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4034 OUTB(np
, HS_PRT
, HS_BUSY
);
4035 if (cp
->nego_status
&& cp
->nego_status
!= NS_SYNC
)
4041 * Check and apply new values.
4043 result
= sym_sync_nego_check(np
, req
, cp
);
4044 if (result
) /* Not acceptable, reject it */
4046 if (req
) { /* Was a request, send response. */
4047 cp
->nego_status
= NS_SYNC
;
4048 OUTL_DSP(np
, SCRIPTB_BA(np
, sdtr_resp
));
4050 else /* Was a response, we are done. */
4051 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4055 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4059 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4062 sym_ppr_nego_check(struct sym_hcb
*np
, int req
, int target
)
4064 struct sym_tcb
*tp
= &np
->target
[target
];
4065 unsigned char fak
, div
;
4068 unsigned char per
= np
->msgin
[3];
4069 unsigned char ofs
= np
->msgin
[5];
4070 unsigned char wide
= np
->msgin
[6];
4071 unsigned char opts
= np
->msgin
[7] & PPR_OPT_MASK
;
4073 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4074 sym_print_nego_msg(np
, target
, "ppr msgin", np
->msgin
);
4078 * Check values against our limits.
4080 if (wide
> np
->maxwide
) {
4084 if (!wide
|| !(np
->features
& FE_U3EN
))
4087 if (opts
!= (np
->msgin
[7] & PPR_OPT_MASK
))
4090 dt
= opts
& PPR_OPT_DT
;
4093 unsigned char maxoffs
= dt
? np
->maxoffs_dt
: np
->maxoffs
;
4094 if (ofs
> maxoffs
) {
4101 unsigned char minsync
= dt
? np
->minsync_dt
: np
->minsync
;
4102 if (per
< minsync
) {
4109 * Get new chip synchronous parameters value.
4112 if (ofs
&& sym_getsync(np
, dt
, per
, &div
, &fak
) < 0)
4116 * If it was an answer we want to change,
4117 * then it isn't acceptable. Reject it.
4125 sym_setpprot(np
, target
, opts
, ofs
, per
, wide
, div
, fak
);
4128 * It was an answer. We are done.
4134 * It was a request. Prepare an answer message.
4136 spi_populate_ppr_msg(np
->msgout
, per
, ofs
, wide
, opts
);
4138 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4139 sym_print_nego_msg(np
, target
, "ppr msgout", np
->msgout
);
4142 np
->msgin
[0] = M_NOOP
;
4147 sym_setpprot (np
, target
, 0, 0, 0, 0, 0, 0);
4149 * If it is a device response that should result in
4150 * ST, we may want to try a legacy negotiation later.
4152 if (!req
&& !opts
) {
4153 tp
->tgoal
.period
= per
;
4154 tp
->tgoal
.offset
= ofs
;
4155 tp
->tgoal
.width
= wide
;
4156 tp
->tgoal
.iu
= tp
->tgoal
.dt
= tp
->tgoal
.qas
= 0;
4157 tp
->tgoal
.check_nego
= 1;
4162 static void sym_ppr_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4168 * Request or answer ?
4170 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4171 OUTB(np
, HS_PRT
, HS_BUSY
);
4172 if (cp
->nego_status
&& cp
->nego_status
!= NS_PPR
)
4178 * Check and apply new values.
4180 result
= sym_ppr_nego_check(np
, req
, cp
->target
);
4181 if (result
) /* Not acceptable, reject it */
4183 if (req
) { /* Was a request, send response. */
4184 cp
->nego_status
= NS_PPR
;
4185 OUTL_DSP(np
, SCRIPTB_BA(np
, ppr_resp
));
4187 else /* Was a response, we are done. */
4188 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4192 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4196 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4199 sym_wide_nego_check(struct sym_hcb
*np
, int req
, struct sym_ccb
*cp
)
4201 int target
= cp
->target
;
4204 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4205 sym_print_nego_msg(np
, target
, "wide msgin", np
->msgin
);
4209 * Get requested values.
4212 wide
= np
->msgin
[3];
4215 * Check values against our limits.
4217 if (wide
> np
->maxwide
) {
4222 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4223 sym_print_addr(cp
->cmd
, "wdtr: wide=%d chg=%d.\n",
4228 * If it was an answer we want to change,
4229 * then it isn't acceptable. Reject it.
4237 sym_setwide (np
, target
, wide
);
4240 * It was an answer. We are done.
4246 * It was a request. Prepare an answer message.
4248 spi_populate_width_msg(np
->msgout
, wide
);
4250 np
->msgin
[0] = M_NOOP
;
4252 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4253 sym_print_nego_msg(np
, target
, "wide msgout", np
->msgout
);
4262 static void sym_wide_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4268 * Request or answer ?
4270 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4271 OUTB(np
, HS_PRT
, HS_BUSY
);
4272 if (cp
->nego_status
&& cp
->nego_status
!= NS_WIDE
)
4278 * Check and apply new values.
4280 result
= sym_wide_nego_check(np
, req
, cp
);
4281 if (result
) /* Not acceptable, reject it */
4283 if (req
) { /* Was a request, send response. */
4284 cp
->nego_status
= NS_WIDE
;
4285 OUTL_DSP(np
, SCRIPTB_BA(np
, wdtr_resp
));
4286 } else { /* Was a response. */
4288 * Negotiate for SYNC immediately after WIDE response.
4289 * This allows to negotiate for both WIDE and SYNC on
4290 * a single SCSI command (Suggested by Justin Gibbs).
4292 if (tp
->tgoal
.offset
) {
4293 spi_populate_sync_msg(np
->msgout
, tp
->tgoal
.period
,
4296 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4297 sym_print_nego_msg(np
, cp
->target
,
4298 "sync msgout", np
->msgout
);
4301 cp
->nego_status
= NS_SYNC
;
4302 OUTB(np
, HS_PRT
, HS_NEGOTIATE
);
4303 OUTL_DSP(np
, SCRIPTB_BA(np
, sdtr_resp
));
4306 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4312 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4316 * Reset DT, SYNC or WIDE to default settings.
4318 * Called when a negotiation does not succeed either
4319 * on rejection or on protocol error.
4321 * A target that understands a PPR message should never
4322 * reject it, and messing with it is very unlikely.
4323 * So, if a PPR makes problems, we may just want to
4324 * try a legacy negotiation later.
4326 static void sym_nego_default(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4328 switch (cp
->nego_status
) {
4331 sym_setpprot (np
, cp
->target
, 0, 0, 0, 0, 0, 0);
4333 if (tp
->tgoal
.period
< np
->minsync
)
4334 tp
->tgoal
.period
= np
->minsync
;
4335 if (tp
->tgoal
.offset
> np
->maxoffs
)
4336 tp
->tgoal
.offset
= np
->maxoffs
;
4337 tp
->tgoal
.iu
= tp
->tgoal
.dt
= tp
->tgoal
.qas
= 0;
4338 tp
->tgoal
.check_nego
= 1;
4342 sym_setsync (np
, cp
->target
, 0, 0, 0, 0);
4345 sym_setwide (np
, cp
->target
, 0);
4348 np
->msgin
[0] = M_NOOP
;
4349 np
->msgout
[0] = M_NOOP
;
4350 cp
->nego_status
= 0;
4354 * chip handler for MESSAGE REJECT received in response to
4355 * PPR, WIDE or SYNCHRONOUS negotiation.
4357 static void sym_nego_rejected(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4359 sym_nego_default(np
, tp
, cp
);
4360 OUTB(np
, HS_PRT
, HS_BUSY
);
4364 * chip exception handler for programmed interrupts.
4366 static void sym_int_sir(struct sym_hcb
*np
)
4368 u_char num
= INB(np
, nc_dsps
);
4369 u32 dsa
= INL(np
, nc_dsa
);
4370 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
4371 u_char target
= INB(np
, nc_sdid
) & 0x0f;
4372 struct sym_tcb
*tp
= &np
->target
[target
];
4375 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("I#%d", num
);
4378 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4380 * SCRIPTS tell us that we may have to update
4381 * 64 bit DMA segment registers.
4383 case SIR_DMAP_DIRTY
:
4384 sym_update_dmap_regs(np
);
4388 * Command has been completed with error condition
4389 * or has been auto-sensed.
4391 case SIR_COMPLETE_ERROR
:
4392 sym_complete_error(np
, cp
);
4395 * The C code is currently trying to recover from something.
4396 * Typically, user want to abort some command.
4398 case SIR_SCRIPT_STOPPED
:
4399 case SIR_TARGET_SELECTED
:
4400 case SIR_ABORT_SENT
:
4401 sym_sir_task_recovery(np
, num
);
4404 * The device didn't go to MSG OUT phase after having
4405 * been selected with ATN. We do not want to handle that.
4407 case SIR_SEL_ATN_NO_MSG_OUT
:
4408 scmd_printk(KERN_WARNING
, cp
->cmd
,
4409 "No MSG OUT phase after selection with ATN\n");
4412 * The device didn't switch to MSG IN phase after
4413 * having reselected the initiator.
4415 case SIR_RESEL_NO_MSG_IN
:
4416 scmd_printk(KERN_WARNING
, cp
->cmd
,
4417 "No MSG IN phase after reselection\n");
4420 * After reselection, the device sent a message that wasn't
4423 case SIR_RESEL_NO_IDENTIFY
:
4424 scmd_printk(KERN_WARNING
, cp
->cmd
,
4425 "No IDENTIFY after reselection\n");
4428 * The device reselected a LUN we do not know about.
4430 case SIR_RESEL_BAD_LUN
:
4431 np
->msgout
[0] = M_RESET
;
4434 * The device reselected for an untagged nexus and we
4437 case SIR_RESEL_BAD_I_T_L
:
4438 np
->msgout
[0] = M_ABORT
;
4441 * The device reselected for a tagged nexus that we do not have.
4443 case SIR_RESEL_BAD_I_T_L_Q
:
4444 np
->msgout
[0] = M_ABORT_TAG
;
4447 * The SCRIPTS let us know that the device has grabbed
4448 * our message and will abort the job.
4450 case SIR_RESEL_ABORTED
:
4451 np
->lastmsg
= np
->msgout
[0];
4452 np
->msgout
[0] = M_NOOP
;
4453 scmd_printk(KERN_WARNING
, cp
->cmd
,
4454 "message %x sent on bad reselection\n", np
->lastmsg
);
4457 * The SCRIPTS let us know that a message has been
4458 * successfully sent to the device.
4460 case SIR_MSG_OUT_DONE
:
4461 np
->lastmsg
= np
->msgout
[0];
4462 np
->msgout
[0] = M_NOOP
;
4463 /* Should we really care of that */
4464 if (np
->lastmsg
== M_PARITY
|| np
->lastmsg
== M_ID_ERROR
) {
4466 cp
->xerr_status
&= ~XE_PARITY_ERR
;
4467 if (!cp
->xerr_status
)
4468 OUTOFFB(np
, HF_PRT
, HF_EXT_ERR
);
4473 * The device didn't send a GOOD SCSI status.
4474 * We may have some work to do prior to allow
4475 * the SCRIPTS processor to continue.
4477 case SIR_BAD_SCSI_STATUS
:
4480 sym_sir_bad_scsi_status(np
, num
, cp
);
4483 * We are asked by the SCRIPTS to prepare a
4486 case SIR_REJECT_TO_SEND
:
4487 sym_print_msg(cp
, "M_REJECT to send for ", np
->msgin
);
4488 np
->msgout
[0] = M_REJECT
;
4491 * We have been ODD at the end of a DATA IN
4492 * transfer and the device didn't send a
4493 * IGNORE WIDE RESIDUE message.
4494 * It is a data overrun condition.
4496 case SIR_SWIDE_OVERRUN
:
4498 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4499 cp
->xerr_status
|= XE_SWIDE_OVRUN
;
4503 * We have been ODD at the end of a DATA OUT
4505 * It is a data underrun condition.
4507 case SIR_SODL_UNDERRUN
:
4509 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4510 cp
->xerr_status
|= XE_SODL_UNRUN
;
4514 * The device wants us to tranfer more data than
4515 * expected or in the wrong direction.
4516 * The number of extra bytes is in scratcha.
4517 * It is a data overrun condition.
4519 case SIR_DATA_OVERRUN
:
4521 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4522 cp
->xerr_status
|= XE_EXTRA_DATA
;
4523 cp
->extra_bytes
+= INL(np
, nc_scratcha
);
4527 * The device switched to an illegal phase (4/5).
4531 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4532 cp
->xerr_status
|= XE_BAD_PHASE
;
4536 * We received a message.
4538 case SIR_MSG_RECEIVED
:
4541 switch (np
->msgin
[0]) {
4543 * We received an extended message.
4544 * We handle MODIFY DATA POINTER, SDTR, WDTR
4545 * and reject all other extended messages.
4548 switch (np
->msgin
[2]) {
4550 if (DEBUG_FLAGS
& DEBUG_POINTER
)
4551 sym_print_msg(cp
, NULL
, np
->msgin
);
4552 tmp
= (np
->msgin
[3]<<24) + (np
->msgin
[4]<<16) +
4553 (np
->msgin
[5]<<8) + (np
->msgin
[6]);
4554 sym_modify_dp(np
, tp
, cp
, tmp
);
4557 sym_sync_nego(np
, tp
, cp
);
4560 sym_ppr_nego(np
, tp
, cp
);
4563 sym_wide_nego(np
, tp
, cp
);
4570 * We received a 1/2 byte message not handled from SCRIPTS.
4571 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4572 * RESIDUE messages that haven't been anticipated by
4573 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4574 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4577 if (DEBUG_FLAGS
& DEBUG_POINTER
)
4578 sym_print_msg(cp
, NULL
, np
->msgin
);
4579 if (cp
->host_flags
& HF_SENSE
)
4580 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4582 sym_modify_dp(np
, tp
, cp
, -1);
4585 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
)
4586 sym_nego_rejected(np
, tp
, cp
);
4588 sym_print_addr(cp
->cmd
,
4589 "M_REJECT received (%x:%x).\n",
4590 scr_to_cpu(np
->lastmsg
), np
->msgout
[0]);
4599 * We received an unknown message.
4600 * Ignore all MSG IN phases and reject it.
4603 sym_print_msg(cp
, "WEIRD message received", np
->msgin
);
4604 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_weird
));
4607 * Negotiation failed.
4608 * Target does not send us the reply.
4609 * Remove the HS_NEGOTIATE status.
4611 case SIR_NEGO_FAILED
:
4612 OUTB(np
, HS_PRT
, HS_BUSY
);
4614 * Negotiation failed.
4615 * Target does not want answer message.
4617 case SIR_NEGO_PROTO
:
4618 sym_nego_default(np
, tp
, cp
);
4626 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4629 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4636 * Acquire a control block
4638 struct sym_ccb
*sym_get_ccb (struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, u_char tag_order
)
4640 u_char tn
= cmd
->device
->id
;
4641 u_char ln
= cmd
->device
->lun
;
4642 struct sym_tcb
*tp
= &np
->target
[tn
];
4643 struct sym_lcb
*lp
= sym_lp(tp
, ln
);
4644 u_short tag
= NO_TAG
;
4646 struct sym_ccb
*cp
= NULL
;
4649 * Look for a free CCB
4651 if (sym_que_empty(&np
->free_ccbq
))
4653 qp
= sym_remque_head(&np
->free_ccbq
);
4656 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
4660 * If we have been asked for a tagged command.
4664 * Debugging purpose.
4666 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4667 if (lp
->busy_itl
!= 0)
4671 * Allocate resources for tags if not yet.
4674 sym_alloc_lcb_tags(np
, tn
, ln
);
4679 * Get a tag for this SCSI IO and set up
4680 * the CCB bus address for reselection,
4681 * and count it for this LUN.
4682 * Toggle reselect path to tagged.
4684 if (lp
->busy_itlq
< SYM_CONF_MAX_TASK
) {
4685 tag
= lp
->cb_tags
[lp
->ia_tag
];
4686 if (++lp
->ia_tag
== SYM_CONF_MAX_TASK
)
4689 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4690 lp
->itlq_tbl
[tag
] = cpu_to_scr(cp
->ccb_ba
);
4692 cpu_to_scr(SCRIPTA_BA(np
, resel_tag
));
4694 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4695 cp
->tags_si
= lp
->tags_si
;
4696 ++lp
->tags_sum
[cp
->tags_si
];
4704 * This command will not be tagged.
4705 * If we already have either a tagged or untagged
4706 * one, refuse to overlap this untagged one.
4710 * Debugging purpose.
4712 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4713 if (lp
->busy_itl
!= 0 || lp
->busy_itlq
!= 0)
4717 * Count this nexus for this LUN.
4718 * Set up the CCB bus address for reselection.
4719 * Toggle reselect path to untagged.
4722 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4723 if (lp
->busy_itl
== 1) {
4724 lp
->head
.itl_task_sa
= cpu_to_scr(cp
->ccb_ba
);
4726 cpu_to_scr(SCRIPTA_BA(np
, resel_no_tag
));
4734 * Put the CCB into the busy queue.
4736 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
4737 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4739 sym_remque(&cp
->link2_ccbq
);
4740 sym_insque_tail(&cp
->link2_ccbq
, &lp
->waiting_ccbq
);
4745 cp
->odd_byte_adjustment
= 0;
4747 cp
->order
= tag_order
;
4751 if (DEBUG_FLAGS
& DEBUG_TAGS
) {
4752 sym_print_addr(cmd
, "ccb @%p using tag %d.\n", cp
, tag
);
4758 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4763 * Release one control block
4765 void sym_free_ccb (struct sym_hcb
*np
, struct sym_ccb
*cp
)
4767 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
4768 struct sym_lcb
*lp
= sym_lp(tp
, cp
->lun
);
4770 if (DEBUG_FLAGS
& DEBUG_TAGS
) {
4771 sym_print_addr(cp
->cmd
, "ccb @%p freeing tag %d.\n",
4780 * If tagged, release the tag, set the relect path
4782 if (cp
->tag
!= NO_TAG
) {
4783 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4784 --lp
->tags_sum
[cp
->tags_si
];
4787 * Free the tag value.
4789 lp
->cb_tags
[lp
->if_tag
] = cp
->tag
;
4790 if (++lp
->if_tag
== SYM_CONF_MAX_TASK
)
4793 * Make the reselect path invalid,
4794 * and uncount this CCB.
4796 lp
->itlq_tbl
[cp
->tag
] = cpu_to_scr(np
->bad_itlq_ba
);
4798 } else { /* Untagged */
4800 * Make the reselect path invalid,
4801 * and uncount this CCB.
4803 lp
->head
.itl_task_sa
= cpu_to_scr(np
->bad_itl_ba
);
4807 * If no JOB active, make the LUN reselect path invalid.
4809 if (lp
->busy_itlq
== 0 && lp
->busy_itl
== 0)
4811 cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
4815 * We donnot queue more than 1 ccb per target
4816 * with negotiation at any time. If this ccb was
4817 * used for negotiation, clear this info in the tcb.
4819 if (cp
== tp
->nego_cp
)
4822 #ifdef SYM_CONF_IARB_SUPPORT
4824 * If we just complete the last queued CCB,
4825 * clear this info that is no longer relevant.
4827 if (cp
== np
->last_cp
)
4832 * Make this CCB available.
4835 cp
->host_status
= HS_IDLE
;
4836 sym_remque(&cp
->link_ccbq
);
4837 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4839 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4841 sym_remque(&cp
->link2_ccbq
);
4842 sym_insque_tail(&cp
->link2_ccbq
, &np
->dummy_ccbq
);
4844 if (cp
->tag
!= NO_TAG
)
4847 --lp
->started_no_tag
;
4855 * Allocate a CCB from memory and initialize its fixed part.
4857 static struct sym_ccb
*sym_alloc_ccb(struct sym_hcb
*np
)
4859 struct sym_ccb
*cp
= NULL
;
4863 * Prevent from allocating more CCBs than we can
4864 * queue to the controller.
4866 if (np
->actccbs
>= SYM_CONF_MAX_START
)
4870 * Allocate memory for this CCB.
4872 cp
= sym_calloc_dma(sizeof(struct sym_ccb
), "CCB");
4882 * Compute the bus address of this ccb.
4884 cp
->ccb_ba
= vtobus(cp
);
4887 * Insert this ccb into the hashed list.
4889 hcode
= CCB_HASH_CODE(cp
->ccb_ba
);
4890 cp
->link_ccbh
= np
->ccbh
[hcode
];
4891 np
->ccbh
[hcode
] = cp
;
4894 * Initialyze the start and restart actions.
4896 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
4897 cp
->phys
.head
.go
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
4900 * Initilialyze some other fields.
4902 cp
->phys
.smsg_ext
.addr
= cpu_to_scr(HCB_BA(np
, msgin
[2]));
4905 * Chain into free ccb queue.
4907 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4910 * Chain into optionnal lists.
4912 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4913 sym_insque_head(&cp
->link2_ccbq
, &np
->dummy_ccbq
);
4918 sym_mfree_dma(cp
, sizeof(*cp
), "CCB");
4923 * Look up a CCB from a DSA value.
4925 static struct sym_ccb
*sym_ccb_from_dsa(struct sym_hcb
*np
, u32 dsa
)
4930 hcode
= CCB_HASH_CODE(dsa
);
4931 cp
= np
->ccbh
[hcode
];
4933 if (cp
->ccb_ba
== dsa
)
4942 * Target control block initialisation.
4943 * Nothing important to do at the moment.
4945 static void sym_init_tcb (struct sym_hcb
*np
, u_char tn
)
4947 #if 0 /* Hmmm... this checking looks paranoid. */
4949 * Check some alignments required by the chip.
4951 assert (((offsetof(struct sym_reg
, nc_sxfer
) ^
4952 offsetof(struct sym_tcb
, head
.sval
)) &3) == 0);
4953 assert (((offsetof(struct sym_reg
, nc_scntl3
) ^
4954 offsetof(struct sym_tcb
, head
.wval
)) &3) == 0);
4959 * Lun control block allocation and initialization.
4961 struct sym_lcb
*sym_alloc_lcb (struct sym_hcb
*np
, u_char tn
, u_char ln
)
4963 struct sym_tcb
*tp
= &np
->target
[tn
];
4964 struct sym_lcb
*lp
= NULL
;
4967 * Initialize the target control block if not yet.
4969 sym_init_tcb (np
, tn
);
4972 * Allocate the LCB bus address array.
4973 * Compute the bus address of this table.
4975 if (ln
&& !tp
->luntbl
) {
4978 tp
->luntbl
= sym_calloc_dma(256, "LUNTBL");
4981 for (i
= 0 ; i
< 64 ; i
++)
4982 tp
->luntbl
[i
] = cpu_to_scr(vtobus(&np
->badlun_sa
));
4983 tp
->head
.luntbl_sa
= cpu_to_scr(vtobus(tp
->luntbl
));
4987 * Allocate the table of pointers for LUN(s) > 0, if needed.
4989 if (ln
&& !tp
->lunmp
) {
4990 tp
->lunmp
= kcalloc(SYM_CONF_MAX_LUN
, sizeof(struct sym_lcb
*),
4998 * Make it available to the chip.
5000 lp
= sym_calloc_dma(sizeof(struct sym_lcb
), "LCB");
5005 tp
->luntbl
[ln
] = cpu_to_scr(vtobus(lp
));
5009 tp
->head
.lun0_sa
= cpu_to_scr(vtobus(lp
));
5013 * Let the itl task point to error handling.
5015 lp
->head
.itl_task_sa
= cpu_to_scr(np
->bad_itl_ba
);
5018 * Set the reselect pattern to our default. :)
5020 lp
->head
.resel_sa
= cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
5023 * Set user capabilities.
5025 lp
->user_flags
= tp
->usrflags
& (SYM_DISC_ENABLED
| SYM_TAGS_ENABLED
);
5027 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5029 * Initialize device queueing.
5031 sym_que_init(&lp
->waiting_ccbq
);
5032 sym_que_init(&lp
->started_ccbq
);
5033 lp
->started_max
= SYM_CONF_MAX_TASK
;
5034 lp
->started_limit
= SYM_CONF_MAX_TASK
;
5042 * Allocate LCB resources for tagged command queuing.
5044 static void sym_alloc_lcb_tags (struct sym_hcb
*np
, u_char tn
, u_char ln
)
5046 struct sym_tcb
*tp
= &np
->target
[tn
];
5047 struct sym_lcb
*lp
= sym_lp(tp
, ln
);
5051 * Allocate the task table and and the tag allocation
5052 * circular buffer. We want both or none.
5054 lp
->itlq_tbl
= sym_calloc_dma(SYM_CONF_MAX_TASK
*4, "ITLQ_TBL");
5057 lp
->cb_tags
= kcalloc(SYM_CONF_MAX_TASK
, 1, GFP_ATOMIC
);
5059 sym_mfree_dma(lp
->itlq_tbl
, SYM_CONF_MAX_TASK
*4, "ITLQ_TBL");
5060 lp
->itlq_tbl
= NULL
;
5065 * Initialize the task table with invalid entries.
5067 for (i
= 0 ; i
< SYM_CONF_MAX_TASK
; i
++)
5068 lp
->itlq_tbl
[i
] = cpu_to_scr(np
->notask_ba
);
5071 * Fill up the tag buffer with tag numbers.
5073 for (i
= 0 ; i
< SYM_CONF_MAX_TASK
; i
++)
5077 * Make the task table available to SCRIPTS,
5078 * And accept tagged commands now.
5080 lp
->head
.itlq_tbl_sa
= cpu_to_scr(vtobus(lp
->itlq_tbl
));
5088 * Queue a SCSI IO to the controller.
5090 int sym_queue_scsiio(struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, struct sym_ccb
*cp
)
5092 struct scsi_device
*sdev
= cmd
->device
;
5100 * Keep track of the IO in our CCB.
5105 * Retrieve the target descriptor.
5107 tp
= &np
->target
[cp
->target
];
5110 * Retrieve the lun descriptor.
5112 lp
= sym_lp(tp
, sdev
->lun
);
5114 can_disconnect
= (cp
->tag
!= NO_TAG
) ||
5115 (lp
&& (lp
->curr_flags
& SYM_DISC_ENABLED
));
5117 msgptr
= cp
->scsi_smsg
;
5119 msgptr
[msglen
++] = IDENTIFY(can_disconnect
, sdev
->lun
);
5122 * Build the tag message if present.
5124 if (cp
->tag
!= NO_TAG
) {
5125 u_char order
= cp
->order
;
5133 order
= M_SIMPLE_TAG
;
5135 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5137 * Avoid too much reordering of SCSI commands.
5138 * The algorithm tries to prevent completion of any
5139 * tagged command from being delayed against more
5140 * than 3 times the max number of queued commands.
5142 if (lp
&& lp
->tags_since
> 3*SYM_CONF_MAX_TAG
) {
5143 lp
->tags_si
= !(lp
->tags_si
);
5144 if (lp
->tags_sum
[lp
->tags_si
]) {
5145 order
= M_ORDERED_TAG
;
5146 if ((DEBUG_FLAGS
& DEBUG_TAGS
)||sym_verbose
>1) {
5148 "ordered tag forced.\n");
5154 msgptr
[msglen
++] = order
;
5157 * For less than 128 tags, actual tags are numbered
5158 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5159 * with devices that have problems with #TAG 0 or too
5160 * great #TAG numbers. For more tags (up to 256),
5161 * we use directly our tag number.
5163 #if SYM_CONF_MAX_TASK > (512/4)
5164 msgptr
[msglen
++] = cp
->tag
;
5166 msgptr
[msglen
++] = (cp
->tag
<< 1) + 1;
5171 * Build a negotiation message if needed.
5172 * (nego_status is filled by sym_prepare_nego())
5174 * Always negotiate on INQUIRY and REQUEST SENSE.
5177 cp
->nego_status
= 0;
5178 if ((tp
->tgoal
.check_nego
||
5179 cmd
->cmnd
[0] == INQUIRY
|| cmd
->cmnd
[0] == REQUEST_SENSE
) &&
5180 !tp
->nego_cp
&& lp
) {
5181 msglen
+= sym_prepare_nego(np
, cp
, msgptr
+ msglen
);
5187 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, select
));
5188 cp
->phys
.head
.go
.restart
= cpu_to_scr(SCRIPTA_BA(np
, resel_dsa
));
5193 cp
->phys
.select
.sel_id
= cp
->target
;
5194 cp
->phys
.select
.sel_scntl3
= tp
->head
.wval
;
5195 cp
->phys
.select
.sel_sxfer
= tp
->head
.sval
;
5196 cp
->phys
.select
.sel_scntl4
= tp
->head
.uval
;
5201 cp
->phys
.smsg
.addr
= CCB_BA(cp
, scsi_smsg
);
5202 cp
->phys
.smsg
.size
= cpu_to_scr(msglen
);
5207 cp
->host_xflags
= 0;
5208 cp
->host_status
= cp
->nego_status
? HS_NEGOTIATE
: HS_BUSY
;
5209 cp
->ssss_status
= S_ILLEGAL
;
5210 cp
->xerr_status
= 0;
5212 cp
->extra_bytes
= 0;
5215 * extreme data pointer.
5216 * shall be positive, so -1 is lower than lowest.:)
5222 * Build the CDB and DATA descriptor block
5225 return sym_setup_data_and_start(np
, cmd
, cp
);
5229 * Reset a SCSI target (all LUNs of this target).
5231 int sym_reset_scsi_target(struct sym_hcb
*np
, int target
)
5235 if (target
== np
->myaddr
|| (u_int
)target
>= SYM_CONF_MAX_TARGET
)
5238 tp
= &np
->target
[target
];
5241 np
->istat_sem
= SEM
;
5242 OUTB(np
, nc_istat
, SIGP
|SEM
);
5250 static int sym_abort_ccb(struct sym_hcb
*np
, struct sym_ccb
*cp
, int timed_out
)
5253 * Check that the IO is active.
5255 if (!cp
|| !cp
->host_status
|| cp
->host_status
== HS_WAIT
)
5259 * If a previous abort didn't succeed in time,
5260 * perform a BUS reset.
5263 sym_reset_scsi_bus(np
, 1);
5268 * Mark the CCB for abort and allow time for.
5270 cp
->to_abort
= timed_out
? 2 : 1;
5273 * Tell the SCRIPTS processor to stop and synchronize with us.
5275 np
->istat_sem
= SEM
;
5276 OUTB(np
, nc_istat
, SIGP
|SEM
);
5280 int sym_abort_scsiio(struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, int timed_out
)
5286 * Look up our CCB control block.
5289 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
5290 struct sym_ccb
*cp2
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
5291 if (cp2
->cmd
== cmd
) {
5297 return sym_abort_ccb(np
, cp
, timed_out
);
5301 * Complete execution of a SCSI command with extended
5302 * error, SCSI status error, or having been auto-sensed.
5304 * The SCRIPTS processor is not running there, so we
5305 * can safely access IO registers and remove JOBs from
5307 * SCRATCHA is assumed to have been loaded with STARTPOS
5308 * before the SCRIPTS called the C code.
5310 void sym_complete_error(struct sym_hcb
*np
, struct sym_ccb
*cp
)
5312 struct scsi_device
*sdev
;
5313 struct scsi_cmnd
*cmd
;
5320 * Paranoid check. :)
5322 if (!cp
|| !cp
->cmd
)
5327 if (DEBUG_FLAGS
& (DEBUG_TINY
|DEBUG_RESULT
)) {
5328 dev_info(&sdev
->sdev_gendev
, "CCB=%p STAT=%x/%x/%x\n", cp
,
5329 cp
->host_status
, cp
->ssss_status
, cp
->host_flags
);
5333 * Get target and lun pointers.
5335 tp
= &np
->target
[cp
->target
];
5336 lp
= sym_lp(tp
, sdev
->lun
);
5339 * Check for extended errors.
5341 if (cp
->xerr_status
) {
5343 sym_print_xerr(cmd
, cp
->xerr_status
);
5344 if (cp
->host_status
== HS_COMPLETE
)
5345 cp
->host_status
= HS_COMP_ERR
;
5349 * Calculate the residual.
5351 resid
= sym_compute_residual(np
, cp
);
5353 if (!SYM_SETUP_RESIDUAL_SUPPORT
) {/* If user does not want residuals */
5354 resid
= 0; /* throw them away. :) */
5359 printf("XXXX RESID= %d - 0x%x\n", resid
, resid
);
5363 * Dequeue all queued CCBs for that device
5364 * not yet started by SCRIPTS.
5366 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
5367 i
= sym_dequeue_from_squeue(np
, i
, cp
->target
, sdev
->lun
, -1);
5370 * Restart the SCRIPTS processor.
5372 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
5374 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5375 if (cp
->host_status
== HS_COMPLETE
&&
5376 cp
->ssss_status
== S_QUEUE_FULL
) {
5377 if (!lp
|| lp
->started_tags
- i
< 2)
5380 * Decrease queue depth as needed.
5382 lp
->started_max
= lp
->started_tags
- i
- 1;
5385 if (sym_verbose
>= 2) {
5386 sym_print_addr(cmd
, " queue depth is now %d\n",
5393 cp
->host_status
= HS_BUSY
;
5394 cp
->ssss_status
= S_ILLEGAL
;
5397 * Let's requeue it to device.
5399 sym_set_cam_status(cmd
, DID_SOFT_ERROR
);
5405 * Build result in CAM ccb.
5407 sym_set_cam_result_error(np
, cp
, resid
);
5409 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5413 * Add this one to the COMP queue.
5415 sym_remque(&cp
->link_ccbq
);
5416 sym_insque_head(&cp
->link_ccbq
, &np
->comp_ccbq
);
5419 * Complete all those commands with either error
5420 * or requeue condition.
5422 sym_flush_comp_queue(np
, 0);
5424 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5426 * Donnot start more than 1 command after an error.
5428 sym_start_next_ccbs(np
, lp
, 1);
5433 * Complete execution of a successful SCSI command.
5435 * Only successful commands go to the DONE queue,
5436 * since we need to have the SCRIPTS processor
5437 * stopped on any error condition.
5438 * The SCRIPTS processor is running while we are
5439 * completing successful commands.
5441 void sym_complete_ok (struct sym_hcb
*np
, struct sym_ccb
*cp
)
5445 struct scsi_cmnd
*cmd
;
5449 * Paranoid check. :)
5451 if (!cp
|| !cp
->cmd
)
5453 assert (cp
->host_status
== HS_COMPLETE
);
5461 * Get target and lun pointers.
5463 tp
= &np
->target
[cp
->target
];
5464 lp
= sym_lp(tp
, cp
->lun
);
5467 * If all data have been transferred, given than no
5468 * extended error did occur, there is no residual.
5471 if (cp
->phys
.head
.lastp
!= cp
->goalp
)
5472 resid
= sym_compute_residual(np
, cp
);
5475 * Wrong transfer residuals may be worse than just always
5476 * returning zero. User can disable this feature in
5477 * sym53c8xx.h. Residual support is enabled by default.
5479 if (!SYM_SETUP_RESIDUAL_SUPPORT
)
5483 printf("XXXX RESID= %d - 0x%x\n", resid
, resid
);
5487 * Build result in CAM ccb.
5489 sym_set_cam_result_ok(cp
, cmd
, resid
);
5491 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5493 * If max number of started ccbs had been reduced,
5494 * increase it if 200 good status received.
5496 if (lp
&& lp
->started_max
< lp
->started_limit
) {
5498 if (lp
->num_sgood
>= 200) {
5501 if (sym_verbose
>= 2) {
5502 sym_print_addr(cmd
, " queue depth is now %d\n",
5512 sym_free_ccb (np
, cp
);
5514 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5516 * Requeue a couple of awaiting scsi commands.
5518 if (!sym_que_empty(&lp
->waiting_ccbq
))
5519 sym_start_next_ccbs(np
, lp
, 2);
5522 * Complete the command.
5524 sym_xpt_done(np
, cmd
);
5528 * Soft-attach the controller.
5530 int sym_hcb_attach(struct Scsi_Host
*shost
, struct sym_fw
*fw
, struct sym_nvram
*nvram
)
5532 struct sym_hcb
*np
= sym_get_hcb(shost
);
5536 * Get some info about the firmware.
5538 np
->scripta_sz
= fw
->a_size
;
5539 np
->scriptb_sz
= fw
->b_size
;
5540 np
->scriptz_sz
= fw
->z_size
;
5541 np
->fw_setup
= fw
->setup
;
5542 np
->fw_patch
= fw
->patch
;
5543 np
->fw_name
= fw
->name
;
5546 * Save setting of some IO registers, so we will
5547 * be able to probe specific implementations.
5549 sym_save_initial_setting (np
);
5552 * Reset the chip now, since it has been reported
5553 * that SCSI clock calibration may not work properly
5554 * if the chip is currently active.
5559 * Prepare controller and devices settings, according
5560 * to chip features, user set-up and driver set-up.
5562 sym_prepare_setting(shost
, np
, nvram
);
5565 * Check the PCI clock frequency.
5566 * Must be performed after prepare_setting since it destroys
5567 * STEST1 that is used to probe for the clock doubler.
5569 i
= sym_getpciclock(np
);
5570 if (i
> 37000 && !(np
->features
& FE_66MHZ
))
5571 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5575 * Allocate the start queue.
5577 np
->squeue
= sym_calloc_dma(sizeof(u32
)*(MAX_QUEUE
*2),"SQUEUE");
5580 np
->squeue_ba
= vtobus(np
->squeue
);
5583 * Allocate the done queue.
5585 np
->dqueue
= sym_calloc_dma(sizeof(u32
)*(MAX_QUEUE
*2),"DQUEUE");
5588 np
->dqueue_ba
= vtobus(np
->dqueue
);
5591 * Allocate the target bus address array.
5593 np
->targtbl
= sym_calloc_dma(256, "TARGTBL");
5596 np
->targtbl_ba
= vtobus(np
->targtbl
);
5599 * Allocate SCRIPTS areas.
5601 np
->scripta0
= sym_calloc_dma(np
->scripta_sz
, "SCRIPTA0");
5602 np
->scriptb0
= sym_calloc_dma(np
->scriptb_sz
, "SCRIPTB0");
5603 np
->scriptz0
= sym_calloc_dma(np
->scriptz_sz
, "SCRIPTZ0");
5604 if (!np
->scripta0
|| !np
->scriptb0
|| !np
->scriptz0
)
5608 * Allocate the array of lists of CCBs hashed by DSA.
5610 np
->ccbh
= kcalloc(CCB_HASH_SIZE
, sizeof(struct sym_ccb
**), GFP_KERNEL
);
5615 * Initialyze the CCB free and busy queues.
5617 sym_que_init(&np
->free_ccbq
);
5618 sym_que_init(&np
->busy_ccbq
);
5619 sym_que_init(&np
->comp_ccbq
);
5622 * Initialization for optional handling
5623 * of device queueing.
5625 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5626 sym_que_init(&np
->dummy_ccbq
);
5629 * Allocate some CCB. We need at least ONE.
5631 if (!sym_alloc_ccb(np
))
5635 * Calculate BUS addresses where we are going
5636 * to load the SCRIPTS.
5638 np
->scripta_ba
= vtobus(np
->scripta0
);
5639 np
->scriptb_ba
= vtobus(np
->scriptb0
);
5640 np
->scriptz_ba
= vtobus(np
->scriptz0
);
5643 np
->scripta_ba
= np
->ram_ba
;
5644 if (np
->features
& FE_RAM8K
) {
5645 np
->scriptb_ba
= np
->scripta_ba
+ 4096;
5646 #if 0 /* May get useful for 64 BIT PCI addressing */
5647 np
->scr_ram_seg
= cpu_to_scr(np
->scripta_ba
>> 32);
5653 * Copy scripts to controller instance.
5655 memcpy(np
->scripta0
, fw
->a_base
, np
->scripta_sz
);
5656 memcpy(np
->scriptb0
, fw
->b_base
, np
->scriptb_sz
);
5657 memcpy(np
->scriptz0
, fw
->z_base
, np
->scriptz_sz
);
5660 * Setup variable parts in scripts and compute
5661 * scripts bus addresses used from the C code.
5663 np
->fw_setup(np
, fw
);
5666 * Bind SCRIPTS with physical addresses usable by the
5667 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5669 sym_fw_bind_script(np
, (u32
*) np
->scripta0
, np
->scripta_sz
);
5670 sym_fw_bind_script(np
, (u32
*) np
->scriptb0
, np
->scriptb_sz
);
5671 sym_fw_bind_script(np
, (u32
*) np
->scriptz0
, np
->scriptz_sz
);
5673 #ifdef SYM_CONF_IARB_SUPPORT
5675 * If user wants IARB to be set when we win arbitration
5676 * and have other jobs, compute the max number of consecutive
5677 * settings of IARB hints before we leave devices a chance to
5678 * arbitrate for reselection.
5680 #ifdef SYM_SETUP_IARB_MAX
5681 np
->iarb_max
= SYM_SETUP_IARB_MAX
;
5688 * Prepare the idle and invalid task actions.
5690 np
->idletask
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5691 np
->idletask
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5692 np
->idletask_ba
= vtobus(&np
->idletask
);
5694 np
->notask
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5695 np
->notask
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5696 np
->notask_ba
= vtobus(&np
->notask
);
5698 np
->bad_itl
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5699 np
->bad_itl
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5700 np
->bad_itl_ba
= vtobus(&np
->bad_itl
);
5702 np
->bad_itlq
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5703 np
->bad_itlq
.restart
= cpu_to_scr(SCRIPTB_BA(np
,bad_i_t_l_q
));
5704 np
->bad_itlq_ba
= vtobus(&np
->bad_itlq
);
5707 * Allocate and prepare the lun JUMP table that is used
5708 * for a target prior the probing of devices (bad lun table).
5709 * A private table will be allocated for the target on the
5710 * first INQUIRY response received.
5712 np
->badluntbl
= sym_calloc_dma(256, "BADLUNTBL");
5716 np
->badlun_sa
= cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
5717 for (i
= 0 ; i
< 64 ; i
++) /* 64 luns/target, no less */
5718 np
->badluntbl
[i
] = cpu_to_scr(vtobus(&np
->badlun_sa
));
5721 * Prepare the bus address array that contains the bus
5722 * address of each target control block.
5723 * For now, assume all logical units are wrong. :)
5725 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
5726 np
->targtbl
[i
] = cpu_to_scr(vtobus(&np
->target
[i
]));
5727 np
->target
[i
].head
.luntbl_sa
=
5728 cpu_to_scr(vtobus(np
->badluntbl
));
5729 np
->target
[i
].head
.lun0_sa
=
5730 cpu_to_scr(vtobus(&np
->badlun_sa
));
5734 * Now check the cache handling of the pci chipset.
5736 if (sym_snooptest (np
)) {
5737 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np
));
5742 * Sigh! we are done.
5751 * Free everything that has been allocated for this device.
5753 void sym_hcb_free(struct sym_hcb
*np
)
5761 sym_mfree_dma(np
->scriptz0
, np
->scriptz_sz
, "SCRIPTZ0");
5763 sym_mfree_dma(np
->scriptb0
, np
->scriptb_sz
, "SCRIPTB0");
5765 sym_mfree_dma(np
->scripta0
, np
->scripta_sz
, "SCRIPTA0");
5767 sym_mfree_dma(np
->squeue
, sizeof(u32
)*(MAX_QUEUE
*2), "SQUEUE");
5769 sym_mfree_dma(np
->dqueue
, sizeof(u32
)*(MAX_QUEUE
*2), "DQUEUE");
5772 while ((qp
= sym_remque_head(&np
->free_ccbq
)) != NULL
) {
5773 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
5774 sym_mfree_dma(cp
, sizeof(*cp
), "CCB");
5780 sym_mfree_dma(np
->badluntbl
, 256,"BADLUNTBL");
5782 for (target
= 0; target
< SYM_CONF_MAX_TARGET
; target
++) {
5783 tp
= &np
->target
[target
];
5785 sym_mfree_dma(tp
->luntbl
, 256, "LUNTBL");
5786 #if SYM_CONF_MAX_LUN > 1
5791 sym_mfree_dma(np
->targtbl
, 256, "TARGTBL");