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Linux 2.6.33.13
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blobb146702f84cc10b20a438a0b021784326e75a818
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2009 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61
62 #include "mpt2sas_base.h"
63
64 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
65
66 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
67 #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
68
69 static int max_queue_depth = -1;
70 module_param(max_queue_depth, int, 0);
71 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
72
73 static int max_sgl_entries = -1;
74 module_param(max_sgl_entries, int, 0);
75 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
76
77 static int msix_disable = -1;
78 module_param(msix_disable, int, 0);
79 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
80
81 /* diag_buffer_enable is bitwise
82 * bit 0 set = TRACE
83 * bit 1 set = SNAPSHOT
84 * bit 2 set = EXTENDED
85 *
86 * Either bit can be set, or both
87 */
88 static int diag_buffer_enable;
89 module_param(diag_buffer_enable, int, 0);
90 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
91 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
92
93 int mpt2sas_fwfault_debug;
94 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
95 "and halt firmware - (default=0)");
96
97 /**
98 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
99 *
100 */
101 static int
102 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
103 {
104 int ret = param_set_int(val, kp);
105 struct MPT2SAS_ADAPTER *ioc;
106
107 if (ret)
108 return ret;
109
110 printk(KERN_INFO "setting logging_level(0x%08x)\n",
111 mpt2sas_fwfault_debug);
112 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
113 ioc->fwfault_debug = mpt2sas_fwfault_debug;
114 return 0;
115 }
116 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
117 param_get_int, &mpt2sas_fwfault_debug, 0644);
118
119 /**
120 * _base_fault_reset_work - workq handling ioc fault conditions
121 * @work: input argument, used to derive ioc
122 * Context: sleep.
123 *
124 * Return nothing.
125 */
126 static void
127 _base_fault_reset_work(struct work_struct *work)
128 {
129 struct MPT2SAS_ADAPTER *ioc =
130 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
131 unsigned long flags;
132 u32 doorbell;
133 int rc;
134
135 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
136 if (ioc->shost_recovery)
137 goto rearm_timer;
138 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
139
140 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
141 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
142 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
143 FORCE_BIG_HAMMER);
144 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
145 __func__, (rc == 0) ? "success" : "failed");
146 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
147 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
148 mpt2sas_base_fault_info(ioc, doorbell &
149 MPI2_DOORBELL_DATA_MASK);
150 }
151
152 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
153 rearm_timer:
154 if (ioc->fault_reset_work_q)
155 queue_delayed_work(ioc->fault_reset_work_q,
156 &ioc->fault_reset_work,
157 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
158 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
159 }
160
161 /**
162 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
163 * @ioc: per adapter object
164 * Context: sleep.
165 *
166 * Return nothing.
167 */
168 void
169 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
170 {
171 unsigned long flags;
172
173 if (ioc->fault_reset_work_q)
174 return;
175
176 /* initialize fault polling */
177 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
178 snprintf(ioc->fault_reset_work_q_name,
179 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
180 ioc->fault_reset_work_q =
181 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
182 if (!ioc->fault_reset_work_q) {
183 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
184 ioc->name, __func__, __LINE__);
185 return;
186 }
187 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
188 if (ioc->fault_reset_work_q)
189 queue_delayed_work(ioc->fault_reset_work_q,
190 &ioc->fault_reset_work,
191 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
192 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
193 }
194
195 /**
196 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
197 * @ioc: per adapter object
198 * Context: sleep.
199 *
200 * Return nothing.
201 */
202 void
203 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
204 {
205 unsigned long flags;
206 struct workqueue_struct *wq;
207
208 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
209 wq = ioc->fault_reset_work_q;
210 ioc->fault_reset_work_q = NULL;
211 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
212 if (wq) {
213 if (!cancel_delayed_work(&ioc->fault_reset_work))
214 flush_workqueue(wq);
215 destroy_workqueue(wq);
216 }
217 }
218
219 /**
220 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
221 * @ioc: per adapter object
222 * @fault_code: fault code
223 *
224 * Return nothing.
225 */
226 void
227 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
228 {
229 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
230 ioc->name, fault_code);
231 }
232
233 /**
234 * mpt2sas_halt_firmware - halt's mpt controller firmware
235 * @ioc: per adapter object
236 *
237 * For debugging timeout related issues. Writing 0xCOFFEE00
238 * to the doorbell register will halt controller firmware. With
239 * the purpose to stop both driver and firmware, the enduser can
240 * obtain a ring buffer from controller UART.
241 */
242 void
243 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
244 {
245 u32 doorbell;
246
247 if (!ioc->fwfault_debug)
248 return;
249
250 dump_stack();
251
252 doorbell = readl(&ioc->chip->Doorbell);
253 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
254 mpt2sas_base_fault_info(ioc , doorbell);
255 else {
256 writel(0xC0FFEE00, &ioc->chip->Doorbell);
257 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
258 "timeout\n", ioc->name);
259 }
260
261 panic("panic in %s\n", __func__);
262 }
263
264 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
265 /**
266 * _base_sas_ioc_info - verbose translation of the ioc status
267 * @ioc: per adapter object
268 * @mpi_reply: reply mf payload returned from firmware
269 * @request_hdr: request mf
270 *
271 * Return nothing.
272 */
273 static void
274 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
275 MPI2RequestHeader_t *request_hdr)
276 {
277 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
278 MPI2_IOCSTATUS_MASK;
279 char *desc = NULL;
280 u16 frame_sz;
281 char *func_str = NULL;
282
283 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
284 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
285 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
286 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
287 return;
288
289 switch (ioc_status) {
290
291 /****************************************************************************
292 * Common IOCStatus values for all replies
293 ****************************************************************************/
294
295 case MPI2_IOCSTATUS_INVALID_FUNCTION:
296 desc = "invalid function";
297 break;
298 case MPI2_IOCSTATUS_BUSY:
299 desc = "busy";
300 break;
301 case MPI2_IOCSTATUS_INVALID_SGL:
302 desc = "invalid sgl";
303 break;
304 case MPI2_IOCSTATUS_INTERNAL_ERROR:
305 desc = "internal error";
306 break;
307 case MPI2_IOCSTATUS_INVALID_VPID:
308 desc = "invalid vpid";
309 break;
310 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
311 desc = "insufficient resources";
312 break;
313 case MPI2_IOCSTATUS_INVALID_FIELD:
314 desc = "invalid field";
315 break;
316 case MPI2_IOCSTATUS_INVALID_STATE:
317 desc = "invalid state";
318 break;
319 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
320 desc = "op state not supported";
321 break;
322
323 /****************************************************************************
324 * Config IOCStatus values
325 ****************************************************************************/
326
327 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
328 desc = "config invalid action";
329 break;
330 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
331 desc = "config invalid type";
332 break;
333 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
334 desc = "config invalid page";
335 break;
336 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
337 desc = "config invalid data";
338 break;
339 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
340 desc = "config no defaults";
341 break;
342 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
343 desc = "config cant commit";
344 break;
345
346 /****************************************************************************
347 * SCSI IO Reply
348 ****************************************************************************/
349
350 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
351 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
352 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
353 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
354 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
355 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
356 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
357 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
358 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
359 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
360 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
361 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
362 break;
363
364 /****************************************************************************
365 * For use by SCSI Initiator and SCSI Target end-to-end data protection
366 ****************************************************************************/
367
368 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
369 desc = "eedp guard error";
370 break;
371 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
372 desc = "eedp ref tag error";
373 break;
374 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
375 desc = "eedp app tag error";
376 break;
377
378 /****************************************************************************
379 * SCSI Target values
380 ****************************************************************************/
381
382 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
383 desc = "target invalid io index";
384 break;
385 case MPI2_IOCSTATUS_TARGET_ABORTED:
386 desc = "target aborted";
387 break;
388 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
389 desc = "target no conn retryable";
390 break;
391 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
392 desc = "target no connection";
393 break;
394 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
395 desc = "target xfer count mismatch";
396 break;
397 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
398 desc = "target data offset error";
399 break;
400 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
401 desc = "target too much write data";
402 break;
403 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
404 desc = "target iu too short";
405 break;
406 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
407 desc = "target ack nak timeout";
408 break;
409 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
410 desc = "target nak received";
411 break;
412
413 /****************************************************************************
414 * Serial Attached SCSI values
415 ****************************************************************************/
416
417 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
418 desc = "smp request failed";
419 break;
420 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
421 desc = "smp data overrun";
422 break;
423
424 /****************************************************************************
425 * Diagnostic Buffer Post / Diagnostic Release values
426 ****************************************************************************/
427
428 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
429 desc = "diagnostic released";
430 break;
431 default:
432 break;
433 }
434
435 if (!desc)
436 return;
437
438 switch (request_hdr->Function) {
439 case MPI2_FUNCTION_CONFIG:
440 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
441 func_str = "config_page";
442 break;
443 case MPI2_FUNCTION_SCSI_TASK_MGMT:
444 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
445 func_str = "task_mgmt";
446 break;
447 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
448 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
449 func_str = "sas_iounit_ctl";
450 break;
451 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
452 frame_sz = sizeof(Mpi2SepRequest_t);
453 func_str = "enclosure";
454 break;
455 case MPI2_FUNCTION_IOC_INIT:
456 frame_sz = sizeof(Mpi2IOCInitRequest_t);
457 func_str = "ioc_init";
458 break;
459 case MPI2_FUNCTION_PORT_ENABLE:
460 frame_sz = sizeof(Mpi2PortEnableRequest_t);
461 func_str = "port_enable";
462 break;
463 case MPI2_FUNCTION_SMP_PASSTHROUGH:
464 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
465 func_str = "smp_passthru";
466 break;
467 default:
468 frame_sz = 32;
469 func_str = "unknown";
470 break;
471 }
472
473 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
474 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
475
476 _debug_dump_mf(request_hdr, frame_sz/4);
477 }
478
479 /**
480 * _base_display_event_data - verbose translation of firmware asyn events
481 * @ioc: per adapter object
482 * @mpi_reply: reply mf payload returned from firmware
483 *
484 * Return nothing.
485 */
486 static void
487 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
488 Mpi2EventNotificationReply_t *mpi_reply)
489 {
490 char *desc = NULL;
491 u16 event;
492
493 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
494 return;
495
496 event = le16_to_cpu(mpi_reply->Event);
497
498 switch (event) {
499 case MPI2_EVENT_LOG_DATA:
500 desc = "Log Data";
501 break;
502 case MPI2_EVENT_STATE_CHANGE:
503 desc = "Status Change";
504 break;
505 case MPI2_EVENT_HARD_RESET_RECEIVED:
506 desc = "Hard Reset Received";
507 break;
508 case MPI2_EVENT_EVENT_CHANGE:
509 desc = "Event Change";
510 break;
511 case MPI2_EVENT_TASK_SET_FULL:
512 desc = "Task Set Full";
513 break;
514 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
515 desc = "Device Status Change";
516 break;
517 case MPI2_EVENT_IR_OPERATION_STATUS:
518 desc = "IR Operation Status";
519 break;
520 case MPI2_EVENT_SAS_DISCOVERY:
521 desc = "Discovery";
522 break;
523 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
524 desc = "SAS Broadcast Primitive";
525 break;
526 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
527 desc = "SAS Init Device Status Change";
528 break;
529 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
530 desc = "SAS Init Table Overflow";
531 break;
532 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
533 desc = "SAS Topology Change List";
534 break;
535 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
536 desc = "SAS Enclosure Device Status Change";
537 break;
538 case MPI2_EVENT_IR_VOLUME:
539 desc = "IR Volume";
540 break;
541 case MPI2_EVENT_IR_PHYSICAL_DISK:
542 desc = "IR Physical Disk";
543 break;
544 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
545 desc = "IR Configuration Change List";
546 break;
547 case MPI2_EVENT_LOG_ENTRY_ADDED:
548 desc = "Log Entry Added";
549 break;
550 }
551
552 if (!desc)
553 return;
554
555 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
556 }
557 #endif
558
559 /**
560 * _base_sas_log_info - verbose translation of firmware log info
561 * @ioc: per adapter object
562 * @log_info: log info
563 *
564 * Return nothing.
565 */
566 static void
567 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
568 {
569 union loginfo_type {
570 u32 loginfo;
571 struct {
572 u32 subcode:16;
573 u32 code:8;
574 u32 originator:4;
575 u32 bus_type:4;
576 } dw;
577 };
578 union loginfo_type sas_loginfo;
579 char *originator_str = NULL;
580
581 sas_loginfo.loginfo = log_info;
582 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
583 return;
584
585 /* each nexus loss loginfo */
586 if (log_info == 0x31170000)
587 return;
588
589 /* eat the loginfos associated with task aborts */
590 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
591 0x31140000 || log_info == 0x31130000))
592 return;
593
594 switch (sas_loginfo.dw.originator) {
595 case 0:
596 originator_str = "IOP";
597 break;
598 case 1:
599 originator_str = "PL";
600 break;
601 case 2:
602 originator_str = "IR";
603 break;
604 }
605
606 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
607 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
608 originator_str, sas_loginfo.dw.code,
609 sas_loginfo.dw.subcode);
610 }
611
612 /**
613 * _base_display_reply_info -
614 * @ioc: per adapter object
615 * @smid: system request message index
616 * @msix_index: MSIX table index supplied by the OS
617 * @reply: reply message frame(lower 32bit addr)
618 *
619 * Return nothing.
620 */
621 static void
622 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
623 u32 reply)
624 {
625 MPI2DefaultReply_t *mpi_reply;
626 u16 ioc_status;
627
628 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
629 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
630 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
631 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
632 (ioc->logging_level & MPT_DEBUG_REPLY)) {
633 _base_sas_ioc_info(ioc , mpi_reply,
634 mpt2sas_base_get_msg_frame(ioc, smid));
635 }
636 #endif
637 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
638 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
639 }
640
641 /**
642 * mpt2sas_base_done - base internal command completion routine
643 * @ioc: per adapter object
644 * @smid: system request message index
645 * @msix_index: MSIX table index supplied by the OS
646 * @reply: reply message frame(lower 32bit addr)
647 *
648 * Return 1 meaning mf should be freed from _base_interrupt
649 * 0 means the mf is freed from this function.
650 */
651 u8
652 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
653 u32 reply)
654 {
655 MPI2DefaultReply_t *mpi_reply;
656
657 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
658 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
659 return 1;
660
661 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
662 return 1;
663
664 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
665 if (mpi_reply) {
666 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
667 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
668 }
669 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
670 complete(&ioc->base_cmds.done);
671 return 1;
672 }
673
674 /**
675 * _base_async_event - main callback handler for firmware asyn events
676 * @ioc: per adapter object
677 * @msix_index: MSIX table index supplied by the OS
678 * @reply: reply message frame(lower 32bit addr)
679 *
680 * Return 1 meaning mf should be freed from _base_interrupt
681 * 0 means the mf is freed from this function.
682 */
683 static u8
684 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
685 {
686 Mpi2EventNotificationReply_t *mpi_reply;
687 Mpi2EventAckRequest_t *ack_request;
688 u16 smid;
689
690 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
691 if (!mpi_reply)
692 return 1;
693 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
694 return 1;
695 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
696 _base_display_event_data(ioc, mpi_reply);
697 #endif
698 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
699 goto out;
700 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
701 if (!smid) {
702 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
703 ioc->name, __func__);
704 goto out;
705 }
706
707 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
708 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
709 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
710 ack_request->Event = mpi_reply->Event;
711 ack_request->EventContext = mpi_reply->EventContext;
712 ack_request->VF_ID = 0; /* TODO */
713 ack_request->VP_ID = 0;
714 mpt2sas_base_put_smid_default(ioc, smid);
715
716 out:
717
718 /* scsih callback handler */
719 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
720
721 /* ctl callback handler */
722 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
723
724 return 1;
725 }
726
727 /**
728 * _base_get_cb_idx - obtain the callback index
729 * @ioc: per adapter object
730 * @smid: system request message index
731 *
732 * Return callback index.
733 */
734 static u8
735 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
736 {
737 int i;
738 u8 cb_idx = 0xFF;
739
740 if (smid >= ioc->hi_priority_smid) {
741 if (smid < ioc->internal_smid) {
742 i = smid - ioc->hi_priority_smid;
743 cb_idx = ioc->hpr_lookup[i].cb_idx;
744 } else {
745 i = smid - ioc->internal_smid;
746 cb_idx = ioc->internal_lookup[i].cb_idx;
747 }
748 } else {
749 i = smid - 1;
750 cb_idx = ioc->scsi_lookup[i].cb_idx;
751 }
752 return cb_idx;
753 }
754
755 /**
756 * _base_mask_interrupts - disable interrupts
757 * @ioc: per adapter object
758 *
759 * Disabling ResetIRQ, Reply and Doorbell Interrupts
760 *
761 * Return nothing.
762 */
763 static void
764 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
765 {
766 u32 him_register;
767
768 ioc->mask_interrupts = 1;
769 him_register = readl(&ioc->chip->HostInterruptMask);
770 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
771 writel(him_register, &ioc->chip->HostInterruptMask);
772 readl(&ioc->chip->HostInterruptMask);
773 }
774
775 /**
776 * _base_unmask_interrupts - enable interrupts
777 * @ioc: per adapter object
778 *
779 * Enabling only Reply Interrupts
780 *
781 * Return nothing.
782 */
783 static void
784 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
785 {
786 u32 him_register;
787
788 him_register = readl(&ioc->chip->HostInterruptMask);
789 him_register &= ~MPI2_HIM_RIM;
790 writel(him_register, &ioc->chip->HostInterruptMask);
791 ioc->mask_interrupts = 0;
792 }
793
794 union reply_descriptor {
795 u64 word;
796 struct {
797 u32 low;
798 u32 high;
799 } u;
800 };
801
802 /**
803 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
804 * @irq: irq number (not used)
805 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
806 * @r: pt_regs pointer (not used)
807 *
808 * Return IRQ_HANDLE if processed, else IRQ_NONE.
809 */
810 static irqreturn_t
811 _base_interrupt(int irq, void *bus_id)
812 {
813 union reply_descriptor rd;
814 u32 completed_cmds;
815 u8 request_desript_type;
816 u16 smid;
817 u8 cb_idx;
818 u32 reply;
819 u8 msix_index;
820 struct MPT2SAS_ADAPTER *ioc = bus_id;
821 Mpi2ReplyDescriptorsUnion_t *rpf;
822 u8 rc;
823
824 if (ioc->mask_interrupts)
825 return IRQ_NONE;
826
827 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
828 request_desript_type = rpf->Default.ReplyFlags
829 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
830 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
831 return IRQ_NONE;
832
833 completed_cmds = 0;
834 do {
835 rd.word = rpf->Words;
836 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
837 goto out;
838 reply = 0;
839 cb_idx = 0xFF;
840 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
841 msix_index = rpf->Default.MSIxIndex;
842 if (request_desript_type ==
843 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
844 reply = le32_to_cpu
845 (rpf->AddressReply.ReplyFrameAddress);
846 } else if (request_desript_type ==
847 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
848 goto next;
849 else if (request_desript_type ==
850 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
851 goto next;
852 if (smid)
853 cb_idx = _base_get_cb_idx(ioc, smid);
854 if (smid && cb_idx != 0xFF) {
855 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
856 reply);
857 if (reply)
858 _base_display_reply_info(ioc, smid, msix_index,
859 reply);
860 if (rc)
861 mpt2sas_base_free_smid(ioc, smid);
862 }
863 if (!smid)
864 _base_async_event(ioc, msix_index, reply);
865
866 /* reply free queue handling */
867 if (reply) {
868 ioc->reply_free_host_index =
869 (ioc->reply_free_host_index ==
870 (ioc->reply_free_queue_depth - 1)) ?
871 0 : ioc->reply_free_host_index + 1;
872 ioc->reply_free[ioc->reply_free_host_index] =
873 cpu_to_le32(reply);
874 wmb();
875 writel(ioc->reply_free_host_index,
876 &ioc->chip->ReplyFreeHostIndex);
877 }
878
879 next:
880
881 rpf->Words = ULLONG_MAX;
882 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
883 (ioc->reply_post_queue_depth - 1)) ? 0 :
884 ioc->reply_post_host_index + 1;
885 request_desript_type =
886 ioc->reply_post_free[ioc->reply_post_host_index].Default.
887 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
888 completed_cmds++;
889 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
890 goto out;
891 if (!ioc->reply_post_host_index)
892 rpf = ioc->reply_post_free;
893 else
894 rpf++;
895 } while (1);
896
897 out:
898
899 if (!completed_cmds)
900 return IRQ_NONE;
901
902 wmb();
903 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
904 return IRQ_HANDLED;
905 }
906
907 /**
908 * mpt2sas_base_release_callback_handler - clear interupt callback handler
909 * @cb_idx: callback index
910 *
911 * Return nothing.
912 */
913 void
914 mpt2sas_base_release_callback_handler(u8 cb_idx)
915 {
916 mpt_callbacks[cb_idx] = NULL;
917 }
918
919 /**
920 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
921 * @cb_func: callback function
922 *
923 * Returns cb_func.
924 */
925 u8
926 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
927 {
928 u8 cb_idx;
929
930 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
931 if (mpt_callbacks[cb_idx] == NULL)
932 break;
933
934 mpt_callbacks[cb_idx] = cb_func;
935 return cb_idx;
936 }
937
938 /**
939 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
940 *
941 * Return nothing.
942 */
943 void
944 mpt2sas_base_initialize_callback_handler(void)
945 {
946 u8 cb_idx;
947
948 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
949 mpt2sas_base_release_callback_handler(cb_idx);
950 }
951
952 /**
953 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
954 * @ioc: per adapter object
955 * @paddr: virtual address for SGE
956 *
957 * Create a zero length scatter gather entry to insure the IOCs hardware has
958 * something to use if the target device goes brain dead and tries
959 * to send data even when none is asked for.
960 *
961 * Return nothing.
962 */
963 void
964 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
965 {
966 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
967 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
968 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
969 MPI2_SGE_FLAGS_SHIFT);
970 ioc->base_add_sg_single(paddr, flags_length, -1);
971 }
972
973 /**
974 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
975 * @paddr: virtual address for SGE
976 * @flags_length: SGE flags and data transfer length
977 * @dma_addr: Physical address
978 *
979 * Return nothing.
980 */
981 static void
982 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
983 {
984 Mpi2SGESimple32_t *sgel = paddr;
985
986 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
987 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
988 sgel->FlagsLength = cpu_to_le32(flags_length);
989 sgel->Address = cpu_to_le32(dma_addr);
990 }
991
992
993 /**
994 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
995 * @paddr: virtual address for SGE
996 * @flags_length: SGE flags and data transfer length
997 * @dma_addr: Physical address
998 *
999 * Return nothing.
1000 */
1001 static void
1002 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1003 {
1004 Mpi2SGESimple64_t *sgel = paddr;
1005
1006 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1007 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1008 sgel->FlagsLength = cpu_to_le32(flags_length);
1009 sgel->Address = cpu_to_le64(dma_addr);
1010 }
1011
1012 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1013
1014 /**
1015 * _base_config_dma_addressing - set dma addressing
1016 * @ioc: per adapter object
1017 * @pdev: PCI device struct
1018 *
1019 * Returns 0 for success, non-zero for failure.
1020 */
1021 static int
1022 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1023 {
1024 struct sysinfo s;
1025 char *desc = NULL;
1026
1027 if (sizeof(dma_addr_t) > 4) {
1028 const uint64_t required_mask =
1029 dma_get_required_mask(&pdev->dev);
1030 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1031 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1032 DMA_BIT_MASK(64))) {
1033 ioc->base_add_sg_single = &_base_add_sg_single_64;
1034 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1035 desc = "64";
1036 goto out;
1037 }
1038 }
1039
1040 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1041 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1042 ioc->base_add_sg_single = &_base_add_sg_single_32;
1043 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1044 desc = "32";
1045 } else
1046 return -ENODEV;
1047
1048 out:
1049 si_meminfo(&s);
1050 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1051 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1052
1053 return 0;
1054 }
1055
1056 /**
1057 * _base_save_msix_table - backup msix vector table
1058 * @ioc: per adapter object
1059 *
1060 * This address an errata where diag reset clears out the table
1061 */
1062 static void
1063 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1064 {
1065 int i;
1066
1067 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1068 return;
1069
1070 for (i = 0; i < ioc->msix_vector_count; i++)
1071 ioc->msix_table_backup[i] = ioc->msix_table[i];
1072 }
1073
1074 /**
1075 * _base_restore_msix_table - this restores the msix vector table
1076 * @ioc: per adapter object
1077 *
1078 */
1079 static void
1080 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1081 {
1082 int i;
1083
1084 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1085 return;
1086
1087 for (i = 0; i < ioc->msix_vector_count; i++)
1088 ioc->msix_table[i] = ioc->msix_table_backup[i];
1089 }
1090
1091 /**
1092 * _base_check_enable_msix - checks MSIX capabable.
1093 * @ioc: per adapter object
1094 *
1095 * Check to see if card is capable of MSIX, and set number
1096 * of avaliable msix vectors
1097 */
1098 static int
1099 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1100 {
1101 int base;
1102 u16 message_control;
1103 u32 msix_table_offset;
1104
1105 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1106 if (!base) {
1107 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1108 "supported\n", ioc->name));
1109 return -EINVAL;
1110 }
1111
1112 /* get msix vector count */
1113 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1114 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1115
1116 /* get msix table */
1117 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1118 msix_table_offset &= 0xFFFFFFF8;
1119 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1120
1121 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1122 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1123 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1124 return 0;
1125 }
1126
1127 /**
1128 * _base_disable_msix - disables msix
1129 * @ioc: per adapter object
1130 *
1131 */
1132 static void
1133 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1134 {
1135 if (ioc->msix_enable) {
1136 pci_disable_msix(ioc->pdev);
1137 kfree(ioc->msix_table_backup);
1138 ioc->msix_table_backup = NULL;
1139 ioc->msix_enable = 0;
1140 }
1141 }
1142
1143 /**
1144 * _base_enable_msix - enables msix, failback to io_apic
1145 * @ioc: per adapter object
1146 *
1147 */
1148 static int
1149 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1150 {
1151 struct msix_entry entries;
1152 int r;
1153 u8 try_msix = 0;
1154
1155 if (msix_disable == -1 || msix_disable == 0)
1156 try_msix = 1;
1157
1158 if (!try_msix)
1159 goto try_ioapic;
1160
1161 if (_base_check_enable_msix(ioc) != 0)
1162 goto try_ioapic;
1163
1164 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1165 sizeof(u32), GFP_KERNEL);
1166 if (!ioc->msix_table_backup) {
1167 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1168 "msix_table_backup failed!!!\n", ioc->name));
1169 goto try_ioapic;
1170 }
1171
1172 memset(&entries, 0, sizeof(struct msix_entry));
1173 r = pci_enable_msix(ioc->pdev, &entries, 1);
1174 if (r) {
1175 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1176 "failed (r=%d) !!!\n", ioc->name, r));
1177 goto try_ioapic;
1178 }
1179
1180 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1181 ioc->name, ioc);
1182 if (r) {
1183 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1184 "interrupt %d !!!\n", ioc->name, entries.vector));
1185 pci_disable_msix(ioc->pdev);
1186 goto try_ioapic;
1187 }
1188
1189 ioc->pci_irq = entries.vector;
1190 ioc->msix_enable = 1;
1191 return 0;
1192
1193 /* failback to io_apic interrupt routing */
1194 try_ioapic:
1195
1196 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1197 ioc->name, ioc);
1198 if (r) {
1199 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1200 ioc->name, ioc->pdev->irq);
1201 r = -EBUSY;
1202 goto out_fail;
1203 }
1204
1205 ioc->pci_irq = ioc->pdev->irq;
1206 return 0;
1207
1208 out_fail:
1209 return r;
1210 }
1211
1212 /**
1213 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1214 * @ioc: per adapter object
1215 *
1216 * Returns 0 for success, non-zero for failure.
1217 */
1218 int
1219 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1220 {
1221 struct pci_dev *pdev = ioc->pdev;
1222 u32 memap_sz;
1223 u32 pio_sz;
1224 int i, r = 0;
1225
1226 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1227 ioc->name, __func__));
1228
1229 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1230 if (pci_enable_device_mem(pdev)) {
1231 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1232 "failed\n", ioc->name);
1233 return -ENODEV;
1234 }
1235
1236
1237 if (pci_request_selected_regions(pdev, ioc->bars,
1238 MPT2SAS_DRIVER_NAME)) {
1239 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1240 "failed\n", ioc->name);
1241 r = -ENODEV;
1242 goto out_fail;
1243 }
1244
1245 pci_set_master(pdev);
1246
1247 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1248 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1249 ioc->name, pci_name(pdev));
1250 r = -ENODEV;
1251 goto out_fail;
1252 }
1253
1254 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1255 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1256 if (pio_sz)
1257 continue;
1258 ioc->pio_chip = pci_resource_start(pdev, i);
1259 pio_sz = pci_resource_len(pdev, i);
1260 } else {
1261 if (memap_sz)
1262 continue;
1263 ioc->chip_phys = pci_resource_start(pdev, i);
1264 memap_sz = pci_resource_len(pdev, i);
1265 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1266 if (ioc->chip == NULL) {
1267 printk(MPT2SAS_ERR_FMT "unable to map adapter "
1268 "memory!\n", ioc->name);
1269 r = -EINVAL;
1270 goto out_fail;
1271 }
1272 }
1273 }
1274
1275 _base_mask_interrupts(ioc);
1276 r = _base_enable_msix(ioc);
1277 if (r)
1278 goto out_fail;
1279
1280 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1281 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1282 "IO-APIC enabled"), ioc->pci_irq);
1283 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
1284 ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
1285 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
1286 ioc->name, ioc->pio_chip, pio_sz);
1287
1288 return 0;
1289
1290 out_fail:
1291 if (ioc->chip_phys)
1292 iounmap(ioc->chip);
1293 ioc->chip_phys = 0;
1294 ioc->pci_irq = -1;
1295 pci_release_selected_regions(ioc->pdev, ioc->bars);
1296 pci_disable_device(pdev);
1297 return r;
1298 }
1299
1300 /**
1301 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1302 * @ioc: per adapter object
1303 * @smid: system request message index(smid zero is invalid)
1304 *
1305 * Returns virt pointer to message frame.
1306 */
1307 void *
1308 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1309 {
1310 return (void *)(ioc->request + (smid * ioc->request_sz));
1311 }
1312
1313 /**
1314 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1315 * @ioc: per adapter object
1316 * @smid: system request message index
1317 *
1318 * Returns virt pointer to sense buffer.
1319 */
1320 void *
1321 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1322 {
1323 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1324 }
1325
1326 /**
1327 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1328 * @ioc: per adapter object
1329 * @smid: system request message index
1330 *
1331 * Returns phys pointer to the low 32bit address of the sense buffer.
1332 */
1333 __le32
1334 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1335 {
1336 return cpu_to_le32(ioc->sense_dma +
1337 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1338 }
1339
1340 /**
1341 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1342 * @ioc: per adapter object
1343 * @phys_addr: lower 32 physical addr of the reply
1344 *
1345 * Converts 32bit lower physical addr into a virt address.
1346 */
1347 void *
1348 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1349 {
1350 if (!phys_addr)
1351 return NULL;
1352 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1353 }
1354
1355 /**
1356 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1357 * @ioc: per adapter object
1358 * @cb_idx: callback index
1359 *
1360 * Returns smid (zero is invalid)
1361 */
1362 u16
1363 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1364 {
1365 unsigned long flags;
1366 struct request_tracker *request;
1367 u16 smid;
1368
1369 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1370 if (list_empty(&ioc->internal_free_list)) {
1371 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1372 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1373 ioc->name, __func__);
1374 return 0;
1375 }
1376
1377 request = list_entry(ioc->internal_free_list.next,
1378 struct request_tracker, tracker_list);
1379 request->cb_idx = cb_idx;
1380 smid = request->smid;
1381 list_del(&request->tracker_list);
1382 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1383 return smid;
1384 }
1385
1386 /**
1387 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1388 * @ioc: per adapter object
1389 * @cb_idx: callback index
1390 * @scmd: pointer to scsi command object
1391 *
1392 * Returns smid (zero is invalid)
1393 */
1394 u16
1395 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1396 struct scsi_cmnd *scmd)
1397 {
1398 unsigned long flags;
1399 struct request_tracker *request;
1400 u16 smid;
1401
1402 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1403 if (list_empty(&ioc->free_list)) {
1404 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1405 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1406 ioc->name, __func__);
1407 return 0;
1408 }
1409
1410 request = list_entry(ioc->free_list.next,
1411 struct request_tracker, tracker_list);
1412 request->scmd = scmd;
1413 request->cb_idx = cb_idx;
1414 smid = request->smid;
1415 list_del(&request->tracker_list);
1416 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1417 return smid;
1418 }
1419
1420 /**
1421 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1422 * @ioc: per adapter object
1423 * @cb_idx: callback index
1424 *
1425 * Returns smid (zero is invalid)
1426 */
1427 u16
1428 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1429 {
1430 unsigned long flags;
1431 struct request_tracker *request;
1432 u16 smid;
1433
1434 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1435 if (list_empty(&ioc->hpr_free_list)) {
1436 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1437 return 0;
1438 }
1439
1440 request = list_entry(ioc->hpr_free_list.next,
1441 struct request_tracker, tracker_list);
1442 request->cb_idx = cb_idx;
1443 smid = request->smid;
1444 list_del(&request->tracker_list);
1445 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1446 return smid;
1447 }
1448
1449
1450 /**
1451 * mpt2sas_base_free_smid - put smid back on free_list
1452 * @ioc: per adapter object
1453 * @smid: system request message index
1454 *
1455 * Return nothing.
1456 */
1457 void
1458 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1459 {
1460 unsigned long flags;
1461 int i;
1462
1463 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1464 if (smid >= ioc->hi_priority_smid) {
1465 if (smid < ioc->internal_smid) {
1466 /* hi-priority */
1467 i = smid - ioc->hi_priority_smid;
1468 ioc->hpr_lookup[i].cb_idx = 0xFF;
1469 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1470 &ioc->hpr_free_list);
1471 } else {
1472 /* internal queue */
1473 i = smid - ioc->internal_smid;
1474 ioc->internal_lookup[i].cb_idx = 0xFF;
1475 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1476 &ioc->internal_free_list);
1477 }
1478 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1479 return;
1480 }
1481
1482 /* scsiio queue */
1483 i = smid - 1;
1484 ioc->scsi_lookup[i].cb_idx = 0xFF;
1485 ioc->scsi_lookup[i].scmd = NULL;
1486 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1487 &ioc->free_list);
1488 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1489
1490 /*
1491 * See _wait_for_commands_to_complete() call with regards to this code.
1492 */
1493 if (ioc->shost_recovery && ioc->pending_io_count) {
1494 if (ioc->pending_io_count == 1)
1495 wake_up(&ioc->reset_wq);
1496 ioc->pending_io_count--;
1497 }
1498 }
1499
1500 /**
1501 * _base_writeq - 64 bit write to MMIO
1502 * @ioc: per adapter object
1503 * @b: data payload
1504 * @addr: address in MMIO space
1505 * @writeq_lock: spin lock
1506 *
1507 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1508 * care of 32 bit environment where its not quarenteed to send the entire word
1509 * in one transfer.
1510 */
1511 #ifndef writeq
1512 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1513 spinlock_t *writeq_lock)
1514 {
1515 unsigned long flags;
1516 __u64 data_out = cpu_to_le64(b);
1517
1518 spin_lock_irqsave(writeq_lock, flags);
1519 writel((u32)(data_out), addr);
1520 writel((u32)(data_out >> 32), (addr + 4));
1521 spin_unlock_irqrestore(writeq_lock, flags);
1522 }
1523 #else
1524 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1525 spinlock_t *writeq_lock)
1526 {
1527 writeq(cpu_to_le64(b), addr);
1528 }
1529 #endif
1530
1531 /**
1532 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1533 * @ioc: per adapter object
1534 * @smid: system request message index
1535 * @handle: device handle
1536 *
1537 * Return nothing.
1538 */
1539 void
1540 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1541 {
1542 Mpi2RequestDescriptorUnion_t descriptor;
1543 u64 *request = (u64 *)&descriptor;
1544
1545
1546 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1547 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1548 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1549 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1550 descriptor.SCSIIO.LMID = 0;
1551 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1552 &ioc->scsi_lookup_lock);
1553 }
1554
1555
1556 /**
1557 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1558 * @ioc: per adapter object
1559 * @smid: system request message index
1560 *
1561 * Return nothing.
1562 */
1563 void
1564 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1565 {
1566 Mpi2RequestDescriptorUnion_t descriptor;
1567 u64 *request = (u64 *)&descriptor;
1568
1569 descriptor.HighPriority.RequestFlags =
1570 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1571 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1572 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1573 descriptor.HighPriority.LMID = 0;
1574 descriptor.HighPriority.Reserved1 = 0;
1575 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1576 &ioc->scsi_lookup_lock);
1577 }
1578
1579 /**
1580 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1581 * @ioc: per adapter object
1582 * @smid: system request message index
1583 *
1584 * Return nothing.
1585 */
1586 void
1587 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1588 {
1589 Mpi2RequestDescriptorUnion_t descriptor;
1590 u64 *request = (u64 *)&descriptor;
1591
1592 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1593 descriptor.Default.MSIxIndex = 0; /* TODO */
1594 descriptor.Default.SMID = cpu_to_le16(smid);
1595 descriptor.Default.LMID = 0;
1596 descriptor.Default.DescriptorTypeDependent = 0;
1597 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1598 &ioc->scsi_lookup_lock);
1599 }
1600
1601 /**
1602 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1603 * @ioc: per adapter object
1604 * @smid: system request message index
1605 * @io_index: value used to track the IO
1606 *
1607 * Return nothing.
1608 */
1609 void
1610 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1611 u16 io_index)
1612 {
1613 Mpi2RequestDescriptorUnion_t descriptor;
1614 u64 *request = (u64 *)&descriptor;
1615
1616 descriptor.SCSITarget.RequestFlags =
1617 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1618 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1619 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1620 descriptor.SCSITarget.LMID = 0;
1621 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1622 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1623 &ioc->scsi_lookup_lock);
1624 }
1625
1626 /**
1627 * _base_display_dell_branding - Disply branding string
1628 * @ioc: per adapter object
1629 *
1630 * Return nothing.
1631 */
1632 static void
1633 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1634 {
1635 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1636
1637 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1638 return;
1639
1640 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1641 switch (ioc->pdev->subsystem_device) {
1642 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1643 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1644 MPT2SAS_DELL_BRANDING_SIZE - 1);
1645 break;
1646 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1647 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1648 MPT2SAS_DELL_BRANDING_SIZE - 1);
1649 break;
1650 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1651 strncpy(dell_branding,
1652 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1653 MPT2SAS_DELL_BRANDING_SIZE - 1);
1654 break;
1655 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1656 strncpy(dell_branding,
1657 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1658 MPT2SAS_DELL_BRANDING_SIZE - 1);
1659 break;
1660 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1661 strncpy(dell_branding,
1662 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1663 MPT2SAS_DELL_BRANDING_SIZE - 1);
1664 break;
1665 case MPT2SAS_DELL_PERC_H200_SSDID:
1666 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1667 MPT2SAS_DELL_BRANDING_SIZE - 1);
1668 break;
1669 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1670 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1671 MPT2SAS_DELL_BRANDING_SIZE - 1);
1672 break;
1673 default:
1674 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1675 break;
1676 }
1677
1678 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1679 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1680 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1681 ioc->pdev->subsystem_device);
1682 }
1683
1684 /**
1685 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1686 * @ioc: per adapter object
1687 *
1688 * Return nothing.
1689 */
1690 static void
1691 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1692 {
1693 int i = 0;
1694 char desc[16];
1695 u8 revision;
1696 u32 iounit_pg1_flags;
1697
1698 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1699 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1700 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1701 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1702 ioc->name, desc,
1703 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1704 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1705 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1706 ioc->facts.FWVersion.Word & 0x000000FF,
1707 revision,
1708 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1709 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1710 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1711 ioc->bios_pg3.BiosVersion & 0x000000FF);
1712
1713 _base_display_dell_branding(ioc);
1714
1715 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1716
1717 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1718 printk("Initiator");
1719 i++;
1720 }
1721
1722 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1723 printk("%sTarget", i ? "," : "");
1724 i++;
1725 }
1726
1727 i = 0;
1728 printk("), ");
1729 printk("Capabilities=(");
1730
1731 if (ioc->facts.IOCCapabilities &
1732 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1733 printk("Raid");
1734 i++;
1735 }
1736
1737 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1738 printk("%sTLR", i ? "," : "");
1739 i++;
1740 }
1741
1742 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1743 printk("%sMulticast", i ? "," : "");
1744 i++;
1745 }
1746
1747 if (ioc->facts.IOCCapabilities &
1748 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1749 printk("%sBIDI Target", i ? "," : "");
1750 i++;
1751 }
1752
1753 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1754 printk("%sEEDP", i ? "," : "");
1755 i++;
1756 }
1757
1758 if (ioc->facts.IOCCapabilities &
1759 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1760 printk("%sSnapshot Buffer", i ? "," : "");
1761 i++;
1762 }
1763
1764 if (ioc->facts.IOCCapabilities &
1765 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1766 printk("%sDiag Trace Buffer", i ? "," : "");
1767 i++;
1768 }
1769
1770 if (ioc->facts.IOCCapabilities &
1771 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1772 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1773 i++;
1774 }
1775
1776 if (ioc->facts.IOCCapabilities &
1777 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1778 printk("%sTask Set Full", i ? "," : "");
1779 i++;
1780 }
1781
1782 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1783 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1784 printk("%sNCQ", i ? "," : "");
1785 i++;
1786 }
1787
1788 printk(")\n");
1789 }
1790
1791 /**
1792 * _base_static_config_pages - static start of day config pages
1793 * @ioc: per adapter object
1794 *
1795 * Return nothing.
1796 */
1797 static void
1798 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1799 {
1800 Mpi2ConfigReply_t mpi_reply;
1801 u32 iounit_pg1_flags;
1802
1803 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1804 if (ioc->ir_firmware)
1805 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1806 &ioc->manu_pg10);
1807 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1808 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1809 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1810 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1811 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1812 _base_display_ioc_capabilities(ioc);
1813
1814 /*
1815 * Enable task_set_full handling in iounit_pg1 when the
1816 * facts capabilities indicate that its supported.
1817 */
1818 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1819 if ((ioc->facts.IOCCapabilities &
1820 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1821 iounit_pg1_flags &=
1822 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1823 else
1824 iounit_pg1_flags |=
1825 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1826 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1827 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1828 }
1829
1830 /**
1831 * _base_release_memory_pools - release memory
1832 * @ioc: per adapter object
1833 *
1834 * Free memory allocated from _base_allocate_memory_pools.
1835 *
1836 * Return nothing.
1837 */
1838 static void
1839 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1840 {
1841 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1842 __func__));
1843
1844 if (ioc->request) {
1845 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1846 ioc->request, ioc->request_dma);
1847 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1848 ": free\n", ioc->name, ioc->request));
1849 ioc->request = NULL;
1850 }
1851
1852 if (ioc->sense) {
1853 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1854 if (ioc->sense_dma_pool)
1855 pci_pool_destroy(ioc->sense_dma_pool);
1856 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1857 ": free\n", ioc->name, ioc->sense));
1858 ioc->sense = NULL;
1859 }
1860
1861 if (ioc->reply) {
1862 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1863 if (ioc->reply_dma_pool)
1864 pci_pool_destroy(ioc->reply_dma_pool);
1865 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1866 ": free\n", ioc->name, ioc->reply));
1867 ioc->reply = NULL;
1868 }
1869
1870 if (ioc->reply_free) {
1871 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1872 ioc->reply_free_dma);
1873 if (ioc->reply_free_dma_pool)
1874 pci_pool_destroy(ioc->reply_free_dma_pool);
1875 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1876 "(0x%p): free\n", ioc->name, ioc->reply_free));
1877 ioc->reply_free = NULL;
1878 }
1879
1880 if (ioc->reply_post_free) {
1881 pci_pool_free(ioc->reply_post_free_dma_pool,
1882 ioc->reply_post_free, ioc->reply_post_free_dma);
1883 if (ioc->reply_post_free_dma_pool)
1884 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1885 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1886 "reply_post_free_pool(0x%p): free\n", ioc->name,
1887 ioc->reply_post_free));
1888 ioc->reply_post_free = NULL;
1889 }
1890
1891 if (ioc->config_page) {
1892 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1893 "config_page(0x%p): free\n", ioc->name,
1894 ioc->config_page));
1895 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1896 ioc->config_page, ioc->config_page_dma);
1897 }
1898
1899 kfree(ioc->scsi_lookup);
1900 kfree(ioc->hpr_lookup);
1901 kfree(ioc->internal_lookup);
1902 }
1903
1904
1905 /**
1906 * _base_allocate_memory_pools - allocate start of day memory pools
1907 * @ioc: per adapter object
1908 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1909 *
1910 * Returns 0 success, anything else error
1911 */
1912 static int
1913 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1914 {
1915 Mpi2IOCFactsReply_t *facts;
1916 u32 queue_size, queue_diff;
1917 u16 max_sge_elements;
1918 u16 num_of_reply_frames;
1919 u16 chains_needed_per_io;
1920 u32 sz, total_sz;
1921 u32 retry_sz;
1922 u16 max_request_credit;
1923
1924 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1925 __func__));
1926
1927 retry_sz = 0;
1928 facts = &ioc->facts;
1929
1930 /* command line tunables for max sgl entries */
1931 if (max_sgl_entries != -1) {
1932 ioc->shost->sg_tablesize = (max_sgl_entries <
1933 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1934 MPT2SAS_SG_DEPTH;
1935 } else {
1936 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1937 }
1938
1939 /* command line tunables for max controller queue depth */
1940 if (max_queue_depth != -1) {
1941 max_request_credit = (max_queue_depth < facts->RequestCredit)
1942 ? max_queue_depth : facts->RequestCredit;
1943 } else {
1944 max_request_credit = (facts->RequestCredit >
1945 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1946 facts->RequestCredit;
1947 }
1948
1949 ioc->hba_queue_depth = max_request_credit;
1950 ioc->hi_priority_depth = facts->HighPriorityCredit;
1951 ioc->internal_depth = ioc->hi_priority_depth + 5;
1952
1953 /* request frame size */
1954 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1955
1956 /* reply frame size */
1957 ioc->reply_sz = facts->ReplyFrameSize * 4;
1958
1959 retry_allocation:
1960 total_sz = 0;
1961 /* calculate number of sg elements left over in the 1st frame */
1962 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1963 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1964 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1965
1966 /* now do the same for a chain buffer */
1967 max_sge_elements = ioc->request_sz - ioc->sge_size;
1968 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1969
1970 ioc->chain_offset_value_for_main_message =
1971 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1972 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1973
1974 /*
1975 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1976 */
1977 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1978 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1979 + 1;
1980 if (chains_needed_per_io > facts->MaxChainDepth) {
1981 chains_needed_per_io = facts->MaxChainDepth;
1982 ioc->shost->sg_tablesize = min_t(u16,
1983 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
1984 * chains_needed_per_io), ioc->shost->sg_tablesize);
1985 }
1986 ioc->chains_needed_per_io = chains_needed_per_io;
1987
1988 /* reply free queue sizing - taking into account for events */
1989 num_of_reply_frames = ioc->hba_queue_depth + 32;
1990
1991 /* number of replies frames can't be a multiple of 16 */
1992 /* decrease number of reply frames by 1 */
1993 if (!(num_of_reply_frames % 16))
1994 num_of_reply_frames--;
1995
1996 /* calculate number of reply free queue entries
1997 * (must be multiple of 16)
1998 */
1999
2000 /* (we know reply_free_queue_depth is not a multiple of 16) */
2001 queue_size = num_of_reply_frames;
2002 queue_size += 16 - (queue_size % 16);
2003 ioc->reply_free_queue_depth = queue_size;
2004
2005 /* reply descriptor post queue sizing */
2006 /* this size should be the number of request frames + number of reply
2007 * frames
2008 */
2009
2010 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2011 /* round up to 16 byte boundary */
2012 if (queue_size % 16)
2013 queue_size += 16 - (queue_size % 16);
2014
2015 /* check against IOC maximum reply post queue depth */
2016 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2017 queue_diff = queue_size -
2018 facts->MaxReplyDescriptorPostQueueDepth;
2019
2020 /* round queue_diff up to multiple of 16 */
2021 if (queue_diff % 16)
2022 queue_diff += 16 - (queue_diff % 16);
2023
2024 /* adjust hba_queue_depth, reply_free_queue_depth,
2025 * and queue_size
2026 */
2027 ioc->hba_queue_depth -= (queue_diff / 2);
2028 ioc->reply_free_queue_depth -= (queue_diff / 2);
2029 queue_size = facts->MaxReplyDescriptorPostQueueDepth;
2030 }
2031 ioc->reply_post_queue_depth = queue_size;
2032
2033 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2034 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2035 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2036 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2037 ioc->chains_needed_per_io));
2038
2039 ioc->scsiio_depth = ioc->hba_queue_depth -
2040 ioc->hi_priority_depth - ioc->internal_depth;
2041
2042 /* set the scsi host can_queue depth
2043 * with some internal commands that could be outstanding
2044 */
2045 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2046 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2047 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2048
2049 /* contiguous pool for request and chains, 16 byte align, one extra "
2050 * "frame for smid=0
2051 */
2052 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2053 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
2054
2055 /* hi-priority queue */
2056 sz += (ioc->hi_priority_depth * ioc->request_sz);
2057
2058 /* internal queue */
2059 sz += (ioc->internal_depth * ioc->request_sz);
2060
2061 ioc->request_dma_sz = sz;
2062 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2063 if (!ioc->request) {
2064 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2065 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2066 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2067 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2068 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2069 goto out;
2070 retry_sz += 64;
2071 ioc->hba_queue_depth = max_request_credit - retry_sz;
2072 goto retry_allocation;
2073 }
2074
2075 if (retry_sz)
2076 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2077 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2078 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2079 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2080
2081
2082 /* hi-priority queue */
2083 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2084 ioc->request_sz);
2085 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2086 ioc->request_sz);
2087
2088 /* internal queue */
2089 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2090 ioc->request_sz);
2091 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2092 ioc->request_sz);
2093
2094 ioc->chain = ioc->internal + (ioc->internal_depth *
2095 ioc->request_sz);
2096 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
2097 ioc->request_sz);
2098
2099 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2100 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2101 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2102 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2103 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
2104 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
2105 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2106 ioc->request_sz))/1024));
2107 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2108 ioc->name, (unsigned long long) ioc->request_dma));
2109 total_sz += sz;
2110
2111 ioc->scsi_lookup = kcalloc(ioc->scsiio_depth,
2112 sizeof(struct request_tracker), GFP_KERNEL);
2113 if (!ioc->scsi_lookup) {
2114 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
2115 ioc->name);
2116 goto out;
2117 }
2118
2119 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2120 "depth(%d)\n", ioc->name, ioc->request,
2121 ioc->scsiio_depth));
2122
2123 /* initialize hi-priority queue smid's */
2124 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2125 sizeof(struct request_tracker), GFP_KERNEL);
2126 if (!ioc->hpr_lookup) {
2127 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2128 ioc->name);
2129 goto out;
2130 }
2131 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2132 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2133 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2134 ioc->hi_priority_depth, ioc->hi_priority_smid));
2135
2136 /* initialize internal queue smid's */
2137 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2138 sizeof(struct request_tracker), GFP_KERNEL);
2139 if (!ioc->internal_lookup) {
2140 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2141 ioc->name);
2142 goto out;
2143 }
2144 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2145 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2146 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2147 ioc->internal_depth, ioc->internal_smid));
2148
2149 /* sense buffers, 4 byte align */
2150 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2151 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2152 0);
2153 if (!ioc->sense_dma_pool) {
2154 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2155 ioc->name);
2156 goto out;
2157 }
2158 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2159 &ioc->sense_dma);
2160 if (!ioc->sense) {
2161 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2162 ioc->name);
2163 goto out;
2164 }
2165 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2166 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2167 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2168 SCSI_SENSE_BUFFERSIZE, sz/1024));
2169 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2170 ioc->name, (unsigned long long)ioc->sense_dma));
2171 total_sz += sz;
2172
2173 /* reply pool, 4 byte align */
2174 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2175 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2176 0);
2177 if (!ioc->reply_dma_pool) {
2178 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2179 ioc->name);
2180 goto out;
2181 }
2182 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2183 &ioc->reply_dma);
2184 if (!ioc->reply) {
2185 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2186 ioc->name);
2187 goto out;
2188 }
2189 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2190 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2191 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2192 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2193 ioc->name, (unsigned long long)ioc->reply_dma));
2194 total_sz += sz;
2195
2196 /* reply free queue, 16 byte align */
2197 sz = ioc->reply_free_queue_depth * 4;
2198 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2199 ioc->pdev, sz, 16, 0);
2200 if (!ioc->reply_free_dma_pool) {
2201 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2202 "failed\n", ioc->name);
2203 goto out;
2204 }
2205 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2206 &ioc->reply_free_dma);
2207 if (!ioc->reply_free) {
2208 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2209 "failed\n", ioc->name);
2210 goto out;
2211 }
2212 memset(ioc->reply_free, 0, sz);
2213 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2214 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2215 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2216 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2217 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2218 total_sz += sz;
2219
2220 /* reply post queue, 16 byte align */
2221 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2222 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2223 ioc->pdev, sz, 16, 0);
2224 if (!ioc->reply_post_free_dma_pool) {
2225 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2226 "failed\n", ioc->name);
2227 goto out;
2228 }
2229 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2230 GFP_KERNEL, &ioc->reply_post_free_dma);
2231 if (!ioc->reply_post_free) {
2232 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2233 "failed\n", ioc->name);
2234 goto out;
2235 }
2236 memset(ioc->reply_post_free, 0, sz);
2237 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2238 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2239 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2240 sz/1024));
2241 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2242 "(0x%llx)\n", ioc->name, (unsigned long long)
2243 ioc->reply_post_free_dma));
2244 total_sz += sz;
2245
2246 ioc->config_page_sz = 512;
2247 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2248 ioc->config_page_sz, &ioc->config_page_dma);
2249 if (!ioc->config_page) {
2250 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2251 "failed\n", ioc->name);
2252 goto out;
2253 }
2254 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2255 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2256 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2257 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2258 total_sz += ioc->config_page_sz;
2259
2260 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2261 ioc->name, total_sz/1024);
2262 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2263 "Max Controller Queue Depth(%d)\n",
2264 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2265 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2266 ioc->name, ioc->shost->sg_tablesize);
2267 return 0;
2268
2269 out:
2270 _base_release_memory_pools(ioc);
2271 return -ENOMEM;
2272 }
2273
2274
2275 /**
2276 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2277 * @ioc: Pointer to MPT_ADAPTER structure
2278 * @cooked: Request raw or cooked IOC state
2279 *
2280 * Returns all IOC Doorbell register bits if cooked==0, else just the
2281 * Doorbell bits in MPI_IOC_STATE_MASK.
2282 */
2283 u32
2284 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2285 {
2286 u32 s, sc;
2287
2288 s = readl(&ioc->chip->Doorbell);
2289 sc = s & MPI2_IOC_STATE_MASK;
2290 return cooked ? sc : s;
2291 }
2292
2293 /**
2294 * _base_wait_on_iocstate - waiting on a particular ioc state
2295 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2296 * @timeout: timeout in second
2297 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2298 *
2299 * Returns 0 for success, non-zero for failure.
2300 */
2301 static int
2302 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2303 int sleep_flag)
2304 {
2305 u32 count, cntdn;
2306 u32 current_state;
2307
2308 count = 0;
2309 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2310 do {
2311 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2312 if (current_state == ioc_state)
2313 return 0;
2314 if (count && current_state == MPI2_IOC_STATE_FAULT)
2315 break;
2316 if (sleep_flag == CAN_SLEEP)
2317 msleep(1);
2318 else
2319 udelay(500);
2320 count++;
2321 } while (--cntdn);
2322
2323 return current_state;
2324 }
2325
2326 /**
2327 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2328 * a write to the doorbell)
2329 * @ioc: per adapter object
2330 * @timeout: timeout in second
2331 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2332 *
2333 * Returns 0 for success, non-zero for failure.
2334 *
2335 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2336 */
2337 static int
2338 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2339 int sleep_flag)
2340 {
2341 u32 cntdn, count;
2342 u32 int_status;
2343
2344 count = 0;
2345 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2346 do {
2347 int_status = readl(&ioc->chip->HostInterruptStatus);
2348 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2349 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2350 "successfull count(%d), timeout(%d)\n", ioc->name,
2351 __func__, count, timeout));
2352 return 0;
2353 }
2354 if (sleep_flag == CAN_SLEEP)
2355 msleep(1);
2356 else
2357 udelay(500);
2358 count++;
2359 } while (--cntdn);
2360
2361 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2362 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2363 return -EFAULT;
2364 }
2365
2366 /**
2367 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2368 * @ioc: per adapter object
2369 * @timeout: timeout in second
2370 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2371 *
2372 * Returns 0 for success, non-zero for failure.
2373 *
2374 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2375 * doorbell.
2376 */
2377 static int
2378 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2379 int sleep_flag)
2380 {
2381 u32 cntdn, count;
2382 u32 int_status;
2383 u32 doorbell;
2384
2385 count = 0;
2386 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2387 do {
2388 int_status = readl(&ioc->chip->HostInterruptStatus);
2389 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2390 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2391 "successfull count(%d), timeout(%d)\n", ioc->name,
2392 __func__, count, timeout));
2393 return 0;
2394 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2395 doorbell = readl(&ioc->chip->Doorbell);
2396 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2397 MPI2_IOC_STATE_FAULT) {
2398 mpt2sas_base_fault_info(ioc , doorbell);
2399 return -EFAULT;
2400 }
2401 } else if (int_status == 0xFFFFFFFF)
2402 goto out;
2403
2404 if (sleep_flag == CAN_SLEEP)
2405 msleep(1);
2406 else
2407 udelay(500);
2408 count++;
2409 } while (--cntdn);
2410
2411 out:
2412 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2413 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2414 return -EFAULT;
2415 }
2416
2417 /**
2418 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2419 * @ioc: per adapter object
2420 * @timeout: timeout in second
2421 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2422 *
2423 * Returns 0 for success, non-zero for failure.
2424 *
2425 */
2426 static int
2427 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2428 int sleep_flag)
2429 {
2430 u32 cntdn, count;
2431 u32 doorbell_reg;
2432
2433 count = 0;
2434 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2435 do {
2436 doorbell_reg = readl(&ioc->chip->Doorbell);
2437 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2438 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2439 "successfull count(%d), timeout(%d)\n", ioc->name,
2440 __func__, count, timeout));
2441 return 0;
2442 }
2443 if (sleep_flag == CAN_SLEEP)
2444 msleep(1);
2445 else
2446 udelay(500);
2447 count++;
2448 } while (--cntdn);
2449
2450 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2451 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2452 return -EFAULT;
2453 }
2454
2455 /**
2456 * _base_send_ioc_reset - send doorbell reset
2457 * @ioc: per adapter object
2458 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2459 * @timeout: timeout in second
2460 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2461 *
2462 * Returns 0 for success, non-zero for failure.
2463 */
2464 static int
2465 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2466 int sleep_flag)
2467 {
2468 u32 ioc_state;
2469 int r = 0;
2470
2471 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2472 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2473 ioc->name, __func__);
2474 return -EFAULT;
2475 }
2476
2477 if (!(ioc->facts.IOCCapabilities &
2478 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2479 return -EFAULT;
2480
2481 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2482
2483 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2484 &ioc->chip->Doorbell);
2485 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2486 r = -EFAULT;
2487 goto out;
2488 }
2489 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2490 timeout, sleep_flag);
2491 if (ioc_state) {
2492 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2493 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2494 r = -EFAULT;
2495 goto out;
2496 }
2497 out:
2498 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2499 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2500 return r;
2501 }
2502
2503 /**
2504 * _base_handshake_req_reply_wait - send request thru doorbell interface
2505 * @ioc: per adapter object
2506 * @request_bytes: request length
2507 * @request: pointer having request payload
2508 * @reply_bytes: reply length
2509 * @reply: pointer to reply payload
2510 * @timeout: timeout in second
2511 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2512 *
2513 * Returns 0 for success, non-zero for failure.
2514 */
2515 static int
2516 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2517 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2518 {
2519 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2520 int i;
2521 u8 failed;
2522 u16 dummy;
2523 u32 *mfp;
2524
2525 /* make sure doorbell is not in use */
2526 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2527 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2528 " (line=%d)\n", ioc->name, __LINE__);
2529 return -EFAULT;
2530 }
2531
2532 /* clear pending doorbell interrupts from previous state changes */
2533 if (readl(&ioc->chip->HostInterruptStatus) &
2534 MPI2_HIS_IOC2SYS_DB_STATUS)
2535 writel(0, &ioc->chip->HostInterruptStatus);
2536
2537 /* send message to ioc */
2538 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2539 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2540 &ioc->chip->Doorbell);
2541
2542 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2543 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2544 "int failed (line=%d)\n", ioc->name, __LINE__);
2545 return -EFAULT;
2546 }
2547 writel(0, &ioc->chip->HostInterruptStatus);
2548
2549 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2550 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2551 "ack failed (line=%d)\n", ioc->name, __LINE__);
2552 return -EFAULT;
2553 }
2554
2555 /* send message 32-bits at a time */
2556 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2557 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2558 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2559 failed = 1;
2560 }
2561
2562 if (failed) {
2563 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2564 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2565 return -EFAULT;
2566 }
2567
2568 /* now wait for the reply */
2569 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2570 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2571 "int failed (line=%d)\n", ioc->name, __LINE__);
2572 return -EFAULT;
2573 }
2574
2575 /* read the first two 16-bits, it gives the total length of the reply */
2576 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2577 & MPI2_DOORBELL_DATA_MASK);
2578 writel(0, &ioc->chip->HostInterruptStatus);
2579 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2580 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2581 "int failed (line=%d)\n", ioc->name, __LINE__);
2582 return -EFAULT;
2583 }
2584 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2585 & MPI2_DOORBELL_DATA_MASK);
2586 writel(0, &ioc->chip->HostInterruptStatus);
2587
2588 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2589 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2590 printk(MPT2SAS_ERR_FMT "doorbell "
2591 "handshake int failed (line=%d)\n", ioc->name,
2592 __LINE__);
2593 return -EFAULT;
2594 }
2595 if (i >= reply_bytes/2) /* overflow case */
2596 dummy = readl(&ioc->chip->Doorbell);
2597 else
2598 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2599 & MPI2_DOORBELL_DATA_MASK);
2600 writel(0, &ioc->chip->HostInterruptStatus);
2601 }
2602
2603 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2604 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2605 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2606 " (line=%d)\n", ioc->name, __LINE__));
2607 }
2608 writel(0, &ioc->chip->HostInterruptStatus);
2609
2610 if (ioc->logging_level & MPT_DEBUG_INIT) {
2611 mfp = (u32 *)reply;
2612 printk(KERN_DEBUG "\toffset:data\n");
2613 for (i = 0; i < reply_bytes/4; i++)
2614 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2615 le32_to_cpu(mfp[i]));
2616 }
2617 return 0;
2618 }
2619
2620 /**
2621 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2622 * @ioc: per adapter object
2623 * @mpi_reply: the reply payload from FW
2624 * @mpi_request: the request payload sent to FW
2625 *
2626 * The SAS IO Unit Control Request message allows the host to perform low-level
2627 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2628 * to obtain the IOC assigned device handles for a device if it has other
2629 * identifying information about the device, in addition allows the host to
2630 * remove IOC resources associated with the device.
2631 *
2632 * Returns 0 for success, non-zero for failure.
2633 */
2634 int
2635 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2636 Mpi2SasIoUnitControlReply_t *mpi_reply,
2637 Mpi2SasIoUnitControlRequest_t *mpi_request)
2638 {
2639 u16 smid;
2640 u32 ioc_state;
2641 unsigned long timeleft;
2642 u8 issue_reset;
2643 int rc;
2644 void *request;
2645 u16 wait_state_count;
2646
2647 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2648 __func__));
2649
2650 mutex_lock(&ioc->base_cmds.mutex);
2651
2652 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2653 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2654 ioc->name, __func__);
2655 rc = -EAGAIN;
2656 goto out;
2657 }
2658
2659 wait_state_count = 0;
2660 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2661 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2662 if (wait_state_count++ == 10) {
2663 printk(MPT2SAS_ERR_FMT
2664 "%s: failed due to ioc not operational\n",
2665 ioc->name, __func__);
2666 rc = -EFAULT;
2667 goto out;
2668 }
2669 ssleep(1);
2670 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2671 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2672 "operational state(count=%d)\n", ioc->name,
2673 __func__, wait_state_count);
2674 }
2675
2676 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2677 if (!smid) {
2678 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2679 ioc->name, __func__);
2680 rc = -EAGAIN;
2681 goto out;
2682 }
2683
2684 rc = 0;
2685 ioc->base_cmds.status = MPT2_CMD_PENDING;
2686 request = mpt2sas_base_get_msg_frame(ioc, smid);
2687 ioc->base_cmds.smid = smid;
2688 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2689 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2690 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2691 ioc->ioc_link_reset_in_progress = 1;
2692 mpt2sas_base_put_smid_default(ioc, smid);
2693 init_completion(&ioc->base_cmds.done);
2694 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2695 msecs_to_jiffies(10000));
2696 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2697 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2698 ioc->ioc_link_reset_in_progress)
2699 ioc->ioc_link_reset_in_progress = 0;
2700 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2701 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2702 ioc->name, __func__);
2703 _debug_dump_mf(mpi_request,
2704 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2705 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2706 issue_reset = 1;
2707 goto issue_host_reset;
2708 }
2709 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2710 memcpy(mpi_reply, ioc->base_cmds.reply,
2711 sizeof(Mpi2SasIoUnitControlReply_t));
2712 else
2713 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2714 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2715 goto out;
2716
2717 issue_host_reset:
2718 if (issue_reset)
2719 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2720 FORCE_BIG_HAMMER);
2721 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2722 rc = -EFAULT;
2723 out:
2724 mutex_unlock(&ioc->base_cmds.mutex);
2725 return rc;
2726 }
2727
2728
2729 /**
2730 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2731 * @ioc: per adapter object
2732 * @mpi_reply: the reply payload from FW
2733 * @mpi_request: the request payload sent to FW
2734 *
2735 * The SCSI Enclosure Processor request message causes the IOC to
2736 * communicate with SES devices to control LED status signals.
2737 *
2738 * Returns 0 for success, non-zero for failure.
2739 */
2740 int
2741 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2742 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2743 {
2744 u16 smid;
2745 u32 ioc_state;
2746 unsigned long timeleft;
2747 u8 issue_reset;
2748 int rc;
2749 void *request;
2750 u16 wait_state_count;
2751
2752 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2753 __func__));
2754
2755 mutex_lock(&ioc->base_cmds.mutex);
2756
2757 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2758 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2759 ioc->name, __func__);
2760 rc = -EAGAIN;
2761 goto out;
2762 }
2763
2764 wait_state_count = 0;
2765 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2766 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2767 if (wait_state_count++ == 10) {
2768 printk(MPT2SAS_ERR_FMT
2769 "%s: failed due to ioc not operational\n",
2770 ioc->name, __func__);
2771 rc = -EFAULT;
2772 goto out;
2773 }
2774 ssleep(1);
2775 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2776 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2777 "operational state(count=%d)\n", ioc->name,
2778 __func__, wait_state_count);
2779 }
2780
2781 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2782 if (!smid) {
2783 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2784 ioc->name, __func__);
2785 rc = -EAGAIN;
2786 goto out;
2787 }
2788
2789 rc = 0;
2790 ioc->base_cmds.status = MPT2_CMD_PENDING;
2791 request = mpt2sas_base_get_msg_frame(ioc, smid);
2792 ioc->base_cmds.smid = smid;
2793 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2794 mpt2sas_base_put_smid_default(ioc, smid);
2795 init_completion(&ioc->base_cmds.done);
2796 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2797 msecs_to_jiffies(10000));
2798 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2799 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2800 ioc->name, __func__);
2801 _debug_dump_mf(mpi_request,
2802 sizeof(Mpi2SepRequest_t)/4);
2803 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2804 issue_reset = 1;
2805 goto issue_host_reset;
2806 }
2807 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2808 memcpy(mpi_reply, ioc->base_cmds.reply,
2809 sizeof(Mpi2SepReply_t));
2810 else
2811 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2812 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2813 goto out;
2814
2815 issue_host_reset:
2816 if (issue_reset)
2817 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2818 FORCE_BIG_HAMMER);
2819 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2820 rc = -EFAULT;
2821 out:
2822 mutex_unlock(&ioc->base_cmds.mutex);
2823 return rc;
2824 }
2825
2826 /**
2827 * _base_get_port_facts - obtain port facts reply and save in ioc
2828 * @ioc: per adapter object
2829 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2830 *
2831 * Returns 0 for success, non-zero for failure.
2832 */
2833 static int
2834 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2835 {
2836 Mpi2PortFactsRequest_t mpi_request;
2837 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2838 int mpi_reply_sz, mpi_request_sz, r;
2839
2840 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2841 __func__));
2842
2843 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2844 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2845 memset(&mpi_request, 0, mpi_request_sz);
2846 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2847 mpi_request.PortNumber = port;
2848 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2849 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2850
2851 if (r != 0) {
2852 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2853 ioc->name, __func__, r);
2854 return r;
2855 }
2856
2857 pfacts = &ioc->pfacts[port];
2858 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2859 pfacts->PortNumber = mpi_reply.PortNumber;
2860 pfacts->VP_ID = mpi_reply.VP_ID;
2861 pfacts->VF_ID = mpi_reply.VF_ID;
2862 pfacts->MaxPostedCmdBuffers =
2863 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2864
2865 return 0;
2866 }
2867
2868 /**
2869 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2870 * @ioc: per adapter object
2871 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2872 *
2873 * Returns 0 for success, non-zero for failure.
2874 */
2875 static int
2876 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2877 {
2878 Mpi2IOCFactsRequest_t mpi_request;
2879 Mpi2IOCFactsReply_t mpi_reply, *facts;
2880 int mpi_reply_sz, mpi_request_sz, r;
2881
2882 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2883 __func__));
2884
2885 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2886 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2887 memset(&mpi_request, 0, mpi_request_sz);
2888 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2889 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2890 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2891
2892 if (r != 0) {
2893 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2894 ioc->name, __func__, r);
2895 return r;
2896 }
2897
2898 facts = &ioc->facts;
2899 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2900 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2901 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2902 facts->VP_ID = mpi_reply.VP_ID;
2903 facts->VF_ID = mpi_reply.VF_ID;
2904 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2905 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2906 facts->WhoInit = mpi_reply.WhoInit;
2907 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2908 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2909 facts->MaxReplyDescriptorPostQueueDepth =
2910 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2911 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2912 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2913 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2914 ioc->ir_firmware = 1;
2915 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2916 facts->IOCRequestFrameSize =
2917 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2918 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2919 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2920 ioc->shost->max_id = -1;
2921 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2922 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2923 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2924 facts->HighPriorityCredit =
2925 le16_to_cpu(mpi_reply.HighPriorityCredit);
2926 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2927 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2928
2929 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2930 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2931 facts->MaxChainDepth));
2932 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2933 "reply frame size(%d)\n", ioc->name,
2934 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2935 return 0;
2936 }
2937
2938 /**
2939 * _base_send_ioc_init - send ioc_init to firmware
2940 * @ioc: per adapter object
2941 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2942 *
2943 * Returns 0 for success, non-zero for failure.
2944 */
2945 static int
2946 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2947 {
2948 Mpi2IOCInitRequest_t mpi_request;
2949 Mpi2IOCInitReply_t mpi_reply;
2950 int r;
2951 struct timeval current_time;
2952 u16 ioc_status;
2953
2954 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2955 __func__));
2956
2957 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2958 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2959 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2960 mpi_request.VF_ID = 0; /* TODO */
2961 mpi_request.VP_ID = 0;
2962 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2963 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2964
2965 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2966 * removed and made reserved. For those with older firmware will need
2967 * this fix. It was decided that the Reply and Request frame sizes are
2968 * the same.
2969 */
2970 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2971 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2972 /* mpi_request.SystemReplyFrameSize =
2973 * cpu_to_le16(ioc->reply_sz);
2974 */
2975 }
2976
2977 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2978 mpi_request.ReplyDescriptorPostQueueDepth =
2979 cpu_to_le16(ioc->reply_post_queue_depth);
2980 mpi_request.ReplyFreeQueueDepth =
2981 cpu_to_le16(ioc->reply_free_queue_depth);
2982
2983 #if BITS_PER_LONG > 32
2984 mpi_request.SenseBufferAddressHigh =
2985 cpu_to_le32(ioc->sense_dma >> 32);
2986 mpi_request.SystemReplyAddressHigh =
2987 cpu_to_le32(ioc->reply_dma >> 32);
2988 mpi_request.SystemRequestFrameBaseAddress =
2989 cpu_to_le64(ioc->request_dma);
2990 mpi_request.ReplyFreeQueueAddress =
2991 cpu_to_le64(ioc->reply_free_dma);
2992 mpi_request.ReplyDescriptorPostQueueAddress =
2993 cpu_to_le64(ioc->reply_post_free_dma);
2994 #else
2995 mpi_request.SystemRequestFrameBaseAddress =
2996 cpu_to_le32(ioc->request_dma);
2997 mpi_request.ReplyFreeQueueAddress =
2998 cpu_to_le32(ioc->reply_free_dma);
2999 mpi_request.ReplyDescriptorPostQueueAddress =
3000 cpu_to_le32(ioc->reply_post_free_dma);
3001 #endif
3002
3003 /* This time stamp specifies number of milliseconds
3004 * since epoch ~ midnight January 1, 1970.
3005 */
3006 do_gettimeofday(&current_time);
3007 mpi_request.TimeStamp = (current_time.tv_sec * 1000) +
3008 (current_time.tv_usec >> 3);
3009
3010 if (ioc->logging_level & MPT_DEBUG_INIT) {
3011 u32 *mfp;
3012 int i;
3013
3014 mfp = (u32 *)&mpi_request;
3015 printk(KERN_DEBUG "\toffset:data\n");
3016 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3017 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
3018 le32_to_cpu(mfp[i]));
3019 }
3020
3021 r = _base_handshake_req_reply_wait(ioc,
3022 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3023 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3024 sleep_flag);
3025
3026 if (r != 0) {
3027 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3028 ioc->name, __func__, r);
3029 return r;
3030 }
3031
3032 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3033 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3034 mpi_reply.IOCLogInfo) {
3035 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3036 r = -EIO;
3037 }
3038
3039 return 0;
3040 }
3041
3042 /**
3043 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3044 * @ioc: per adapter object
3045 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3046 *
3047 * Returns 0 for success, non-zero for failure.
3048 */
3049 static int
3050 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3051 {
3052 Mpi2PortEnableRequest_t *mpi_request;
3053 u32 ioc_state;
3054 unsigned long timeleft;
3055 int r = 0;
3056 u16 smid;
3057
3058 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3059
3060 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3061 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3062 ioc->name, __func__);
3063 return -EAGAIN;
3064 }
3065
3066 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3067 if (!smid) {
3068 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3069 ioc->name, __func__);
3070 return -EAGAIN;
3071 }
3072
3073 ioc->base_cmds.status = MPT2_CMD_PENDING;
3074 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3075 ioc->base_cmds.smid = smid;
3076 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3077 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3078 mpi_request->VF_ID = 0; /* TODO */
3079 mpi_request->VP_ID = 0;
3080
3081 mpt2sas_base_put_smid_default(ioc, smid);
3082 init_completion(&ioc->base_cmds.done);
3083 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3084 300*HZ);
3085 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3086 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3087 ioc->name, __func__);
3088 _debug_dump_mf(mpi_request,
3089 sizeof(Mpi2PortEnableRequest_t)/4);
3090 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3091 r = -EFAULT;
3092 else
3093 r = -ETIME;
3094 goto out;
3095 } else
3096 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3097 ioc->name, __func__));
3098
3099 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3100 60, sleep_flag);
3101 if (ioc_state) {
3102 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3103 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3104 r = -EFAULT;
3105 }
3106 out:
3107 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3108 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3109 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3110 return r;
3111 }
3112
3113 /**
3114 * _base_unmask_events - turn on notification for this event
3115 * @ioc: per adapter object
3116 * @event: firmware event
3117 *
3118 * The mask is stored in ioc->event_masks.
3119 */
3120 static void
3121 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3122 {
3123 u32 desired_event;
3124
3125 if (event >= 128)
3126 return;
3127
3128 desired_event = (1 << (event % 32));
3129
3130 if (event < 32)
3131 ioc->event_masks[0] &= ~desired_event;
3132 else if (event < 64)
3133 ioc->event_masks[1] &= ~desired_event;
3134 else if (event < 96)
3135 ioc->event_masks[2] &= ~desired_event;
3136 else if (event < 128)
3137 ioc->event_masks[3] &= ~desired_event;
3138 }
3139
3140 /**
3141 * _base_event_notification - send event notification
3142 * @ioc: per adapter object
3143 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3144 *
3145 * Returns 0 for success, non-zero for failure.
3146 */
3147 static int
3148 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3149 {
3150 Mpi2EventNotificationRequest_t *mpi_request;
3151 unsigned long timeleft;
3152 u16 smid;
3153 int r = 0;
3154 int i;
3155
3156 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3157 __func__));
3158
3159 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3160 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3161 ioc->name, __func__);
3162 return -EAGAIN;
3163 }
3164
3165 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3166 if (!smid) {
3167 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3168 ioc->name, __func__);
3169 return -EAGAIN;
3170 }
3171 ioc->base_cmds.status = MPT2_CMD_PENDING;
3172 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3173 ioc->base_cmds.smid = smid;
3174 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3175 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3176 mpi_request->VF_ID = 0; /* TODO */
3177 mpi_request->VP_ID = 0;
3178 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3179 mpi_request->EventMasks[i] =
3180 le32_to_cpu(ioc->event_masks[i]);
3181 mpt2sas_base_put_smid_default(ioc, smid);
3182 init_completion(&ioc->base_cmds.done);
3183 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3184 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3185 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3186 ioc->name, __func__);
3187 _debug_dump_mf(mpi_request,
3188 sizeof(Mpi2EventNotificationRequest_t)/4);
3189 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3190 r = -EFAULT;
3191 else
3192 r = -ETIME;
3193 } else
3194 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3195 ioc->name, __func__));
3196 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3197 return r;
3198 }
3199
3200 /**
3201 * mpt2sas_base_validate_event_type - validating event types
3202 * @ioc: per adapter object
3203 * @event: firmware event
3204 *
3205 * This will turn on firmware event notification when application
3206 * ask for that event. We don't mask events that are already enabled.
3207 */
3208 void
3209 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3210 {
3211 int i, j;
3212 u32 event_mask, desired_event;
3213 u8 send_update_to_fw;
3214
3215 for (i = 0, send_update_to_fw = 0; i <
3216 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3217 event_mask = ~event_type[i];
3218 desired_event = 1;
3219 for (j = 0; j < 32; j++) {
3220 if (!(event_mask & desired_event) &&
3221 (ioc->event_masks[i] & desired_event)) {
3222 ioc->event_masks[i] &= ~desired_event;
3223 send_update_to_fw = 1;
3224 }
3225 desired_event = (desired_event << 1);
3226 }
3227 }
3228
3229 if (!send_update_to_fw)
3230 return;
3231
3232 mutex_lock(&ioc->base_cmds.mutex);
3233 _base_event_notification(ioc, CAN_SLEEP);
3234 mutex_unlock(&ioc->base_cmds.mutex);
3235 }
3236
3237 /**
3238 * _base_diag_reset - the "big hammer" start of day reset
3239 * @ioc: per adapter object
3240 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3241 *
3242 * Returns 0 for success, non-zero for failure.
3243 */
3244 static int
3245 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3246 {
3247 u32 host_diagnostic;
3248 u32 ioc_state;
3249 u32 count;
3250 u32 hcb_size;
3251
3252 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3253
3254 _base_save_msix_table(ioc);
3255
3256 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
3257 ioc->name));
3258
3259 count = 0;
3260 do {
3261 /* Write magic sequence to WriteSequence register
3262 * Loop until in diagnostic mode
3263 */
3264 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
3265 "sequence\n", ioc->name));
3266 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3267 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3268 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3269 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3270 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3271 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3272 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3273
3274 /* wait 100 msec */
3275 if (sleep_flag == CAN_SLEEP)
3276 msleep(100);
3277 else
3278 mdelay(100);
3279
3280 if (count++ > 20)
3281 goto out;
3282
3283 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3284 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
3285 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3286 ioc->name, count, host_diagnostic));
3287
3288 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3289
3290 hcb_size = readl(&ioc->chip->HCBSize);
3291
3292 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
3293 ioc->name));
3294 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3295 &ioc->chip->HostDiagnostic);
3296
3297 /* don't access any registers for 50 milliseconds */
3298 msleep(50);
3299
3300 /* 300 second max wait */
3301 for (count = 0; count < 3000000 ; count++) {
3302
3303 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3304
3305 if (host_diagnostic == 0xFFFFFFFF)
3306 goto out;
3307 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3308 break;
3309
3310 /* wait 100 msec */
3311 if (sleep_flag == CAN_SLEEP)
3312 msleep(1);
3313 else
3314 mdelay(1);
3315 }
3316
3317 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3318
3319 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
3320 "assuming the HCB Address points to good F/W\n",
3321 ioc->name));
3322 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3323 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3324 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3325
3326 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3327 "re-enable the HCDW\n", ioc->name));
3328 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3329 &ioc->chip->HCBSize);
3330 }
3331
3332 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
3333 ioc->name));
3334 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3335 &ioc->chip->HostDiagnostic);
3336
3337 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
3338 "diagnostic register\n", ioc->name));
3339 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3340
3341 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
3342 "READY state\n", ioc->name));
3343 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3344 sleep_flag);
3345 if (ioc_state) {
3346 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3347 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3348 goto out;
3349 }
3350
3351 _base_restore_msix_table(ioc);
3352 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3353 return 0;
3354
3355 out:
3356 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3357 return -EFAULT;
3358 }
3359
3360 /**
3361 * _base_make_ioc_ready - put controller in READY state
3362 * @ioc: per adapter object
3363 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3364 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3365 *
3366 * Returns 0 for success, non-zero for failure.
3367 */
3368 static int
3369 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3370 enum reset_type type)
3371 {
3372 u32 ioc_state;
3373
3374 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3375 __func__));
3376
3377 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3378 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3379 ioc->name, __func__, ioc_state));
3380
3381 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3382 return 0;
3383
3384 if (ioc_state & MPI2_DOORBELL_USED) {
3385 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3386 "active!\n", ioc->name));
3387 goto issue_diag_reset;
3388 }
3389
3390 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3391 mpt2sas_base_fault_info(ioc, ioc_state &
3392 MPI2_DOORBELL_DATA_MASK);
3393 goto issue_diag_reset;
3394 }
3395
3396 if (type == FORCE_BIG_HAMMER)
3397 goto issue_diag_reset;
3398
3399 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3400 if (!(_base_send_ioc_reset(ioc,
3401 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3402 return 0;
3403
3404 issue_diag_reset:
3405 return _base_diag_reset(ioc, CAN_SLEEP);
3406 }
3407
3408 /**
3409 * _base_make_ioc_operational - put controller in OPERATIONAL state
3410 * @ioc: per adapter object
3411 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3412 *
3413 * Returns 0 for success, non-zero for failure.
3414 */
3415 static int
3416 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3417 {
3418 int r, i;
3419 unsigned long flags;
3420 u32 reply_address;
3421 u16 smid;
3422 struct _tr_list *delayed_tr, *delayed_tr_next;
3423
3424 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3425 __func__));
3426
3427 /* clean the delayed target reset list */
3428 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3429 &ioc->delayed_tr_list, list) {
3430 list_del(&delayed_tr->list);
3431 kfree(delayed_tr);
3432 }
3433
3434 /* initialize the scsi lookup free list */
3435 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3436 INIT_LIST_HEAD(&ioc->free_list);
3437 smid = 1;
3438 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3439 ioc->scsi_lookup[i].cb_idx = 0xFF;
3440 ioc->scsi_lookup[i].smid = smid;
3441 ioc->scsi_lookup[i].scmd = NULL;
3442 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3443 &ioc->free_list);
3444 }
3445
3446 /* hi-priority queue */
3447 INIT_LIST_HEAD(&ioc->hpr_free_list);
3448 smid = ioc->hi_priority_smid;
3449 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3450 ioc->hpr_lookup[i].cb_idx = 0xFF;
3451 ioc->hpr_lookup[i].smid = smid;
3452 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3453 &ioc->hpr_free_list);
3454 }
3455
3456 /* internal queue */
3457 INIT_LIST_HEAD(&ioc->internal_free_list);
3458 smid = ioc->internal_smid;
3459 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3460 ioc->internal_lookup[i].cb_idx = 0xFF;
3461 ioc->internal_lookup[i].smid = smid;
3462 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3463 &ioc->internal_free_list);
3464 }
3465 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3466
3467 /* initialize Reply Free Queue */
3468 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3469 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3470 ioc->reply_sz)
3471 ioc->reply_free[i] = cpu_to_le32(reply_address);
3472
3473 /* initialize Reply Post Free Queue */
3474 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3475 ioc->reply_post_free[i].Words = ULLONG_MAX;
3476
3477 r = _base_send_ioc_init(ioc, sleep_flag);
3478 if (r)
3479 return r;
3480
3481 /* initialize the index's */
3482 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3483 ioc->reply_post_host_index = 0;
3484 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3485 writel(0, &ioc->chip->ReplyPostHostIndex);
3486
3487 _base_unmask_interrupts(ioc);
3488 r = _base_event_notification(ioc, sleep_flag);
3489 if (r)
3490 return r;
3491
3492 if (sleep_flag == CAN_SLEEP)
3493 _base_static_config_pages(ioc);
3494
3495 r = _base_send_port_enable(ioc, sleep_flag);
3496 if (r)
3497 return r;
3498
3499 return r;
3500 }
3501
3502 /**
3503 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3504 * @ioc: per adapter object
3505 *
3506 * Return nothing.
3507 */
3508 void
3509 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3510 {
3511 struct pci_dev *pdev = ioc->pdev;
3512
3513 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3514 __func__));
3515
3516 _base_mask_interrupts(ioc);
3517 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3518 if (ioc->pci_irq) {
3519 synchronize_irq(pdev->irq);
3520 free_irq(ioc->pci_irq, ioc);
3521 }
3522 _base_disable_msix(ioc);
3523 if (ioc->chip_phys)
3524 iounmap(ioc->chip);
3525 ioc->pci_irq = -1;
3526 ioc->chip_phys = 0;
3527 pci_release_selected_regions(ioc->pdev, ioc->bars);
3528 pci_disable_device(pdev);
3529 return;
3530 }
3531
3532 /**
3533 * mpt2sas_base_attach - attach controller instance
3534 * @ioc: per adapter object
3535 *
3536 * Returns 0 for success, non-zero for failure.
3537 */
3538 int
3539 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3540 {
3541 int r, i;
3542
3543 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3544 __func__));
3545
3546 r = mpt2sas_base_map_resources(ioc);
3547 if (r)
3548 return r;
3549
3550 pci_set_drvdata(ioc->pdev, ioc->shost);
3551 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3552 if (r)
3553 goto out_free_resources;
3554
3555 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3556 if (r)
3557 goto out_free_resources;
3558
3559 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3560 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3561 if (!ioc->pfacts)
3562 goto out_free_resources;
3563
3564 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3565 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3566 if (r)
3567 goto out_free_resources;
3568 }
3569
3570 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3571 if (r)
3572 goto out_free_resources;
3573
3574 init_waitqueue_head(&ioc->reset_wq);
3575
3576 /* base internal command bits */
3577 mutex_init(&ioc->base_cmds.mutex);
3578 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3579 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3580
3581 /* transport internal command bits */
3582 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3583 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3584 mutex_init(&ioc->transport_cmds.mutex);
3585
3586 /* scsih internal command bits */
3587 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3588 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3589 mutex_init(&ioc->scsih_cmds.mutex);
3590
3591 /* scsih internal command bits */
3592 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3593 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3594 mutex_init(&ioc->scsih_cmds.mutex);
3595
3596 /* task management internal command bits */
3597 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3598 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3599 mutex_init(&ioc->tm_cmds.mutex);
3600
3601 /* config page internal command bits */
3602 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3603 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3604 mutex_init(&ioc->config_cmds.mutex);
3605
3606 /* ctl module internal command bits */
3607 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3608 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3609 mutex_init(&ioc->ctl_cmds.mutex);
3610
3611 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3612 ioc->event_masks[i] = -1;
3613
3614 /* here we enable the events we care about */
3615 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3616 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3617 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3618 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3619 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3620 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3621 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3622 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3623 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3624 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3625 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3626 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3627 if (r)
3628 goto out_free_resources;
3629
3630 mpt2sas_base_start_watchdog(ioc);
3631 if (diag_buffer_enable != 0)
3632 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3633 return 0;
3634
3635 out_free_resources:
3636
3637 ioc->remove_host = 1;
3638 mpt2sas_base_free_resources(ioc);
3639 _base_release_memory_pools(ioc);
3640 pci_set_drvdata(ioc->pdev, NULL);
3641 kfree(ioc->tm_cmds.reply);
3642 kfree(ioc->transport_cmds.reply);
3643 kfree(ioc->config_cmds.reply);
3644 kfree(ioc->base_cmds.reply);
3645 kfree(ioc->ctl_cmds.reply);
3646 kfree(ioc->pfacts);
3647 ioc->ctl_cmds.reply = NULL;
3648 ioc->base_cmds.reply = NULL;
3649 ioc->tm_cmds.reply = NULL;
3650 ioc->transport_cmds.reply = NULL;
3651 ioc->config_cmds.reply = NULL;
3652 ioc->pfacts = NULL;
3653 return r;
3654 }
3655
3656
3657 /**
3658 * mpt2sas_base_detach - remove controller instance
3659 * @ioc: per adapter object
3660 *
3661 * Return nothing.
3662 */
3663 void
3664 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3665 {
3666
3667 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3668 __func__));
3669
3670 mpt2sas_base_stop_watchdog(ioc);
3671 mpt2sas_base_free_resources(ioc);
3672 _base_release_memory_pools(ioc);
3673 pci_set_drvdata(ioc->pdev, NULL);
3674 kfree(ioc->pfacts);
3675 kfree(ioc->ctl_cmds.reply);
3676 kfree(ioc->base_cmds.reply);
3677 kfree(ioc->tm_cmds.reply);
3678 kfree(ioc->transport_cmds.reply);
3679 kfree(ioc->config_cmds.reply);
3680 }
3681
3682 /**
3683 * _base_reset_handler - reset callback handler (for base)
3684 * @ioc: per adapter object
3685 * @reset_phase: phase
3686 *
3687 * The handler for doing any required cleanup or initialization.
3688 *
3689 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3690 * MPT2_IOC_DONE_RESET
3691 *
3692 * Return nothing.
3693 */
3694 static void
3695 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3696 {
3697 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3698 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3699 switch (reset_phase) {
3700 case MPT2_IOC_PRE_RESET:
3701 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3702 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3703 break;
3704 case MPT2_IOC_AFTER_RESET:
3705 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3706 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3707 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3708 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3709 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3710 complete(&ioc->transport_cmds.done);
3711 }
3712 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3713 ioc->base_cmds.status |= MPT2_CMD_RESET;
3714 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3715 complete(&ioc->base_cmds.done);
3716 }
3717 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3718 ioc->config_cmds.status |= MPT2_CMD_RESET;
3719 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3720 ioc->config_cmds.smid = USHORT_MAX;
3721 complete(&ioc->config_cmds.done);
3722 }
3723 break;
3724 case MPT2_IOC_DONE_RESET:
3725 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3726 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3727 break;
3728 }
3729 }
3730
3731 /**
3732 * _wait_for_commands_to_complete - reset controller
3733 * @ioc: Pointer to MPT_ADAPTER structure
3734 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3735 *
3736 * This function waiting(3s) for all pending commands to complete
3737 * prior to putting controller in reset.
3738 */
3739 static void
3740 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3741 {
3742 u32 ioc_state;
3743 unsigned long flags;
3744 u16 i;
3745
3746 ioc->pending_io_count = 0;
3747 if (sleep_flag != CAN_SLEEP)
3748 return;
3749
3750 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3751 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3752 return;
3753
3754 /* pending command count */
3755 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3756 for (i = 0; i < ioc->scsiio_depth; i++)
3757 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3758 ioc->pending_io_count++;
3759 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3760
3761 if (!ioc->pending_io_count)
3762 return;
3763
3764 /* wait for pending commands to complete */
3765 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3766 }
3767
3768 /**
3769 * mpt2sas_base_hard_reset_handler - reset controller
3770 * @ioc: Pointer to MPT_ADAPTER structure
3771 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3772 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3773 *
3774 * Returns 0 for success, non-zero for failure.
3775 */
3776 int
3777 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3778 enum reset_type type)
3779 {
3780 int r;
3781 unsigned long flags;
3782 u8 pe_complete = ioc->wait_for_port_enable_to_complete;
3783
3784 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3785 __func__));
3786
3787 if (mpt2sas_fwfault_debug)
3788 mpt2sas_halt_firmware(ioc);
3789
3790 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3791 if (ioc->shost_recovery) {
3792 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3793 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3794 ioc->name, __func__);
3795 return -EBUSY;
3796 }
3797 ioc->shost_recovery = 1;
3798 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3799
3800 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3801 _wait_for_commands_to_complete(ioc, sleep_flag);
3802 _base_mask_interrupts(ioc);
3803 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3804 if (r)
3805 goto out;
3806 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3807
3808 /* If this hard reset is called while port enable is active, then
3809 * there is no reason to call make_ioc_operational
3810 */
3811 if (pe_complete) {
3812 r = -EFAULT;
3813 goto out;
3814 }
3815 r = _base_make_ioc_operational(ioc, sleep_flag);
3816 if (!r)
3817 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3818 out:
3819 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3820 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3821
3822 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3823 ioc->shost_recovery = 0;
3824 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3825
3826 if (!r)
3827 _base_reset_handler(ioc, MPT2_IOC_RUNNING);
3828 return r;
3829 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree