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iwlwifi: don't export symbols not needed in other modules
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
blob1b5180f8d75e7f19cdcf19a63f5775cfd108d827
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62 u32 iwl_debug_level;
63 EXPORT_SYMBOL(iwl_debug_level);
64
65 static irqreturn_t iwl_isr(int irq, void *data);
66
67 /*
68 * Parameter order:
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70 *
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
73 *
74 */
75 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
76 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
90 };
91 EXPORT_SYMBOL(iwl_rates);
92
93 /**
94 * translate ucode response to mac80211 tx status control values
95 */
96 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
97 struct ieee80211_tx_info *info)
98 {
99 int rate_index;
100 struct ieee80211_tx_rate *r = &info->control.rates[0];
101
102 info->antenna_sel_tx =
103 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
104 if (rate_n_flags & RATE_MCS_HT_MSK)
105 r->flags |= IEEE80211_TX_RC_MCS;
106 if (rate_n_flags & RATE_MCS_GF_MSK)
107 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
108 if (rate_n_flags & RATE_MCS_FAT_MSK)
109 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
110 if (rate_n_flags & RATE_MCS_DUP_MSK)
111 r->flags |= IEEE80211_TX_RC_DUP_DATA;
112 if (rate_n_flags & RATE_MCS_SGI_MSK)
113 r->flags |= IEEE80211_TX_RC_SHORT_GI;
114 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
115 if (info->band == IEEE80211_BAND_5GHZ)
116 rate_index -= IWL_FIRST_OFDM_RATE;
117 r->idx = rate_index;
118 }
119 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
120
121 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
122 {
123 int idx = 0;
124
125 /* HT rate format */
126 if (rate_n_flags & RATE_MCS_HT_MSK) {
127 idx = (rate_n_flags & 0xff);
128
129 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
130 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
131 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
132 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
133
134 idx += IWL_FIRST_OFDM_RATE;
135 /* skip 9M not supported in ht*/
136 if (idx >= IWL_RATE_9M_INDEX)
137 idx += 1;
138 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
139 return idx;
140
141 /* legacy rate format, search for match in table */
142 } else {
143 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
144 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
145 return idx;
146 }
147
148 return -1;
149 }
150 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
151
152 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
153 {
154 int i;
155 u8 ind = ant;
156 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
157 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
158 if (priv->hw_params.valid_tx_ant & BIT(ind))
159 return ind;
160 }
161 return ant;
162 }
163
164 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
165 EXPORT_SYMBOL(iwl_bcast_addr);
166
167
168 /* This function both allocates and initializes hw and priv. */
169 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
170 struct ieee80211_ops *hw_ops)
171 {
172 struct iwl_priv *priv;
173
174 /* mac80211 allocates memory for this device instance, including
175 * space for this driver's private structure */
176 struct ieee80211_hw *hw =
177 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
178 if (hw == NULL) {
179 printk(KERN_ERR "%s: Can not allocate network device\n",
180 cfg->name);
181 goto out;
182 }
183
184 priv = hw->priv;
185 priv->hw = hw;
186
187 out:
188 return hw;
189 }
190 EXPORT_SYMBOL(iwl_alloc_all);
191
192 void iwl_hw_detect(struct iwl_priv *priv)
193 {
194 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
195 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
196 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
197 }
198 EXPORT_SYMBOL(iwl_hw_detect);
199
200 int iwl_hw_nic_init(struct iwl_priv *priv)
201 {
202 unsigned long flags;
203 struct iwl_rx_queue *rxq = &priv->rxq;
204 int ret;
205
206 /* nic_init */
207 spin_lock_irqsave(&priv->lock, flags);
208 priv->cfg->ops->lib->apm_ops.init(priv);
209 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
210 spin_unlock_irqrestore(&priv->lock, flags);
211
212 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
213
214 priv->cfg->ops->lib->apm_ops.config(priv);
215
216 /* Allocate the RX queue, or reset if it is already allocated */
217 if (!rxq->bd) {
218 ret = iwl_rx_queue_alloc(priv);
219 if (ret) {
220 IWL_ERR(priv, "Unable to initialize Rx queue\n");
221 return -ENOMEM;
222 }
223 } else
224 iwl_rx_queue_reset(priv, rxq);
225
226 iwl_rx_replenish(priv);
227
228 iwl_rx_init(priv, rxq);
229
230 spin_lock_irqsave(&priv->lock, flags);
231
232 rxq->need_update = 1;
233 iwl_rx_queue_update_write_ptr(priv, rxq);
234
235 spin_unlock_irqrestore(&priv->lock, flags);
236
237 /* Allocate and init all Tx and Command queues */
238 ret = iwl_txq_ctx_reset(priv);
239 if (ret)
240 return ret;
241
242 set_bit(STATUS_INIT, &priv->status);
243
244 return 0;
245 }
246 EXPORT_SYMBOL(iwl_hw_nic_init);
247
248 /*
249 * QoS support
250 */
251 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
252 {
253 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
254 return;
255
256 priv->qos_data.def_qos_parm.qos_flags = 0;
257
258 if (priv->qos_data.qos_cap.q_AP.queue_request &&
259 !priv->qos_data.qos_cap.q_AP.txop_request)
260 priv->qos_data.def_qos_parm.qos_flags |=
261 QOS_PARAM_FLG_TXOP_TYPE_MSK;
262 if (priv->qos_data.qos_active)
263 priv->qos_data.def_qos_parm.qos_flags |=
264 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
265
266 if (priv->current_ht_config.is_ht)
267 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
268
269 if (force || iwl_is_associated(priv)) {
270 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
271 priv->qos_data.qos_active,
272 priv->qos_data.def_qos_parm.qos_flags);
273
274 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
275 sizeof(struct iwl_qosparam_cmd),
276 &priv->qos_data.def_qos_parm, NULL);
277 }
278 }
279 EXPORT_SYMBOL(iwl_activate_qos);
280
281 /*
282 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
283 * (802.11b) (802.11a/g)
284 * AC_BK 15 1023 7 0 0
285 * AC_BE 15 1023 3 0 0
286 * AC_VI 7 15 2 6.016ms 3.008ms
287 * AC_VO 3 7 2 3.264ms 1.504ms
288 */
289 void iwl_reset_qos(struct iwl_priv *priv)
290 {
291 u16 cw_min = 15;
292 u16 cw_max = 1023;
293 u8 aifs = 2;
294 bool is_legacy = false;
295 unsigned long flags;
296 int i;
297
298 spin_lock_irqsave(&priv->lock, flags);
299 /* QoS always active in AP and ADHOC mode
300 * In STA mode wait for association
301 */
302 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
303 priv->iw_mode == NL80211_IFTYPE_AP)
304 priv->qos_data.qos_active = 1;
305 else
306 priv->qos_data.qos_active = 0;
307
308 /* check for legacy mode */
309 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
310 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
311 (priv->iw_mode == NL80211_IFTYPE_STATION &&
312 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
313 cw_min = 31;
314 is_legacy = 1;
315 }
316
317 if (priv->qos_data.qos_active)
318 aifs = 3;
319
320 /* AC_BE */
321 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
322 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
323 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
324 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
325 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
326
327 if (priv->qos_data.qos_active) {
328 /* AC_BK */
329 i = 1;
330 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
331 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
332 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
333 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
334 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
335
336 /* AC_VI */
337 i = 2;
338 priv->qos_data.def_qos_parm.ac[i].cw_min =
339 cpu_to_le16((cw_min + 1) / 2 - 1);
340 priv->qos_data.def_qos_parm.ac[i].cw_max =
341 cpu_to_le16(cw_min);
342 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
343 if (is_legacy)
344 priv->qos_data.def_qos_parm.ac[i].edca_txop =
345 cpu_to_le16(6016);
346 else
347 priv->qos_data.def_qos_parm.ac[i].edca_txop =
348 cpu_to_le16(3008);
349 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
350
351 /* AC_VO */
352 i = 3;
353 priv->qos_data.def_qos_parm.ac[i].cw_min =
354 cpu_to_le16((cw_min + 1) / 4 - 1);
355 priv->qos_data.def_qos_parm.ac[i].cw_max =
356 cpu_to_le16((cw_min + 1) / 2 - 1);
357 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
358 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
359 if (is_legacy)
360 priv->qos_data.def_qos_parm.ac[i].edca_txop =
361 cpu_to_le16(3264);
362 else
363 priv->qos_data.def_qos_parm.ac[i].edca_txop =
364 cpu_to_le16(1504);
365 } else {
366 for (i = 1; i < 4; i++) {
367 priv->qos_data.def_qos_parm.ac[i].cw_min =
368 cpu_to_le16(cw_min);
369 priv->qos_data.def_qos_parm.ac[i].cw_max =
370 cpu_to_le16(cw_max);
371 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
372 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
373 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
374 }
375 }
376 IWL_DEBUG_QOS(priv, "set QoS to default \n");
377
378 spin_unlock_irqrestore(&priv->lock, flags);
379 }
380 EXPORT_SYMBOL(iwl_reset_qos);
381
382 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
383 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
384 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
385 struct ieee80211_sta_ht_cap *ht_info,
386 enum ieee80211_band band)
387 {
388 u16 max_bit_rate = 0;
389 u8 rx_chains_num = priv->hw_params.rx_chains_num;
390 u8 tx_chains_num = priv->hw_params.tx_chains_num;
391
392 ht_info->cap = 0;
393 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
394
395 ht_info->ht_supported = true;
396
397 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
398 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
399 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
400 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
401
402 max_bit_rate = MAX_BIT_RATE_20_MHZ;
403 if (priv->hw_params.fat_channel & BIT(band)) {
404 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
405 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
406 ht_info->mcs.rx_mask[4] = 0x01;
407 max_bit_rate = MAX_BIT_RATE_40_MHZ;
408 }
409
410 if (priv->cfg->mod_params->amsdu_size_8K)
411 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
412
413 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
414 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
415
416 ht_info->mcs.rx_mask[0] = 0xFF;
417 if (rx_chains_num >= 2)
418 ht_info->mcs.rx_mask[1] = 0xFF;
419 if (rx_chains_num >= 3)
420 ht_info->mcs.rx_mask[2] = 0xFF;
421
422 /* Highest supported Rx data rate */
423 max_bit_rate *= rx_chains_num;
424 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
425 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
426
427 /* Tx MCS capabilities */
428 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
429 if (tx_chains_num != rx_chains_num) {
430 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
431 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
432 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
433 }
434 }
435
436 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
437 struct ieee80211_rate *rates)
438 {
439 int i;
440
441 for (i = 0; i < IWL_RATE_COUNT; i++) {
442 rates[i].bitrate = iwl_rates[i].ieee * 5;
443 rates[i].hw_value = i; /* Rate scaling will work on indexes */
444 rates[i].hw_value_short = i;
445 rates[i].flags = 0;
446 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
447 /*
448 * If CCK != 1M then set short preamble rate flag.
449 */
450 rates[i].flags |=
451 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
452 0 : IEEE80211_RATE_SHORT_PREAMBLE;
453 }
454 }
455 }
456
457
458 /**
459 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
460 */
461 int iwlcore_init_geos(struct iwl_priv *priv)
462 {
463 struct iwl_channel_info *ch;
464 struct ieee80211_supported_band *sband;
465 struct ieee80211_channel *channels;
466 struct ieee80211_channel *geo_ch;
467 struct ieee80211_rate *rates;
468 int i = 0;
469
470 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
471 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
472 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
473 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
474 return 0;
475 }
476
477 channels = kzalloc(sizeof(struct ieee80211_channel) *
478 priv->channel_count, GFP_KERNEL);
479 if (!channels)
480 return -ENOMEM;
481
482 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
483 GFP_KERNEL);
484 if (!rates) {
485 kfree(channels);
486 return -ENOMEM;
487 }
488
489 /* 5.2GHz channels start after the 2.4GHz channels */
490 sband = &priv->bands[IEEE80211_BAND_5GHZ];
491 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
492 /* just OFDM */
493 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
494 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
495
496 if (priv->cfg->sku & IWL_SKU_N)
497 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
498 IEEE80211_BAND_5GHZ);
499
500 sband = &priv->bands[IEEE80211_BAND_2GHZ];
501 sband->channels = channels;
502 /* OFDM & CCK */
503 sband->bitrates = rates;
504 sband->n_bitrates = IWL_RATE_COUNT;
505
506 if (priv->cfg->sku & IWL_SKU_N)
507 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
508 IEEE80211_BAND_2GHZ);
509
510 priv->ieee_channels = channels;
511 priv->ieee_rates = rates;
512
513 for (i = 0; i < priv->channel_count; i++) {
514 ch = &priv->channel_info[i];
515
516 /* FIXME: might be removed if scan is OK */
517 if (!is_channel_valid(ch))
518 continue;
519
520 if (is_channel_a_band(ch))
521 sband = &priv->bands[IEEE80211_BAND_5GHZ];
522 else
523 sband = &priv->bands[IEEE80211_BAND_2GHZ];
524
525 geo_ch = &sband->channels[sband->n_channels++];
526
527 geo_ch->center_freq =
528 ieee80211_channel_to_frequency(ch->channel);
529 geo_ch->max_power = ch->max_power_avg;
530 geo_ch->max_antenna_gain = 0xff;
531 geo_ch->hw_value = ch->channel;
532
533 if (is_channel_valid(ch)) {
534 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
535 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
536
537 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
538 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
539
540 if (ch->flags & EEPROM_CHANNEL_RADAR)
541 geo_ch->flags |= IEEE80211_CHAN_RADAR;
542
543 geo_ch->flags |= ch->fat_extension_channel;
544
545 if (ch->max_power_avg > priv->tx_power_channel_lmt)
546 priv->tx_power_channel_lmt = ch->max_power_avg;
547 } else {
548 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
549 }
550
551 /* Save flags for reg domain usage */
552 geo_ch->orig_flags = geo_ch->flags;
553
554 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
555 ch->channel, geo_ch->center_freq,
556 is_channel_a_band(ch) ? "5.2" : "2.4",
557 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
558 "restricted" : "valid",
559 geo_ch->flags);
560 }
561
562 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
563 priv->cfg->sku & IWL_SKU_A) {
564 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
565 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
566 priv->pci_dev->device,
567 priv->pci_dev->subsystem_device);
568 priv->cfg->sku &= ~IWL_SKU_A;
569 }
570
571 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
572 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
573 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
574
575 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
576
577 return 0;
578 }
579 EXPORT_SYMBOL(iwlcore_init_geos);
580
581 /*
582 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
583 */
584 void iwlcore_free_geos(struct iwl_priv *priv)
585 {
586 kfree(priv->ieee_channels);
587 kfree(priv->ieee_rates);
588 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
589 }
590 EXPORT_SYMBOL(iwlcore_free_geos);
591
592 static bool is_single_rx_stream(struct iwl_priv *priv)
593 {
594 return !priv->current_ht_config.is_ht ||
595 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
596 (priv->current_ht_config.mcs.rx_mask[2] == 0));
597 }
598
599 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
600 enum ieee80211_band band,
601 u16 channel, u8 extension_chan_offset)
602 {
603 const struct iwl_channel_info *ch_info;
604
605 ch_info = iwl_get_channel_info(priv, band, channel);
606 if (!is_channel_valid(ch_info))
607 return 0;
608
609 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
610 return !(ch_info->fat_extension_channel &
611 IEEE80211_CHAN_NO_HT40PLUS);
612 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
613 return !(ch_info->fat_extension_channel &
614 IEEE80211_CHAN_NO_HT40MINUS);
615
616 return 0;
617 }
618
619 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
620 struct ieee80211_sta_ht_cap *sta_ht_inf)
621 {
622 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
623
624 if ((!iwl_ht_conf->is_ht) ||
625 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
626 return 0;
627
628 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
629 * the bit will not set if it is pure 40MHz case
630 */
631 if (sta_ht_inf) {
632 if (!sta_ht_inf->ht_supported)
633 return 0;
634 }
635 #ifdef CONFIG_IWLWIFI_DEBUG
636 if (priv->disable_ht40)
637 return 0;
638 #endif
639 return iwl_is_channel_extension(priv, priv->band,
640 le16_to_cpu(priv->staging_rxon.channel),
641 iwl_ht_conf->extension_chan_offset);
642 }
643 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
644
645 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
646 {
647 u16 new_val = 0;
648 u16 beacon_factor = 0;
649
650 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
651 new_val = beacon_val / beacon_factor;
652
653 if (!new_val)
654 new_val = max_beacon_val;
655
656 return new_val;
657 }
658
659 void iwl_setup_rxon_timing(struct iwl_priv *priv)
660 {
661 u64 tsf;
662 s32 interval_tm, rem;
663 unsigned long flags;
664 struct ieee80211_conf *conf = NULL;
665 u16 beacon_int;
666
667 conf = ieee80211_get_hw_conf(priv->hw);
668
669 spin_lock_irqsave(&priv->lock, flags);
670 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
671 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
672
673 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
674 beacon_int = priv->beacon_int;
675 priv->rxon_timing.atim_window = 0;
676 } else {
677 beacon_int = priv->vif->bss_conf.beacon_int;
678
679 /* TODO: we need to get atim_window from upper stack
680 * for now we set to 0 */
681 priv->rxon_timing.atim_window = 0;
682 }
683
684 beacon_int = iwl_adjust_beacon_interval(beacon_int,
685 priv->hw_params.max_beacon_itrvl * 1024);
686 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
687
688 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
689 interval_tm = beacon_int * 1024;
690 rem = do_div(tsf, interval_tm);
691 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
692
693 spin_unlock_irqrestore(&priv->lock, flags);
694 IWL_DEBUG_ASSOC(priv,
695 "beacon interval %d beacon timer %d beacon tim %d\n",
696 le16_to_cpu(priv->rxon_timing.beacon_interval),
697 le32_to_cpu(priv->rxon_timing.beacon_init_val),
698 le16_to_cpu(priv->rxon_timing.atim_window));
699 }
700 EXPORT_SYMBOL(iwl_setup_rxon_timing);
701
702 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
703 {
704 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
705
706 if (hw_decrypt)
707 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
708 else
709 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
710
711 }
712 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
713
714 /**
715 * iwl_check_rxon_cmd - validate RXON structure is valid
716 *
717 * NOTE: This is really only useful during development and can eventually
718 * be #ifdef'd out once the driver is stable and folks aren't actively
719 * making changes
720 */
721 int iwl_check_rxon_cmd(struct iwl_priv *priv)
722 {
723 int error = 0;
724 int counter = 1;
725 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
726
727 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
728 error |= le32_to_cpu(rxon->flags &
729 (RXON_FLG_TGJ_NARROW_BAND_MSK |
730 RXON_FLG_RADAR_DETECT_MSK));
731 if (error)
732 IWL_WARN(priv, "check 24G fields %d | %d\n",
733 counter++, error);
734 } else {
735 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
736 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
737 if (error)
738 IWL_WARN(priv, "check 52 fields %d | %d\n",
739 counter++, error);
740 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
741 if (error)
742 IWL_WARN(priv, "check 52 CCK %d | %d\n",
743 counter++, error);
744 }
745 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
746 if (error)
747 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
748
749 /* make sure basic rates 6Mbps and 1Mbps are supported */
750 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
751 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
752 if (error)
753 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
754
755 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
756 if (error)
757 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
758
759 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
760 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
761 if (error)
762 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
763 counter++, error);
764
765 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
766 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
767 if (error)
768 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
769 counter++, error);
770
771 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
772 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
773 if (error)
774 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
775 counter++, error);
776
777 if (error)
778 IWL_WARN(priv, "Tuning to channel %d\n",
779 le16_to_cpu(rxon->channel));
780
781 if (error) {
782 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
783 return -1;
784 }
785 return 0;
786 }
787 EXPORT_SYMBOL(iwl_check_rxon_cmd);
788
789 /**
790 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
791 * @priv: staging_rxon is compared to active_rxon
792 *
793 * If the RXON structure is changing enough to require a new tune,
794 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
795 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
796 */
797 int iwl_full_rxon_required(struct iwl_priv *priv)
798 {
799
800 /* These items are only settable from the full RXON command */
801 if (!(iwl_is_associated(priv)) ||
802 compare_ether_addr(priv->staging_rxon.bssid_addr,
803 priv->active_rxon.bssid_addr) ||
804 compare_ether_addr(priv->staging_rxon.node_addr,
805 priv->active_rxon.node_addr) ||
806 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
807 priv->active_rxon.wlap_bssid_addr) ||
808 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
809 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
810 (priv->staging_rxon.air_propagation !=
811 priv->active_rxon.air_propagation) ||
812 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
813 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
814 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
815 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
816 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
817 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
818 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
819 return 1;
820
821 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
822 * be updated with the RXON_ASSOC command -- however only some
823 * flag transitions are allowed using RXON_ASSOC */
824
825 /* Check if we are not switching bands */
826 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
827 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
828 return 1;
829
830 /* Check if we are switching association toggle */
831 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
832 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
833 return 1;
834
835 return 0;
836 }
837 EXPORT_SYMBOL(iwl_full_rxon_required);
838
839 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
840 {
841 int i;
842 int rate_mask;
843
844 /* Set rate mask*/
845 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
846 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
847 else
848 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
849
850 /* Find lowest valid rate */
851 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
852 i = iwl_rates[i].next_ieee) {
853 if (rate_mask & (1 << i))
854 return iwl_rates[i].plcp;
855 }
856
857 /* No valid rate was found. Assign the lowest one */
858 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
859 return IWL_RATE_1M_PLCP;
860 else
861 return IWL_RATE_6M_PLCP;
862 }
863 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
864
865 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
866 {
867 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
868
869 if (!ht_info->is_ht) {
870 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
871 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
872 RXON_FLG_FAT_PROT_MSK |
873 RXON_FLG_HT_PROT_MSK);
874 return;
875 }
876
877 /* FIXME: if the definition of ht_protection changed, the "translation"
878 * will be needed for rxon->flags
879 */
880 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
881
882 /* Set up channel bandwidth:
883 * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
884 /* clear the HT channel mode before set the mode */
885 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
886 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
887 if (iwl_is_fat_tx_allowed(priv, NULL)) {
888 /* pure 40 fat */
889 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
890 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
891 /* Note: control channel is opposite of extension channel */
892 switch (ht_info->extension_chan_offset) {
893 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
894 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
895 break;
896 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
897 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
898 break;
899 }
900 } else {
901 /* Note: control channel is opposite of extension channel */
902 switch (ht_info->extension_chan_offset) {
903 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
904 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
905 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
906 break;
907 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
908 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
909 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
910 break;
911 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
912 default:
913 /* channel location only valid if in Mixed mode */
914 IWL_ERR(priv, "invalid extension channel offset\n");
915 break;
916 }
917 }
918 } else {
919 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
920 }
921
922 if (priv->cfg->ops->hcmd->set_rxon_chain)
923 priv->cfg->ops->hcmd->set_rxon_chain(priv);
924
925 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
926 "rxon flags 0x%X operation mode :0x%X "
927 "extension channel offset 0x%x\n",
928 ht_info->mcs.rx_mask[0],
929 ht_info->mcs.rx_mask[1],
930 ht_info->mcs.rx_mask[2],
931 le32_to_cpu(rxon->flags), ht_info->ht_protection,
932 ht_info->extension_chan_offset);
933 return;
934 }
935 EXPORT_SYMBOL(iwl_set_rxon_ht);
936
937 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
938 #define IWL_NUM_RX_CHAINS_SINGLE 2
939 #define IWL_NUM_IDLE_CHAINS_DUAL 2
940 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
941
942 /* Determine how many receiver/antenna chains to use.
943 * More provides better reception via diversity. Fewer saves power.
944 * MIMO (dual stream) requires at least 2, but works better with 3.
945 * This does not determine *which* chains to use, just how many.
946 */
947 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
948 {
949 bool is_single = is_single_rx_stream(priv);
950 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
951
952 /* # of Rx chains to use when expecting MIMO. */
953 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
954 WLAN_HT_CAP_SM_PS_STATIC)))
955 return IWL_NUM_RX_CHAINS_SINGLE;
956 else
957 return IWL_NUM_RX_CHAINS_MULTIPLE;
958 }
959
960 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
961 {
962 int idle_cnt;
963 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
964 /* # Rx chains when idling and maybe trying to save power */
965 switch (priv->current_ht_config.sm_ps) {
966 case WLAN_HT_CAP_SM_PS_STATIC:
967 case WLAN_HT_CAP_SM_PS_DYNAMIC:
968 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
969 IWL_NUM_IDLE_CHAINS_SINGLE;
970 break;
971 case WLAN_HT_CAP_SM_PS_DISABLED:
972 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
973 break;
974 case WLAN_HT_CAP_SM_PS_INVALID:
975 default:
976 IWL_ERR(priv, "invalid mimo ps mode %d\n",
977 priv->current_ht_config.sm_ps);
978 WARN_ON(1);
979 idle_cnt = -1;
980 break;
981 }
982 return idle_cnt;
983 }
984
985 /* up to 4 chains */
986 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
987 {
988 u8 res;
989 res = (chain_bitmap & BIT(0)) >> 0;
990 res += (chain_bitmap & BIT(1)) >> 1;
991 res += (chain_bitmap & BIT(2)) >> 2;
992 res += (chain_bitmap & BIT(4)) >> 4;
993 return res;
994 }
995
996 /**
997 * iwl_is_monitor_mode - Determine if interface in monitor mode
998 *
999 * priv->iw_mode is set in add_interface, but add_interface is
1000 * never called for monitor mode. The only way mac80211 informs us about
1001 * monitor mode is through configuring filters (call to configure_filter).
1002 */
1003 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1004 {
1005 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1006 }
1007 EXPORT_SYMBOL(iwl_is_monitor_mode);
1008
1009 /**
1010 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1011 *
1012 * Selects how many and which Rx receivers/antennas/chains to use.
1013 * This should not be used for scan command ... it puts data in wrong place.
1014 */
1015 void iwl_set_rxon_chain(struct iwl_priv *priv)
1016 {
1017 bool is_single = is_single_rx_stream(priv);
1018 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1019 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1020 u32 active_chains;
1021 u16 rx_chain;
1022
1023 /* Tell uCode which antennas are actually connected.
1024 * Before first association, we assume all antennas are connected.
1025 * Just after first association, iwl_chain_noise_calibration()
1026 * checks which antennas actually *are* connected. */
1027 if (priv->chain_noise_data.active_chains)
1028 active_chains = priv->chain_noise_data.active_chains;
1029 else
1030 active_chains = priv->hw_params.valid_rx_ant;
1031
1032 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1033
1034 /* How many receivers should we use? */
1035 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1036 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1037
1038
1039 /* correct rx chain count according hw settings
1040 * and chain noise calibration
1041 */
1042 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1043 if (valid_rx_cnt < active_rx_cnt)
1044 active_rx_cnt = valid_rx_cnt;
1045
1046 if (valid_rx_cnt < idle_rx_cnt)
1047 idle_rx_cnt = valid_rx_cnt;
1048
1049 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1050 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1051
1052 /* copied from 'iwl_bg_request_scan()' */
1053 /* Force use of chains B and C (0x6) for Rx for 4965
1054 * Avoid A (0x1) because of its off-channel reception on A-band.
1055 * MIMO is not used here, but value is required */
1056 if (iwl_is_monitor_mode(priv) &&
1057 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1058 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1059 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1060 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1061 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1062 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1063 }
1064
1065 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1066
1067 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1068 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1069 else
1070 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1071
1072 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1073 priv->staging_rxon.rx_chain,
1074 active_rx_cnt, idle_rx_cnt);
1075
1076 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1077 active_rx_cnt < idle_rx_cnt);
1078 }
1079 EXPORT_SYMBOL(iwl_set_rxon_chain);
1080
1081 /**
1082 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1083 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1084 * @channel: Any channel valid for the requested phymode
1085
1086 * In addition to setting the staging RXON, priv->phymode is also set.
1087 *
1088 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1089 * in the staging RXON flag structure based on the phymode
1090 */
1091 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1092 {
1093 enum ieee80211_band band = ch->band;
1094 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1095
1096 if (!iwl_get_channel_info(priv, band, channel)) {
1097 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1098 channel, band);
1099 return -EINVAL;
1100 }
1101
1102 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1103 (priv->band == band))
1104 return 0;
1105
1106 priv->staging_rxon.channel = cpu_to_le16(channel);
1107 if (band == IEEE80211_BAND_5GHZ)
1108 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1109 else
1110 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1111
1112 priv->band = band;
1113
1114 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1115
1116 return 0;
1117 }
1118 EXPORT_SYMBOL(iwl_set_rxon_channel);
1119
1120 void iwl_set_flags_for_band(struct iwl_priv *priv,
1121 enum ieee80211_band band)
1122 {
1123 if (band == IEEE80211_BAND_5GHZ) {
1124 priv->staging_rxon.flags &=
1125 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1126 | RXON_FLG_CCK_MSK);
1127 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1128 } else {
1129 /* Copied from iwl_post_associate() */
1130 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1131 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1132 else
1133 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1134
1135 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1136 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1137
1138 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1139 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1140 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1141 }
1142 }
1143
1144 /*
1145 * initialize rxon structure with default values from eeprom
1146 */
1147 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1148 {
1149 const struct iwl_channel_info *ch_info;
1150
1151 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1152
1153 switch (mode) {
1154 case NL80211_IFTYPE_AP:
1155 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1156 break;
1157
1158 case NL80211_IFTYPE_STATION:
1159 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1160 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1161 break;
1162
1163 case NL80211_IFTYPE_ADHOC:
1164 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1165 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1166 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1167 RXON_FILTER_ACCEPT_GRP_MSK;
1168 break;
1169
1170 default:
1171 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1172 break;
1173 }
1174
1175 #if 0
1176 /* TODO: Figure out when short_preamble would be set and cache from
1177 * that */
1178 if (!hw_to_local(priv->hw)->short_preamble)
1179 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1180 else
1181 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1182 #endif
1183
1184 ch_info = iwl_get_channel_info(priv, priv->band,
1185 le16_to_cpu(priv->active_rxon.channel));
1186
1187 if (!ch_info)
1188 ch_info = &priv->channel_info[0];
1189
1190 /*
1191 * in some case A channels are all non IBSS
1192 * in this case force B/G channel
1193 */
1194 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1195 !(is_channel_ibss(ch_info)))
1196 ch_info = &priv->channel_info[0];
1197
1198 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1199 priv->band = ch_info->band;
1200
1201 iwl_set_flags_for_band(priv, priv->band);
1202
1203 priv->staging_rxon.ofdm_basic_rates =
1204 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1205 priv->staging_rxon.cck_basic_rates =
1206 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1207
1208 /* clear both MIX and PURE40 mode flag */
1209 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1210 RXON_FLG_CHANNEL_MODE_PURE_40);
1211 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1212 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1213 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1214 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1215 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1216 }
1217 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1218
1219 static void iwl_set_rate(struct iwl_priv *priv)
1220 {
1221 const struct ieee80211_supported_band *hw = NULL;
1222 struct ieee80211_rate *rate;
1223 int i;
1224
1225 hw = iwl_get_hw_mode(priv, priv->band);
1226 if (!hw) {
1227 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1228 return;
1229 }
1230
1231 priv->active_rate = 0;
1232 priv->active_rate_basic = 0;
1233
1234 for (i = 0; i < hw->n_bitrates; i++) {
1235 rate = &(hw->bitrates[i]);
1236 if (rate->hw_value < IWL_RATE_COUNT)
1237 priv->active_rate |= (1 << rate->hw_value);
1238 }
1239
1240 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1241 priv->active_rate, priv->active_rate_basic);
1242
1243 /*
1244 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1245 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1246 * OFDM
1247 */
1248 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1249 priv->staging_rxon.cck_basic_rates =
1250 ((priv->active_rate_basic &
1251 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1252 else
1253 priv->staging_rxon.cck_basic_rates =
1254 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1255
1256 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1257 priv->staging_rxon.ofdm_basic_rates =
1258 ((priv->active_rate_basic &
1259 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1260 IWL_FIRST_OFDM_RATE) & 0xFF;
1261 else
1262 priv->staging_rxon.ofdm_basic_rates =
1263 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1264 }
1265
1266 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1267 {
1268 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1269 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1270 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1271 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1272 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1273 rxon->channel = csa->channel;
1274 priv->staging_rxon.channel = csa->channel;
1275 }
1276 EXPORT_SYMBOL(iwl_rx_csa);
1277
1278 #ifdef CONFIG_IWLWIFI_DEBUG
1279 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1280 {
1281 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1282
1283 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1284 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1285 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1286 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1287 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1288 le32_to_cpu(rxon->filter_flags));
1289 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1290 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1291 rxon->ofdm_basic_rates);
1292 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1293 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1294 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1295 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1296 }
1297
1298 static const char *desc_lookup_text[] = {
1299 "OK",
1300 "FAIL",
1301 "BAD_PARAM",
1302 "BAD_CHECKSUM",
1303 "NMI_INTERRUPT_WDG",
1304 "SYSASSERT",
1305 "FATAL_ERROR",
1306 "BAD_COMMAND",
1307 "HW_ERROR_TUNE_LOCK",
1308 "HW_ERROR_TEMPERATURE",
1309 "ILLEGAL_CHAN_FREQ",
1310 "VCC_NOT_STABLE",
1311 "FH_ERROR",
1312 "NMI_INTERRUPT_HOST",
1313 "NMI_INTERRUPT_ACTION_PT",
1314 "NMI_INTERRUPT_UNKNOWN",
1315 "UCODE_VERSION_MISMATCH",
1316 "HW_ERROR_ABS_LOCK",
1317 "HW_ERROR_CAL_LOCK_FAIL",
1318 "NMI_INTERRUPT_INST_ACTION_PT",
1319 "NMI_INTERRUPT_DATA_ACTION_PT",
1320 "NMI_TRM_HW_ER",
1321 "NMI_INTERRUPT_TRM",
1322 "NMI_INTERRUPT_BREAK_POINT"
1323 "DEBUG_0",
1324 "DEBUG_1",
1325 "DEBUG_2",
1326 "DEBUG_3",
1327 "UNKNOWN"
1328 };
1329
1330 static const char *desc_lookup(int i)
1331 {
1332 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1333
1334 if (i < 0 || i > max)
1335 i = max;
1336
1337 return desc_lookup_text[i];
1338 }
1339
1340 #define ERROR_START_OFFSET (1 * sizeof(u32))
1341 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1342
1343 static void iwl_dump_nic_error_log(struct iwl_priv *priv)
1344 {
1345 u32 data2, line;
1346 u32 desc, time, count, base, data1;
1347 u32 blink1, blink2, ilink1, ilink2;
1348
1349 switch (priv->ucode_type) {
1350 case UCODE_RT:
1351 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1352 break;
1353 case UCODE_INIT:
1354 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1355 break;
1356 default:
1357 IWL_ERR(priv, "uCode image not available\n");
1358 return;
1359 }
1360
1361 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1362 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1363 return;
1364 }
1365
1366 count = iwl_read_targ_mem(priv, base);
1367
1368 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1369 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1370 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1371 priv->status, count);
1372 }
1373
1374 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1375 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1376 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1377 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1378 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1379 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1380 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1381 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1382 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1383
1384 IWL_ERR(priv, "Desc Time "
1385 "data1 data2 line\n");
1386 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1387 desc_lookup(desc), desc, time, data1, data2, line);
1388 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1389 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1390 ilink1, ilink2);
1391
1392 }
1393
1394 #define EVENT_START_OFFSET (4 * sizeof(u32))
1395
1396 /**
1397 * iwl_print_event_log - Dump error event log to syslog
1398 *
1399 */
1400 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1401 u32 num_events, u32 mode)
1402 {
1403 u32 i;
1404 u32 base; /* SRAM byte address of event log header */
1405 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1406 u32 ptr; /* SRAM byte address of log data */
1407 u32 ev, time, data; /* event log data */
1408
1409 if (num_events == 0)
1410 return;
1411 switch (priv->ucode_type) {
1412 case UCODE_RT:
1413 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1414 break;
1415 case UCODE_INIT:
1416 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1417 break;
1418 default:
1419 IWL_ERR(priv, "uCode image not available\n");
1420 return;
1421 }
1422
1423 if (mode == 0)
1424 event_size = 2 * sizeof(u32);
1425 else
1426 event_size = 3 * sizeof(u32);
1427
1428 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1429
1430 /* "time" is actually "data" for mode 0 (no timestamp).
1431 * place event id # at far right for easier visual parsing. */
1432 for (i = 0; i < num_events; i++) {
1433 ev = iwl_read_targ_mem(priv, ptr);
1434 ptr += sizeof(u32);
1435 time = iwl_read_targ_mem(priv, ptr);
1436 ptr += sizeof(u32);
1437 if (mode == 0) {
1438 /* data, ev */
1439 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1440 } else {
1441 data = iwl_read_targ_mem(priv, ptr);
1442 ptr += sizeof(u32);
1443 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1444 time, data, ev);
1445 }
1446 }
1447 }
1448
1449 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1450 {
1451 u32 base; /* SRAM byte address of event log header */
1452 u32 capacity; /* event log capacity in # entries */
1453 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1454 u32 num_wraps; /* # times uCode wrapped to top of log */
1455 u32 next_entry; /* index of next entry to be written by uCode */
1456 u32 size; /* # entries that we'll print */
1457
1458 switch (priv->ucode_type) {
1459 case UCODE_RT:
1460 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1461 break;
1462 case UCODE_INIT:
1463 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1464 break;
1465 default:
1466 IWL_ERR(priv, "uCode image not available\n");
1467 return;
1468 }
1469
1470 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1471 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1472 return;
1473 }
1474
1475 /* event log header */
1476 capacity = iwl_read_targ_mem(priv, base);
1477 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1478 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1479 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1480
1481 size = num_wraps ? capacity : next_entry;
1482
1483 /* bail out if nothing in log */
1484 if (size == 0) {
1485 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1486 return;
1487 }
1488
1489 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1490 size, num_wraps);
1491
1492 /* if uCode has wrapped back to top of log, start at the oldest entry,
1493 * i.e the next one that uCode would fill. */
1494 if (num_wraps)
1495 iwl_print_event_log(priv, next_entry,
1496 capacity - next_entry, mode);
1497 /* (then/else) start at top of log */
1498 iwl_print_event_log(priv, 0, next_entry, mode);
1499
1500 }
1501 #endif
1502 /**
1503 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1504 */
1505 void iwl_irq_handle_error(struct iwl_priv *priv)
1506 {
1507 /* Set the FW error flag -- cleared on iwl_down */
1508 set_bit(STATUS_FW_ERROR, &priv->status);
1509
1510 /* Cancel currently queued command. */
1511 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1512
1513 #ifdef CONFIG_IWLWIFI_DEBUG
1514 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
1515 iwl_dump_nic_error_log(priv);
1516 iwl_dump_nic_event_log(priv);
1517 iwl_print_rx_config_cmd(priv);
1518 }
1519 #endif
1520
1521 wake_up_interruptible(&priv->wait_command_queue);
1522
1523 /* Keep the restart process from trying to send host
1524 * commands by clearing the INIT status bit */
1525 clear_bit(STATUS_READY, &priv->status);
1526
1527 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1528 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1529 "Restarting adapter due to uCode error.\n");
1530
1531 if (priv->cfg->mod_params->restart_fw)
1532 queue_work(priv->workqueue, &priv->restart);
1533 }
1534 }
1535 EXPORT_SYMBOL(iwl_irq_handle_error);
1536
1537 void iwl_configure_filter(struct ieee80211_hw *hw,
1538 unsigned int changed_flags,
1539 unsigned int *total_flags,
1540 int mc_count, struct dev_addr_list *mc_list)
1541 {
1542 struct iwl_priv *priv = hw->priv;
1543 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1544
1545 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1546 changed_flags, *total_flags);
1547
1548 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1549 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1550 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1551 else
1552 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1553 }
1554 if (changed_flags & FIF_ALLMULTI) {
1555 if (*total_flags & FIF_ALLMULTI)
1556 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1557 else
1558 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1559 }
1560 if (changed_flags & FIF_CONTROL) {
1561 if (*total_flags & FIF_CONTROL)
1562 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1563 else
1564 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1565 }
1566 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1567 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1568 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1569 else
1570 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1571 }
1572
1573 /* We avoid iwl_commit_rxon here to commit the new filter flags
1574 * since mac80211 will call ieee80211_hw_config immediately.
1575 * (mc_list is not supported at this time). Otherwise, we need to
1576 * queue a background iwl_commit_rxon work.
1577 */
1578
1579 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1580 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1581 }
1582 EXPORT_SYMBOL(iwl_configure_filter);
1583
1584 int iwl_setup_mac(struct iwl_priv *priv)
1585 {
1586 int ret;
1587 struct ieee80211_hw *hw = priv->hw;
1588 hw->rate_control_algorithm = "iwl-agn-rs";
1589
1590 /* Tell mac80211 our characteristics */
1591 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1592 IEEE80211_HW_NOISE_DBM |
1593 IEEE80211_HW_AMPDU_AGGREGATION |
1594 IEEE80211_HW_SPECTRUM_MGMT |
1595 IEEE80211_HW_SUPPORTS_PS;
1596 hw->wiphy->interface_modes =
1597 BIT(NL80211_IFTYPE_STATION) |
1598 BIT(NL80211_IFTYPE_ADHOC);
1599
1600 hw->wiphy->custom_regulatory = true;
1601
1602 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1603 /* we create the 802.11 header and a zero-length SSID element */
1604 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1605
1606 /* Default value; 4 EDCA QOS priorities */
1607 hw->queues = 4;
1608
1609 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1610
1611 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1612 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1613 &priv->bands[IEEE80211_BAND_2GHZ];
1614 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1615 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1616 &priv->bands[IEEE80211_BAND_5GHZ];
1617
1618 ret = ieee80211_register_hw(priv->hw);
1619 if (ret) {
1620 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1621 return ret;
1622 }
1623 priv->mac80211_registered = 1;
1624
1625 return 0;
1626 }
1627 EXPORT_SYMBOL(iwl_setup_mac);
1628
1629 int iwl_set_hw_params(struct iwl_priv *priv)
1630 {
1631 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1632 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1633 if (priv->cfg->mod_params->amsdu_size_8K)
1634 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1635 else
1636 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1637 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1638
1639 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1640
1641 if (priv->cfg->mod_params->disable_11n)
1642 priv->cfg->sku &= ~IWL_SKU_N;
1643
1644 /* Device-specific setup */
1645 return priv->cfg->ops->lib->set_hw_params(priv);
1646 }
1647 EXPORT_SYMBOL(iwl_set_hw_params);
1648
1649 int iwl_init_drv(struct iwl_priv *priv)
1650 {
1651 int ret;
1652
1653 priv->ibss_beacon = NULL;
1654
1655 spin_lock_init(&priv->lock);
1656 spin_lock_init(&priv->sta_lock);
1657 spin_lock_init(&priv->hcmd_lock);
1658
1659 INIT_LIST_HEAD(&priv->free_frames);
1660
1661 mutex_init(&priv->mutex);
1662
1663 /* Clear the driver's (not device's) station table */
1664 iwl_clear_stations_table(priv);
1665
1666 priv->data_retry_limit = -1;
1667 priv->ieee_channels = NULL;
1668 priv->ieee_rates = NULL;
1669 priv->band = IEEE80211_BAND_2GHZ;
1670
1671 priv->iw_mode = NL80211_IFTYPE_STATION;
1672
1673 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1674
1675 /* Choose which receivers/antennas to use */
1676 if (priv->cfg->ops->hcmd->set_rxon_chain)
1677 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1678
1679 iwl_init_scan_params(priv);
1680
1681 iwl_reset_qos(priv);
1682
1683 priv->qos_data.qos_active = 0;
1684 priv->qos_data.qos_cap.val = 0;
1685
1686 priv->rates_mask = IWL_RATES_MASK;
1687 /* If power management is turned on, default to CAM mode */
1688 priv->power_mode = IWL_POWER_MODE_CAM;
1689 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
1690
1691 ret = iwl_init_channel_map(priv);
1692 if (ret) {
1693 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1694 goto err;
1695 }
1696
1697 ret = iwlcore_init_geos(priv);
1698 if (ret) {
1699 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1700 goto err_free_channel_map;
1701 }
1702 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1703
1704 return 0;
1705
1706 err_free_channel_map:
1707 iwl_free_channel_map(priv);
1708 err:
1709 return ret;
1710 }
1711 EXPORT_SYMBOL(iwl_init_drv);
1712
1713 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1714 {
1715 int ret = 0;
1716 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1717 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1718 tx_power,
1719 IWL_TX_POWER_TARGET_POWER_MIN);
1720 return -EINVAL;
1721 }
1722
1723 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
1724 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1725 tx_power,
1726 IWL_TX_POWER_TARGET_POWER_MAX);
1727 return -EINVAL;
1728 }
1729
1730 if (priv->tx_power_user_lmt != tx_power)
1731 force = true;
1732
1733 priv->tx_power_user_lmt = tx_power;
1734
1735 /* if nic is not up don't send command */
1736 if (!iwl_is_ready_rf(priv))
1737 return ret;
1738
1739 if (force && priv->cfg->ops->lib->send_tx_power)
1740 ret = priv->cfg->ops->lib->send_tx_power(priv);
1741
1742 return ret;
1743 }
1744 EXPORT_SYMBOL(iwl_set_tx_power);
1745
1746 void iwl_uninit_drv(struct iwl_priv *priv)
1747 {
1748 iwl_calib_free_results(priv);
1749 iwlcore_free_geos(priv);
1750 iwl_free_channel_map(priv);
1751 kfree(priv->scan);
1752 }
1753 EXPORT_SYMBOL(iwl_uninit_drv);
1754
1755 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1756
1757 /* Free dram table */
1758 void iwl_free_isr_ict(struct iwl_priv *priv)
1759 {
1760 if (priv->ict_tbl_vir) {
1761 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1762 PAGE_SIZE, priv->ict_tbl_vir,
1763 priv->ict_tbl_dma);
1764 priv->ict_tbl_vir = NULL;
1765 }
1766 }
1767 EXPORT_SYMBOL(iwl_free_isr_ict);
1768
1769
1770 /* allocate dram shared table it is a PAGE_SIZE aligned
1771 * also reset all data related to ICT table interrupt.
1772 */
1773 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1774 {
1775
1776 if (priv->cfg->use_isr_legacy)
1777 return 0;
1778 /* allocate shrared data table */
1779 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1780 ICT_COUNT) + PAGE_SIZE,
1781 &priv->ict_tbl_dma);
1782 if (!priv->ict_tbl_vir)
1783 return -ENOMEM;
1784
1785 /* align table to PAGE_SIZE boundry */
1786 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1787
1788 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1789 (unsigned long long)priv->ict_tbl_dma,
1790 (unsigned long long)priv->aligned_ict_tbl_dma,
1791 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1792
1793 priv->ict_tbl = priv->ict_tbl_vir +
1794 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1795
1796 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1797 priv->ict_tbl, priv->ict_tbl_vir,
1798 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1799
1800 /* reset table and index to all 0 */
1801 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1802 priv->ict_index = 0;
1803
1804 /* add periodic RX interrupt */
1805 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1806 return 0;
1807 }
1808 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1809
1810 /* Device is going up inform it about using ICT interrupt table,
1811 * also we need to tell the driver to start using ICT interrupt.
1812 */
1813 int iwl_reset_ict(struct iwl_priv *priv)
1814 {
1815 u32 val;
1816 unsigned long flags;
1817
1818 if (!priv->ict_tbl_vir)
1819 return 0;
1820
1821 spin_lock_irqsave(&priv->lock, flags);
1822 iwl_disable_interrupts(priv);
1823
1824 memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
1825
1826 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1827
1828 val |= CSR_DRAM_INT_TBL_ENABLE;
1829 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1830
1831 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1832 "aligned dma address %Lx\n",
1833 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1834
1835 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1836 priv->use_ict = true;
1837 priv->ict_index = 0;
1838 iwl_write32(priv, CSR_INT, priv->inta_mask);
1839 iwl_enable_interrupts(priv);
1840 spin_unlock_irqrestore(&priv->lock, flags);
1841
1842 return 0;
1843 }
1844 EXPORT_SYMBOL(iwl_reset_ict);
1845
1846 /* Device is going down disable ict interrupt usage */
1847 void iwl_disable_ict(struct iwl_priv *priv)
1848 {
1849 unsigned long flags;
1850
1851 spin_lock_irqsave(&priv->lock, flags);
1852 priv->use_ict = false;
1853 spin_unlock_irqrestore(&priv->lock, flags);
1854 }
1855 EXPORT_SYMBOL(iwl_disable_ict);
1856
1857 /* interrupt handler using ict table, with this interrupt driver will
1858 * stop using INTA register to get device's interrupt, reading this register
1859 * is expensive, device will write interrupts in ICT dram table, increment
1860 * index then will fire interrupt to driver, driver will OR all ICT table
1861 * entries from current index up to table entry with 0 value. the result is
1862 * the interrupt we need to service, driver will set the entries back to 0 and
1863 * set index.
1864 */
1865 irqreturn_t iwl_isr_ict(int irq, void *data)
1866 {
1867 struct iwl_priv *priv = data;
1868 u32 inta, inta_mask;
1869 u32 val = 0;
1870
1871 if (!priv)
1872 return IRQ_NONE;
1873
1874 /* dram interrupt table not set yet,
1875 * use legacy interrupt.
1876 */
1877 if (!priv->use_ict)
1878 return iwl_isr(irq, data);
1879
1880 spin_lock(&priv->lock);
1881
1882 /* Disable (but don't clear!) interrupts here to avoid
1883 * back-to-back ISRs and sporadic interrupts from our NIC.
1884 * If we have something to service, the tasklet will re-enable ints.
1885 * If we *don't* have something, we'll re-enable before leaving here.
1886 */
1887 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1888 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1889
1890
1891 /* Ignore interrupt if there's nothing in NIC to service.
1892 * This may be due to IRQ shared with another device,
1893 * or due to sporadic interrupts thrown from our NIC. */
1894 if (!priv->ict_tbl[priv->ict_index]) {
1895 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1896 goto none;
1897 }
1898
1899 /* read all entries that not 0 start with ict_index */
1900 while (priv->ict_tbl[priv->ict_index]) {
1901
1902 val |= priv->ict_tbl[priv->ict_index];
1903 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1904 priv->ict_index,
1905 priv->ict_tbl[priv->ict_index]);
1906 priv->ict_tbl[priv->ict_index] = 0;
1907 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1908 ICT_COUNT);
1909
1910 }
1911
1912 /* We should not get this value, just ignore it. */
1913 if (val == 0xffffffff)
1914 val = 0;
1915
1916 inta = (0xff & val) | ((0xff00 & val) << 16);
1917 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1918 inta, inta_mask, val);
1919
1920 inta &= priv->inta_mask;
1921 priv->inta |= inta;
1922
1923 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1924 if (likely(inta))
1925 tasklet_schedule(&priv->irq_tasklet);
1926 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1927 /* Allow interrupt if was disabled by this handler and
1928 * no tasklet was schedules, We should not enable interrupt,
1929 * tasklet will enable it.
1930 */
1931 iwl_enable_interrupts(priv);
1932 }
1933
1934 spin_unlock(&priv->lock);
1935 return IRQ_HANDLED;
1936
1937 none:
1938 /* re-enable interrupts here since we don't have anything to service.
1939 * only Re-enable if disabled by irq.
1940 */
1941 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1942 iwl_enable_interrupts(priv);
1943
1944 spin_unlock(&priv->lock);
1945 return IRQ_NONE;
1946 }
1947 EXPORT_SYMBOL(iwl_isr_ict);
1948
1949
1950 static irqreturn_t iwl_isr(int irq, void *data)
1951 {
1952 struct iwl_priv *priv = data;
1953 u32 inta, inta_mask;
1954 #ifdef CONFIG_IWLWIFI_DEBUG
1955 u32 inta_fh;
1956 #endif
1957 if (!priv)
1958 return IRQ_NONE;
1959
1960 spin_lock(&priv->lock);
1961
1962 /* Disable (but don't clear!) interrupts here to avoid
1963 * back-to-back ISRs and sporadic interrupts from our NIC.
1964 * If we have something to service, the tasklet will re-enable ints.
1965 * If we *don't* have something, we'll re-enable before leaving here. */
1966 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1967 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1968
1969 /* Discover which interrupts are active/pending */
1970 inta = iwl_read32(priv, CSR_INT);
1971
1972 /* Ignore interrupt if there's nothing in NIC to service.
1973 * This may be due to IRQ shared with another device,
1974 * or due to sporadic interrupts thrown from our NIC. */
1975 if (!inta) {
1976 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1977 goto none;
1978 }
1979
1980 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1981 /* Hardware disappeared. It might have already raised
1982 * an interrupt */
1983 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1984 goto unplugged;
1985 }
1986
1987 #ifdef CONFIG_IWLWIFI_DEBUG
1988 if (iwl_debug_level & (IWL_DL_ISR)) {
1989 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1990 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1991 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1992 }
1993 #endif
1994
1995 priv->inta |= inta;
1996 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1997 if (likely(inta))
1998 tasklet_schedule(&priv->irq_tasklet);
1999 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2000 iwl_enable_interrupts(priv);
2001
2002 unplugged:
2003 spin_unlock(&priv->lock);
2004 return IRQ_HANDLED;
2005
2006 none:
2007 /* re-enable interrupts here since we don't have anything to service. */
2008 /* only Re-enable if diabled by irq and no schedules tasklet. */
2009 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2010 iwl_enable_interrupts(priv);
2011
2012 spin_unlock(&priv->lock);
2013 return IRQ_NONE;
2014 }
2015
2016 irqreturn_t iwl_isr_legacy(int irq, void *data)
2017 {
2018 struct iwl_priv *priv = data;
2019 u32 inta, inta_mask;
2020 u32 inta_fh;
2021 if (!priv)
2022 return IRQ_NONE;
2023
2024 spin_lock(&priv->lock);
2025
2026 /* Disable (but don't clear!) interrupts here to avoid
2027 * back-to-back ISRs and sporadic interrupts from our NIC.
2028 * If we have something to service, the tasklet will re-enable ints.
2029 * If we *don't* have something, we'll re-enable before leaving here. */
2030 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2031 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
2032
2033 /* Discover which interrupts are active/pending */
2034 inta = iwl_read32(priv, CSR_INT);
2035 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2036
2037 /* Ignore interrupt if there's nothing in NIC to service.
2038 * This may be due to IRQ shared with another device,
2039 * or due to sporadic interrupts thrown from our NIC. */
2040 if (!inta && !inta_fh) {
2041 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
2042 goto none;
2043 }
2044
2045 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2046 /* Hardware disappeared. It might have already raised
2047 * an interrupt */
2048 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2049 goto unplugged;
2050 }
2051
2052 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2053 inta, inta_mask, inta_fh);
2054
2055 inta &= ~CSR_INT_BIT_SCD;
2056
2057 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2058 if (likely(inta || inta_fh))
2059 tasklet_schedule(&priv->irq_tasklet);
2060
2061 unplugged:
2062 spin_unlock(&priv->lock);
2063 return IRQ_HANDLED;
2064
2065 none:
2066 /* re-enable interrupts here since we don't have anything to service. */
2067 /* only Re-enable if diabled by irq */
2068 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2069 iwl_enable_interrupts(priv);
2070 spin_unlock(&priv->lock);
2071 return IRQ_NONE;
2072 }
2073 EXPORT_SYMBOL(iwl_isr_legacy);
2074
2075 int iwl_send_bt_config(struct iwl_priv *priv)
2076 {
2077 struct iwl_bt_cmd bt_cmd = {
2078 .flags = 3,
2079 .lead_time = 0xAA,
2080 .max_kill = 1,
2081 .kill_ack_mask = 0,
2082 .kill_cts_mask = 0,
2083 };
2084
2085 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2086 sizeof(struct iwl_bt_cmd), &bt_cmd);
2087 }
2088 EXPORT_SYMBOL(iwl_send_bt_config);
2089
2090 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
2091 {
2092 u32 stat_flags = 0;
2093 struct iwl_host_cmd cmd = {
2094 .id = REPLY_STATISTICS_CMD,
2095 .flags = flags,
2096 .len = sizeof(stat_flags),
2097 .data = (u8 *) &stat_flags,
2098 };
2099 return iwl_send_cmd(priv, &cmd);
2100 }
2101 EXPORT_SYMBOL(iwl_send_statistics_request);
2102
2103 /**
2104 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2105 * using sample data 100 bytes apart. If these sample points are good,
2106 * it's a pretty good bet that everything between them is good, too.
2107 */
2108 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2109 {
2110 u32 val;
2111 int ret = 0;
2112 u32 errcnt = 0;
2113 u32 i;
2114
2115 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2116
2117 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2118 /* read data comes through single port, auto-incr addr */
2119 /* NOTE: Use the debugless read so we don't flood kernel log
2120 * if IWL_DL_IO is set */
2121 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2122 i + IWL49_RTC_INST_LOWER_BOUND);
2123 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2124 if (val != le32_to_cpu(*image)) {
2125 ret = -EIO;
2126 errcnt++;
2127 if (errcnt >= 3)
2128 break;
2129 }
2130 }
2131
2132 return ret;
2133 }
2134
2135 /**
2136 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2137 * looking at all data.
2138 */
2139 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2140 u32 len)
2141 {
2142 u32 val;
2143 u32 save_len = len;
2144 int ret = 0;
2145 u32 errcnt;
2146
2147 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2148
2149 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2150 IWL49_RTC_INST_LOWER_BOUND);
2151
2152 errcnt = 0;
2153 for (; len > 0; len -= sizeof(u32), image++) {
2154 /* read data comes through single port, auto-incr addr */
2155 /* NOTE: Use the debugless read so we don't flood kernel log
2156 * if IWL_DL_IO is set */
2157 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2158 if (val != le32_to_cpu(*image)) {
2159 IWL_ERR(priv, "uCode INST section is invalid at "
2160 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2161 save_len - len, val, le32_to_cpu(*image));
2162 ret = -EIO;
2163 errcnt++;
2164 if (errcnt >= 20)
2165 break;
2166 }
2167 }
2168
2169 if (!errcnt)
2170 IWL_DEBUG_INFO(priv,
2171 "ucode image in INSTRUCTION memory is good\n");
2172
2173 return ret;
2174 }
2175
2176 /**
2177 * iwl_verify_ucode - determine which instruction image is in SRAM,
2178 * and verify its contents
2179 */
2180 int iwl_verify_ucode(struct iwl_priv *priv)
2181 {
2182 __le32 *image;
2183 u32 len;
2184 int ret;
2185
2186 /* Try bootstrap */
2187 image = (__le32 *)priv->ucode_boot.v_addr;
2188 len = priv->ucode_boot.len;
2189 ret = iwlcore_verify_inst_sparse(priv, image, len);
2190 if (!ret) {
2191 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2192 return 0;
2193 }
2194
2195 /* Try initialize */
2196 image = (__le32 *)priv->ucode_init.v_addr;
2197 len = priv->ucode_init.len;
2198 ret = iwlcore_verify_inst_sparse(priv, image, len);
2199 if (!ret) {
2200 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2201 return 0;
2202 }
2203
2204 /* Try runtime/protocol */
2205 image = (__le32 *)priv->ucode_code.v_addr;
2206 len = priv->ucode_code.len;
2207 ret = iwlcore_verify_inst_sparse(priv, image, len);
2208 if (!ret) {
2209 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2210 return 0;
2211 }
2212
2213 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2214
2215 /* Since nothing seems to match, show first several data entries in
2216 * instruction SRAM, so maybe visual inspection will give a clue.
2217 * Selection of bootstrap image (vs. other images) is arbitrary. */
2218 image = (__le32 *)priv->ucode_boot.v_addr;
2219 len = priv->ucode_boot.len;
2220 ret = iwl_verify_inst_full(priv, image, len);
2221
2222 return ret;
2223 }
2224 EXPORT_SYMBOL(iwl_verify_ucode);
2225
2226
2227 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2228 {
2229 struct iwl_ct_kill_config cmd;
2230 struct iwl_ct_kill_throttling_config adv_cmd;
2231 unsigned long flags;
2232 int ret = 0;
2233
2234 spin_lock_irqsave(&priv->lock, flags);
2235 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2236 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2237 spin_unlock_irqrestore(&priv->lock, flags);
2238 priv->power_data.ct_kill_toggle = false;
2239
2240 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2241 case CSR_HW_REV_TYPE_1000:
2242 case CSR_HW_REV_TYPE_6x00:
2243 case CSR_HW_REV_TYPE_6x50:
2244 adv_cmd.critical_temperature_enter =
2245 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2246 adv_cmd.critical_temperature_exit =
2247 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2248
2249 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2250 sizeof(adv_cmd), &adv_cmd);
2251 break;
2252 default:
2253 cmd.critical_temperature_R =
2254 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2255
2256 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2257 sizeof(cmd), &cmd);
2258 break;
2259 }
2260 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2261 sizeof(cmd), &cmd);
2262 if (ret)
2263 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2264 else
2265 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
2266 "critical temperature is %d\n",
2267 cmd.critical_temperature_R);
2268 }
2269 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2270
2271
2272 /*
2273 * CARD_STATE_CMD
2274 *
2275 * Use: Sets the device's internal card state to enable, disable, or halt
2276 *
2277 * When in the 'enable' state the card operates as normal.
2278 * When in the 'disable' state, the card enters into a low power mode.
2279 * When in the 'halt' state, the card is shut down and must be fully
2280 * restarted to come back on.
2281 */
2282 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2283 {
2284 struct iwl_host_cmd cmd = {
2285 .id = REPLY_CARD_STATE_CMD,
2286 .len = sizeof(u32),
2287 .data = &flags,
2288 .flags = meta_flag,
2289 };
2290
2291 return iwl_send_cmd(priv, &cmd);
2292 }
2293
2294 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2295 struct iwl_rx_mem_buffer *rxb)
2296 {
2297 #ifdef CONFIG_IWLWIFI_DEBUG
2298 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2299 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2300 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2301 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2302 #endif
2303 }
2304 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2305
2306 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2307 struct iwl_rx_mem_buffer *rxb)
2308 {
2309 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2310 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2311 "notification for %s:\n",
2312 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2313 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2314 }
2315 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2316
2317 void iwl_rx_reply_error(struct iwl_priv *priv,
2318 struct iwl_rx_mem_buffer *rxb)
2319 {
2320 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2321
2322 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2323 "seq 0x%04X ser 0x%08X\n",
2324 le32_to_cpu(pkt->u.err_resp.error_type),
2325 get_cmd_string(pkt->u.err_resp.cmd_id),
2326 pkt->u.err_resp.cmd_id,
2327 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2328 le32_to_cpu(pkt->u.err_resp.error_info));
2329 }
2330 EXPORT_SYMBOL(iwl_rx_reply_error);
2331
2332 void iwl_clear_isr_stats(struct iwl_priv *priv)
2333 {
2334 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2335 }
2336
2337 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2338 const struct ieee80211_tx_queue_params *params)
2339 {
2340 struct iwl_priv *priv = hw->priv;
2341 unsigned long flags;
2342 int q;
2343
2344 IWL_DEBUG_MAC80211(priv, "enter\n");
2345
2346 if (!iwl_is_ready_rf(priv)) {
2347 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2348 return -EIO;
2349 }
2350
2351 if (queue >= AC_NUM) {
2352 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2353 return 0;
2354 }
2355
2356 q = AC_NUM - 1 - queue;
2357
2358 spin_lock_irqsave(&priv->lock, flags);
2359
2360 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2361 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2362 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2363 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2364 cpu_to_le16((params->txop * 32));
2365
2366 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2367 priv->qos_data.qos_active = 1;
2368
2369 if (priv->iw_mode == NL80211_IFTYPE_AP)
2370 iwl_activate_qos(priv, 1);
2371 else if (priv->assoc_id && iwl_is_associated(priv))
2372 iwl_activate_qos(priv, 0);
2373
2374 spin_unlock_irqrestore(&priv->lock, flags);
2375
2376 IWL_DEBUG_MAC80211(priv, "leave\n");
2377 return 0;
2378 }
2379 EXPORT_SYMBOL(iwl_mac_conf_tx);
2380
2381 static void iwl_ht_conf(struct iwl_priv *priv,
2382 struct ieee80211_bss_conf *bss_conf)
2383 {
2384 struct ieee80211_sta_ht_cap *ht_conf;
2385 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2386 struct ieee80211_sta *sta;
2387
2388 IWL_DEBUG_MAC80211(priv, "enter: \n");
2389
2390 if (!iwl_conf->is_ht)
2391 return;
2392
2393
2394 /*
2395 * It is totally wrong to base global information on something
2396 * that is valid only when associated, alas, this driver works
2397 * that way and I don't know how to fix it.
2398 */
2399
2400 rcu_read_lock();
2401 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2402 if (!sta) {
2403 rcu_read_unlock();
2404 return;
2405 }
2406 ht_conf = &sta->ht_cap;
2407
2408 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2409 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2410 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2411 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2412
2413 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2414 iwl_conf->max_amsdu_size =
2415 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2416
2417 iwl_conf->supported_chan_width =
2418 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2419
2420 /*
2421 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2422 * to be done there correctly.
2423 */
2424
2425 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2426 if (conf_is_ht40_minus(&priv->hw->conf))
2427 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2428 else if (conf_is_ht40_plus(&priv->hw->conf))
2429 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2430
2431 /* If no above or below channel supplied disable FAT channel */
2432 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2433 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2434 iwl_conf->supported_chan_width = 0;
2435
2436 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2437
2438 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2439
2440 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2441 iwl_conf->ht_protection =
2442 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2443 iwl_conf->non_GF_STA_present =
2444 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2445
2446 rcu_read_unlock();
2447
2448 IWL_DEBUG_MAC80211(priv, "leave\n");
2449 }
2450
2451 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2452 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2453 struct ieee80211_vif *vif,
2454 struct ieee80211_bss_conf *bss_conf,
2455 u32 changes)
2456 {
2457 struct iwl_priv *priv = hw->priv;
2458 int ret;
2459
2460 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2461
2462 if (!iwl_is_alive(priv))
2463 return;
2464
2465 mutex_lock(&priv->mutex);
2466
2467 if (changes & BSS_CHANGED_BEACON &&
2468 priv->iw_mode == NL80211_IFTYPE_AP) {
2469 dev_kfree_skb(priv->ibss_beacon);
2470 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2471 }
2472
2473 if (changes & BSS_CHANGED_BEACON_INT) {
2474 priv->beacon_int = bss_conf->beacon_int;
2475 /* TODO: in AP mode, do something to make this take effect */
2476 }
2477
2478 if (changes & BSS_CHANGED_BSSID) {
2479 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2480
2481 /*
2482 * If there is currently a HW scan going on in the
2483 * background then we need to cancel it else the RXON
2484 * below/in post_associate will fail.
2485 */
2486 if (iwl_scan_cancel_timeout(priv, 100)) {
2487 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2488 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2489 mutex_unlock(&priv->mutex);
2490 return;
2491 }
2492
2493 /* mac80211 only sets assoc when in STATION mode */
2494 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2495 bss_conf->assoc) {
2496 memcpy(priv->staging_rxon.bssid_addr,
2497 bss_conf->bssid, ETH_ALEN);
2498
2499 /* currently needed in a few places */
2500 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2501 } else {
2502 priv->staging_rxon.filter_flags &=
2503 ~RXON_FILTER_ASSOC_MSK;
2504 }
2505
2506 }
2507
2508 /*
2509 * This needs to be after setting the BSSID in case
2510 * mac80211 decides to do both changes at once because
2511 * it will invoke post_associate.
2512 */
2513 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2514 changes & BSS_CHANGED_BEACON) {
2515 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2516
2517 if (beacon)
2518 iwl_mac_beacon_update(hw, beacon);
2519 }
2520
2521 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2522 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2523 bss_conf->use_short_preamble);
2524 if (bss_conf->use_short_preamble)
2525 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2526 else
2527 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2528 }
2529
2530 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2531 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2532 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2533 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2534 else
2535 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2536 }
2537
2538 if (changes & BSS_CHANGED_BASIC_RATES) {
2539 /* XXX use this information
2540 *
2541 * To do that, remove code from iwl_set_rate() and put something
2542 * like this here:
2543 *
2544 if (A-band)
2545 priv->staging_rxon.ofdm_basic_rates =
2546 bss_conf->basic_rates;
2547 else
2548 priv->staging_rxon.ofdm_basic_rates =
2549 bss_conf->basic_rates >> 4;
2550 priv->staging_rxon.cck_basic_rates =
2551 bss_conf->basic_rates & 0xF;
2552 */
2553 }
2554
2555 if (changes & BSS_CHANGED_HT) {
2556 iwl_ht_conf(priv, bss_conf);
2557
2558 if (priv->cfg->ops->hcmd->set_rxon_chain)
2559 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2560 }
2561
2562 if (changes & BSS_CHANGED_ASSOC) {
2563 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2564 if (bss_conf->assoc) {
2565 priv->assoc_id = bss_conf->aid;
2566 priv->beacon_int = bss_conf->beacon_int;
2567 priv->power_data.dtim_period = bss_conf->dtim_period;
2568 priv->timestamp = bss_conf->timestamp;
2569 priv->assoc_capability = bss_conf->assoc_capability;
2570
2571 /*
2572 * We have just associated, don't start scan too early
2573 * leave time for EAPOL exchange to complete.
2574 *
2575 * XXX: do this in mac80211
2576 */
2577 priv->next_scan_jiffies = jiffies +
2578 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2579 if (!iwl_is_rfkill(priv))
2580 priv->cfg->ops->lib->post_associate(priv);
2581 } else
2582 priv->assoc_id = 0;
2583
2584 }
2585
2586 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2587 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2588 changes);
2589 ret = iwl_send_rxon_assoc(priv);
2590 if (!ret) {
2591 /* Sync active_rxon with latest change. */
2592 memcpy((void *)&priv->active_rxon,
2593 &priv->staging_rxon,
2594 sizeof(struct iwl_rxon_cmd));
2595 }
2596 }
2597
2598 mutex_unlock(&priv->mutex);
2599
2600 IWL_DEBUG_MAC80211(priv, "leave\n");
2601 }
2602 EXPORT_SYMBOL(iwl_bss_info_changed);
2603
2604 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2605 {
2606 struct iwl_priv *priv = hw->priv;
2607 unsigned long flags;
2608 __le64 timestamp;
2609
2610 IWL_DEBUG_MAC80211(priv, "enter\n");
2611
2612 if (!iwl_is_ready_rf(priv)) {
2613 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2614 return -EIO;
2615 }
2616
2617 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2618 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2619 return -EIO;
2620 }
2621
2622 spin_lock_irqsave(&priv->lock, flags);
2623
2624 if (priv->ibss_beacon)
2625 dev_kfree_skb(priv->ibss_beacon);
2626
2627 priv->ibss_beacon = skb;
2628
2629 priv->assoc_id = 0;
2630 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2631 priv->timestamp = le64_to_cpu(timestamp);
2632
2633 IWL_DEBUG_MAC80211(priv, "leave\n");
2634 spin_unlock_irqrestore(&priv->lock, flags);
2635
2636 iwl_reset_qos(priv);
2637
2638 priv->cfg->ops->lib->post_associate(priv);
2639
2640
2641 return 0;
2642 }
2643 EXPORT_SYMBOL(iwl_mac_beacon_update);
2644
2645 int iwl_set_mode(struct iwl_priv *priv, int mode)
2646 {
2647 if (mode == NL80211_IFTYPE_ADHOC) {
2648 const struct iwl_channel_info *ch_info;
2649
2650 ch_info = iwl_get_channel_info(priv,
2651 priv->band,
2652 le16_to_cpu(priv->staging_rxon.channel));
2653
2654 if (!ch_info || !is_channel_ibss(ch_info)) {
2655 IWL_ERR(priv, "channel %d not IBSS channel\n",
2656 le16_to_cpu(priv->staging_rxon.channel));
2657 return -EINVAL;
2658 }
2659 }
2660
2661 iwl_connection_init_rx_config(priv, mode);
2662
2663 if (priv->cfg->ops->hcmd->set_rxon_chain)
2664 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2665
2666 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2667
2668 iwl_clear_stations_table(priv);
2669
2670 /* dont commit rxon if rf-kill is on*/
2671 if (!iwl_is_ready_rf(priv))
2672 return -EAGAIN;
2673
2674 iwlcore_commit_rxon(priv);
2675
2676 return 0;
2677 }
2678 EXPORT_SYMBOL(iwl_set_mode);
2679
2680 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2681 struct ieee80211_if_init_conf *conf)
2682 {
2683 struct iwl_priv *priv = hw->priv;
2684 unsigned long flags;
2685
2686 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2687
2688 if (priv->vif) {
2689 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2690 return -EOPNOTSUPP;
2691 }
2692
2693 spin_lock_irqsave(&priv->lock, flags);
2694 priv->vif = conf->vif;
2695 priv->iw_mode = conf->type;
2696
2697 spin_unlock_irqrestore(&priv->lock, flags);
2698
2699 mutex_lock(&priv->mutex);
2700
2701 if (conf->mac_addr) {
2702 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2703 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2704 }
2705
2706 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2707 /* we are not ready, will run again when ready */
2708 set_bit(STATUS_MODE_PENDING, &priv->status);
2709
2710 mutex_unlock(&priv->mutex);
2711
2712 IWL_DEBUG_MAC80211(priv, "leave\n");
2713 return 0;
2714 }
2715 EXPORT_SYMBOL(iwl_mac_add_interface);
2716
2717 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2718 struct ieee80211_if_init_conf *conf)
2719 {
2720 struct iwl_priv *priv = hw->priv;
2721
2722 IWL_DEBUG_MAC80211(priv, "enter\n");
2723
2724 mutex_lock(&priv->mutex);
2725
2726 if (iwl_is_ready_rf(priv)) {
2727 iwl_scan_cancel_timeout(priv, 100);
2728 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2729 iwlcore_commit_rxon(priv);
2730 }
2731 if (priv->vif == conf->vif) {
2732 priv->vif = NULL;
2733 memset(priv->bssid, 0, ETH_ALEN);
2734 }
2735 mutex_unlock(&priv->mutex);
2736
2737 IWL_DEBUG_MAC80211(priv, "leave\n");
2738
2739 }
2740 EXPORT_SYMBOL(iwl_mac_remove_interface);
2741
2742 /**
2743 * iwl_mac_config - mac80211 config callback
2744 *
2745 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2746 * be set inappropriately and the driver currently sets the hardware up to
2747 * use it whenever needed.
2748 */
2749 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2750 {
2751 struct iwl_priv *priv = hw->priv;
2752 const struct iwl_channel_info *ch_info;
2753 struct ieee80211_conf *conf = &hw->conf;
2754 unsigned long flags = 0;
2755 int ret = 0;
2756 u16 ch;
2757 int scan_active = 0;
2758
2759 mutex_lock(&priv->mutex);
2760
2761 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2762 conf->channel->hw_value, changed);
2763
2764 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2765 test_bit(STATUS_SCANNING, &priv->status))) {
2766 scan_active = 1;
2767 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2768 }
2769
2770
2771 /* during scanning mac80211 will delay channel setting until
2772 * scan finish with changed = 0
2773 */
2774 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2775 if (scan_active)
2776 goto set_ch_out;
2777
2778 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2779 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2780 if (!is_channel_valid(ch_info)) {
2781 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2782 ret = -EINVAL;
2783 goto set_ch_out;
2784 }
2785
2786 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2787 !is_channel_ibss(ch_info)) {
2788 IWL_ERR(priv, "channel %d in band %d not "
2789 "IBSS channel\n",
2790 conf->channel->hw_value, conf->channel->band);
2791 ret = -EINVAL;
2792 goto set_ch_out;
2793 }
2794
2795 priv->current_ht_config.is_ht = conf_is_ht(conf);
2796
2797 spin_lock_irqsave(&priv->lock, flags);
2798
2799
2800 /* if we are switching from ht to 2.4 clear flags
2801 * from any ht related info since 2.4 does not
2802 * support ht */
2803 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2804 priv->staging_rxon.flags = 0;
2805
2806 iwl_set_rxon_channel(priv, conf->channel);
2807
2808 iwl_set_flags_for_band(priv, conf->channel->band);
2809 spin_unlock_irqrestore(&priv->lock, flags);
2810 set_ch_out:
2811 /* The list of supported rates and rate mask can be different
2812 * for each band; since the band may have changed, reset
2813 * the rate mask to what mac80211 lists */
2814 iwl_set_rate(priv);
2815 }
2816
2817 if (changed & IEEE80211_CONF_CHANGE_PS &&
2818 priv->iw_mode == NL80211_IFTYPE_STATION) {
2819 priv->power_data.power_disabled =
2820 !(conf->flags & IEEE80211_CONF_PS);
2821 ret = iwl_power_update_mode(priv, 0);
2822 if (ret)
2823 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2824 }
2825
2826 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2827 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2828 priv->tx_power_user_lmt, conf->power_level);
2829
2830 iwl_set_tx_power(priv, conf->power_level, false);
2831 }
2832
2833 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2834 if (priv->cfg->ops->hcmd->set_rxon_chain)
2835 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2836
2837 if (!iwl_is_ready(priv)) {
2838 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2839 goto out;
2840 }
2841
2842 if (scan_active)
2843 goto out;
2844
2845 if (memcmp(&priv->active_rxon,
2846 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2847 iwlcore_commit_rxon(priv);
2848 else
2849 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2850
2851
2852 out:
2853 IWL_DEBUG_MAC80211(priv, "leave\n");
2854 mutex_unlock(&priv->mutex);
2855 return ret;
2856 }
2857 EXPORT_SYMBOL(iwl_mac_config);
2858
2859 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2860 struct ieee80211_tx_queue_stats *stats)
2861 {
2862 struct iwl_priv *priv = hw->priv;
2863 int i, avail;
2864 struct iwl_tx_queue *txq;
2865 struct iwl_queue *q;
2866 unsigned long flags;
2867
2868 IWL_DEBUG_MAC80211(priv, "enter\n");
2869
2870 if (!iwl_is_ready_rf(priv)) {
2871 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2872 return -EIO;
2873 }
2874
2875 spin_lock_irqsave(&priv->lock, flags);
2876
2877 for (i = 0; i < AC_NUM; i++) {
2878 txq = &priv->txq[i];
2879 q = &txq->q;
2880 avail = iwl_queue_space(q);
2881
2882 stats[i].len = q->n_window - avail;
2883 stats[i].limit = q->n_window - q->high_mark;
2884 stats[i].count = q->n_window;
2885
2886 }
2887 spin_unlock_irqrestore(&priv->lock, flags);
2888
2889 IWL_DEBUG_MAC80211(priv, "leave\n");
2890
2891 return 0;
2892 }
2893 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2894
2895 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2896 {
2897 struct iwl_priv *priv = hw->priv;
2898 unsigned long flags;
2899
2900 mutex_lock(&priv->mutex);
2901 IWL_DEBUG_MAC80211(priv, "enter\n");
2902
2903 spin_lock_irqsave(&priv->lock, flags);
2904 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2905 spin_unlock_irqrestore(&priv->lock, flags);
2906
2907 iwl_reset_qos(priv);
2908
2909 spin_lock_irqsave(&priv->lock, flags);
2910 priv->assoc_id = 0;
2911 priv->assoc_capability = 0;
2912 priv->assoc_station_added = 0;
2913
2914 /* new association get rid of ibss beacon skb */
2915 if (priv->ibss_beacon)
2916 dev_kfree_skb(priv->ibss_beacon);
2917
2918 priv->ibss_beacon = NULL;
2919
2920 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2921 priv->timestamp = 0;
2922 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2923 priv->beacon_int = 0;
2924
2925 spin_unlock_irqrestore(&priv->lock, flags);
2926
2927 if (!iwl_is_ready_rf(priv)) {
2928 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2929 mutex_unlock(&priv->mutex);
2930 return;
2931 }
2932
2933 /* we are restarting association process
2934 * clear RXON_FILTER_ASSOC_MSK bit
2935 */
2936 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2937 iwl_scan_cancel_timeout(priv, 100);
2938 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2939 iwlcore_commit_rxon(priv);
2940 }
2941
2942 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2943 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2944 mutex_unlock(&priv->mutex);
2945 return;
2946 }
2947
2948 iwl_set_rate(priv);
2949
2950 mutex_unlock(&priv->mutex);
2951
2952 IWL_DEBUG_MAC80211(priv, "leave\n");
2953 }
2954 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2955
2956 #ifdef CONFIG_PM
2957
2958 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2959 {
2960 struct iwl_priv *priv = pci_get_drvdata(pdev);
2961
2962 /*
2963 * This function is called when system goes into suspend state
2964 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2965 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2966 * it will not call apm_ops.stop() to stop the DMA operation.
2967 * Calling apm_ops.stop here to make sure we stop the DMA.
2968 */
2969 priv->cfg->ops->lib->apm_ops.stop(priv);
2970
2971 pci_save_state(pdev);
2972 pci_disable_device(pdev);
2973 pci_set_power_state(pdev, PCI_D3hot);
2974
2975 return 0;
2976 }
2977 EXPORT_SYMBOL(iwl_pci_suspend);
2978
2979 int iwl_pci_resume(struct pci_dev *pdev)
2980 {
2981 struct iwl_priv *priv = pci_get_drvdata(pdev);
2982 int ret;
2983
2984 pci_set_power_state(pdev, PCI_D0);
2985 ret = pci_enable_device(pdev);
2986 if (ret)
2987 return ret;
2988 pci_restore_state(pdev);
2989 iwl_enable_interrupts(priv);
2990
2991 return 0;
2992 }
2993 EXPORT_SYMBOL(iwl_pci_resume);
2994
2995 #endif /* CONFIG_PM */
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree