9 int node
; /* NUMA node */
10 void* iommu
; /* IOMMU private data */
13 extern struct pci_bus
*pci_scan_bus_with_sysdata(int busno
);
15 #ifdef CONFIG_CALGARY_IOMMU
16 static inline void* pci_iommu(struct pci_bus
*bus
)
18 struct pci_sysdata
*sd
= bus
->sysdata
;
22 static inline void set_pci_iommu(struct pci_bus
*bus
, void *val
)
24 struct pci_sysdata
*sd
= bus
->sysdata
;
27 #endif /* CONFIG_CALGARY_IOMMU */
29 #include <linux/mm.h> /* for struct page */
31 /* Can be used to override the logic in pci_scan_bus for skipping
32 already-configured bus numbers - to be used for buggy BIOSes
33 or architectures with incomplete PCI setup by the loader */
36 extern unsigned int pcibios_assign_all_busses(void);
38 #define pcibios_assign_all_busses() 0
40 #define pcibios_scan_all_fns(a, b) 0
42 extern unsigned long pci_mem_start
;
43 #define PCIBIOS_MIN_IO 0x1000
44 #define PCIBIOS_MIN_MEM (pci_mem_start)
46 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
48 void pcibios_config_init(void);
49 struct pci_bus
* pcibios_scan_root(int bus
);
50 extern int (*pci_config_read
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32
*value
);
51 extern int (*pci_config_write
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32 value
);
53 void pcibios_set_master(struct pci_dev
*dev
);
54 void pcibios_penalize_isa_irq(int irq
, int active
);
55 struct irq_routing_table
*pcibios_get_irq_routing_table(void);
56 int pcibios_set_irq_routing(struct pci_dev
*dev
, int pin
, int irq
);
58 #include <linux/types.h>
59 #include <linux/slab.h>
60 #include <asm/scatterlist.h>
61 #include <linux/string.h>
64 extern void pci_iommu_alloc(void);
65 extern int iommu_setup(char *opt
);
67 /* The PCI address space does equal the physical memory
68 * address space. The networking and block device layers use
69 * this boolean for bounce buffer decisions
71 * On AMD64 it mostly equals, but we set it to zero if a hardware
72 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
74 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
76 #if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
78 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
80 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
82 #define pci_unmap_addr(PTR, ADDR_NAME) \
84 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
85 (((PTR)->ADDR_NAME) = (VAL))
86 #define pci_unmap_len(PTR, LEN_NAME) \
88 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
89 (((PTR)->LEN_NAME) = (VAL))
94 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
95 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
96 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
97 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
98 #define pci_unmap_len(PTR, LEN_NAME) (0)
99 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
103 #include <asm-generic/pci-dma-compat.h>
106 static inline void pci_dma_burst_advice(struct pci_dev
*pdev
,
107 enum pci_dma_burst_strategy
*strat
,
108 unsigned long *strategy_parameter
)
110 *strat
= PCI_DMA_BURST_INFINITY
;
111 *strategy_parameter
= ~0UL;
115 #define HAVE_PCI_MMAP
116 extern int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
117 enum pci_mmap_state mmap_state
, int write_combine
);
119 #endif /* __KERNEL__ */
121 /* generic pci stuff */
123 #include <asm-generic/pci.h>
126 #endif /* __x8664_PCI_H */