2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
57 Platform has a PL08x DMAC device
58 which can provide DMA engine support
61 tristate "Intel I/OAT DMA support"
65 select ASYNC_TX_DISABLE_PQ_VAL_DMA
66 select ASYNC_TX_DISABLE_XOR_VAL_DMA
68 Enable support for the Intel(R) I/OAT DMA engine present
69 in recent Intel Xeon chipsets.
71 Say Y here if you have such a chipset.
76 tristate "Intel IOP ADMA support"
77 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
79 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
81 Enable support for the Intel(R) IOP Series RAID engines.
84 tristate "Synopsys DesignWare AHB DMA support"
87 default y if CPU_AT32AP7000
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
93 tristate "Atmel AHB DMA support"
94 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
97 Support the Atmel AHB DMA controller. This can be integrated in
98 chips such as the Atmel AT91SAM9RL.
101 tristate "Freescale Elo and Elo Plus DMA support"
104 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
106 Enable support for the Freescale Elo and Elo Plus DMA controllers.
107 The Elo is the DMA controller on some 82xx and 83xx parts, and the
108 Elo Plus is the DMA controller on 85xx and 86xx parts.
111 tristate "Freescale MPC512x built-in DMA engine support"
112 depends on PPC_MPC512x || PPC_MPC831x
115 Enable support for the Freescale MPC512x built-in DMA engine.
118 bool "Marvell XOR engine support"
119 depends on PLAT_ORION
121 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
123 Enable support for the Marvell XOR engine.
126 bool "MX3x Image Processing Unit support"
131 If you plan to use the Image Processing unit in the i.MX3x, say
132 Y here. If unsure, select Y.
135 int "Number of dynamically mapped interrupts for IPU"
140 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
141 To avoid bloating the irq_desc[] array we allocate a sufficient
142 number of IRQ slots and map them dynamically to specific sources.
145 tristate "Toshiba TXx9 SoC DMA support"
146 depends on MACH_TX49XX || MACH_TX39XX
149 Support the TXx9 SoC internal DMA controller. This can be
150 integrated in chips such as the Toshiba TX4927/38/39.
153 tristate "Renesas SuperH DMAC support"
154 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
155 depends on !SH_DMA_API
158 Enable support for the Renesas SuperH DMA controllers.
161 bool "ST-Ericsson COH901318 DMA support"
165 Enable support for ST-Ericsson COH 901 318 DMA.
168 bool "ST-Ericsson DMA40 support"
169 depends on ARCH_U8500
172 Support for ST-Ericsson DMA40 controller
174 config AMCC_PPC440SPE_ADMA
175 tristate "AMCC PPC440SPe ADMA support"
176 depends on 440SPe || 440SP
178 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
179 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
181 Enable support for the AMCC PPC440SPe RAID engines.
184 tristate "Timberdale FPGA DMA support"
185 depends on MFD_TIMBERDALE || HAS_IOMEM
188 Enable support for the Timberdale FPGA DMA engine.
190 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
194 tristate "DMA API Driver for PL330"
198 Select if your platform has one or more PL330 DMACs.
199 You need to provide platform specific settings via
200 platform_data for a dma-pl330 device.
203 tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH DMA support"
204 depends on PCI && X86
207 Enable support for Intel EG20T PCH DMA engine.
209 This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/
210 Output Hub) which is for IVI(In-Vehicle Infotainment) use.
211 ML7213 is companion chip for Intel Atom E6xx series.
212 ML7213 is completely compatible for Intel EG20T PCH.
215 tristate "i.MX SDMA support"
216 depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
219 Support the i.MX SDMA engine. This engine is integrated into
220 Freescale i.MX25/31/35/51 chips.
223 tristate "i.MX DMA support"
224 depends on IMX_HAVE_DMA_V1
227 Support the i.MX DMA engine. This engine is integrated into
228 Freescale i.MX1/21/27 chips.
231 bool "MXS DMA support"
232 depends on SOC_IMX23 || SOC_IMX28
235 Support the MXS DMA engine. This engine including APBH-DMA
236 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
241 comment "DMA Clients"
242 depends on DMA_ENGINE
245 bool "Network: TCP receive copy offload"
246 depends on DMA_ENGINE && NET
247 default (INTEL_IOATDMA || FSL_DMA)
249 This enables the use of DMA engines in the network stack to
250 offload receive copy-to-user operations, freeing CPU cycles.
252 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
256 bool "Async_tx: Offload support for the async_tx api"
257 depends on DMA_ENGINE
259 This allows the async_tx api to take advantage of offload engines for
260 memcpy, memset, xor, and raid6 p+q operations. If your platform has
261 a dma engine that can perform raid operations and you have enabled
267 tristate "DMA Test client"
268 depends on DMA_ENGINE
270 Simple DMA test client. Say N unless you're debugging a