staging: rts_pstor: modify initial card clock
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-omap2 / board-h4.c
blobbac7933b8cbb79cc644a4d4b388cbac52f2da439
1 /*
2 * linux/arch/arm/mach-omap2/board-h4.c
4 * Copyright (C) 2005 Nokia Corporation
5 * Author: Paul Mundt <paul.mundt@nokia.com>
7 * Modified from mach-omap/omap1/board-generic.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/partitions.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/delay.h>
21 #include <linux/workqueue.h>
22 #include <linux/i2c.h>
23 #include <linux/i2c/at24.h>
24 #include <linux/input.h>
25 #include <linux/err.h>
26 #include <linux/clk.h>
27 #include <linux/io.h>
29 #include <mach/hardware.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
34 #include <mach/gpio.h>
35 #include <plat/usb.h>
36 #include <plat/board.h>
37 #include <plat/common.h>
38 #include <plat/keypad.h>
39 #include <plat/menelaus.h>
40 #include <plat/dma.h>
41 #include <plat/gpmc.h>
43 #include "mux.h"
44 #include "control.h"
46 #define H4_FLASH_CS 0
47 #define H4_SMC91X_CS 1
49 #define H4_ETHR_GPIO_IRQ 92
51 static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
52 static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
54 static const unsigned int h4_keymap[] = {
55 KEY(0, 0, KEY_LEFT),
56 KEY(1, 0, KEY_RIGHT),
57 KEY(2, 0, KEY_A),
58 KEY(3, 0, KEY_B),
59 KEY(4, 0, KEY_C),
60 KEY(0, 1, KEY_DOWN),
61 KEY(1, 1, KEY_UP),
62 KEY(2, 1, KEY_E),
63 KEY(3, 1, KEY_F),
64 KEY(4, 1, KEY_G),
65 KEY(0, 2, KEY_ENTER),
66 KEY(1, 2, KEY_I),
67 KEY(2, 2, KEY_J),
68 KEY(3, 2, KEY_K),
69 KEY(4, 2, KEY_3),
70 KEY(0, 3, KEY_M),
71 KEY(1, 3, KEY_N),
72 KEY(2, 3, KEY_O),
73 KEY(3, 3, KEY_P),
74 KEY(4, 3, KEY_Q),
75 KEY(0, 4, KEY_R),
76 KEY(1, 4, KEY_4),
77 KEY(2, 4, KEY_T),
78 KEY(3, 4, KEY_U),
79 KEY(4, 4, KEY_ENTER),
80 KEY(0, 5, KEY_V),
81 KEY(1, 5, KEY_W),
82 KEY(2, 5, KEY_L),
83 KEY(3, 5, KEY_S),
84 KEY(4, 5, KEY_ENTER),
87 static struct mtd_partition h4_partitions[] = {
88 /* bootloader (U-Boot, etc) in first sector */
90 .name = "bootloader",
91 .offset = 0,
92 .size = SZ_128K,
93 .mask_flags = MTD_WRITEABLE, /* force read-only */
95 /* bootloader params in the next sector */
97 .name = "params",
98 .offset = MTDPART_OFS_APPEND,
99 .size = SZ_128K,
100 .mask_flags = 0,
102 /* kernel */
104 .name = "kernel",
105 .offset = MTDPART_OFS_APPEND,
106 .size = SZ_2M,
107 .mask_flags = 0
109 /* file system */
111 .name = "filesystem",
112 .offset = MTDPART_OFS_APPEND,
113 .size = MTDPART_SIZ_FULL,
114 .mask_flags = 0
118 static struct physmap_flash_data h4_flash_data = {
119 .width = 2,
120 .parts = h4_partitions,
121 .nr_parts = ARRAY_SIZE(h4_partitions),
124 static struct resource h4_flash_resource = {
125 .flags = IORESOURCE_MEM,
128 static struct platform_device h4_flash_device = {
129 .name = "physmap-flash",
130 .id = 0,
131 .dev = {
132 .platform_data = &h4_flash_data,
134 .num_resources = 1,
135 .resource = &h4_flash_resource,
138 static const struct matrix_keymap_data h4_keymap_data = {
139 .keymap = h4_keymap,
140 .keymap_size = ARRAY_SIZE(h4_keymap),
143 static struct omap_kp_platform_data h4_kp_data = {
144 .rows = 6,
145 .cols = 7,
146 .keymap_data = &h4_keymap_data,
147 .rep = true,
148 .row_gpios = row_gpios,
149 .col_gpios = col_gpios,
152 static struct platform_device h4_kp_device = {
153 .name = "omap-keypad",
154 .id = -1,
155 .dev = {
156 .platform_data = &h4_kp_data,
160 static struct platform_device h4_lcd_device = {
161 .name = "lcd_h4",
162 .id = -1,
165 static struct platform_device *h4_devices[] __initdata = {
166 &h4_flash_device,
167 &h4_kp_device,
168 &h4_lcd_device,
171 /* 2420 Sysboot setup (2430 is different) */
172 static u32 get_sysboot_value(void)
174 return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) &
175 (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK |
176 OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK |
177 OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK));
180 /* H4-2420's always used muxed mode, H4-2422's always use non-muxed
182 * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423
183 * correctly. The macro needs to look at production_id not just hawkeye.
185 static u32 is_gpmc_muxed(void)
187 u32 mux;
188 mux = get_sysboot_value();
189 if ((mux & 0xF) == 0xd)
190 return 1; /* NAND config (could be either) */
191 if (mux & 0x2) /* if mux'ed */
192 return 1;
193 else
194 return 0;
197 static inline void __init h4_init_debug(void)
199 int eth_cs;
200 unsigned long cs_mem_base;
201 unsigned int muxed, rate;
202 struct clk *gpmc_fck;
204 eth_cs = H4_SMC91X_CS;
206 gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */
207 if (IS_ERR(gpmc_fck)) {
208 WARN_ON(1);
209 return;
212 clk_enable(gpmc_fck);
213 rate = clk_get_rate(gpmc_fck);
214 clk_disable(gpmc_fck);
215 clk_put(gpmc_fck);
217 if (is_gpmc_muxed())
218 muxed = 0x200;
219 else
220 muxed = 0;
222 /* Make sure CS1 timings are correct */
223 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
224 0x00011000 | muxed);
226 if (rate >= 160000000) {
227 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
228 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
229 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
230 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
231 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
232 } else if (rate >= 130000000) {
233 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
234 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
235 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
236 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
237 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
238 } else {/* rate = 100000000 */
239 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
240 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
241 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
242 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
243 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
246 if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
247 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
248 goto out;
251 udelay(100);
253 omap_mux_init_gpio(92, 0);
254 if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0)
255 gpmc_cs_free(eth_cs);
257 out:
258 clk_disable(gpmc_fck);
259 clk_put(gpmc_fck);
262 static void __init h4_init_flash(void)
264 unsigned long base;
266 if (gpmc_cs_request(H4_FLASH_CS, SZ_64M, &base) < 0) {
267 printk("Can't request GPMC CS for flash\n");
268 return;
270 h4_flash_resource.start = base;
271 h4_flash_resource.end = base + SZ_64M - 1;
274 static struct omap_lcd_config h4_lcd_config __initdata = {
275 .ctrl_name = "internal",
278 static struct omap_usb_config h4_usb_config __initdata = {
279 /* S1.10 OFF -- usb "download port"
280 * usb0 switched to Mini-B port and isp1105 transceiver;
281 * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
283 .register_dev = 1,
284 .pins[0] = 3,
285 /* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */
286 .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
289 static struct omap_board_config_kernel h4_config[] __initdata = {
290 { OMAP_TAG_LCD, &h4_lcd_config },
293 static void __init omap_h4_init_early(void)
295 omap2_init_common_infrastructure();
296 omap2_init_common_devices(NULL, NULL);
299 static void __init omap_h4_init_irq(void)
301 omap_init_irq();
304 static struct at24_platform_data m24c01 = {
305 .byte_len = SZ_1K / 8,
306 .page_size = 16,
309 static struct i2c_board_info __initdata h4_i2c_board_info[] = {
311 I2C_BOARD_INFO("isp1301_omap", 0x2d),
312 .irq = OMAP_GPIO_IRQ(125),
314 { /* EEPROM on mainboard */
315 I2C_BOARD_INFO("24c01", 0x52),
316 .platform_data = &m24c01,
318 { /* EEPROM on cpu card */
319 I2C_BOARD_INFO("24c01", 0x57),
320 .platform_data = &m24c01,
324 #ifdef CONFIG_OMAP_MUX
325 static struct omap_board_mux board_mux[] __initdata = {
326 { .reg_offset = OMAP_MUX_TERMINATOR },
328 #endif
330 static void __init omap_h4_init(void)
332 omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAF);
334 omap_board_config = h4_config;
335 omap_board_config_size = ARRAY_SIZE(h4_config);
338 * Make sure the serial ports are muxed on at this point.
339 * You have to mux them off in device drivers later on
340 * if not needed.
343 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
344 omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP);
345 omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP);
346 omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP);
347 omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
348 if (omap_has_menelaus()) {
349 omap_mux_init_signal("sdrc_a14.gpio0",
350 OMAP_PULL_ENA | OMAP_PULL_UP);
351 omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
352 omap_mux_init_signal("gpio_98", 0);
353 row_gpios[5] = 0;
354 col_gpios[2] = 15;
355 col_gpios[6] = 18;
356 } else {
357 omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP);
358 omap_mux_init_signal("gpio_100", 0);
359 omap_mux_init_signal("gpio_98", 0);
361 omap_mux_init_signal("gpio_90", 0);
362 omap_mux_init_signal("gpio_91", 0);
363 omap_mux_init_signal("gpio_36", 0);
364 omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
365 omap_mux_init_signal("gpio_97", 0);
366 #endif
368 i2c_register_board_info(1, h4_i2c_board_info,
369 ARRAY_SIZE(h4_i2c_board_info));
371 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
372 omap2_usbfs_init(&h4_usb_config);
373 omap_serial_init();
374 h4_init_flash();
377 static void __init omap_h4_map_io(void)
379 omap2_set_globals_242x();
380 omap242x_map_common_io();
383 MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
384 /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
385 .boot_params = 0x80000100,
386 .reserve = omap_reserve,
387 .map_io = omap_h4_map_io,
388 .init_early = omap_h4_init_early,
389 .init_irq = omap_h4_init_irq,
390 .init_machine = omap_h4_init,
391 .timer = &omap_timer,
392 MACHINE_END