Add KEY_MICMUTE and enable it on Lenovo X220
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / alpha / kernel / sys_ruffian.c
blob8de1046fe91e7f635decef2e2b08aa8d003977ca
1 /*
2 * linux/arch/alpha/kernel/sys_ruffian.c
4 * Copyright (C) 1995 David A Rusling
5 * Copyright (C) 1996 Jay A Estabrook
6 * Copyright (C) 1998, 1999, 2000 Richard Henderson
8 * Code supporting the RUFFIAN.
9 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/mm.h>
14 #include <linux/sched.h>
15 #include <linux/pci.h>
16 #include <linux/ioport.h>
17 #include <linux/timex.h>
18 #include <linux/init.h>
20 #include <asm/ptrace.h>
21 #include <asm/system.h>
22 #include <asm/dma.h>
23 #include <asm/irq.h>
24 #include <asm/mmu_context.h>
25 #include <asm/io.h>
26 #include <asm/pgtable.h>
27 #include <asm/core_cia.h>
28 #include <asm/tlbflush.h>
29 #include <asm/8253pit.h>
31 #include "proto.h"
32 #include "irq_impl.h"
33 #include "pci_impl.h"
34 #include "machvec_impl.h"
37 static void __init
38 ruffian_init_irq(void)
40 /* Invert 6&7 for i82371 */
41 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb();
42 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */
44 outb(0x11,0xA0);
45 outb(0x08,0xA1);
46 outb(0x02,0xA1);
47 outb(0x01,0xA1);
48 outb(0xFF,0xA1);
50 outb(0x11,0x20);
51 outb(0x00,0x21);
52 outb(0x04,0x21);
53 outb(0x01,0x21);
54 outb(0xFF,0x21);
56 /* Finish writing the 82C59A PIC Operation Control Words */
57 outb(0x20,0xA0);
58 outb(0x20,0x20);
60 init_i8259a_irqs();
62 /* Not interested in the bogus interrupts (0,3,6),
63 NMI (1), HALT (2), flash (5), or 21142 (8). */
64 init_pyxis_irqs(0x16f0000);
66 common_init_isa_dma();
69 #define RUFFIAN_LATCH DIV_ROUND_CLOSEST(PIT_TICK_RATE, HZ)
71 static void __init
72 ruffian_init_rtc(void)
74 /* Ruffian does not have the RTC connected to the CPU timer
75 interrupt. Instead, it uses the PIT connected to IRQ 0. */
77 /* Setup interval timer. */
78 outb(0x34, 0x43); /* binary, mode 2, LSB/MSB, ch 0 */
79 outb(RUFFIAN_LATCH & 0xff, 0x40); /* LSB */
80 outb(RUFFIAN_LATCH >> 8, 0x40); /* MSB */
82 outb(0xb6, 0x43); /* pit counter 2: speaker */
83 outb(0x31, 0x42);
84 outb(0x13, 0x42);
86 setup_irq(0, &timer_irqaction);
89 static void
90 ruffian_kill_arch (int mode)
92 cia_kill_arch(mode);
93 #if 0
94 /* This only causes re-entry to ARCSBIOS */
95 /* Perhaps this works for other PYXIS as well? */
96 *(vuip) PYXIS_RESET = 0x0000dead;
97 mb();
98 #endif
102 * Interrupt routing:
104 * Primary bus
105 * IdSel INTA INTB INTC INTD
106 * 21052 13 - - - -
107 * SIO 14 23 - - -
108 * 21143 15 44 - - -
109 * Slot 0 17 43 42 41 40
111 * Secondary bus
112 * IdSel INTA INTB INTC INTD
113 * Slot 0 8 (18) 19 18 17 16
114 * Slot 1 9 (19) 31 30 29 28
115 * Slot 2 10 (20) 27 26 25 24
116 * Slot 3 11 (21) 39 38 37 36
117 * Slot 4 12 (22) 35 34 33 32
118 * 53c875 13 (23) 20 - - -
122 static int __init
123 ruffian_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
125 static char irq_tab[11][5] __initdata = {
126 /*INT INTA INTB INTC INTD */
127 {-1, -1, -1, -1, -1}, /* IdSel 13, 21052 */
128 {-1, -1, -1, -1, -1}, /* IdSel 14, SIO */
129 {44, 44, 44, 44, 44}, /* IdSel 15, 21143 */
130 {-1, -1, -1, -1, -1}, /* IdSel 16, none */
131 {43, 43, 42, 41, 40}, /* IdSel 17, 64-bit slot */
132 /* the next 6 are actually on PCI bus 1, across the bridge */
133 {19, 19, 18, 17, 16}, /* IdSel 8, slot 0 */
134 {31, 31, 30, 29, 28}, /* IdSel 9, slot 1 */
135 {27, 27, 26, 25, 24}, /* IdSel 10, slot 2 */
136 {39, 39, 38, 37, 36}, /* IdSel 11, slot 3 */
137 {35, 35, 34, 33, 32}, /* IdSel 12, slot 4 */
138 {20, 20, 20, 20, 20}, /* IdSel 13, 53c875 */
140 const long min_idsel = 13, max_idsel = 23, irqs_per_slot = 5;
141 return COMMON_TABLE_LOOKUP;
144 static u8 __init
145 ruffian_swizzle(struct pci_dev *dev, u8 *pinp)
147 int slot, pin = *pinp;
149 if (dev->bus->number == 0) {
150 slot = PCI_SLOT(dev->devfn);
152 /* Check for the built-in bridge. */
153 else if (PCI_SLOT(dev->bus->self->devfn) == 13) {
154 slot = PCI_SLOT(dev->devfn) + 10;
156 else
158 /* Must be a card-based bridge. */
159 do {
160 if (PCI_SLOT(dev->bus->self->devfn) == 13) {
161 slot = PCI_SLOT(dev->devfn) + 10;
162 break;
164 pin = pci_swizzle_interrupt_pin(dev, pin);
166 /* Move up the chain of bridges. */
167 dev = dev->bus->self;
168 /* Slot of the next bridge. */
169 slot = PCI_SLOT(dev->devfn);
170 } while (dev->bus->self);
172 *pinp = pin;
173 return slot;
176 #ifdef BUILDING_FOR_MILO
178 * The DeskStation Ruffian motherboard firmware does not place
179 * the memory size in the PALimpure area. Therefore, we use
180 * the Bank Configuration Registers in PYXIS to obtain the size.
182 static unsigned long __init
183 ruffian_get_bank_size(unsigned long offset)
185 unsigned long bank_addr, bank, ret = 0;
187 /* Valid offsets are: 0x800, 0x840 and 0x880
188 since Ruffian only uses three banks. */
189 bank_addr = (unsigned long)PYXIS_MCR + offset;
190 bank = *(vulp)bank_addr;
192 /* Check BANK_ENABLE */
193 if (bank & 0x01) {
194 static unsigned long size[] __initdata = {
195 0x40000000UL, /* 0x00, 1G */
196 0x20000000UL, /* 0x02, 512M */
197 0x10000000UL, /* 0x04, 256M */
198 0x08000000UL, /* 0x06, 128M */
199 0x04000000UL, /* 0x08, 64M */
200 0x02000000UL, /* 0x0a, 32M */
201 0x01000000UL, /* 0x0c, 16M */
202 0x00800000UL, /* 0x0e, 8M */
203 0x80000000UL, /* 0x10, 2G */
206 bank = (bank & 0x1e) >> 1;
207 if (bank < ARRAY_SIZE(size))
208 ret = size[bank];
211 return ret;
213 #endif /* BUILDING_FOR_MILO */
216 * The System Vector
219 struct alpha_machine_vector ruffian_mv __initmv = {
220 .vector_name = "Ruffian",
221 DO_EV5_MMU,
222 DO_DEFAULT_RTC,
223 DO_PYXIS_IO,
224 .machine_check = cia_machine_check,
225 .max_isa_dma_address = ALPHA_RUFFIAN_MAX_ISA_DMA_ADDRESS,
226 .min_io_address = DEFAULT_IO_BASE,
227 .min_mem_address = DEFAULT_MEM_BASE,
228 .pci_dac_offset = PYXIS_DAC_OFFSET,
230 .nr_irqs = 48,
231 .device_interrupt = pyxis_device_interrupt,
233 .init_arch = pyxis_init_arch,
234 .init_irq = ruffian_init_irq,
235 .init_rtc = ruffian_init_rtc,
236 .init_pci = cia_init_pci,
237 .kill_arch = ruffian_kill_arch,
238 .pci_map_irq = ruffian_map_irq,
239 .pci_swizzle = ruffian_swizzle,
241 ALIAS_MV(ruffian)