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ath9k: use common API to avoid code duplication
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blob91af57c48581c80b7ef5a6f4e8c12d3e303cd520
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34 /*
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
44 */
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69 {
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
77 return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105 /*
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
109 */
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217 {
218 struct ath_hw *ah = sc->sc_ah;
219 struct ath_common *common = ath9k_hw_common(ah);
220 struct ieee80211_conf *conf = &common->hw->conf;
221 bool fastcc = true, stopped;
222 struct ieee80211_channel *channel = hw->conf.channel;
223 struct ath9k_hw_cal_data *caldata = NULL;
224 int r;
225
226 if (sc->sc_flags & SC_OP_INVALID)
227 return -EIO;
228
229 del_timer_sync(&common->ani.timer);
230 cancel_work_sync(&sc->paprd_work);
231 cancel_work_sync(&sc->hw_check_work);
232 cancel_delayed_work_sync(&sc->tx_complete_work);
233 cancel_delayed_work_sync(&sc->hw_pll_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239 /*
240 * This is only performed if the channel settings have
241 * actually changed.
242 *
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
247 */
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254 if (!ath9k_hw_check_alive(ah))
255 stopped = false;
256
257 /* XXX: do not flush receive queue here. We don't want
258 * to flush data frames already in queue because of
259 * changing channel. */
260
261 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
262 fastcc = false;
263
264 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
265 caldata = &sc->caldata;
266
267 ath_dbg(common, ATH_DBG_CONFIG,
268 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
269 sc->sc_ah->curchan->channel,
270 channel->center_freq, conf_is_ht40(conf),
271 fastcc);
272
273 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
274 if (r) {
275 ath_err(common,
276 "Unable to reset channel (%u MHz), reset status %d\n",
277 channel->center_freq, r);
278 goto ps_restore;
279 }
280
281 if (ath_startrecv(sc) != 0) {
282 ath_err(common, "Unable to restart recv logic\n");
283 r = -EIO;
284 goto ps_restore;
285 }
286
287 ath_update_txpow(sc);
288 ath9k_hw_set_interrupts(ah, ah->imask);
289
290 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
291 if (sc->sc_flags & SC_OP_BEACONS)
292 ath_beacon_config(sc, NULL);
293 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
294 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
295 ath_start_ani(common);
296 }
297
298 ps_restore:
299 ieee80211_wake_queues(hw);
300
301 spin_unlock_bh(&sc->sc_pcu_lock);
302
303 ath9k_ps_restore(sc);
304 return r;
305 }
306
307 static void ath_paprd_activate(struct ath_softc *sc)
308 {
309 struct ath_hw *ah = sc->sc_ah;
310 struct ath9k_hw_cal_data *caldata = ah->caldata;
311 struct ath_common *common = ath9k_hw_common(ah);
312 int chain;
313
314 if (!caldata || !caldata->paprd_done)
315 return;
316
317 ath9k_ps_wakeup(sc);
318 ar9003_paprd_enable(ah, false);
319 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
320 if (!(common->tx_chainmask & BIT(chain)))
321 continue;
322
323 ar9003_paprd_populate_single_table(ah, caldata, chain);
324 }
325
326 ar9003_paprd_enable(ah, true);
327 ath9k_ps_restore(sc);
328 }
329
330 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
331 {
332 struct ieee80211_hw *hw = sc->hw;
333 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
334 struct ath_tx_control txctl;
335 int time_left;
336
337 memset(&txctl, 0, sizeof(txctl));
338 txctl.txq = sc->tx.txq_map[WME_AC_BE];
339
340 memset(tx_info, 0, sizeof(*tx_info));
341 tx_info->band = hw->conf.channel->band;
342 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
343 tx_info->control.rates[0].idx = 0;
344 tx_info->control.rates[0].count = 1;
345 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
346 tx_info->control.rates[1].idx = -1;
347
348 init_completion(&sc->paprd_complete);
349 sc->paprd_pending = true;
350 txctl.paprd = BIT(chain);
351 if (ath_tx_start(hw, skb, &txctl) != 0)
352 return false;
353
354 time_left = wait_for_completion_timeout(&sc->paprd_complete,
355 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
356 sc->paprd_pending = false;
357
358 if (!time_left)
359 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
360 "Timeout waiting for paprd training on TX chain %d\n",
361 chain);
362
363 return !!time_left;
364 }
365
366 void ath_paprd_calibrate(struct work_struct *work)
367 {
368 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
369 struct ieee80211_hw *hw = sc->hw;
370 struct ath_hw *ah = sc->sc_ah;
371 struct ieee80211_hdr *hdr;
372 struct sk_buff *skb = NULL;
373 struct ath9k_hw_cal_data *caldata = ah->caldata;
374 struct ath_common *common = ath9k_hw_common(ah);
375 int ftype;
376 int chain_ok = 0;
377 int chain;
378 int len = 1800;
379
380 if (!caldata)
381 return;
382
383 if (ar9003_paprd_init_table(ah) < 0)
384 return;
385
386 skb = alloc_skb(len, GFP_KERNEL);
387 if (!skb)
388 return;
389
390 skb_put(skb, len);
391 memset(skb->data, 0, len);
392 hdr = (struct ieee80211_hdr *)skb->data;
393 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
394 hdr->frame_control = cpu_to_le16(ftype);
395 hdr->duration_id = cpu_to_le16(10);
396 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
397 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
398 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
399
400 ath9k_ps_wakeup(sc);
401 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
402 if (!(common->tx_chainmask & BIT(chain)))
403 continue;
404
405 chain_ok = 0;
406
407 ath_dbg(common, ATH_DBG_CALIBRATE,
408 "Sending PAPRD frame for thermal measurement "
409 "on chain %d\n", chain);
410 if (!ath_paprd_send_frame(sc, skb, chain))
411 goto fail_paprd;
412
413 ar9003_paprd_setup_gain_table(ah, chain);
414
415 ath_dbg(common, ATH_DBG_CALIBRATE,
416 "Sending PAPRD training frame on chain %d\n", chain);
417 if (!ath_paprd_send_frame(sc, skb, chain))
418 goto fail_paprd;
419
420 if (!ar9003_paprd_is_done(ah))
421 break;
422
423 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
424 break;
425
426 chain_ok = 1;
427 }
428 kfree_skb(skb);
429
430 if (chain_ok) {
431 caldata->paprd_done = true;
432 ath_paprd_activate(sc);
433 }
434
435 fail_paprd:
436 ath9k_ps_restore(sc);
437 }
438
439 /*
440 * This routine performs the periodic noise floor calibration function
441 * that is used to adjust and optimize the chip performance. This
442 * takes environmental changes (location, temperature) into account.
443 * When the task is complete, it reschedules itself depending on the
444 * appropriate interval that was calculated.
445 */
446 void ath_ani_calibrate(unsigned long data)
447 {
448 struct ath_softc *sc = (struct ath_softc *)data;
449 struct ath_hw *ah = sc->sc_ah;
450 struct ath_common *common = ath9k_hw_common(ah);
451 bool longcal = false;
452 bool shortcal = false;
453 bool aniflag = false;
454 unsigned int timestamp = jiffies_to_msecs(jiffies);
455 u32 cal_interval, short_cal_interval, long_cal_interval;
456 unsigned long flags;
457
458 if (ah->caldata && ah->caldata->nfcal_interference)
459 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
460 else
461 long_cal_interval = ATH_LONG_CALINTERVAL;
462
463 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
464 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
465
466 /* Only calibrate if awake */
467 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
468 goto set_timer;
469
470 ath9k_ps_wakeup(sc);
471
472 /* Long calibration runs independently of short calibration. */
473 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
474 longcal = true;
475 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
476 common->ani.longcal_timer = timestamp;
477 }
478
479 /* Short calibration applies only while caldone is false */
480 if (!common->ani.caldone) {
481 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
482 shortcal = true;
483 ath_dbg(common, ATH_DBG_ANI,
484 "shortcal @%lu\n", jiffies);
485 common->ani.shortcal_timer = timestamp;
486 common->ani.resetcal_timer = timestamp;
487 }
488 } else {
489 if ((timestamp - common->ani.resetcal_timer) >=
490 ATH_RESTART_CALINTERVAL) {
491 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
492 if (common->ani.caldone)
493 common->ani.resetcal_timer = timestamp;
494 }
495 }
496
497 /* Verify whether we must check ANI */
498 if ((timestamp - common->ani.checkani_timer) >=
499 ah->config.ani_poll_interval) {
500 aniflag = true;
501 common->ani.checkani_timer = timestamp;
502 }
503
504 /* Skip all processing if there's nothing to do. */
505 if (longcal || shortcal || aniflag) {
506 /* Call ANI routine if necessary */
507 if (aniflag) {
508 spin_lock_irqsave(&common->cc_lock, flags);
509 ath9k_hw_ani_monitor(ah, ah->curchan);
510 ath_update_survey_stats(sc);
511 spin_unlock_irqrestore(&common->cc_lock, flags);
512 }
513
514 /* Perform calibration if necessary */
515 if (longcal || shortcal) {
516 common->ani.caldone =
517 ath9k_hw_calibrate(ah,
518 ah->curchan,
519 common->rx_chainmask,
520 longcal);
521 }
522 }
523
524 ath9k_ps_restore(sc);
525
526 set_timer:
527 /*
528 * Set timer interval based on previous results.
529 * The interval must be the shortest necessary to satisfy ANI,
530 * short calibration and long calibration.
531 */
532 cal_interval = ATH_LONG_CALINTERVAL;
533 if (sc->sc_ah->config.enable_ani)
534 cal_interval = min(cal_interval,
535 (u32)ah->config.ani_poll_interval);
536 if (!common->ani.caldone)
537 cal_interval = min(cal_interval, (u32)short_cal_interval);
538
539 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
540 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
541 if (!ah->caldata->paprd_done)
542 ieee80211_queue_work(sc->hw, &sc->paprd_work);
543 else if (!ah->paprd_table_write_done)
544 ath_paprd_activate(sc);
545 }
546 }
547
548 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
549 {
550 struct ath_node *an;
551 struct ath_hw *ah = sc->sc_ah;
552 an = (struct ath_node *)sta->drv_priv;
553
554 #ifdef CONFIG_ATH9K_DEBUGFS
555 spin_lock(&sc->nodes_lock);
556 list_add(&an->list, &sc->nodes);
557 spin_unlock(&sc->nodes_lock);
558 an->sta = sta;
559 #endif
560 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
561 sc->sc_flags |= SC_OP_ENABLE_APM;
562
563 if (sc->sc_flags & SC_OP_TXAGGR) {
564 ath_tx_node_init(sc, an);
565 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
566 sta->ht_cap.ampdu_factor);
567 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
568 }
569 }
570
571 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
572 {
573 struct ath_node *an = (struct ath_node *)sta->drv_priv;
574
575 #ifdef CONFIG_ATH9K_DEBUGFS
576 spin_lock(&sc->nodes_lock);
577 list_del(&an->list);
578 spin_unlock(&sc->nodes_lock);
579 an->sta = NULL;
580 #endif
581
582 if (sc->sc_flags & SC_OP_TXAGGR)
583 ath_tx_node_cleanup(sc, an);
584 }
585
586 void ath_hw_check(struct work_struct *work)
587 {
588 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
589 int i;
590
591 ath9k_ps_wakeup(sc);
592
593 for (i = 0; i < 3; i++) {
594 if (ath9k_hw_check_alive(sc->sc_ah))
595 goto out;
596
597 msleep(1);
598 }
599 ath_reset(sc, true);
600
601 out:
602 ath9k_ps_restore(sc);
603 }
604
605 void ath9k_tasklet(unsigned long data)
606 {
607 struct ath_softc *sc = (struct ath_softc *)data;
608 struct ath_hw *ah = sc->sc_ah;
609 struct ath_common *common = ath9k_hw_common(ah);
610
611 u32 status = sc->intrstatus;
612 u32 rxmask;
613
614 ath9k_ps_wakeup(sc);
615
616 if (status & ATH9K_INT_FATAL) {
617 ath_reset(sc, true);
618 ath9k_ps_restore(sc);
619 return;
620 }
621
622 spin_lock(&sc->sc_pcu_lock);
623
624 /*
625 * Only run the baseband hang check if beacons stop working in AP or
626 * IBSS mode, because it has a high false positive rate. For station
627 * mode it should not be necessary, since the upper layers will detect
628 * this through a beacon miss automatically and the following channel
629 * change will trigger a hardware reset anyway
630 */
631 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
632 !ath9k_hw_check_alive(ah))
633 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
634
635 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
636 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
637 ATH9K_INT_RXORN);
638 else
639 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
640
641 if (status & rxmask) {
642 /* Check for high priority Rx first */
643 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
644 (status & ATH9K_INT_RXHP))
645 ath_rx_tasklet(sc, 0, true);
646
647 ath_rx_tasklet(sc, 0, false);
648 }
649
650 if (status & ATH9K_INT_TX) {
651 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
652 ath_tx_edma_tasklet(sc);
653 else
654 ath_tx_tasklet(sc);
655 }
656
657 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
658 /*
659 * TSF sync does not look correct; remain awake to sync with
660 * the next Beacon.
661 */
662 ath_dbg(common, ATH_DBG_PS,
663 "TSFOOR - Sync with next Beacon\n");
664 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
665 }
666
667 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
668 if (status & ATH9K_INT_GENTIMER)
669 ath_gen_timer_isr(sc->sc_ah);
670
671 /* re-enable hardware interrupt */
672 ath9k_hw_enable_interrupts(ah);
673
674 spin_unlock(&sc->sc_pcu_lock);
675 ath9k_ps_restore(sc);
676 }
677
678 irqreturn_t ath_isr(int irq, void *dev)
679 {
680 #define SCHED_INTR ( \
681 ATH9K_INT_FATAL | \
682 ATH9K_INT_RXORN | \
683 ATH9K_INT_RXEOL | \
684 ATH9K_INT_RX | \
685 ATH9K_INT_RXLP | \
686 ATH9K_INT_RXHP | \
687 ATH9K_INT_TX | \
688 ATH9K_INT_BMISS | \
689 ATH9K_INT_CST | \
690 ATH9K_INT_TSFOOR | \
691 ATH9K_INT_GENTIMER)
692
693 struct ath_softc *sc = dev;
694 struct ath_hw *ah = sc->sc_ah;
695 struct ath_common *common = ath9k_hw_common(ah);
696 enum ath9k_int status;
697 bool sched = false;
698
699 /*
700 * The hardware is not ready/present, don't
701 * touch anything. Note this can happen early
702 * on if the IRQ is shared.
703 */
704 if (sc->sc_flags & SC_OP_INVALID)
705 return IRQ_NONE;
706
707
708 /* shared irq, not for us */
709
710 if (!ath9k_hw_intrpend(ah))
711 return IRQ_NONE;
712
713 /*
714 * Figure out the reason(s) for the interrupt. Note
715 * that the hal returns a pseudo-ISR that may include
716 * bits we haven't explicitly enabled so we mask the
717 * value to insure we only process bits we requested.
718 */
719 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
720 status &= ah->imask; /* discard unasked-for bits */
721
722 /*
723 * If there are no status bits set, then this interrupt was not
724 * for me (should have been caught above).
725 */
726 if (!status)
727 return IRQ_NONE;
728
729 /* Cache the status */
730 sc->intrstatus = status;
731
732 if (status & SCHED_INTR)
733 sched = true;
734
735 /*
736 * If a FATAL or RXORN interrupt is received, we have to reset the
737 * chip immediately.
738 */
739 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
740 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
741 goto chip_reset;
742
743 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
744 (status & ATH9K_INT_BB_WATCHDOG)) {
745
746 spin_lock(&common->cc_lock);
747 ath_hw_cycle_counters_update(common);
748 ar9003_hw_bb_watchdog_dbg_info(ah);
749 spin_unlock(&common->cc_lock);
750
751 goto chip_reset;
752 }
753
754 if (status & ATH9K_INT_SWBA)
755 tasklet_schedule(&sc->bcon_tasklet);
756
757 if (status & ATH9K_INT_TXURN)
758 ath9k_hw_updatetxtriglevel(ah, true);
759
760 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
761 if (status & ATH9K_INT_RXEOL) {
762 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
763 ath9k_hw_set_interrupts(ah, ah->imask);
764 }
765 }
766
767 if (status & ATH9K_INT_MIB) {
768 /*
769 * Disable interrupts until we service the MIB
770 * interrupt; otherwise it will continue to
771 * fire.
772 */
773 ath9k_hw_disable_interrupts(ah);
774 /*
775 * Let the hal handle the event. We assume
776 * it will clear whatever condition caused
777 * the interrupt.
778 */
779 spin_lock(&common->cc_lock);
780 ath9k_hw_proc_mib_event(ah);
781 spin_unlock(&common->cc_lock);
782 ath9k_hw_enable_interrupts(ah);
783 }
784
785 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
786 if (status & ATH9K_INT_TIM_TIMER) {
787 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
788 goto chip_reset;
789 /* Clear RxAbort bit so that we can
790 * receive frames */
791 ath9k_setpower(sc, ATH9K_PM_AWAKE);
792 ath9k_hw_setrxabort(sc->sc_ah, 0);
793 sc->ps_flags |= PS_WAIT_FOR_BEACON;
794 }
795
796 chip_reset:
797
798 ath_debug_stat_interrupt(sc, status);
799
800 if (sched) {
801 /* turn off every interrupt */
802 ath9k_hw_disable_interrupts(ah);
803 tasklet_schedule(&sc->intr_tq);
804 }
805
806 return IRQ_HANDLED;
807
808 #undef SCHED_INTR
809 }
810
811 static void ath9k_bss_assoc_info(struct ath_softc *sc,
812 struct ieee80211_hw *hw,
813 struct ieee80211_vif *vif,
814 struct ieee80211_bss_conf *bss_conf)
815 {
816 struct ath_hw *ah = sc->sc_ah;
817 struct ath_common *common = ath9k_hw_common(ah);
818
819 if (bss_conf->assoc) {
820 ath_dbg(common, ATH_DBG_CONFIG,
821 "Bss Info ASSOC %d, bssid: %pM\n",
822 bss_conf->aid, common->curbssid);
823
824 /* New association, store aid */
825 common->curaid = bss_conf->aid;
826 ath9k_hw_write_associd(ah);
827
828 /*
829 * Request a re-configuration of Beacon related timers
830 * on the receipt of the first Beacon frame (i.e.,
831 * after time sync with the AP).
832 */
833 sc->ps_flags |= PS_BEACON_SYNC;
834
835 /* Configure the beacon */
836 ath_beacon_config(sc, vif);
837
838 /* Reset rssi stats */
839 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
840 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
841
842 sc->sc_flags |= SC_OP_ANI_RUN;
843 ath_start_ani(common);
844 } else {
845 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
846 common->curaid = 0;
847 /* Stop ANI */
848 sc->sc_flags &= ~SC_OP_ANI_RUN;
849 del_timer_sync(&common->ani.timer);
850 }
851 }
852
853 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
854 {
855 struct ath_hw *ah = sc->sc_ah;
856 struct ath_common *common = ath9k_hw_common(ah);
857 struct ieee80211_channel *channel = hw->conf.channel;
858 int r;
859
860 ath9k_ps_wakeup(sc);
861 spin_lock_bh(&sc->sc_pcu_lock);
862
863 ath9k_hw_configpcipowersave(ah, 0, 0);
864
865 if (!ah->curchan)
866 ah->curchan = ath_get_curchannel(sc, sc->hw);
867
868 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
869 if (r) {
870 ath_err(common,
871 "Unable to reset channel (%u MHz), reset status %d\n",
872 channel->center_freq, r);
873 }
874
875 ath_update_txpow(sc);
876 if (ath_startrecv(sc) != 0) {
877 ath_err(common, "Unable to restart recv logic\n");
878 goto out;
879 }
880 if (sc->sc_flags & SC_OP_BEACONS)
881 ath_beacon_config(sc, NULL); /* restart beacons */
882
883 /* Re-Enable interrupts */
884 ath9k_hw_set_interrupts(ah, ah->imask);
885
886 /* Enable LED */
887 ath9k_hw_cfg_output(ah, ah->led_pin,
888 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
889 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
890
891 ieee80211_wake_queues(hw);
892 out:
893 spin_unlock_bh(&sc->sc_pcu_lock);
894
895 ath9k_ps_restore(sc);
896 }
897
898 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
899 {
900 struct ath_hw *ah = sc->sc_ah;
901 struct ieee80211_channel *channel = hw->conf.channel;
902 int r;
903
904 ath9k_ps_wakeup(sc);
905 spin_lock_bh(&sc->sc_pcu_lock);
906
907 ieee80211_stop_queues(hw);
908
909 /*
910 * Keep the LED on when the radio is disabled
911 * during idle unassociated state.
912 */
913 if (!sc->ps_idle) {
914 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
915 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
916 }
917
918 /* Disable interrupts */
919 ath9k_hw_disable_interrupts(ah);
920
921 ath_drain_all_txq(sc, false); /* clear pending tx frames */
922
923 ath_stoprecv(sc); /* turn off frame recv */
924 ath_flushrecv(sc); /* flush recv queue */
925
926 if (!ah->curchan)
927 ah->curchan = ath_get_curchannel(sc, hw);
928
929 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
930 if (r) {
931 ath_err(ath9k_hw_common(sc->sc_ah),
932 "Unable to reset channel (%u MHz), reset status %d\n",
933 channel->center_freq, r);
934 }
935
936 ath9k_hw_phy_disable(ah);
937
938 ath9k_hw_configpcipowersave(ah, 1, 1);
939
940 spin_unlock_bh(&sc->sc_pcu_lock);
941 ath9k_ps_restore(sc);
942
943 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
944 }
945
946 int ath_reset(struct ath_softc *sc, bool retry_tx)
947 {
948 struct ath_hw *ah = sc->sc_ah;
949 struct ath_common *common = ath9k_hw_common(ah);
950 struct ieee80211_hw *hw = sc->hw;
951 int r;
952
953 /* Stop ANI */
954 del_timer_sync(&common->ani.timer);
955
956 spin_lock_bh(&sc->sc_pcu_lock);
957
958 ieee80211_stop_queues(hw);
959
960 ath9k_hw_disable_interrupts(ah);
961 ath_drain_all_txq(sc, retry_tx);
962
963 ath_stoprecv(sc);
964 ath_flushrecv(sc);
965
966 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
967 if (r)
968 ath_err(common,
969 "Unable to reset hardware; reset status %d\n", r);
970
971 if (ath_startrecv(sc) != 0)
972 ath_err(common, "Unable to start recv logic\n");
973
974 /*
975 * We may be doing a reset in response to a request
976 * that changes the channel so update any state that
977 * might change as a result.
978 */
979 ath_update_txpow(sc);
980
981 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
982 ath_beacon_config(sc, NULL); /* restart beacons */
983
984 ath9k_hw_set_interrupts(ah, ah->imask);
985
986 if (retry_tx) {
987 int i;
988 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
989 if (ATH_TXQ_SETUP(sc, i)) {
990 spin_lock_bh(&sc->tx.txq[i].axq_lock);
991 ath_txq_schedule(sc, &sc->tx.txq[i]);
992 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
993 }
994 }
995 }
996
997 ieee80211_wake_queues(hw);
998 spin_unlock_bh(&sc->sc_pcu_lock);
999
1000 /* Start ANI */
1001 ath_start_ani(common);
1002
1003 return r;
1004 }
1005
1006 /**********************/
1007 /* mac80211 callbacks */
1008 /**********************/
1009
1010 static int ath9k_start(struct ieee80211_hw *hw)
1011 {
1012 struct ath_softc *sc = hw->priv;
1013 struct ath_hw *ah = sc->sc_ah;
1014 struct ath_common *common = ath9k_hw_common(ah);
1015 struct ieee80211_channel *curchan = hw->conf.channel;
1016 struct ath9k_channel *init_channel;
1017 int r;
1018
1019 ath_dbg(common, ATH_DBG_CONFIG,
1020 "Starting driver with initial channel: %d MHz\n",
1021 curchan->center_freq);
1022
1023 mutex_lock(&sc->mutex);
1024
1025 /* setup initial channel */
1026 sc->chan_idx = curchan->hw_value;
1027
1028 init_channel = ath_get_curchannel(sc, hw);
1029
1030 /* Reset SERDES registers */
1031 ath9k_hw_configpcipowersave(ah, 0, 0);
1032
1033 /*
1034 * The basic interface to setting the hardware in a good
1035 * state is ``reset''. On return the hardware is known to
1036 * be powered up and with interrupts disabled. This must
1037 * be followed by initialization of the appropriate bits
1038 * and then setup of the interrupt mask.
1039 */
1040 spin_lock_bh(&sc->sc_pcu_lock);
1041 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1042 if (r) {
1043 ath_err(common,
1044 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1045 r, curchan->center_freq);
1046 spin_unlock_bh(&sc->sc_pcu_lock);
1047 goto mutex_unlock;
1048 }
1049
1050 /*
1051 * This is needed only to setup initial state
1052 * but it's best done after a reset.
1053 */
1054 ath_update_txpow(sc);
1055
1056 /*
1057 * Setup the hardware after reset:
1058 * The receive engine is set going.
1059 * Frame transmit is handled entirely
1060 * in the frame output path; there's nothing to do
1061 * here except setup the interrupt mask.
1062 */
1063 if (ath_startrecv(sc) != 0) {
1064 ath_err(common, "Unable to start recv logic\n");
1065 r = -EIO;
1066 spin_unlock_bh(&sc->sc_pcu_lock);
1067 goto mutex_unlock;
1068 }
1069 spin_unlock_bh(&sc->sc_pcu_lock);
1070
1071 /* Setup our intr mask. */
1072 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1073 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1074 ATH9K_INT_GLOBAL;
1075
1076 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1077 ah->imask |= ATH9K_INT_RXHP |
1078 ATH9K_INT_RXLP |
1079 ATH9K_INT_BB_WATCHDOG;
1080 else
1081 ah->imask |= ATH9K_INT_RX;
1082
1083 ah->imask |= ATH9K_INT_GTT;
1084
1085 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1086 ah->imask |= ATH9K_INT_CST;
1087
1088 sc->sc_flags &= ~SC_OP_INVALID;
1089 sc->sc_ah->is_monitoring = false;
1090
1091 /* Disable BMISS interrupt when we're not associated */
1092 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1093 ath9k_hw_set_interrupts(ah, ah->imask);
1094
1095 ieee80211_wake_queues(hw);
1096
1097 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1098
1099 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1100 !ah->btcoex_hw.enabled) {
1101 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1102 AR_STOMP_LOW_WLAN_WGHT);
1103 ath9k_hw_btcoex_enable(ah);
1104
1105 if (common->bus_ops->bt_coex_prep)
1106 common->bus_ops->bt_coex_prep(common);
1107 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1108 ath9k_btcoex_timer_resume(sc);
1109 }
1110
1111 /* User has the option to provide pm-qos value as a module
1112 * parameter rather than using the default value of
1113 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1114 */
1115 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1116
1117 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1118 common->bus_ops->extn_synch_en(common);
1119
1120 mutex_unlock:
1121 mutex_unlock(&sc->mutex);
1122
1123 return r;
1124 }
1125
1126 static int ath9k_tx(struct ieee80211_hw *hw,
1127 struct sk_buff *skb)
1128 {
1129 struct ath_softc *sc = hw->priv;
1130 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1131 struct ath_tx_control txctl;
1132 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1133
1134 if (sc->ps_enabled) {
1135 /*
1136 * mac80211 does not set PM field for normal data frames, so we
1137 * need to update that based on the current PS mode.
1138 */
1139 if (ieee80211_is_data(hdr->frame_control) &&
1140 !ieee80211_is_nullfunc(hdr->frame_control) &&
1141 !ieee80211_has_pm(hdr->frame_control)) {
1142 ath_dbg(common, ATH_DBG_PS,
1143 "Add PM=1 for a TX frame while in PS mode\n");
1144 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1145 }
1146 }
1147
1148 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1149 /*
1150 * We are using PS-Poll and mac80211 can request TX while in
1151 * power save mode. Need to wake up hardware for the TX to be
1152 * completed and if needed, also for RX of buffered frames.
1153 */
1154 ath9k_ps_wakeup(sc);
1155 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1156 ath9k_hw_setrxabort(sc->sc_ah, 0);
1157 if (ieee80211_is_pspoll(hdr->frame_control)) {
1158 ath_dbg(common, ATH_DBG_PS,
1159 "Sending PS-Poll to pick a buffered frame\n");
1160 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1161 } else {
1162 ath_dbg(common, ATH_DBG_PS,
1163 "Wake up to complete TX\n");
1164 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1165 }
1166 /*
1167 * The actual restore operation will happen only after
1168 * the sc_flags bit is cleared. We are just dropping
1169 * the ps_usecount here.
1170 */
1171 ath9k_ps_restore(sc);
1172 }
1173
1174 memset(&txctl, 0, sizeof(struct ath_tx_control));
1175 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1176
1177 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1178
1179 if (ath_tx_start(hw, skb, &txctl) != 0) {
1180 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1181 goto exit;
1182 }
1183
1184 return 0;
1185 exit:
1186 dev_kfree_skb_any(skb);
1187 return 0;
1188 }
1189
1190 static void ath9k_stop(struct ieee80211_hw *hw)
1191 {
1192 struct ath_softc *sc = hw->priv;
1193 struct ath_hw *ah = sc->sc_ah;
1194 struct ath_common *common = ath9k_hw_common(ah);
1195
1196 mutex_lock(&sc->mutex);
1197
1198 if (led_blink)
1199 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1200
1201 cancel_delayed_work_sync(&sc->tx_complete_work);
1202 cancel_delayed_work_sync(&sc->hw_pll_work);
1203 cancel_work_sync(&sc->paprd_work);
1204 cancel_work_sync(&sc->hw_check_work);
1205
1206 if (sc->sc_flags & SC_OP_INVALID) {
1207 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1208 mutex_unlock(&sc->mutex);
1209 return;
1210 }
1211
1212 /* Ensure HW is awake when we try to shut it down. */
1213 ath9k_ps_wakeup(sc);
1214
1215 if (ah->btcoex_hw.enabled) {
1216 ath9k_hw_btcoex_disable(ah);
1217 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1218 ath9k_btcoex_timer_pause(sc);
1219 }
1220
1221 spin_lock_bh(&sc->sc_pcu_lock);
1222
1223 /* make sure h/w will not generate any interrupt
1224 * before setting the invalid flag. */
1225 ath9k_hw_disable_interrupts(ah);
1226
1227 if (!(sc->sc_flags & SC_OP_INVALID)) {
1228 ath_drain_all_txq(sc, false);
1229 ath_stoprecv(sc);
1230 ath9k_hw_phy_disable(ah);
1231 } else
1232 sc->rx.rxlink = NULL;
1233
1234 if (sc->rx.frag) {
1235 dev_kfree_skb_any(sc->rx.frag);
1236 sc->rx.frag = NULL;
1237 }
1238
1239 /* disable HAL and put h/w to sleep */
1240 ath9k_hw_disable(ah);
1241 ath9k_hw_configpcipowersave(ah, 1, 1);
1242
1243 spin_unlock_bh(&sc->sc_pcu_lock);
1244
1245 ath9k_ps_restore(sc);
1246
1247 sc->ps_idle = true;
1248 ath_radio_disable(sc, hw);
1249
1250 sc->sc_flags |= SC_OP_INVALID;
1251
1252 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1253
1254 mutex_unlock(&sc->mutex);
1255
1256 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1257 }
1258
1259 bool ath9k_uses_beacons(int type)
1260 {
1261 switch (type) {
1262 case NL80211_IFTYPE_AP:
1263 case NL80211_IFTYPE_ADHOC:
1264 case NL80211_IFTYPE_MESH_POINT:
1265 return true;
1266 default:
1267 return false;
1268 }
1269 }
1270
1271 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1272 struct ieee80211_vif *vif)
1273 {
1274 struct ath_vif *avp = (void *)vif->drv_priv;
1275
1276 /* Disable SWBA interrupt */
1277 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1278 ath9k_ps_wakeup(sc);
1279 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1280 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1281 tasklet_kill(&sc->bcon_tasklet);
1282 ath9k_ps_restore(sc);
1283
1284 ath_beacon_return(sc, avp);
1285 sc->sc_flags &= ~SC_OP_BEACONS;
1286
1287 if (sc->nbcnvifs > 0) {
1288 /* Re-enable beaconing */
1289 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1290 ath9k_ps_wakeup(sc);
1291 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1292 ath9k_ps_restore(sc);
1293 }
1294 }
1295
1296 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1297 {
1298 struct ath9k_vif_iter_data *iter_data = data;
1299 int i;
1300
1301 if (iter_data->hw_macaddr)
1302 for (i = 0; i < ETH_ALEN; i++)
1303 iter_data->mask[i] &=
1304 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1305
1306 switch (vif->type) {
1307 case NL80211_IFTYPE_AP:
1308 iter_data->naps++;
1309 break;
1310 case NL80211_IFTYPE_STATION:
1311 iter_data->nstations++;
1312 break;
1313 case NL80211_IFTYPE_ADHOC:
1314 iter_data->nadhocs++;
1315 break;
1316 case NL80211_IFTYPE_MESH_POINT:
1317 iter_data->nmeshes++;
1318 break;
1319 case NL80211_IFTYPE_WDS:
1320 iter_data->nwds++;
1321 break;
1322 default:
1323 iter_data->nothers++;
1324 break;
1325 }
1326 }
1327
1328 /* Called with sc->mutex held. */
1329 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1330 struct ieee80211_vif *vif,
1331 struct ath9k_vif_iter_data *iter_data)
1332 {
1333 struct ath_softc *sc = hw->priv;
1334 struct ath_hw *ah = sc->sc_ah;
1335 struct ath_common *common = ath9k_hw_common(ah);
1336
1337 /*
1338 * Use the hardware MAC address as reference, the hardware uses it
1339 * together with the BSSID mask when matching addresses.
1340 */
1341 memset(iter_data, 0, sizeof(*iter_data));
1342 iter_data->hw_macaddr = common->macaddr;
1343 memset(&iter_data->mask, 0xff, ETH_ALEN);
1344
1345 if (vif)
1346 ath9k_vif_iter(iter_data, vif->addr, vif);
1347
1348 /* Get list of all active MAC addresses */
1349 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1350 iter_data);
1351 }
1352
1353 /* Called with sc->mutex held. */
1354 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1355 struct ieee80211_vif *vif)
1356 {
1357 struct ath_softc *sc = hw->priv;
1358 struct ath_hw *ah = sc->sc_ah;
1359 struct ath_common *common = ath9k_hw_common(ah);
1360 struct ath9k_vif_iter_data iter_data;
1361
1362 ath9k_calculate_iter_data(hw, vif, &iter_data);
1363
1364 /* Set BSSID mask. */
1365 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1366 ath_hw_setbssidmask(common);
1367
1368 /* Set op-mode & TSF */
1369 if (iter_data.naps > 0) {
1370 ath9k_hw_set_tsfadjust(ah, 1);
1371 sc->sc_flags |= SC_OP_TSF_RESET;
1372 ah->opmode = NL80211_IFTYPE_AP;
1373 } else {
1374 ath9k_hw_set_tsfadjust(ah, 0);
1375 sc->sc_flags &= ~SC_OP_TSF_RESET;
1376
1377 if (iter_data.nwds + iter_data.nmeshes)
1378 ah->opmode = NL80211_IFTYPE_AP;
1379 else if (iter_data.nadhocs)
1380 ah->opmode = NL80211_IFTYPE_ADHOC;
1381 else
1382 ah->opmode = NL80211_IFTYPE_STATION;
1383 }
1384
1385 /*
1386 * Enable MIB interrupts when there are hardware phy counters.
1387 */
1388 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1389 if (ah->config.enable_ani)
1390 ah->imask |= ATH9K_INT_MIB;
1391 ah->imask |= ATH9K_INT_TSFOOR;
1392 } else {
1393 ah->imask &= ~ATH9K_INT_MIB;
1394 ah->imask &= ~ATH9K_INT_TSFOOR;
1395 }
1396
1397 ath9k_hw_set_interrupts(ah, ah->imask);
1398
1399 /* Set up ANI */
1400 if ((iter_data.naps + iter_data.nadhocs) > 0) {
1401 sc->sc_flags |= SC_OP_ANI_RUN;
1402 ath_start_ani(common);
1403 } else {
1404 sc->sc_flags &= ~SC_OP_ANI_RUN;
1405 del_timer_sync(&common->ani.timer);
1406 }
1407 }
1408
1409 /* Called with sc->mutex held, vif counts set up properly. */
1410 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1411 struct ieee80211_vif *vif)
1412 {
1413 struct ath_softc *sc = hw->priv;
1414
1415 ath9k_calculate_summary_state(hw, vif);
1416
1417 if (ath9k_uses_beacons(vif->type)) {
1418 int error;
1419 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1420 /* This may fail because upper levels do not have beacons
1421 * properly configured yet. That's OK, we assume it
1422 * will be properly configured and then we will be notified
1423 * in the info_changed method and set up beacons properly
1424 * there.
1425 */
1426 error = ath_beacon_alloc(sc, vif);
1427 if (error)
1428 ath9k_reclaim_beacon(sc, vif);
1429 else
1430 ath_beacon_config(sc, vif);
1431 }
1432 }
1433
1434
1435 static int ath9k_add_interface(struct ieee80211_hw *hw,
1436 struct ieee80211_vif *vif)
1437 {
1438 struct ath_softc *sc = hw->priv;
1439 struct ath_hw *ah = sc->sc_ah;
1440 struct ath_common *common = ath9k_hw_common(ah);
1441 struct ath_vif *avp = (void *)vif->drv_priv;
1442 int ret = 0;
1443
1444 mutex_lock(&sc->mutex);
1445
1446 switch (vif->type) {
1447 case NL80211_IFTYPE_STATION:
1448 case NL80211_IFTYPE_WDS:
1449 case NL80211_IFTYPE_ADHOC:
1450 case NL80211_IFTYPE_AP:
1451 case NL80211_IFTYPE_MESH_POINT:
1452 break;
1453 default:
1454 ath_err(common, "Interface type %d not yet supported\n",
1455 vif->type);
1456 ret = -EOPNOTSUPP;
1457 goto out;
1458 }
1459
1460 if (ath9k_uses_beacons(vif->type)) {
1461 if (sc->nbcnvifs >= ATH_BCBUF) {
1462 ath_err(common, "Not enough beacon buffers when adding"
1463 " new interface of type: %i\n",
1464 vif->type);
1465 ret = -ENOBUFS;
1466 goto out;
1467 }
1468 }
1469
1470 if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1471 sc->nvifs > 0) {
1472 ath_err(common, "Cannot create ADHOC interface when other"
1473 " interfaces already exist.\n");
1474 ret = -EINVAL;
1475 goto out;
1476 }
1477
1478 ath_dbg(common, ATH_DBG_CONFIG,
1479 "Attach a VIF of type: %d\n", vif->type);
1480
1481 /* Set the VIF opmode */
1482 avp->av_opmode = vif->type;
1483 avp->av_bslot = -1;
1484
1485 sc->nvifs++;
1486
1487 ath9k_do_vif_add_setup(hw, vif);
1488 out:
1489 mutex_unlock(&sc->mutex);
1490 return ret;
1491 }
1492
1493 static int ath9k_change_interface(struct ieee80211_hw *hw,
1494 struct ieee80211_vif *vif,
1495 enum nl80211_iftype new_type,
1496 bool p2p)
1497 {
1498 struct ath_softc *sc = hw->priv;
1499 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1500 int ret = 0;
1501
1502 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1503 mutex_lock(&sc->mutex);
1504
1505 /* See if new interface type is valid. */
1506 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1507 (sc->nvifs > 1)) {
1508 ath_err(common, "When using ADHOC, it must be the only"
1509 " interface.\n");
1510 ret = -EINVAL;
1511 goto out;
1512 }
1513
1514 if (ath9k_uses_beacons(new_type) &&
1515 !ath9k_uses_beacons(vif->type)) {
1516 if (sc->nbcnvifs >= ATH_BCBUF) {
1517 ath_err(common, "No beacon slot available\n");
1518 ret = -ENOBUFS;
1519 goto out;
1520 }
1521 }
1522
1523 /* Clean up old vif stuff */
1524 if (ath9k_uses_beacons(vif->type))
1525 ath9k_reclaim_beacon(sc, vif);
1526
1527 /* Add new settings */
1528 vif->type = new_type;
1529 vif->p2p = p2p;
1530
1531 ath9k_do_vif_add_setup(hw, vif);
1532 out:
1533 mutex_unlock(&sc->mutex);
1534 return ret;
1535 }
1536
1537 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1538 struct ieee80211_vif *vif)
1539 {
1540 struct ath_softc *sc = hw->priv;
1541 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1542
1543 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1544
1545 mutex_lock(&sc->mutex);
1546
1547 sc->nvifs--;
1548
1549 /* Reclaim beacon resources */
1550 if (ath9k_uses_beacons(vif->type))
1551 ath9k_reclaim_beacon(sc, vif);
1552
1553 ath9k_calculate_summary_state(hw, NULL);
1554
1555 mutex_unlock(&sc->mutex);
1556 }
1557
1558 static void ath9k_enable_ps(struct ath_softc *sc)
1559 {
1560 struct ath_hw *ah = sc->sc_ah;
1561
1562 sc->ps_enabled = true;
1563 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1564 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1565 ah->imask |= ATH9K_INT_TIM_TIMER;
1566 ath9k_hw_set_interrupts(ah, ah->imask);
1567 }
1568 ath9k_hw_setrxabort(ah, 1);
1569 }
1570 }
1571
1572 static void ath9k_disable_ps(struct ath_softc *sc)
1573 {
1574 struct ath_hw *ah = sc->sc_ah;
1575
1576 sc->ps_enabled = false;
1577 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1578 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1579 ath9k_hw_setrxabort(ah, 0);
1580 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1581 PS_WAIT_FOR_CAB |
1582 PS_WAIT_FOR_PSPOLL_DATA |
1583 PS_WAIT_FOR_TX_ACK);
1584 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1585 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1586 ath9k_hw_set_interrupts(ah, ah->imask);
1587 }
1588 }
1589
1590 }
1591
1592 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1593 {
1594 struct ath_softc *sc = hw->priv;
1595 struct ath_hw *ah = sc->sc_ah;
1596 struct ath_common *common = ath9k_hw_common(ah);
1597 struct ieee80211_conf *conf = &hw->conf;
1598 bool disable_radio = false;
1599
1600 mutex_lock(&sc->mutex);
1601
1602 /*
1603 * Leave this as the first check because we need to turn on the
1604 * radio if it was disabled before prior to processing the rest
1605 * of the changes. Likewise we must only disable the radio towards
1606 * the end.
1607 */
1608 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1609 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1610 if (!sc->ps_idle) {
1611 ath_radio_enable(sc, hw);
1612 ath_dbg(common, ATH_DBG_CONFIG,
1613 "not-idle: enabling radio\n");
1614 } else {
1615 disable_radio = true;
1616 }
1617 }
1618
1619 /*
1620 * We just prepare to enable PS. We have to wait until our AP has
1621 * ACK'd our null data frame to disable RX otherwise we'll ignore
1622 * those ACKs and end up retransmitting the same null data frames.
1623 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1624 */
1625 if (changed & IEEE80211_CONF_CHANGE_PS) {
1626 unsigned long flags;
1627 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1628 if (conf->flags & IEEE80211_CONF_PS)
1629 ath9k_enable_ps(sc);
1630 else
1631 ath9k_disable_ps(sc);
1632 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1633 }
1634
1635 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1636 if (conf->flags & IEEE80211_CONF_MONITOR) {
1637 ath_dbg(common, ATH_DBG_CONFIG,
1638 "Monitor mode is enabled\n");
1639 sc->sc_ah->is_monitoring = true;
1640 } else {
1641 ath_dbg(common, ATH_DBG_CONFIG,
1642 "Monitor mode is disabled\n");
1643 sc->sc_ah->is_monitoring = false;
1644 }
1645 }
1646
1647 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1648 struct ieee80211_channel *curchan = hw->conf.channel;
1649 int pos = curchan->hw_value;
1650 int old_pos = -1;
1651 unsigned long flags;
1652
1653 if (ah->curchan)
1654 old_pos = ah->curchan - &ah->channels[0];
1655
1656 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1657 sc->sc_flags |= SC_OP_OFFCHANNEL;
1658 else
1659 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1660
1661 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1662 curchan->center_freq);
1663
1664 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1665 curchan, conf->channel_type);
1666
1667 /* update survey stats for the old channel before switching */
1668 spin_lock_irqsave(&common->cc_lock, flags);
1669 ath_update_survey_stats(sc);
1670 spin_unlock_irqrestore(&common->cc_lock, flags);
1671
1672 /*
1673 * If the operating channel changes, change the survey in-use flags
1674 * along with it.
1675 * Reset the survey data for the new channel, unless we're switching
1676 * back to the operating channel from an off-channel operation.
1677 */
1678 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1679 sc->cur_survey != &sc->survey[pos]) {
1680
1681 if (sc->cur_survey)
1682 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1683
1684 sc->cur_survey = &sc->survey[pos];
1685
1686 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1687 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1688 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1689 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1690 }
1691
1692 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1693 ath_err(common, "Unable to set channel\n");
1694 mutex_unlock(&sc->mutex);
1695 return -EINVAL;
1696 }
1697
1698 /*
1699 * The most recent snapshot of channel->noisefloor for the old
1700 * channel is only available after the hardware reset. Copy it to
1701 * the survey stats now.
1702 */
1703 if (old_pos >= 0)
1704 ath_update_survey_nf(sc, old_pos);
1705 }
1706
1707 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1708 sc->config.txpowlimit = 2 * conf->power_level;
1709 ath_update_txpow(sc);
1710 }
1711
1712 if (disable_radio) {
1713 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1714 ath_radio_disable(sc, hw);
1715 }
1716
1717 mutex_unlock(&sc->mutex);
1718
1719 return 0;
1720 }
1721
1722 #define SUPPORTED_FILTERS \
1723 (FIF_PROMISC_IN_BSS | \
1724 FIF_ALLMULTI | \
1725 FIF_CONTROL | \
1726 FIF_PSPOLL | \
1727 FIF_OTHER_BSS | \
1728 FIF_BCN_PRBRESP_PROMISC | \
1729 FIF_PROBE_REQ | \
1730 FIF_FCSFAIL)
1731
1732 /* FIXME: sc->sc_full_reset ? */
1733 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1734 unsigned int changed_flags,
1735 unsigned int *total_flags,
1736 u64 multicast)
1737 {
1738 struct ath_softc *sc = hw->priv;
1739 u32 rfilt;
1740
1741 changed_flags &= SUPPORTED_FILTERS;
1742 *total_flags &= SUPPORTED_FILTERS;
1743
1744 sc->rx.rxfilter = *total_flags;
1745 ath9k_ps_wakeup(sc);
1746 rfilt = ath_calcrxfilter(sc);
1747 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1748 ath9k_ps_restore(sc);
1749
1750 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1751 "Set HW RX filter: 0x%x\n", rfilt);
1752 }
1753
1754 static int ath9k_sta_add(struct ieee80211_hw *hw,
1755 struct ieee80211_vif *vif,
1756 struct ieee80211_sta *sta)
1757 {
1758 struct ath_softc *sc = hw->priv;
1759
1760 ath_node_attach(sc, sta);
1761
1762 return 0;
1763 }
1764
1765 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1766 struct ieee80211_vif *vif,
1767 struct ieee80211_sta *sta)
1768 {
1769 struct ath_softc *sc = hw->priv;
1770
1771 ath_node_detach(sc, sta);
1772
1773 return 0;
1774 }
1775
1776 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1777 const struct ieee80211_tx_queue_params *params)
1778 {
1779 struct ath_softc *sc = hw->priv;
1780 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1781 struct ath_txq *txq;
1782 struct ath9k_tx_queue_info qi;
1783 int ret = 0;
1784
1785 if (queue >= WME_NUM_AC)
1786 return 0;
1787
1788 txq = sc->tx.txq_map[queue];
1789
1790 mutex_lock(&sc->mutex);
1791
1792 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1793
1794 qi.tqi_aifs = params->aifs;
1795 qi.tqi_cwmin = params->cw_min;
1796 qi.tqi_cwmax = params->cw_max;
1797 qi.tqi_burstTime = params->txop;
1798
1799 ath_dbg(common, ATH_DBG_CONFIG,
1800 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1801 queue, txq->axq_qnum, params->aifs, params->cw_min,
1802 params->cw_max, params->txop);
1803
1804 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1805 if (ret)
1806 ath_err(common, "TXQ Update failed\n");
1807
1808 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1809 if (queue == WME_AC_BE && !ret)
1810 ath_beaconq_config(sc);
1811
1812 mutex_unlock(&sc->mutex);
1813
1814 return ret;
1815 }
1816
1817 static int ath9k_set_key(struct ieee80211_hw *hw,
1818 enum set_key_cmd cmd,
1819 struct ieee80211_vif *vif,
1820 struct ieee80211_sta *sta,
1821 struct ieee80211_key_conf *key)
1822 {
1823 struct ath_softc *sc = hw->priv;
1824 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1825 int ret = 0;
1826
1827 if (ath9k_modparam_nohwcrypt)
1828 return -ENOSPC;
1829
1830 mutex_lock(&sc->mutex);
1831 ath9k_ps_wakeup(sc);
1832 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1833
1834 switch (cmd) {
1835 case SET_KEY:
1836 ret = ath_key_config(common, vif, sta, key);
1837 if (ret >= 0) {
1838 key->hw_key_idx = ret;
1839 /* push IV and Michael MIC generation to stack */
1840 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1841 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1842 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1843 if (sc->sc_ah->sw_mgmt_crypto &&
1844 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1845 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1846 ret = 0;
1847 }
1848 break;
1849 case DISABLE_KEY:
1850 ath_key_delete(common, key);
1851 break;
1852 default:
1853 ret = -EINVAL;
1854 }
1855
1856 ath9k_ps_restore(sc);
1857 mutex_unlock(&sc->mutex);
1858
1859 return ret;
1860 }
1861
1862 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1863 struct ieee80211_vif *vif,
1864 struct ieee80211_bss_conf *bss_conf,
1865 u32 changed)
1866 {
1867 struct ath_softc *sc = hw->priv;
1868 struct ath_hw *ah = sc->sc_ah;
1869 struct ath_common *common = ath9k_hw_common(ah);
1870 struct ath_vif *avp = (void *)vif->drv_priv;
1871 int slottime;
1872 int error;
1873
1874 mutex_lock(&sc->mutex);
1875
1876 if (changed & BSS_CHANGED_BSSID) {
1877 /* Set BSSID */
1878 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1879 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1880 common->curaid = 0;
1881 ath9k_hw_write_associd(ah);
1882
1883 /* Set aggregation protection mode parameters */
1884 sc->config.ath_aggr_prot = 0;
1885
1886 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1887 common->curbssid, common->curaid);
1888
1889 /* need to reconfigure the beacon */
1890 sc->sc_flags &= ~SC_OP_BEACONS ;
1891 }
1892
1893 /* Enable transmission of beacons (AP, IBSS, MESH) */
1894 if ((changed & BSS_CHANGED_BEACON) ||
1895 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1896 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1897 error = ath_beacon_alloc(sc, vif);
1898 if (!error)
1899 ath_beacon_config(sc, vif);
1900 }
1901
1902 if (changed & BSS_CHANGED_ERP_SLOT) {
1903 if (bss_conf->use_short_slot)
1904 slottime = 9;
1905 else
1906 slottime = 20;
1907 if (vif->type == NL80211_IFTYPE_AP) {
1908 /*
1909 * Defer update, so that connected stations can adjust
1910 * their settings at the same time.
1911 * See beacon.c for more details
1912 */
1913 sc->beacon.slottime = slottime;
1914 sc->beacon.updateslot = UPDATE;
1915 } else {
1916 ah->slottime = slottime;
1917 ath9k_hw_init_global_settings(ah);
1918 }
1919 }
1920
1921 /* Disable transmission of beacons */
1922 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1923 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1924
1925 if (changed & BSS_CHANGED_BEACON_INT) {
1926 sc->beacon_interval = bss_conf->beacon_int;
1927 /*
1928 * In case of AP mode, the HW TSF has to be reset
1929 * when the beacon interval changes.
1930 */
1931 if (vif->type == NL80211_IFTYPE_AP) {
1932 sc->sc_flags |= SC_OP_TSF_RESET;
1933 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1934 error = ath_beacon_alloc(sc, vif);
1935 if (!error)
1936 ath_beacon_config(sc, vif);
1937 } else {
1938 ath_beacon_config(sc, vif);
1939 }
1940 }
1941
1942 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1943 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1944 bss_conf->use_short_preamble);
1945 if (bss_conf->use_short_preamble)
1946 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1947 else
1948 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1949 }
1950
1951 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1952 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1953 bss_conf->use_cts_prot);
1954 if (bss_conf->use_cts_prot &&
1955 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1956 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1957 else
1958 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1959 }
1960
1961 if (changed & BSS_CHANGED_ASSOC) {
1962 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1963 bss_conf->assoc);
1964 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1965 }
1966
1967 mutex_unlock(&sc->mutex);
1968 }
1969
1970 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1971 {
1972 struct ath_softc *sc = hw->priv;
1973 u64 tsf;
1974
1975 mutex_lock(&sc->mutex);
1976 ath9k_ps_wakeup(sc);
1977 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1978 ath9k_ps_restore(sc);
1979 mutex_unlock(&sc->mutex);
1980
1981 return tsf;
1982 }
1983
1984 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1985 {
1986 struct ath_softc *sc = hw->priv;
1987
1988 mutex_lock(&sc->mutex);
1989 ath9k_ps_wakeup(sc);
1990 ath9k_hw_settsf64(sc->sc_ah, tsf);
1991 ath9k_ps_restore(sc);
1992 mutex_unlock(&sc->mutex);
1993 }
1994
1995 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1996 {
1997 struct ath_softc *sc = hw->priv;
1998
1999 mutex_lock(&sc->mutex);
2000
2001 ath9k_ps_wakeup(sc);
2002 ath9k_hw_reset_tsf(sc->sc_ah);
2003 ath9k_ps_restore(sc);
2004
2005 mutex_unlock(&sc->mutex);
2006 }
2007
2008 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2009 struct ieee80211_vif *vif,
2010 enum ieee80211_ampdu_mlme_action action,
2011 struct ieee80211_sta *sta,
2012 u16 tid, u16 *ssn, u8 buf_size)
2013 {
2014 struct ath_softc *sc = hw->priv;
2015 int ret = 0;
2016
2017 local_bh_disable();
2018
2019 switch (action) {
2020 case IEEE80211_AMPDU_RX_START:
2021 if (!(sc->sc_flags & SC_OP_RXAGGR))
2022 ret = -ENOTSUPP;
2023 break;
2024 case IEEE80211_AMPDU_RX_STOP:
2025 break;
2026 case IEEE80211_AMPDU_TX_START:
2027 if (!(sc->sc_flags & SC_OP_TXAGGR))
2028 return -EOPNOTSUPP;
2029
2030 ath9k_ps_wakeup(sc);
2031 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2032 if (!ret)
2033 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2034 ath9k_ps_restore(sc);
2035 break;
2036 case IEEE80211_AMPDU_TX_STOP:
2037 ath9k_ps_wakeup(sc);
2038 ath_tx_aggr_stop(sc, sta, tid);
2039 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2040 ath9k_ps_restore(sc);
2041 break;
2042 case IEEE80211_AMPDU_TX_OPERATIONAL:
2043 ath9k_ps_wakeup(sc);
2044 ath_tx_aggr_resume(sc, sta, tid);
2045 ath9k_ps_restore(sc);
2046 break;
2047 default:
2048 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2049 }
2050
2051 local_bh_enable();
2052
2053 return ret;
2054 }
2055
2056 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2057 struct survey_info *survey)
2058 {
2059 struct ath_softc *sc = hw->priv;
2060 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2061 struct ieee80211_supported_band *sband;
2062 struct ieee80211_channel *chan;
2063 unsigned long flags;
2064 int pos;
2065
2066 spin_lock_irqsave(&common->cc_lock, flags);
2067 if (idx == 0)
2068 ath_update_survey_stats(sc);
2069
2070 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2071 if (sband && idx >= sband->n_channels) {
2072 idx -= sband->n_channels;
2073 sband = NULL;
2074 }
2075
2076 if (!sband)
2077 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2078
2079 if (!sband || idx >= sband->n_channels) {
2080 spin_unlock_irqrestore(&common->cc_lock, flags);
2081 return -ENOENT;
2082 }
2083
2084 chan = &sband->channels[idx];
2085 pos = chan->hw_value;
2086 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2087 survey->channel = chan;
2088 spin_unlock_irqrestore(&common->cc_lock, flags);
2089
2090 return 0;
2091 }
2092
2093 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2094 {
2095 struct ath_softc *sc = hw->priv;
2096 struct ath_hw *ah = sc->sc_ah;
2097
2098 mutex_lock(&sc->mutex);
2099 ah->coverage_class = coverage_class;
2100 ath9k_hw_init_global_settings(ah);
2101 mutex_unlock(&sc->mutex);
2102 }
2103
2104 struct ieee80211_ops ath9k_ops = {
2105 .tx = ath9k_tx,
2106 .start = ath9k_start,
2107 .stop = ath9k_stop,
2108 .add_interface = ath9k_add_interface,
2109 .change_interface = ath9k_change_interface,
2110 .remove_interface = ath9k_remove_interface,
2111 .config = ath9k_config,
2112 .configure_filter = ath9k_configure_filter,
2113 .sta_add = ath9k_sta_add,
2114 .sta_remove = ath9k_sta_remove,
2115 .conf_tx = ath9k_conf_tx,
2116 .bss_info_changed = ath9k_bss_info_changed,
2117 .set_key = ath9k_set_key,
2118 .get_tsf = ath9k_get_tsf,
2119 .set_tsf = ath9k_set_tsf,
2120 .reset_tsf = ath9k_reset_tsf,
2121 .ampdu_action = ath9k_ampdu_action,
2122 .get_survey = ath9k_get_survey,
2123 .rfkill_poll = ath9k_rfkill_poll_state,
2124 .set_coverage_class = ath9k_set_coverage_class,
2125 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree