[PATCH] genirq: add irq-chip support
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / linux / irq.h
blobca8d2a849cff4f2b3e4efbf203fcdbc8798fb5cf
1 #ifndef _LINUX_IRQ_H
2 #define _LINUX_IRQ_H
4 /*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
9 * Thanks. --rmk
12 #include <linux/smp.h>
14 #ifndef CONFIG_S390
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
22 #include <asm/irq.h>
23 #include <asm/ptrace.h>
26 * IRQ line status.
28 #define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */
29 #define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */
30 #define IRQ_PENDING 4 /* IRQ pending - replay on enable */
31 #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
32 #define IRQ_AUTODETECT 16 /* IRQ is being autodetected */
33 #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */
34 #define IRQ_LEVEL 64 /* IRQ level triggered */
35 #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */
36 #ifdef CONFIG_IRQ_PER_CPU
37 # define IRQ_PER_CPU 256 /* IRQ is per CPU */
38 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
39 #else
40 # define CHECK_IRQ_PER_CPU(var) 0
41 #endif
43 #define IRQ_NOPROBE 512 /* IRQ is not valid for probing */
44 #define IRQ_NOREQUEST 1024 /* IRQ cannot be requested */
45 #define IRQ_NOAUTOEN 2048 /* IRQ will not be enabled on request irq */
46 #define IRQ_DELAYED_DISABLE \
47 4096 /* IRQ disable (masking) happens delayed. */
50 * IRQ types, see also include/linux/interrupt.h
52 #define IRQ_TYPE_NONE 0x0000 /* Default, unspecified type */
53 #define IRQ_TYPE_EDGE_RISING 0x0001 /* Edge rising type */
54 #define IRQ_TYPE_EDGE_FALLING 0x0002 /* Edge falling type */
55 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
56 #define IRQ_TYPE_LEVEL_HIGH 0x0004 /* Level high type */
57 #define IRQ_TYPE_LEVEL_LOW 0x0008 /* Level low type */
58 #define IRQ_TYPE_SIMPLE 0x0010 /* Simple type */
59 #define IRQ_TYPE_PERCPU 0x0020 /* Per CPU type */
60 #define IRQ_TYPE_PROBE 0x0040 /* Probing in progress */
62 struct proc_dir_entry;
64 /**
65 * struct irq_chip - hardware interrupt chip descriptor
67 * @name: name for /proc/interrupts
68 * @startup: start up the interrupt (defaults to ->enable if NULL)
69 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
70 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
71 * @disable: disable the interrupt (defaults to chip->mask if NULL)
72 * @ack: start of a new interrupt
73 * @mask: mask an interrupt source
74 * @mask_ack: ack and mask an interrupt source
75 * @unmask: unmask an interrupt source
76 * @end: end of interrupt
77 * @set_affinity: set the CPU affinity on SMP machines
78 * @retrigger: resend an IRQ to the CPU
79 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
80 * @set_wake: enable/disable power-management wake-on of an IRQ
82 * @release: release function solely used by UML
83 * @typename: obsoleted by name, kept as migration helper
85 struct irq_chip {
86 const char *name;
87 unsigned int (*startup)(unsigned int irq);
88 void (*shutdown)(unsigned int irq);
89 void (*enable)(unsigned int irq);
90 void (*disable)(unsigned int irq);
92 void (*ack)(unsigned int irq);
93 void (*mask)(unsigned int irq);
94 void (*mask_ack)(unsigned int irq);
95 void (*unmask)(unsigned int irq);
97 void (*end)(unsigned int irq);
98 void (*set_affinity)(unsigned int irq, cpumask_t dest);
99 int (*retrigger)(unsigned int irq);
100 int (*set_type)(unsigned int irq, unsigned int flow_type);
101 int (*set_wake)(unsigned int irq, unsigned int on);
103 /* Currently used only by UML, might disappear one day.*/
104 #ifdef CONFIG_IRQ_RELEASE_METHOD
105 void (*release)(unsigned int irq, void *dev_id);
106 #endif
108 * For compatibility, ->typename is copied into ->name.
109 * Will disappear.
111 const char *typename;
115 * struct irq_desc - interrupt descriptor
117 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
118 * @chip: low level interrupt hardware access
119 * @handler_data: per-IRQ data for the irq_chip methods
120 * @chip_data: platform-specific per-chip private data for the chip
121 * methods, to allow shared chip implementations
122 * @action: the irq action chain
123 * @status: status information
124 * @depth: disable-depth, for nested irq_disable() calls
125 * @irq_count: stats field to detect stalled irqs
126 * @irqs_unhandled: stats field for spurious unhandled interrupts
127 * @lock: locking for SMP
128 * @affinity: IRQ affinity on SMP
129 * @cpu: cpu index useful for balancing
130 * @pending_mask: pending rebalanced interrupts
131 * @move_irq: need to re-target IRQ destination
132 * @dir: /proc/irq/ procfs entry
133 * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
135 * Pad this out to 32 bytes for cache and indexing reasons.
137 struct irq_desc {
138 void fastcall (*handle_irq)(unsigned int irq,
139 struct irq_desc *desc,
140 struct pt_regs *regs);
141 struct irq_chip *chip;
142 void *handler_data;
143 void *chip_data;
144 struct irqaction *action; /* IRQ action list */
145 unsigned int status; /* IRQ status */
147 unsigned int depth; /* nested irq disables */
148 unsigned int irq_count; /* For detecting broken IRQs */
149 unsigned int irqs_unhandled;
150 spinlock_t lock;
151 #ifdef CONFIG_SMP
152 cpumask_t affinity;
153 unsigned int cpu;
154 #endif
155 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
156 cpumask_t pending_mask;
157 unsigned int move_irq; /* need to re-target IRQ dest */
158 #endif
159 #ifdef CONFIG_PROC_FS
160 struct proc_dir_entry *dir;
161 #endif
162 } ____cacheline_aligned;
164 extern struct irq_desc irq_desc[NR_IRQS];
167 * Migration helpers for obsolete names, they will go away:
169 #define hw_interrupt_type irq_chip
170 typedef struct irq_chip hw_irq_controller;
171 #define no_irq_type no_irq_chip
172 typedef struct irq_desc irq_desc_t;
175 * Pick up the arch-dependent methods:
177 #include <asm/hw_irq.h>
179 extern int setup_irq(unsigned int irq, struct irqaction *new);
181 #ifdef CONFIG_GENERIC_HARDIRQS
183 #ifdef CONFIG_SMP
184 static inline void set_native_irq_info(int irq, cpumask_t mask)
186 irq_desc[irq].affinity = mask;
188 #else
189 static inline void set_native_irq_info(int irq, cpumask_t mask)
192 #endif
194 #ifdef CONFIG_SMP
196 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
198 void set_pending_irq(unsigned int irq, cpumask_t mask);
199 void move_native_irq(int irq);
201 #ifdef CONFIG_PCI_MSI
203 * Wonder why these are dummies?
204 * For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
205 * counter part after translating the vector to irq info. We need to perform
206 * this operation on the real irq, when we dont use vector, i.e when
207 * pci_use_vector() is false.
209 static inline void move_irq(int irq)
213 static inline void set_irq_info(int irq, cpumask_t mask)
217 #else /* CONFIG_PCI_MSI */
219 static inline void move_irq(int irq)
221 move_native_irq(irq);
224 static inline void set_irq_info(int irq, cpumask_t mask)
226 set_native_irq_info(irq, mask);
229 #endif /* CONFIG_PCI_MSI */
231 #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
233 static inline void move_irq(int irq)
237 static inline void move_native_irq(int irq)
241 static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
245 static inline void set_irq_info(int irq, cpumask_t mask)
247 set_native_irq_info(irq, mask);
250 #endif /* CONFIG_GENERIC_PENDING_IRQ */
252 #else /* CONFIG_SMP */
254 #define move_irq(x)
255 #define move_native_irq(x)
257 #endif /* CONFIG_SMP */
259 #ifdef CONFIG_IRQBALANCE
260 extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
261 #else
262 static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
265 #endif
267 #ifdef CONFIG_AUTO_IRQ_AFFINITY
268 extern int select_smp_affinity(unsigned int irq);
269 #else
270 static inline int select_smp_affinity(unsigned int irq)
272 return 1;
274 #endif
276 extern int no_irq_affinity;
278 /* Handle irq action chains: */
279 extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
280 struct irqaction *action);
283 * Built-in IRQ handlers for various IRQ types,
284 * callable via desc->chip->handle_irq()
286 extern void fastcall
287 handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
288 extern void fastcall
289 handle_fastack_irq(unsigned int irq, struct irq_desc *desc,
290 struct pt_regs *regs);
291 extern void fastcall
292 handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
293 extern void fastcall
294 handle_simple_irq(unsigned int irq, struct irq_desc *desc,
295 struct pt_regs *regs);
296 extern void fastcall
297 handle_percpu_irq(unsigned int irq, struct irq_desc *desc,
298 struct pt_regs *regs);
299 extern void fastcall
300 handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
303 * Get a descriptive string for the highlevel handler, for
304 * /proc/interrupts output:
306 extern const char *
307 handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
308 struct pt_regs *));
311 * Monolithic do_IRQ implementation.
312 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
314 extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
317 * Architectures call this to let the generic IRQ layer
318 * handle an interrupt. If the descriptor is attached to an
319 * irqchip-style controller then we call the ->handle_irq() handler,
320 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
322 static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs)
324 struct irq_desc *desc = irq_desc + irq;
326 if (likely(desc->handle_irq))
327 desc->handle_irq(irq, desc, regs);
328 else
329 __do_IRQ(irq, regs);
332 /* Handling of unhandled and spurious interrupts: */
333 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
334 int action_ret, struct pt_regs *regs);
336 /* Resending of interrupts :*/
337 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
339 /* Initialize /proc/irq/ */
340 extern void init_irq_proc(void);
342 /* Enable/disable irq debugging output: */
343 extern int noirqdebug_setup(char *str);
345 /* Checks whether the interrupt can be requested by request_irq(): */
346 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
348 /* Dummy irq-chip implementation: */
349 extern struct irq_chip no_irq_chip;
351 extern void
352 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
353 void fastcall (*handle)(unsigned int,
354 struct irq_desc *,
355 struct pt_regs *));
356 extern void
357 __set_irq_handler(unsigned int irq,
358 void fastcall (*handle)(unsigned int, struct irq_desc *,
359 struct pt_regs *),
360 int is_chained);
363 * Set a highlevel flow handler for a given IRQ:
365 static inline void
366 set_irq_handler(unsigned int irq,
367 void fastcall (*handle)(unsigned int, struct irq_desc *,
368 struct pt_regs *))
370 __set_irq_handler(irq, handle, 0);
374 * Set a highlevel chained flow handler for a given IRQ.
375 * (a chained handler is automatically enabled and set to
376 * IRQ_NOREQUEST and IRQ_NOPROBE)
378 static inline void
379 set_irq_chained_handler(unsigned int irq,
380 void fastcall (*handle)(unsigned int, struct irq_desc *,
381 struct pt_regs *))
383 __set_irq_handler(irq, handle, 1);
386 /* Set/get chip/data for an IRQ: */
388 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
389 extern int set_irq_data(unsigned int irq, void *data);
390 extern int set_irq_chip_data(unsigned int irq, void *data);
391 extern int set_irq_type(unsigned int irq, unsigned int type);
393 #define get_irq_chip(irq) (irq_desc[irq].chip)
394 #define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
395 #define get_irq_data(irq) (irq_desc[irq].handler_data)
397 #endif /* CONFIG_GENERIC_HARDIRQS */
399 #endif /* !CONFIG_S390 */
401 #endif /* _LINUX_IRQ_H */