1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/sched.h>
35 #include <linux/skbuff.h>
36 #include <linux/netdevice.h>
37 #include <linux/wireless.h>
38 #include <linux/firmware.h>
39 #include <linux/etherdevice.h>
40 #include <asm/unaligned.h>
41 #include <net/mac80211.h>
44 #include "iwl-3945-fh.h"
45 #include "iwl-commands.h"
48 #include "iwl-eeprom.h"
50 #include "iwl-helpers.h"
52 #include "iwl-3945-led.h"
53 #include "iwl-3945-debugfs.h"
55 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
56 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
57 IWL_RATE_##r##M_IEEE, \
58 IWL_RATE_##ip##M_INDEX, \
59 IWL_RATE_##in##M_INDEX, \
60 IWL_RATE_##rp##M_INDEX, \
61 IWL_RATE_##rn##M_INDEX, \
62 IWL_RATE_##pp##M_INDEX, \
63 IWL_RATE_##np##M_INDEX, \
64 IWL_RATE_##r##M_INDEX_TABLE, \
65 IWL_RATE_##ip##M_INDEX_TABLE }
69 * rate, prev rate, next rate, prev tgg rate, next tgg rate
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
75 const struct iwl3945_rate_info iwl3945_rates
[IWL_RATE_COUNT_3945
] = {
76 IWL_DECLARE_RATE_INFO(1, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
90 static inline u8
iwl3945_get_prev_ieee_rate(u8 rate_index
)
92 u8 rate
= iwl3945_rates
[rate_index
].prev_ieee
;
94 if (rate
== IWL_RATE_INVALID
)
99 /* 1 = enable the iwl3945_disable_events() function */
100 #define IWL_EVT_DISABLE (0)
101 #define IWL_EVT_DISABLE_SIZE (1532/32)
104 * iwl3945_disable_events - Disable selected events in uCode event log
106 * Disable an event by writing "1"s into "disable"
107 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
108 * Default values of 0 enable uCode events to be logged.
109 * Use for only special debugging. This function is just a placeholder as-is,
110 * you'll need to provide the special bits! ...
111 * ... and set IWL_EVT_DISABLE to 1. */
112 void iwl3945_disable_events(struct iwl_priv
*priv
)
115 u32 base
; /* SRAM address of event log header */
116 u32 disable_ptr
; /* SRAM address of event-disable bitmap array */
117 u32 array_size
; /* # of u32 entries in array */
118 static const u32 evt_disable
[IWL_EVT_DISABLE_SIZE
] = {
119 0x00000000, /* 31 - 0 Event id numbers */
120 0x00000000, /* 63 - 32 */
121 0x00000000, /* 95 - 64 */
122 0x00000000, /* 127 - 96 */
123 0x00000000, /* 159 - 128 */
124 0x00000000, /* 191 - 160 */
125 0x00000000, /* 223 - 192 */
126 0x00000000, /* 255 - 224 */
127 0x00000000, /* 287 - 256 */
128 0x00000000, /* 319 - 288 */
129 0x00000000, /* 351 - 320 */
130 0x00000000, /* 383 - 352 */
131 0x00000000, /* 415 - 384 */
132 0x00000000, /* 447 - 416 */
133 0x00000000, /* 479 - 448 */
134 0x00000000, /* 511 - 480 */
135 0x00000000, /* 543 - 512 */
136 0x00000000, /* 575 - 544 */
137 0x00000000, /* 607 - 576 */
138 0x00000000, /* 639 - 608 */
139 0x00000000, /* 671 - 640 */
140 0x00000000, /* 703 - 672 */
141 0x00000000, /* 735 - 704 */
142 0x00000000, /* 767 - 736 */
143 0x00000000, /* 799 - 768 */
144 0x00000000, /* 831 - 800 */
145 0x00000000, /* 863 - 832 */
146 0x00000000, /* 895 - 864 */
147 0x00000000, /* 927 - 896 */
148 0x00000000, /* 959 - 928 */
149 0x00000000, /* 991 - 960 */
150 0x00000000, /* 1023 - 992 */
151 0x00000000, /* 1055 - 1024 */
152 0x00000000, /* 1087 - 1056 */
153 0x00000000, /* 1119 - 1088 */
154 0x00000000, /* 1151 - 1120 */
155 0x00000000, /* 1183 - 1152 */
156 0x00000000, /* 1215 - 1184 */
157 0x00000000, /* 1247 - 1216 */
158 0x00000000, /* 1279 - 1248 */
159 0x00000000, /* 1311 - 1280 */
160 0x00000000, /* 1343 - 1312 */
161 0x00000000, /* 1375 - 1344 */
162 0x00000000, /* 1407 - 1376 */
163 0x00000000, /* 1439 - 1408 */
164 0x00000000, /* 1471 - 1440 */
165 0x00000000, /* 1503 - 1472 */
168 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
169 if (!iwl3945_hw_valid_rtc_data_addr(base
)) {
170 IWL_ERR(priv
, "Invalid event log pointer 0x%08X\n", base
);
174 disable_ptr
= iwl_legacy_read_targ_mem(priv
, base
+ (4 * sizeof(u32
)));
175 array_size
= iwl_legacy_read_targ_mem(priv
, base
+ (5 * sizeof(u32
)));
177 if (IWL_EVT_DISABLE
&& (array_size
== IWL_EVT_DISABLE_SIZE
)) {
178 IWL_DEBUG_INFO(priv
, "Disabling selected uCode log events at 0x%x\n",
180 for (i
= 0; i
< IWL_EVT_DISABLE_SIZE
; i
++)
181 iwl_legacy_write_targ_mem(priv
,
182 disable_ptr
+ (i
* sizeof(u32
)),
186 IWL_DEBUG_INFO(priv
, "Selected uCode log events may be disabled\n");
187 IWL_DEBUG_INFO(priv
, " by writing \"1\"s into disable bitmap\n");
188 IWL_DEBUG_INFO(priv
, " in SRAM at 0x%x, size %d u32s\n",
189 disable_ptr
, array_size
);
194 static int iwl3945_hwrate_to_plcp_idx(u8 plcp
)
198 for (idx
= 0; idx
< IWL_RATE_COUNT_3945
; idx
++)
199 if (iwl3945_rates
[idx
].plcp
== plcp
)
204 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
205 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
207 static const char *iwl3945_get_tx_fail_reason(u32 status
)
209 switch (status
& TX_STATUS_MSK
) {
210 case TX_3945_STATUS_SUCCESS
:
212 TX_STATUS_ENTRY(SHORT_LIMIT
);
213 TX_STATUS_ENTRY(LONG_LIMIT
);
214 TX_STATUS_ENTRY(FIFO_UNDERRUN
);
215 TX_STATUS_ENTRY(MGMNT_ABORT
);
216 TX_STATUS_ENTRY(NEXT_FRAG
);
217 TX_STATUS_ENTRY(LIFE_EXPIRE
);
218 TX_STATUS_ENTRY(DEST_PS
);
219 TX_STATUS_ENTRY(ABORTED
);
220 TX_STATUS_ENTRY(BT_RETRY
);
221 TX_STATUS_ENTRY(STA_INVALID
);
222 TX_STATUS_ENTRY(FRAG_DROPPED
);
223 TX_STATUS_ENTRY(TID_DISABLE
);
224 TX_STATUS_ENTRY(FRAME_FLUSHED
);
225 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL
);
226 TX_STATUS_ENTRY(TX_LOCKED
);
227 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR
);
233 static inline const char *iwl3945_get_tx_fail_reason(u32 status
)
240 * get ieee prev rate from rate scale table.
241 * for A and B mode we need to overright prev
244 int iwl3945_rs_next_rate(struct iwl_priv
*priv
, int rate
)
246 int next_rate
= iwl3945_get_prev_ieee_rate(rate
);
248 switch (priv
->band
) {
249 case IEEE80211_BAND_5GHZ
:
250 if (rate
== IWL_RATE_12M_INDEX
)
251 next_rate
= IWL_RATE_9M_INDEX
;
252 else if (rate
== IWL_RATE_6M_INDEX
)
253 next_rate
= IWL_RATE_6M_INDEX
;
255 case IEEE80211_BAND_2GHZ
:
256 if (!(priv
->_3945
.sta_supp_rates
& IWL_OFDM_RATES_MASK
) &&
257 iwl_legacy_is_associated(priv
, IWL_RXON_CTX_BSS
)) {
258 if (rate
== IWL_RATE_11M_INDEX
)
259 next_rate
= IWL_RATE_5M_INDEX
;
272 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
274 * When FW advances 'R' index, all entries between old and new 'R' index
275 * need to be reclaimed. As result, some free space forms. If there is
276 * enough free space (> low mark), wake the stack that feeds us.
278 static void iwl3945_tx_queue_reclaim(struct iwl_priv
*priv
,
279 int txq_id
, int index
)
281 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
282 struct iwl_queue
*q
= &txq
->q
;
283 struct iwl_tx_info
*tx_info
;
285 BUG_ON(txq_id
== IWL39_CMD_QUEUE_NUM
);
287 for (index
= iwl_legacy_queue_inc_wrap(index
, q
->n_bd
);
288 q
->read_ptr
!= index
;
289 q
->read_ptr
= iwl_legacy_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
291 tx_info
= &txq
->txb
[txq
->q
.read_ptr
];
292 ieee80211_tx_status_irqsafe(priv
->hw
, tx_info
->skb
);
294 priv
->cfg
->ops
->lib
->txq_free_tfd(priv
, txq
);
297 if (iwl_legacy_queue_space(q
) > q
->low_mark
&& (txq_id
>= 0) &&
298 (txq_id
!= IWL39_CMD_QUEUE_NUM
) &&
299 priv
->mac80211_registered
)
300 iwl_legacy_wake_queue(priv
, txq
);
304 * iwl3945_rx_reply_tx - Handle Tx response
306 static void iwl3945_rx_reply_tx(struct iwl_priv
*priv
,
307 struct iwl_rx_mem_buffer
*rxb
)
309 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
310 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
311 int txq_id
= SEQ_TO_QUEUE(sequence
);
312 int index
= SEQ_TO_INDEX(sequence
);
313 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
314 struct ieee80211_tx_info
*info
;
315 struct iwl3945_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
316 u32 status
= le32_to_cpu(tx_resp
->status
);
320 if ((index
>= txq
->q
.n_bd
) || (iwl_legacy_queue_used(&txq
->q
, index
) == 0)) {
321 IWL_ERR(priv
, "Read index for DMA queue txq_id (%d) index %d "
322 "is out of range [0-%d] %d %d\n", txq_id
,
323 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
328 txq
->time_stamp
= jiffies
;
329 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
);
330 ieee80211_tx_info_clear_status(info
);
332 /* Fill the MRR chain with some info about on-chip retransmissions */
333 rate_idx
= iwl3945_hwrate_to_plcp_idx(tx_resp
->rate
);
334 if (info
->band
== IEEE80211_BAND_5GHZ
)
335 rate_idx
-= IWL_FIRST_OFDM_RATE
;
337 fail
= tx_resp
->failure_frame
;
339 info
->status
.rates
[0].idx
= rate_idx
;
340 info
->status
.rates
[0].count
= fail
+ 1; /* add final attempt */
342 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
343 info
->flags
|= ((status
& TX_STATUS_MSK
) == TX_STATUS_SUCCESS
) ?
344 IEEE80211_TX_STAT_ACK
: 0;
346 IWL_DEBUG_TX(priv
, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
347 txq_id
, iwl3945_get_tx_fail_reason(status
), status
,
348 tx_resp
->rate
, tx_resp
->failure_frame
);
350 IWL_DEBUG_TX_REPLY(priv
, "Tx queue reclaim %d\n", index
);
351 iwl3945_tx_queue_reclaim(priv
, txq_id
, index
);
353 if (status
& TX_ABORT_REQUIRED_MSK
)
354 IWL_ERR(priv
, "TODO: Implement Tx ABORT REQUIRED!!!\n");
359 /*****************************************************************************
361 * Intel PRO/Wireless 3945ABG/BG Network Connection
363 * RX handler implementations
365 *****************************************************************************/
366 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
367 static void iwl3945_accumulative_statistics(struct iwl_priv
*priv
,
373 u32
*delta
, *max_delta
;
375 prev_stats
= (__le32
*)&priv
->_3945
.statistics
;
376 accum_stats
= (u32
*)&priv
->_3945
.accum_statistics
;
377 delta
= (u32
*)&priv
->_3945
.delta_statistics
;
378 max_delta
= (u32
*)&priv
->_3945
.max_delta
;
380 for (i
= sizeof(__le32
); i
< sizeof(struct iwl3945_notif_statistics
);
381 i
+= sizeof(__le32
), stats
++, prev_stats
++, delta
++,
382 max_delta
++, accum_stats
++) {
383 if (le32_to_cpu(*stats
) > le32_to_cpu(*prev_stats
)) {
384 *delta
= (le32_to_cpu(*stats
) -
385 le32_to_cpu(*prev_stats
));
386 *accum_stats
+= *delta
;
387 if (*delta
> *max_delta
)
392 /* reset accumulative statistics for "no-counter" type statistics */
393 priv
->_3945
.accum_statistics
.general
.temperature
=
394 priv
->_3945
.statistics
.general
.temperature
;
395 priv
->_3945
.accum_statistics
.general
.ttl_timestamp
=
396 priv
->_3945
.statistics
.general
.ttl_timestamp
;
400 void iwl3945_hw_rx_statistics(struct iwl_priv
*priv
,
401 struct iwl_rx_mem_buffer
*rxb
)
403 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
405 IWL_DEBUG_RX(priv
, "Statistics notification received (%d vs %d).\n",
406 (int)sizeof(struct iwl3945_notif_statistics
),
407 le32_to_cpu(pkt
->len_n_flags
) & FH_RSCSR_FRAME_SIZE_MSK
);
408 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
409 iwl3945_accumulative_statistics(priv
, (__le32
*)&pkt
->u
.raw
);
412 memcpy(&priv
->_3945
.statistics
, pkt
->u
.raw
, sizeof(priv
->_3945
.statistics
));
415 void iwl3945_reply_statistics(struct iwl_priv
*priv
,
416 struct iwl_rx_mem_buffer
*rxb
)
418 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
419 __le32
*flag
= (__le32
*)&pkt
->u
.raw
;
421 if (le32_to_cpu(*flag
) & UCODE_STATISTICS_CLEAR_MSK
) {
422 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
423 memset(&priv
->_3945
.accum_statistics
, 0,
424 sizeof(struct iwl3945_notif_statistics
));
425 memset(&priv
->_3945
.delta_statistics
, 0,
426 sizeof(struct iwl3945_notif_statistics
));
427 memset(&priv
->_3945
.max_delta
, 0,
428 sizeof(struct iwl3945_notif_statistics
));
430 IWL_DEBUG_RX(priv
, "Statistics have been cleared\n");
432 iwl3945_hw_rx_statistics(priv
, rxb
);
436 /******************************************************************************
438 * Misc. internal state and helper functions
440 ******************************************************************************/
442 /* This is necessary only for a number of statistics, see the caller. */
443 static int iwl3945_is_network_packet(struct iwl_priv
*priv
,
444 struct ieee80211_hdr
*header
)
446 /* Filter incoming packets to determine if they are targeted toward
447 * this network, discarding packets coming from ourselves */
448 switch (priv
->iw_mode
) {
449 case NL80211_IFTYPE_ADHOC
: /* Header: Dest. | Source | BSSID */
450 /* packets to our IBSS update information */
451 return !compare_ether_addr(header
->addr3
, priv
->bssid
);
452 case NL80211_IFTYPE_STATION
: /* Header: Dest. | AP{BSSID} | Source */
453 /* packets to our IBSS update information */
454 return !compare_ether_addr(header
->addr2
, priv
->bssid
);
460 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv
*priv
,
461 struct iwl_rx_mem_buffer
*rxb
,
462 struct ieee80211_rx_status
*stats
)
464 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
465 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)IWL_RX_DATA(pkt
);
466 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
467 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
468 u16 len
= le16_to_cpu(rx_hdr
->len
);
470 __le16 fc
= hdr
->frame_control
;
472 /* We received data from the HW, so stop the watchdog */
473 if (unlikely(len
+ IWL39_RX_FRAME_SIZE
>
474 PAGE_SIZE
<< priv
->hw_params
.rx_page_order
)) {
475 IWL_DEBUG_DROP(priv
, "Corruption detected!\n");
479 /* We only process data packets if the interface is open */
480 if (unlikely(!priv
->is_open
)) {
481 IWL_DEBUG_DROP_LIMIT(priv
,
482 "Dropping packet while interface is not open.\n");
486 skb
= dev_alloc_skb(128);
488 IWL_ERR(priv
, "dev_alloc_skb failed\n");
492 if (!iwl3945_mod_params
.sw_crypto
)
493 iwl_legacy_set_decrypted_flag(priv
,
494 (struct ieee80211_hdr
*)rxb_addr(rxb
),
495 le32_to_cpu(rx_end
->status
), stats
);
497 skb_add_rx_frag(skb
, 0, rxb
->page
,
498 (void *)rx_hdr
->payload
- (void *)pkt
, len
);
500 iwl_legacy_update_stats(priv
, false, fc
, len
);
501 memcpy(IEEE80211_SKB_RXCB(skb
), stats
, sizeof(*stats
));
503 ieee80211_rx(priv
->hw
, skb
);
504 priv
->alloc_rxb_page
--;
508 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
510 static void iwl3945_rx_reply_rx(struct iwl_priv
*priv
,
511 struct iwl_rx_mem_buffer
*rxb
)
513 struct ieee80211_hdr
*header
;
514 struct ieee80211_rx_status rx_status
;
515 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
516 struct iwl3945_rx_frame_stats
*rx_stats
= IWL_RX_STATS(pkt
);
517 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
518 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
519 u16 rx_stats_sig_avg __maybe_unused
= le16_to_cpu(rx_stats
->sig_avg
);
520 u16 rx_stats_noise_diff __maybe_unused
= le16_to_cpu(rx_stats
->noise_diff
);
524 rx_status
.mactime
= le64_to_cpu(rx_end
->timestamp
);
525 rx_status
.band
= (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ?
526 IEEE80211_BAND_2GHZ
: IEEE80211_BAND_5GHZ
;
528 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr
->channel
),
531 rx_status
.rate_idx
= iwl3945_hwrate_to_plcp_idx(rx_hdr
->rate
);
532 if (rx_status
.band
== IEEE80211_BAND_5GHZ
)
533 rx_status
.rate_idx
-= IWL_FIRST_OFDM_RATE
;
535 rx_status
.antenna
= (le16_to_cpu(rx_hdr
->phy_flags
) &
536 RX_RES_PHY_FLAGS_ANTENNA_MSK
) >> 4;
538 /* set the preamble flag if appropriate */
539 if (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
540 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
542 if ((unlikely(rx_stats
->phy_count
> 20))) {
543 IWL_DEBUG_DROP(priv
, "dsp size out of range [0,20]: %d/n",
544 rx_stats
->phy_count
);
548 if (!(rx_end
->status
& RX_RES_STATUS_NO_CRC32_ERROR
)
549 || !(rx_end
->status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
550 IWL_DEBUG_RX(priv
, "Bad CRC or FIFO: 0x%08X.\n", rx_end
->status
);
556 /* Convert 3945's rssi indicator to dBm */
557 rx_status
.signal
= rx_stats
->rssi
- IWL39_RSSI_OFFSET
;
559 IWL_DEBUG_STATS(priv
, "Rssi %d sig_avg %d noise_diff %d\n",
560 rx_status
.signal
, rx_stats_sig_avg
,
561 rx_stats_noise_diff
);
563 header
= (struct ieee80211_hdr
*)IWL_RX_DATA(pkt
);
565 network_packet
= iwl3945_is_network_packet(priv
, header
);
567 IWL_DEBUG_STATS_LIMIT(priv
, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
568 network_packet
? '*' : ' ',
569 le16_to_cpu(rx_hdr
->channel
),
570 rx_status
.signal
, rx_status
.signal
,
573 iwl_legacy_dbg_log_rx_data_frame(priv
, le16_to_cpu(rx_hdr
->len
),
576 if (network_packet
) {
577 priv
->_3945
.last_beacon_time
=
578 le32_to_cpu(rx_end
->beacon_timestamp
);
579 priv
->_3945
.last_tsf
= le64_to_cpu(rx_end
->timestamp
);
580 priv
->_3945
.last_rx_rssi
= rx_status
.signal
;
583 iwl3945_pass_packet_to_mac80211(priv
, rxb
, &rx_status
);
586 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv
*priv
,
587 struct iwl_tx_queue
*txq
,
588 dma_addr_t addr
, u16 len
, u8 reset
, u8 pad
)
592 struct iwl3945_tfd
*tfd
, *tfd_tmp
;
595 tfd_tmp
= (struct iwl3945_tfd
*)txq
->tfds
;
596 tfd
= &tfd_tmp
[q
->write_ptr
];
599 memset(tfd
, 0, sizeof(*tfd
));
601 count
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
603 if ((count
>= NUM_TFD_CHUNKS
) || (count
< 0)) {
604 IWL_ERR(priv
, "Error can not send more than %d chunks\n",
609 tfd
->tbs
[count
].addr
= cpu_to_le32(addr
);
610 tfd
->tbs
[count
].len
= cpu_to_le32(len
);
614 tfd
->control_flags
= cpu_to_le32(TFD_CTL_COUNT_SET(count
) |
615 TFD_CTL_PAD_SET(pad
));
621 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
623 * Does NOT advance any indexes
625 void iwl3945_hw_txq_free_tfd(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
)
627 struct iwl3945_tfd
*tfd_tmp
= (struct iwl3945_tfd
*)txq
->tfds
;
628 int index
= txq
->q
.read_ptr
;
629 struct iwl3945_tfd
*tfd
= &tfd_tmp
[index
];
630 struct pci_dev
*dev
= priv
->pci_dev
;
635 counter
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
636 if (counter
> NUM_TFD_CHUNKS
) {
637 IWL_ERR(priv
, "Too many chunks: %i\n", counter
);
638 /* @todo issue fatal error, it is quite serious situation */
644 pci_unmap_single(dev
,
645 dma_unmap_addr(&txq
->meta
[index
], mapping
),
646 dma_unmap_len(&txq
->meta
[index
], len
),
649 /* unmap chunks if any */
651 for (i
= 1; i
< counter
; i
++)
652 pci_unmap_single(dev
, le32_to_cpu(tfd
->tbs
[i
].addr
),
653 le32_to_cpu(tfd
->tbs
[i
].len
), PCI_DMA_TODEVICE
);
659 skb
= txq
->txb
[txq
->q
.read_ptr
].skb
;
661 /* can be called from irqs-disabled context */
663 dev_kfree_skb_any(skb
);
664 txq
->txb
[txq
->q
.read_ptr
].skb
= NULL
;
670 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
673 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv
*priv
,
674 struct iwl_device_cmd
*cmd
,
675 struct ieee80211_tx_info
*info
,
676 struct ieee80211_hdr
*hdr
,
677 int sta_id
, int tx_id
)
679 u16 hw_value
= ieee80211_get_tx_rate(priv
->hw
, info
)->hw_value
;
680 u16 rate_index
= min(hw_value
& 0xffff, IWL_RATE_COUNT_3945
);
686 __le16 fc
= hdr
->frame_control
;
687 struct iwl3945_tx_cmd
*tx_cmd
= (struct iwl3945_tx_cmd
*)cmd
->cmd
.payload
;
689 rate
= iwl3945_rates
[rate_index
].plcp
;
690 tx_flags
= tx_cmd
->tx_flags
;
692 /* We need to figure out how to get the sta->supp_rates while
693 * in this running context */
694 rate_mask
= IWL_RATES_MASK_3945
;
696 /* Set retry limit on DATA packets and Probe Responses*/
697 if (ieee80211_is_probe_resp(fc
))
698 data_retry_limit
= 3;
700 data_retry_limit
= IWL_DEFAULT_TX_RETRY
;
701 tx_cmd
->data_retry_limit
= data_retry_limit
;
703 if (tx_id
>= IWL39_CMD_QUEUE_NUM
)
708 if (data_retry_limit
< rts_retry_limit
)
709 rts_retry_limit
= data_retry_limit
;
710 tx_cmd
->rts_retry_limit
= rts_retry_limit
;
713 tx_cmd
->tx_flags
= tx_flags
;
716 tx_cmd
->supp_rates
[0] =
717 ((rate_mask
& IWL_OFDM_RATES_MASK
) >> IWL_FIRST_OFDM_RATE
) & 0xFF;
720 tx_cmd
->supp_rates
[1] = (rate_mask
& 0xF);
722 IWL_DEBUG_RATE(priv
, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
723 "cck/ofdm mask: 0x%x/0x%x\n", sta_id
,
724 tx_cmd
->rate
, le32_to_cpu(tx_cmd
->tx_flags
),
725 tx_cmd
->supp_rates
[1], tx_cmd
->supp_rates
[0]);
728 static u8
iwl3945_sync_sta(struct iwl_priv
*priv
, int sta_id
, u16 tx_rate
)
730 unsigned long flags_spin
;
731 struct iwl_station_entry
*station
;
733 if (sta_id
== IWL_INVALID_STATION
)
734 return IWL_INVALID_STATION
;
736 spin_lock_irqsave(&priv
->sta_lock
, flags_spin
);
737 station
= &priv
->stations
[sta_id
];
739 station
->sta
.sta
.modify_mask
= STA_MODIFY_TX_RATE_MSK
;
740 station
->sta
.rate_n_flags
= cpu_to_le16(tx_rate
);
741 station
->sta
.mode
= STA_CONTROL_MODIFY_MSK
;
742 iwl_legacy_send_add_sta(priv
, &station
->sta
, CMD_ASYNC
);
743 spin_unlock_irqrestore(&priv
->sta_lock
, flags_spin
);
745 IWL_DEBUG_RATE(priv
, "SCALE sync station %d to rate %d\n",
750 static void iwl3945_set_pwr_vmain(struct iwl_priv
*priv
)
753 * (for documentation purposes)
754 * to set power to V_AUX, do
756 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
757 iwl_legacy_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
758 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
759 ~APMG_PS_CTRL_MSK_PWR_SRC);
761 iwl_poll_bit(priv, CSR_GPIO_IN,
762 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
763 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
767 iwl_legacy_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
768 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
769 ~APMG_PS_CTRL_MSK_PWR_SRC
);
771 iwl_poll_bit(priv
, CSR_GPIO_IN
, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC
,
772 CSR_GPIO_IN_BIT_AUX_POWER
, 5000); /* uS */
775 static int iwl3945_rx_init(struct iwl_priv
*priv
, struct iwl_rx_queue
*rxq
)
777 iwl_legacy_write_direct32(priv
, FH39_RCSR_RBD_BASE(0), rxq
->bd_dma
);
778 iwl_legacy_write_direct32(priv
, FH39_RCSR_RPTR_ADDR(0),
780 iwl_legacy_write_direct32(priv
, FH39_RCSR_WPTR(0), 0);
781 iwl_legacy_write_direct32(priv
, FH39_RCSR_CONFIG(0),
782 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
|
783 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
|
784 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
|
785 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
|
786 (RX_QUEUE_SIZE_LOG
<< FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
) |
787 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
|
788 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
) |
789 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
);
791 /* fake read to flush all prev I/O */
792 iwl_legacy_read_direct32(priv
, FH39_RSSR_CTRL
);
797 static int iwl3945_tx_reset(struct iwl_priv
*priv
)
801 iwl_legacy_write_prph(priv
, ALM_SCD_MODE_REG
, 0x2);
804 iwl_legacy_write_prph(priv
, ALM_SCD_ARASTAT_REG
, 0x01);
806 /* all 6 fifo are active */
807 iwl_legacy_write_prph(priv
, ALM_SCD_TXFACT_REG
, 0x3f);
809 iwl_legacy_write_prph(priv
, ALM_SCD_SBYP_MODE_1_REG
, 0x010000);
810 iwl_legacy_write_prph(priv
, ALM_SCD_SBYP_MODE_2_REG
, 0x030002);
811 iwl_legacy_write_prph(priv
, ALM_SCD_TXF4MF_REG
, 0x000004);
812 iwl_legacy_write_prph(priv
, ALM_SCD_TXF5MF_REG
, 0x000005);
814 iwl_legacy_write_direct32(priv
, FH39_TSSR_CBB_BASE
,
815 priv
->_3945
.shared_phys
);
817 iwl_legacy_write_direct32(priv
, FH39_TSSR_MSG_CONFIG
,
818 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
|
819 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
|
820 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
|
821 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
|
822 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
|
823 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
|
824 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
);
831 * iwl3945_txq_ctx_reset - Reset TX queue context
833 * Destroys all DMA structures and initialize them again
835 static int iwl3945_txq_ctx_reset(struct iwl_priv
*priv
)
838 int txq_id
, slots_num
;
840 iwl3945_hw_txq_ctx_free(priv
);
842 /* allocate tx queue structure */
843 rc
= iwl_legacy_alloc_txq_mem(priv
);
848 rc
= iwl3945_tx_reset(priv
);
853 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
854 slots_num
= (txq_id
== IWL39_CMD_QUEUE_NUM
) ?
855 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
856 rc
= iwl_legacy_tx_queue_init(priv
, &priv
->txq
[txq_id
],
859 IWL_ERR(priv
, "Tx %d queue init failed\n", txq_id
);
867 iwl3945_hw_txq_ctx_free(priv
);
873 * Start up 3945's basic functionality after it has been reset
874 * (e.g. after platform boot, or shutdown via iwl_legacy_apm_stop())
875 * NOTE: This does not load uCode nor start the embedded processor
877 static int iwl3945_apm_init(struct iwl_priv
*priv
)
879 int ret
= iwl_legacy_apm_init(priv
);
881 /* Clear APMG (NIC's internal power management) interrupts */
882 iwl_legacy_write_prph(priv
, APMG_RTC_INT_MSK_REG
, 0x0);
883 iwl_legacy_write_prph(priv
, APMG_RTC_INT_STT_REG
, 0xFFFFFFFF);
885 /* Reset radio chip */
886 iwl_legacy_set_bits_prph(priv
, APMG_PS_CTRL_REG
,
887 APMG_PS_CTRL_VAL_RESET_REQ
);
889 iwl_legacy_clear_bits_prph(priv
, APMG_PS_CTRL_REG
,
890 APMG_PS_CTRL_VAL_RESET_REQ
);
895 static void iwl3945_nic_config(struct iwl_priv
*priv
)
897 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
899 u8 rev_id
= priv
->pci_dev
->revision
;
901 spin_lock_irqsave(&priv
->lock
, flags
);
903 /* Determine HW type */
904 IWL_DEBUG_INFO(priv
, "HW Revision ID = 0x%X\n", rev_id
);
906 if (rev_id
& PCI_CFG_REV_ID_BIT_RTP
)
907 IWL_DEBUG_INFO(priv
, "RTP type\n");
908 else if (rev_id
& PCI_CFG_REV_ID_BIT_BASIC_SKU
) {
909 IWL_DEBUG_INFO(priv
, "3945 RADIO-MB type\n");
910 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
911 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB
);
913 IWL_DEBUG_INFO(priv
, "3945 RADIO-MM type\n");
914 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
915 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM
);
918 if (EEPROM_SKU_CAP_OP_MODE_MRC
== eeprom
->sku_cap
) {
919 IWL_DEBUG_INFO(priv
, "SKU OP mode is mrc\n");
920 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
921 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC
);
923 IWL_DEBUG_INFO(priv
, "SKU OP mode is basic\n");
925 if ((eeprom
->board_revision
& 0xF0) == 0xD0) {
926 IWL_DEBUG_INFO(priv
, "3945ABG revision is 0x%X\n",
927 eeprom
->board_revision
);
928 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
929 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
931 IWL_DEBUG_INFO(priv
, "3945ABG revision is 0x%X\n",
932 eeprom
->board_revision
);
933 iwl_legacy_clear_bit(priv
, CSR_HW_IF_CONFIG_REG
,
934 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
937 if (eeprom
->almgor_m_version
<= 1) {
938 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
939 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
);
940 IWL_DEBUG_INFO(priv
, "Card M type A version is 0x%X\n",
941 eeprom
->almgor_m_version
);
943 IWL_DEBUG_INFO(priv
, "Card M type B version is 0x%X\n",
944 eeprom
->almgor_m_version
);
945 iwl_legacy_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
946 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
);
948 spin_unlock_irqrestore(&priv
->lock
, flags
);
950 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
)
951 IWL_DEBUG_RF_KILL(priv
, "SW RF KILL supported in EEPROM.\n");
953 if (eeprom
->sku_cap
& EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
)
954 IWL_DEBUG_RF_KILL(priv
, "HW RF KILL supported in EEPROM.\n");
957 int iwl3945_hw_nic_init(struct iwl_priv
*priv
)
961 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
963 spin_lock_irqsave(&priv
->lock
, flags
);
964 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
965 spin_unlock_irqrestore(&priv
->lock
, flags
);
967 iwl3945_set_pwr_vmain(priv
);
969 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
971 /* Allocate the RX queue, or reset if it is already allocated */
973 rc
= iwl_legacy_rx_queue_alloc(priv
);
975 IWL_ERR(priv
, "Unable to initialize Rx queue\n");
979 iwl3945_rx_queue_reset(priv
, rxq
);
981 iwl3945_rx_replenish(priv
);
983 iwl3945_rx_init(priv
, rxq
);
986 /* Look at using this instead:
987 rxq->need_update = 1;
988 iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
991 iwl_legacy_write_direct32(priv
, FH39_RCSR_WPTR(0), rxq
->write
& ~7);
993 rc
= iwl3945_txq_ctx_reset(priv
);
997 set_bit(STATUS_INIT
, &priv
->status
);
1003 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1005 * Destroy all TX DMA queues and structures
1007 void iwl3945_hw_txq_ctx_free(struct iwl_priv
*priv
)
1013 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
;
1015 if (txq_id
== IWL39_CMD_QUEUE_NUM
)
1016 iwl_legacy_cmd_queue_free(priv
);
1018 iwl_legacy_tx_queue_free(priv
, txq_id
);
1020 /* free tx queue structure */
1021 iwl_legacy_txq_mem(priv
);
1024 void iwl3945_hw_txq_ctx_stop(struct iwl_priv
*priv
)
1029 iwl_legacy_write_prph(priv
, ALM_SCD_MODE_REG
, 0);
1030 iwl_legacy_write_prph(priv
, ALM_SCD_TXFACT_REG
, 0);
1032 /* reset TFD queues */
1033 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
1034 iwl_legacy_write_direct32(priv
, FH39_TCSR_CONFIG(txq_id
), 0x0);
1035 iwl_poll_direct_bit(priv
, FH39_TSSR_TX_STATUS
,
1036 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id
),
1040 iwl3945_hw_txq_ctx_free(priv
);
1044 * iwl3945_hw_reg_adjust_power_by_temp
1045 * return index delta into power gain settings table
1047 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading
, int old_reading
)
1049 return (new_reading
- old_reading
) * (-11) / 100;
1053 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1055 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature
)
1057 return ((temperature
< -260) || (temperature
> 25)) ? 1 : 0;
1060 int iwl3945_hw_get_temperature(struct iwl_priv
*priv
)
1062 return iwl_read32(priv
, CSR_UCODE_DRV_GP2
);
1066 * iwl3945_hw_reg_txpower_get_temperature
1067 * get the current temperature by reading from NIC
1069 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv
*priv
)
1071 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1074 temperature
= iwl3945_hw_get_temperature(priv
);
1076 /* driver's okay range is -260 to +25.
1077 * human readable okay range is 0 to +285 */
1078 IWL_DEBUG_INFO(priv
, "Temperature: %d\n", temperature
+ IWL_TEMP_CONVERT
);
1080 /* handle insane temp reading */
1081 if (iwl3945_hw_reg_temp_out_of_range(temperature
)) {
1082 IWL_ERR(priv
, "Error bad temperature value %d\n", temperature
);
1084 /* if really really hot(?),
1085 * substitute the 3rd band/group's temp measured at factory */
1086 if (priv
->last_temperature
> 100)
1087 temperature
= eeprom
->groups
[2].temperature
;
1088 else /* else use most recent "sane" value from driver */
1089 temperature
= priv
->last_temperature
;
1092 return temperature
; /* raw, not "human readable" */
1095 /* Adjust Txpower only if temperature variance is greater than threshold.
1097 * Both are lower than older versions' 9 degrees */
1098 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1101 * iwl3945_is_temp_calib_needed - determines if new calibration is needed
1103 * records new temperature in tx_mgr->temperature.
1104 * replaces tx_mgr->last_temperature *only* if calib needed
1105 * (assumes caller will actually do the calibration!). */
1106 static int iwl3945_is_temp_calib_needed(struct iwl_priv
*priv
)
1110 priv
->temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
1111 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1113 /* get absolute value */
1114 if (temp_diff
< 0) {
1115 IWL_DEBUG_POWER(priv
, "Getting cooler, delta %d,\n", temp_diff
);
1116 temp_diff
= -temp_diff
;
1117 } else if (temp_diff
== 0)
1118 IWL_DEBUG_POWER(priv
, "Same temp,\n");
1120 IWL_DEBUG_POWER(priv
, "Getting warmer, delta %d,\n", temp_diff
);
1122 /* if we don't need calibration, *don't* update last_temperature */
1123 if (temp_diff
< IWL_TEMPERATURE_LIMIT_TIMER
) {
1124 IWL_DEBUG_POWER(priv
, "Timed thermal calib not needed\n");
1128 IWL_DEBUG_POWER(priv
, "Timed thermal calib needed\n");
1130 /* assume that caller will actually do calib ...
1131 * update the "last temperature" value */
1132 priv
->last_temperature
= priv
->temperature
;
1136 #define IWL_MAX_GAIN_ENTRIES 78
1137 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1138 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1140 /* radio and DSP power table, each step is 1/2 dB.
1141 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1142 static struct iwl3945_tx_power power_gain_table
[2][IWL_MAX_GAIN_ENTRIES
] = {
1144 {251, 127}, /* 2.4 GHz, highest power */
1221 {3, 95} }, /* 2.4 GHz, lowest power */
1223 {251, 127}, /* 5.x GHz, highest power */
1300 {3, 120} } /* 5.x GHz, lowest power */
1303 static inline u8
iwl3945_hw_reg_fix_power_index(int index
)
1307 if (index
>= IWL_MAX_GAIN_ENTRIES
)
1308 return IWL_MAX_GAIN_ENTRIES
- 1;
1312 /* Kick off thermal recalibration check every 60 seconds */
1313 #define REG_RECALIB_PERIOD (60)
1316 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1318 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1319 * or 6 Mbit (OFDM) rates.
1321 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv
*priv
, u32 scan_tbl_index
,
1322 s32 rate_index
, const s8
*clip_pwrs
,
1323 struct iwl_channel_info
*ch_info
,
1326 struct iwl3945_scan_power_info
*scan_power_info
;
1330 scan_power_info
= &ch_info
->scan_pwr_info
[scan_tbl_index
];
1332 /* use this channel group's 6Mbit clipping/saturation pwr,
1333 * but cap at regulatory scan power restriction (set during init
1334 * based on eeprom channel data) for this channel. */
1335 power
= min(ch_info
->scan_power
, clip_pwrs
[IWL_RATE_6M_INDEX_TABLE
]);
1337 power
= min(power
, priv
->tx_power_user_lmt
);
1338 scan_power_info
->requested_power
= power
;
1340 /* find difference between new scan *power* and current "normal"
1341 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1342 * current "normal" temperature-compensated Tx power *index* for
1343 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1345 power_index
= ch_info
->power_info
[rate_index
].power_table_index
1346 - (power
- ch_info
->power_info
1347 [IWL_RATE_6M_INDEX_TABLE
].requested_power
) * 2;
1349 /* store reference index that we use when adjusting *all* scan
1350 * powers. So we can accommodate user (all channel) or spectrum
1351 * management (single channel) power changes "between" temperature
1352 * feedback compensation procedures.
1353 * don't force fit this reference index into gain table; it may be a
1354 * negative number. This will help avoid errors when we're at
1355 * the lower bounds (highest gains, for warmest temperatures)
1358 /* don't exceed table bounds for "real" setting */
1359 power_index
= iwl3945_hw_reg_fix_power_index(power_index
);
1361 scan_power_info
->power_table_index
= power_index
;
1362 scan_power_info
->tpc
.tx_gain
=
1363 power_gain_table
[band_index
][power_index
].tx_gain
;
1364 scan_power_info
->tpc
.dsp_atten
=
1365 power_gain_table
[band_index
][power_index
].dsp_atten
;
1369 * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1371 * Configures power settings for all rates for the current channel,
1372 * using values from channel info struct, and send to NIC
1374 static int iwl3945_send_tx_power(struct iwl_priv
*priv
)
1377 const struct iwl_channel_info
*ch_info
= NULL
;
1378 struct iwl3945_txpowertable_cmd txpower
= {
1379 .channel
= priv
->contexts
[IWL_RXON_CTX_BSS
].active
.channel
,
1383 if (WARN_ONCE(test_bit(STATUS_SCAN_HW
, &priv
->status
),
1384 "TX Power requested while scanning!\n"))
1387 chan
= le16_to_cpu(priv
->contexts
[IWL_RXON_CTX_BSS
].active
.channel
);
1389 txpower
.band
= (priv
->band
== IEEE80211_BAND_5GHZ
) ? 0 : 1;
1390 ch_info
= iwl_legacy_get_channel_info(priv
, priv
->band
, chan
);
1393 "Failed to get channel info for channel %d [%d]\n",
1398 if (!iwl_legacy_is_channel_valid(ch_info
)) {
1399 IWL_DEBUG_POWER(priv
, "Not calling TX_PWR_TABLE_CMD on "
1400 "non-Tx channel.\n");
1404 /* fill cmd with power settings for all rates for current channel */
1405 /* Fill OFDM rate */
1406 for (rate_idx
= IWL_FIRST_OFDM_RATE
, i
= 0;
1407 rate_idx
<= IWL39_LAST_OFDM_RATE
; rate_idx
++, i
++) {
1409 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1410 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1412 IWL_DEBUG_POWER(priv
, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1413 le16_to_cpu(txpower
.channel
),
1415 txpower
.power
[i
].tpc
.tx_gain
,
1416 txpower
.power
[i
].tpc
.dsp_atten
,
1417 txpower
.power
[i
].rate
);
1419 /* Fill CCK rates */
1420 for (rate_idx
= IWL_FIRST_CCK_RATE
;
1421 rate_idx
<= IWL_LAST_CCK_RATE
; rate_idx
++, i
++) {
1422 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1423 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1425 IWL_DEBUG_POWER(priv
, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1426 le16_to_cpu(txpower
.channel
),
1428 txpower
.power
[i
].tpc
.tx_gain
,
1429 txpower
.power
[i
].tpc
.dsp_atten
,
1430 txpower
.power
[i
].rate
);
1433 return iwl_legacy_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
,
1434 sizeof(struct iwl3945_txpowertable_cmd
),
1440 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1441 * @ch_info: Channel to update. Uses power_info.requested_power.
1443 * Replace requested_power and base_power_index ch_info fields for
1446 * Called if user or spectrum management changes power preferences.
1447 * Takes into account h/w and modulation limitations (clip power).
1449 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1451 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1452 * properly fill out the scan powers, and actual h/w gain settings,
1453 * and send changes to NIC
1455 static int iwl3945_hw_reg_set_new_power(struct iwl_priv
*priv
,
1456 struct iwl_channel_info
*ch_info
)
1458 struct iwl3945_channel_power_info
*power_info
;
1459 int power_changed
= 0;
1461 const s8
*clip_pwrs
;
1464 /* Get this chnlgrp's rate-to-max/clip-powers table */
1465 clip_pwrs
= priv
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
1467 /* Get this channel's rate-to-current-power settings table */
1468 power_info
= ch_info
->power_info
;
1470 /* update OFDM Txpower settings */
1471 for (i
= IWL_RATE_6M_INDEX_TABLE
; i
<= IWL_RATE_54M_INDEX_TABLE
;
1472 i
++, ++power_info
) {
1475 /* limit new power to be no more than h/w capability */
1476 power
= min(ch_info
->curr_txpow
, clip_pwrs
[i
]);
1477 if (power
== power_info
->requested_power
)
1480 /* find difference between old and new requested powers,
1481 * update base (non-temp-compensated) power index */
1482 delta_idx
= (power
- power_info
->requested_power
) * 2;
1483 power_info
->base_power_index
-= delta_idx
;
1485 /* save new requested power value */
1486 power_info
->requested_power
= power
;
1491 /* update CCK Txpower settings, based on OFDM 12M setting ...
1492 * ... all CCK power settings for a given channel are the *same*. */
1493 if (power_changed
) {
1495 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1496 requested_power
+ IWL_CCK_FROM_OFDM_POWER_DIFF
;
1498 /* do all CCK rates' iwl3945_channel_power_info structures */
1499 for (i
= IWL_RATE_1M_INDEX_TABLE
; i
<= IWL_RATE_11M_INDEX_TABLE
; i
++) {
1500 power_info
->requested_power
= power
;
1501 power_info
->base_power_index
=
1502 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1503 base_power_index
+ IWL_CCK_FROM_OFDM_INDEX_DIFF
;
1512 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1514 * NOTE: Returned power limit may be less (but not more) than requested,
1515 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1516 * (no consideration for h/w clipping limitations).
1518 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info
*ch_info
)
1523 /* if we're using TGd limits, use lower of TGd or EEPROM */
1524 if (ch_info
->tgd_data
.max_power
!= 0)
1525 max_power
= min(ch_info
->tgd_data
.max_power
,
1526 ch_info
->eeprom
.max_power_avg
);
1528 /* else just use EEPROM limits */
1531 max_power
= ch_info
->eeprom
.max_power_avg
;
1533 return min(max_power
, ch_info
->max_power_avg
);
1537 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1539 * Compensate txpower settings of *all* channels for temperature.
1540 * This only accounts for the difference between current temperature
1541 * and the factory calibration temperatures, and bases the new settings
1542 * on the channel's base_power_index.
1544 * If RxOn is "associated", this sends the new Txpower to NIC!
1546 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv
*priv
)
1548 struct iwl_channel_info
*ch_info
= NULL
;
1549 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1551 const s8
*clip_pwrs
; /* array of h/w max power levels for each rate */
1557 int temperature
= priv
->temperature
;
1559 if (priv
->disable_tx_power_cal
||
1560 test_bit(STATUS_SCANNING
, &priv
->status
)) {
1561 /* do not perform tx power calibration */
1564 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1565 for (i
= 0; i
< priv
->channel_count
; i
++) {
1566 ch_info
= &priv
->channel_info
[i
];
1567 a_band
= iwl_legacy_is_channel_a_band(ch_info
);
1569 /* Get this chnlgrp's factory calibration temperature */
1570 ref_temp
= (s16
)eeprom
->groups
[ch_info
->group_index
].
1573 /* get power index adjustment based on current and factory
1575 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
1578 /* set tx power value for all rates, OFDM and CCK */
1579 for (rate_index
= 0; rate_index
< IWL_RATE_COUNT_3945
;
1582 ch_info
->power_info
[rate_index
].base_power_index
;
1584 /* temperature compensate */
1585 power_idx
+= delta_index
;
1587 /* stay within table range */
1588 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
1589 ch_info
->power_info
[rate_index
].
1590 power_table_index
= (u8
) power_idx
;
1591 ch_info
->power_info
[rate_index
].tpc
=
1592 power_gain_table
[a_band
][power_idx
];
1595 /* Get this chnlgrp's rate-to-max/clip-powers table */
1596 clip_pwrs
= priv
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
1598 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1599 for (scan_tbl_index
= 0;
1600 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
1601 s32 actual_index
= (scan_tbl_index
== 0) ?
1602 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
1603 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
1604 actual_index
, clip_pwrs
,
1609 /* send Txpower command for current channel to ucode */
1610 return priv
->cfg
->ops
->lib
->send_tx_power(priv
);
1613 int iwl3945_hw_reg_set_txpower(struct iwl_priv
*priv
, s8 power
)
1615 struct iwl_channel_info
*ch_info
;
1620 if (priv
->tx_power_user_lmt
== power
) {
1621 IWL_DEBUG_POWER(priv
, "Requested Tx power same as current "
1622 "limit: %ddBm.\n", power
);
1626 IWL_DEBUG_POWER(priv
, "Setting upper limit clamp to %ddBm.\n", power
);
1627 priv
->tx_power_user_lmt
= power
;
1629 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1631 for (i
= 0; i
< priv
->channel_count
; i
++) {
1632 ch_info
= &priv
->channel_info
[i
];
1633 a_band
= iwl_legacy_is_channel_a_band(ch_info
);
1635 /* find minimum power of all user and regulatory constraints
1636 * (does not consider h/w clipping limitations) */
1637 max_power
= iwl3945_hw_reg_get_ch_txpower_limit(ch_info
);
1638 max_power
= min(power
, max_power
);
1639 if (max_power
!= ch_info
->curr_txpow
) {
1640 ch_info
->curr_txpow
= max_power
;
1642 /* this considers the h/w clipping limitations */
1643 iwl3945_hw_reg_set_new_power(priv
, ch_info
);
1647 /* update txpower settings for all channels,
1648 * send to NIC if associated. */
1649 iwl3945_is_temp_calib_needed(priv
);
1650 iwl3945_hw_reg_comp_txpower_temp(priv
);
1655 static int iwl3945_send_rxon_assoc(struct iwl_priv
*priv
,
1656 struct iwl_rxon_context
*ctx
)
1659 struct iwl_rx_packet
*pkt
;
1660 struct iwl3945_rxon_assoc_cmd rxon_assoc
;
1661 struct iwl_host_cmd cmd
= {
1662 .id
= REPLY_RXON_ASSOC
,
1663 .len
= sizeof(rxon_assoc
),
1664 .flags
= CMD_WANT_SKB
,
1665 .data
= &rxon_assoc
,
1667 const struct iwl_legacy_rxon_cmd
*rxon1
= &ctx
->staging
;
1668 const struct iwl_legacy_rxon_cmd
*rxon2
= &ctx
->active
;
1670 if ((rxon1
->flags
== rxon2
->flags
) &&
1671 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1672 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1673 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1674 IWL_DEBUG_INFO(priv
, "Using current RXON_ASSOC. Not resending.\n");
1678 rxon_assoc
.flags
= ctx
->staging
.flags
;
1679 rxon_assoc
.filter_flags
= ctx
->staging
.filter_flags
;
1680 rxon_assoc
.ofdm_basic_rates
= ctx
->staging
.ofdm_basic_rates
;
1681 rxon_assoc
.cck_basic_rates
= ctx
->staging
.cck_basic_rates
;
1682 rxon_assoc
.reserved
= 0;
1684 rc
= iwl_legacy_send_cmd_sync(priv
, &cmd
);
1688 pkt
= (struct iwl_rx_packet
*)cmd
.reply_page
;
1689 if (pkt
->hdr
.flags
& IWL_CMD_FAILED_MSK
) {
1690 IWL_ERR(priv
, "Bad return from REPLY_RXON_ASSOC command\n");
1694 iwl_legacy_free_pages(priv
, cmd
.reply_page
);
1700 * iwl3945_commit_rxon - commit staging_rxon to hardware
1702 * The RXON command in staging_rxon is committed to the hardware and
1703 * the active_rxon structure is updated with the new data. This
1704 * function correctly transitions out of the RXON_ASSOC_MSK state if
1705 * a HW tune is required based on the RXON structure changes.
1707 int iwl3945_commit_rxon(struct iwl_priv
*priv
, struct iwl_rxon_context
*ctx
)
1709 /* cast away the const for active_rxon in this function */
1710 struct iwl3945_rxon_cmd
*active_rxon
= (void *)&ctx
->active
;
1711 struct iwl3945_rxon_cmd
*staging_rxon
= (void *)&ctx
->staging
;
1713 bool new_assoc
= !!(staging_rxon
->filter_flags
& RXON_FILTER_ASSOC_MSK
);
1715 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
1718 if (!iwl_legacy_is_alive(priv
))
1721 /* always get timestamp with Rx frame */
1722 staging_rxon
->flags
|= RXON_FLG_TSF2HOST_MSK
;
1724 /* select antenna */
1725 staging_rxon
->flags
&=
1726 ~(RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_SEL_MSK
);
1727 staging_rxon
->flags
|= iwl3945_get_antenna_flags(priv
);
1729 rc
= iwl_legacy_check_rxon_cmd(priv
, ctx
);
1731 IWL_ERR(priv
, "Invalid RXON configuration. Not committing.\n");
1735 /* If we don't need to send a full RXON, we can use
1736 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1737 * and other flags for the current radio configuration. */
1738 if (!iwl_legacy_full_rxon_required(priv
,
1739 &priv
->contexts
[IWL_RXON_CTX_BSS
])) {
1740 rc
= iwl_legacy_send_rxon_assoc(priv
,
1741 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
1743 IWL_ERR(priv
, "Error setting RXON_ASSOC "
1744 "configuration (%d).\n", rc
);
1748 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
1753 /* If we are currently associated and the new config requires
1754 * an RXON_ASSOC and the new config wants the associated mask enabled,
1755 * we must clear the associated from the active configuration
1756 * before we apply the new config */
1757 if (iwl_legacy_is_associated(priv
, IWL_RXON_CTX_BSS
) && new_assoc
) {
1758 IWL_DEBUG_INFO(priv
, "Toggling associated bit on current RXON\n");
1759 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
1762 * reserved4 and 5 could have been filled by the iwlcore code.
1763 * Let's clear them before pushing to the 3945.
1765 active_rxon
->reserved4
= 0;
1766 active_rxon
->reserved5
= 0;
1767 rc
= iwl_legacy_send_cmd_pdu(priv
, REPLY_RXON
,
1768 sizeof(struct iwl3945_rxon_cmd
),
1769 &priv
->contexts
[IWL_RXON_CTX_BSS
].active
);
1771 /* If the mask clearing failed then we set
1772 * active_rxon back to what it was previously */
1774 active_rxon
->filter_flags
|= RXON_FILTER_ASSOC_MSK
;
1775 IWL_ERR(priv
, "Error clearing ASSOC_MSK on current "
1776 "configuration (%d).\n", rc
);
1779 iwl_legacy_clear_ucode_stations(priv
,
1780 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
1781 iwl_legacy_restore_stations(priv
,
1782 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
1785 IWL_DEBUG_INFO(priv
, "Sending RXON\n"
1786 "* with%s RXON_FILTER_ASSOC_MSK\n"
1789 (new_assoc
? "" : "out"),
1790 le16_to_cpu(staging_rxon
->channel
),
1791 staging_rxon
->bssid_addr
);
1794 * reserved4 and 5 could have been filled by the iwlcore code.
1795 * Let's clear them before pushing to the 3945.
1797 staging_rxon
->reserved4
= 0;
1798 staging_rxon
->reserved5
= 0;
1800 iwl_legacy_set_rxon_hwcrypto(priv
, ctx
, !iwl3945_mod_params
.sw_crypto
);
1802 /* Apply the new configuration */
1803 rc
= iwl_legacy_send_cmd_pdu(priv
, REPLY_RXON
,
1804 sizeof(struct iwl3945_rxon_cmd
),
1807 IWL_ERR(priv
, "Error setting new configuration (%d).\n", rc
);
1811 memcpy(active_rxon
, staging_rxon
, sizeof(*active_rxon
));
1814 iwl_legacy_clear_ucode_stations(priv
,
1815 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
1816 iwl_legacy_restore_stations(priv
,
1817 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
1820 /* If we issue a new RXON command which required a tune then we must
1821 * send a new TXPOWER command or we won't be able to Tx any frames */
1822 rc
= iwl_legacy_set_tx_power(priv
, priv
->tx_power_next
, true);
1824 IWL_ERR(priv
, "Error setting Tx power (%d).\n", rc
);
1828 /* Init the hardware's rate fallback order based on the band */
1829 rc
= iwl3945_init_hw_rate_table(priv
);
1831 IWL_ERR(priv
, "Error setting HW rate table: %02X\n", rc
);
1839 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
1841 * -- reset periodic timer
1842 * -- see if temp has changed enough to warrant re-calibration ... if so:
1843 * -- correct coeffs for temp (can reset temp timer)
1844 * -- save this temp as "last",
1845 * -- send new set of gain settings to NIC
1846 * NOTE: This should continue working, even when we're not associated,
1847 * so we can keep our internal table of scan powers current. */
1848 void iwl3945_reg_txpower_periodic(struct iwl_priv
*priv
)
1850 /* This will kick in the "brute force"
1851 * iwl3945_hw_reg_comp_txpower_temp() below */
1852 if (!iwl3945_is_temp_calib_needed(priv
))
1855 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1856 * This is based *only* on current temperature,
1857 * ignoring any previous power measurements */
1858 iwl3945_hw_reg_comp_txpower_temp(priv
);
1861 queue_delayed_work(priv
->workqueue
,
1862 &priv
->_3945
.thermal_periodic
, REG_RECALIB_PERIOD
* HZ
);
1865 static void iwl3945_bg_reg_txpower_periodic(struct work_struct
*work
)
1867 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
1868 _3945
.thermal_periodic
.work
);
1870 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
1873 mutex_lock(&priv
->mutex
);
1874 iwl3945_reg_txpower_periodic(priv
);
1875 mutex_unlock(&priv
->mutex
);
1879 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1882 * This function is used when initializing channel-info structs.
1884 * NOTE: These channel groups do *NOT* match the bands above!
1885 * These channel groups are based on factory-tested channels;
1886 * on A-band, EEPROM's "group frequency" entries represent the top
1887 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
1889 static u16
iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv
*priv
,
1890 const struct iwl_channel_info
*ch_info
)
1892 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1893 struct iwl3945_eeprom_txpower_group
*ch_grp
= &eeprom
->groups
[0];
1895 u16 group_index
= 0; /* based on factory calib frequencies */
1898 /* Find the group index for the channel ... don't use index 1(?) */
1899 if (iwl_legacy_is_channel_a_band(ch_info
)) {
1900 for (group
= 1; group
< 5; group
++) {
1901 grp_channel
= ch_grp
[group
].group_channel
;
1902 if (ch_info
->channel
<= grp_channel
) {
1903 group_index
= group
;
1907 /* group 4 has a few channels *above* its factory cal freq */
1911 group_index
= 0; /* 2.4 GHz, group 0 */
1913 IWL_DEBUG_POWER(priv
, "Chnl %d mapped to grp %d\n", ch_info
->channel
,
1919 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1921 * Interpolate to get nominal (i.e. at factory calibration temperature) index
1922 * into radio/DSP gain settings table for requested power.
1924 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv
*priv
,
1926 s32 setting_index
, s32
*new_index
)
1928 const struct iwl3945_eeprom_txpower_group
*chnl_grp
= NULL
;
1929 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1931 s32 power
= 2 * requested_power
;
1933 const struct iwl3945_eeprom_txpower_sample
*samples
;
1938 chnl_grp
= &eeprom
->groups
[setting_index
];
1939 samples
= chnl_grp
->samples
;
1940 for (i
= 0; i
< 5; i
++) {
1941 if (power
== samples
[i
].power
) {
1942 *new_index
= samples
[i
].gain_index
;
1947 if (power
> samples
[1].power
) {
1950 } else if (power
> samples
[2].power
) {
1953 } else if (power
> samples
[3].power
) {
1961 denominator
= (s32
) samples
[index1
].power
- (s32
) samples
[index0
].power
;
1962 if (denominator
== 0)
1964 gains0
= (s32
) samples
[index0
].gain_index
* (1 << 19);
1965 gains1
= (s32
) samples
[index1
].gain_index
* (1 << 19);
1966 res
= gains0
+ (gains1
- gains0
) *
1967 ((s32
) power
- (s32
) samples
[index0
].power
) / denominator
+
1969 *new_index
= res
>> 19;
1973 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv
*priv
)
1977 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
1978 const struct iwl3945_eeprom_txpower_group
*group
;
1980 IWL_DEBUG_POWER(priv
, "Initializing factory calib info from EEPROM\n");
1982 for (i
= 0; i
< IWL_NUM_TX_CALIB_GROUPS
; i
++) {
1983 s8
*clip_pwrs
; /* table of power levels for each rate */
1984 s8 satur_pwr
; /* saturation power for each chnl group */
1985 group
= &eeprom
->groups
[i
];
1987 /* sanity check on factory saturation power value */
1988 if (group
->saturation_power
< 40) {
1989 IWL_WARN(priv
, "Error: saturation power is %d, "
1990 "less than minimum expected 40\n",
1991 group
->saturation_power
);
1996 * Derive requested power levels for each rate, based on
1997 * hardware capabilities (saturation power for band).
1998 * Basic value is 3dB down from saturation, with further
1999 * power reductions for highest 3 data rates. These
2000 * backoffs provide headroom for high rate modulation
2001 * power peaks, without too much distortion (clipping).
2003 /* we'll fill in this array with h/w max power levels */
2004 clip_pwrs
= (s8
*) priv
->_3945
.clip_groups
[i
].clip_powers
;
2006 /* divide factory saturation power by 2 to find -3dB level */
2007 satur_pwr
= (s8
) (group
->saturation_power
>> 1);
2009 /* fill in channel group's nominal powers for each rate */
2010 for (rate_index
= 0;
2011 rate_index
< IWL_RATE_COUNT_3945
; rate_index
++, clip_pwrs
++) {
2012 switch (rate_index
) {
2013 case IWL_RATE_36M_INDEX_TABLE
:
2014 if (i
== 0) /* B/G */
2015 *clip_pwrs
= satur_pwr
;
2017 *clip_pwrs
= satur_pwr
- 5;
2019 case IWL_RATE_48M_INDEX_TABLE
:
2021 *clip_pwrs
= satur_pwr
- 7;
2023 *clip_pwrs
= satur_pwr
- 10;
2025 case IWL_RATE_54M_INDEX_TABLE
:
2027 *clip_pwrs
= satur_pwr
- 9;
2029 *clip_pwrs
= satur_pwr
- 12;
2032 *clip_pwrs
= satur_pwr
;
2040 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2042 * Second pass (during init) to set up priv->channel_info
2044 * Set up Tx-power settings in our channel info database for each VALID
2045 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2046 * and current temperature.
2048 * Since this is based on current temperature (at init time), these values may
2049 * not be valid for very long, but it gives us a starting/default point,
2050 * and allows us to active (i.e. using Tx) scan.
2052 * This does *not* write values to NIC, just sets up our internal table.
2054 int iwl3945_txpower_set_from_eeprom(struct iwl_priv
*priv
)
2056 struct iwl_channel_info
*ch_info
= NULL
;
2057 struct iwl3945_channel_power_info
*pwr_info
;
2058 struct iwl3945_eeprom
*eeprom
= (struct iwl3945_eeprom
*)priv
->eeprom
;
2062 const s8
*clip_pwrs
; /* array of power levels for each rate */
2065 u8 pwr_index
, base_pwr_index
, a_band
;
2069 /* save temperature reference,
2070 * so we can determine next time to calibrate */
2071 temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
2072 priv
->last_temperature
= temperature
;
2074 iwl3945_hw_reg_init_channel_groups(priv
);
2076 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2077 for (i
= 0, ch_info
= priv
->channel_info
; i
< priv
->channel_count
;
2079 a_band
= iwl_legacy_is_channel_a_band(ch_info
);
2080 if (!iwl_legacy_is_channel_valid(ch_info
))
2083 /* find this channel's channel group (*not* "band") index */
2084 ch_info
->group_index
=
2085 iwl3945_hw_reg_get_ch_grp_index(priv
, ch_info
);
2087 /* Get this chnlgrp's rate->max/clip-powers table */
2088 clip_pwrs
= priv
->_3945
.clip_groups
[ch_info
->group_index
].clip_powers
;
2090 /* calculate power index *adjustment* value according to
2091 * diff between current temperature and factory temperature */
2092 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
2093 eeprom
->groups
[ch_info
->group_index
].
2096 IWL_DEBUG_POWER(priv
, "Delta index for channel %d: %d [%d]\n",
2097 ch_info
->channel
, delta_index
, temperature
+
2100 /* set tx power value for all OFDM rates */
2101 for (rate_index
= 0; rate_index
< IWL_OFDM_RATES
;
2103 s32
uninitialized_var(power_idx
);
2106 /* use channel group's clip-power table,
2107 * but don't exceed channel's max power */
2108 s8 pwr
= min(ch_info
->max_power_avg
,
2109 clip_pwrs
[rate_index
]);
2111 pwr_info
= &ch_info
->power_info
[rate_index
];
2113 /* get base (i.e. at factory-measured temperature)
2114 * power table index for this rate's power */
2115 rc
= iwl3945_hw_reg_get_matched_power_index(priv
, pwr
,
2116 ch_info
->group_index
,
2119 IWL_ERR(priv
, "Invalid power index\n");
2122 pwr_info
->base_power_index
= (u8
) power_idx
;
2124 /* temperature compensate */
2125 power_idx
+= delta_index
;
2127 /* stay within range of gain table */
2128 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
2130 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2131 pwr_info
->requested_power
= pwr
;
2132 pwr_info
->power_table_index
= (u8
) power_idx
;
2133 pwr_info
->tpc
.tx_gain
=
2134 power_gain_table
[a_band
][power_idx
].tx_gain
;
2135 pwr_info
->tpc
.dsp_atten
=
2136 power_gain_table
[a_band
][power_idx
].dsp_atten
;
2139 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2140 pwr_info
= &ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
];
2141 power
= pwr_info
->requested_power
+
2142 IWL_CCK_FROM_OFDM_POWER_DIFF
;
2143 pwr_index
= pwr_info
->power_table_index
+
2144 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2145 base_pwr_index
= pwr_info
->base_power_index
+
2146 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2148 /* stay within table range */
2149 pwr_index
= iwl3945_hw_reg_fix_power_index(pwr_index
);
2150 gain
= power_gain_table
[a_band
][pwr_index
].tx_gain
;
2151 dsp_atten
= power_gain_table
[a_band
][pwr_index
].dsp_atten
;
2153 /* fill each CCK rate's iwl3945_channel_power_info structure
2154 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2155 * NOTE: CCK rates start at end of OFDM rates! */
2156 for (rate_index
= 0;
2157 rate_index
< IWL_CCK_RATES
; rate_index
++) {
2158 pwr_info
= &ch_info
->power_info
[rate_index
+IWL_OFDM_RATES
];
2159 pwr_info
->requested_power
= power
;
2160 pwr_info
->power_table_index
= pwr_index
;
2161 pwr_info
->base_power_index
= base_pwr_index
;
2162 pwr_info
->tpc
.tx_gain
= gain
;
2163 pwr_info
->tpc
.dsp_atten
= dsp_atten
;
2166 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2167 for (scan_tbl_index
= 0;
2168 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
2169 s32 actual_index
= (scan_tbl_index
== 0) ?
2170 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
2171 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
2172 actual_index
, clip_pwrs
, ch_info
, a_band
);
2179 int iwl3945_hw_rxq_stop(struct iwl_priv
*priv
)
2183 iwl_legacy_write_direct32(priv
, FH39_RCSR_CONFIG(0), 0);
2184 rc
= iwl_poll_direct_bit(priv
, FH39_RSSR_STATUS
,
2185 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
, 1000);
2187 IWL_ERR(priv
, "Can't stop Rx DMA.\n");
2192 int iwl3945_hw_tx_queue_init(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
)
2194 int txq_id
= txq
->q
.id
;
2196 struct iwl3945_shared
*shared_data
= priv
->_3945
.shared_virt
;
2198 shared_data
->tx_base_ptr
[txq_id
] = cpu_to_le32((u32
)txq
->q
.dma_addr
);
2200 iwl_legacy_write_direct32(priv
, FH39_CBCC_CTRL(txq_id
), 0);
2201 iwl_legacy_write_direct32(priv
, FH39_CBCC_BASE(txq_id
), 0);
2203 iwl_legacy_write_direct32(priv
, FH39_TCSR_CONFIG(txq_id
),
2204 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT
|
2205 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF
|
2206 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD
|
2207 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL
|
2208 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
);
2210 /* fake read to flush all prev. writes */
2211 iwl_read32(priv
, FH39_TSSR_CBB_BASE
);
2219 static u16
iwl3945_get_hcmd_size(u8 cmd_id
, u16 len
)
2223 return sizeof(struct iwl3945_rxon_cmd
);
2224 case POWER_TABLE_CMD
:
2225 return sizeof(struct iwl3945_powertable_cmd
);
2232 static u16
iwl3945_build_addsta_hcmd(const struct iwl_legacy_addsta_cmd
*cmd
,
2235 struct iwl3945_addsta_cmd
*addsta
= (struct iwl3945_addsta_cmd
*)data
;
2236 addsta
->mode
= cmd
->mode
;
2237 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
2238 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
2239 addsta
->station_flags
= cmd
->station_flags
;
2240 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
2241 addsta
->tid_disable_tx
= cpu_to_le16(0);
2242 addsta
->rate_n_flags
= cmd
->rate_n_flags
;
2243 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
2244 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
2245 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
2247 return (u16
)sizeof(struct iwl3945_addsta_cmd
);
2250 static int iwl3945_add_bssid_station(struct iwl_priv
*priv
,
2251 const u8
*addr
, u8
*sta_id_r
)
2253 struct iwl_rxon_context
*ctx
= &priv
->contexts
[IWL_RXON_CTX_BSS
];
2256 unsigned long flags
;
2259 *sta_id_r
= IWL_INVALID_STATION
;
2261 ret
= iwl_legacy_add_station_common(priv
, ctx
, addr
, 0, NULL
, &sta_id
);
2263 IWL_ERR(priv
, "Unable to add station %pM\n", addr
);
2270 spin_lock_irqsave(&priv
->sta_lock
, flags
);
2271 priv
->stations
[sta_id
].used
|= IWL_STA_LOCAL
;
2272 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
2276 static int iwl3945_manage_ibss_station(struct iwl_priv
*priv
,
2277 struct ieee80211_vif
*vif
, bool add
)
2279 struct iwl_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
2283 ret
= iwl3945_add_bssid_station(priv
, vif
->bss_conf
.bssid
,
2284 &vif_priv
->ibss_bssid_sta_id
);
2288 iwl3945_sync_sta(priv
, vif_priv
->ibss_bssid_sta_id
,
2289 (priv
->band
== IEEE80211_BAND_5GHZ
) ?
2290 IWL_RATE_6M_PLCP
: IWL_RATE_1M_PLCP
);
2291 iwl3945_rate_scale_init(priv
->hw
, vif_priv
->ibss_bssid_sta_id
);
2296 return iwl_legacy_remove_station(priv
, vif_priv
->ibss_bssid_sta_id
,
2297 vif
->bss_conf
.bssid
);
2301 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2303 int iwl3945_init_hw_rate_table(struct iwl_priv
*priv
)
2305 int rc
, i
, index
, prev_index
;
2306 struct iwl3945_rate_scaling_cmd rate_cmd
= {
2307 .reserved
= {0, 0, 0},
2309 struct iwl3945_rate_scaling_info
*table
= rate_cmd
.table
;
2311 for (i
= 0; i
< ARRAY_SIZE(iwl3945_rates
); i
++) {
2312 index
= iwl3945_rates
[i
].table_rs_index
;
2314 table
[index
].rate_n_flags
=
2315 iwl3945_hw_set_rate_n_flags(iwl3945_rates
[i
].plcp
, 0);
2316 table
[index
].try_cnt
= priv
->retry_rate
;
2317 prev_index
= iwl3945_get_prev_ieee_rate(i
);
2318 table
[index
].next_rate_index
=
2319 iwl3945_rates
[prev_index
].table_rs_index
;
2322 switch (priv
->band
) {
2323 case IEEE80211_BAND_5GHZ
:
2324 IWL_DEBUG_RATE(priv
, "Select A mode rate scale\n");
2325 /* If one of the following CCK rates is used,
2326 * have it fall back to the 6M OFDM rate */
2327 for (i
= IWL_RATE_1M_INDEX_TABLE
;
2328 i
<= IWL_RATE_11M_INDEX_TABLE
; i
++)
2329 table
[i
].next_rate_index
=
2330 iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2332 /* Don't fall back to CCK rates */
2333 table
[IWL_RATE_12M_INDEX_TABLE
].next_rate_index
=
2334 IWL_RATE_9M_INDEX_TABLE
;
2336 /* Don't drop out of OFDM rates */
2337 table
[IWL_RATE_6M_INDEX_TABLE
].next_rate_index
=
2338 iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2341 case IEEE80211_BAND_2GHZ
:
2342 IWL_DEBUG_RATE(priv
, "Select B/G mode rate scale\n");
2343 /* If an OFDM rate is used, have it fall back to the
2346 if (!(priv
->_3945
.sta_supp_rates
& IWL_OFDM_RATES_MASK
) &&
2347 iwl_legacy_is_associated(priv
, IWL_RXON_CTX_BSS
)) {
2349 index
= IWL_FIRST_CCK_RATE
;
2350 for (i
= IWL_RATE_6M_INDEX_TABLE
;
2351 i
<= IWL_RATE_54M_INDEX_TABLE
; i
++)
2352 table
[i
].next_rate_index
=
2353 iwl3945_rates
[index
].table_rs_index
;
2355 index
= IWL_RATE_11M_INDEX_TABLE
;
2356 /* CCK shouldn't fall back to OFDM... */
2357 table
[index
].next_rate_index
= IWL_RATE_5M_INDEX_TABLE
;
2366 /* Update the rate scaling for control frame Tx */
2367 rate_cmd
.table_id
= 0;
2368 rc
= iwl_legacy_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2373 /* Update the rate scaling for data frame Tx */
2374 rate_cmd
.table_id
= 1;
2375 return iwl_legacy_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2379 /* Called when initializing driver */
2380 int iwl3945_hw_set_hw_params(struct iwl_priv
*priv
)
2382 memset((void *)&priv
->hw_params
, 0,
2383 sizeof(struct iwl_hw_params
));
2385 priv
->_3945
.shared_virt
=
2386 dma_alloc_coherent(&priv
->pci_dev
->dev
,
2387 sizeof(struct iwl3945_shared
),
2388 &priv
->_3945
.shared_phys
, GFP_KERNEL
);
2389 if (!priv
->_3945
.shared_virt
) {
2390 IWL_ERR(priv
, "failed to allocate pci memory\n");
2394 /* Assign number of Usable TX queues */
2395 priv
->hw_params
.max_txq_num
= priv
->cfg
->base_params
->num_of_queues
;
2397 priv
->hw_params
.tfd_size
= sizeof(struct iwl3945_tfd
);
2398 priv
->hw_params
.rx_page_order
= get_order(IWL_RX_BUF_SIZE_3K
);
2399 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
2400 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
2401 priv
->hw_params
.max_stations
= IWL3945_STATION_COUNT
;
2402 priv
->contexts
[IWL_RXON_CTX_BSS
].bcast_sta_id
= IWL3945_BROADCAST_ID
;
2404 priv
->sta_key_max_num
= STA_KEY_MAX_NUM
;
2406 priv
->hw_params
.rx_wrt_ptr_reg
= FH39_RSCSR_CHNL0_WPTR
;
2407 priv
->hw_params
.max_beacon_itrvl
= IWL39_MAX_UCODE_BEACON_INTERVAL
;
2408 priv
->hw_params
.beacon_time_tsf_bits
= IWL3945_EXT_BEACON_TIME_POS
;
2413 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv
*priv
,
2414 struct iwl3945_frame
*frame
, u8 rate
)
2416 struct iwl3945_tx_beacon_cmd
*tx_beacon_cmd
;
2417 unsigned int frame_size
;
2419 tx_beacon_cmd
= (struct iwl3945_tx_beacon_cmd
*)&frame
->u
;
2420 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
2422 tx_beacon_cmd
->tx
.sta_id
=
2423 priv
->contexts
[IWL_RXON_CTX_BSS
].bcast_sta_id
;
2424 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
2426 frame_size
= iwl3945_fill_beacon_frame(priv
,
2427 tx_beacon_cmd
->frame
,
2428 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
2430 BUG_ON(frame_size
> MAX_MPDU_SIZE
);
2431 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
2433 tx_beacon_cmd
->tx
.rate
= rate
;
2434 tx_beacon_cmd
->tx
.tx_flags
= (TX_CMD_FLG_SEQ_CTL_MSK
|
2435 TX_CMD_FLG_TSF_MSK
);
2437 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2438 tx_beacon_cmd
->tx
.supp_rates
[0] =
2439 (IWL_OFDM_BASIC_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
2441 tx_beacon_cmd
->tx
.supp_rates
[1] =
2442 (IWL_CCK_BASIC_RATES_MASK
& 0xF);
2444 return sizeof(struct iwl3945_tx_beacon_cmd
) + frame_size
;
2447 void iwl3945_hw_rx_handler_setup(struct iwl_priv
*priv
)
2449 priv
->rx_handlers
[REPLY_TX
] = iwl3945_rx_reply_tx
;
2450 priv
->rx_handlers
[REPLY_3945_RX
] = iwl3945_rx_reply_rx
;
2453 void iwl3945_hw_setup_deferred_work(struct iwl_priv
*priv
)
2455 INIT_DELAYED_WORK(&priv
->_3945
.thermal_periodic
,
2456 iwl3945_bg_reg_txpower_periodic
);
2459 void iwl3945_hw_cancel_deferred_work(struct iwl_priv
*priv
)
2461 cancel_delayed_work(&priv
->_3945
.thermal_periodic
);
2464 /* check contents of special bootstrap uCode SRAM */
2465 static int iwl3945_verify_bsm(struct iwl_priv
*priv
)
2467 __le32
*image
= priv
->ucode_boot
.v_addr
;
2468 u32 len
= priv
->ucode_boot
.len
;
2472 IWL_DEBUG_INFO(priv
, "Begin verify bsm\n");
2474 /* verify BSM SRAM contents */
2475 val
= iwl_legacy_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
2476 for (reg
= BSM_SRAM_LOWER_BOUND
;
2477 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
2478 reg
+= sizeof(u32
), image
++) {
2479 val
= iwl_legacy_read_prph(priv
, reg
);
2480 if (val
!= le32_to_cpu(*image
)) {
2481 IWL_ERR(priv
, "BSM uCode verification failed at "
2482 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2483 BSM_SRAM_LOWER_BOUND
,
2484 reg
- BSM_SRAM_LOWER_BOUND
, len
,
2485 val
, le32_to_cpu(*image
));
2490 IWL_DEBUG_INFO(priv
, "BSM bootstrap uCode image OK\n");
2496 /******************************************************************************
2498 * EEPROM related functions
2500 ******************************************************************************/
2503 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2504 * embedded controller) as EEPROM reader; each read is a series of pulses
2505 * to/from the EEPROM chip, not a single event, so even reads could conflict
2506 * if they weren't arbitrated by some ownership mechanism. Here, the driver
2507 * simply claims ownership, which should be safe when this function is called
2508 * (i.e. before loading uCode!).
2510 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv
*priv
)
2512 _iwl_legacy_clear_bit(priv
, CSR_EEPROM_GP
, CSR_EEPROM_GP_IF_OWNER_MSK
);
2517 static void iwl3945_eeprom_release_semaphore(struct iwl_priv
*priv
)
2523 * iwl3945_load_bsm - Load bootstrap instructions
2527 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2528 * in special SRAM that does not power down during RFKILL. When powering back
2529 * up after power-saving sleeps (or during initial uCode load), the BSM loads
2530 * the bootstrap program into the on-board processor, and starts it.
2532 * The bootstrap program loads (via DMA) instructions and data for a new
2533 * program from host DRAM locations indicated by the host driver in the
2534 * BSM_DRAM_* registers. Once the new program is loaded, it starts
2537 * When initializing the NIC, the host driver points the BSM to the
2538 * "initialize" uCode image. This uCode sets up some internal data, then
2539 * notifies host via "initialize alive" that it is complete.
2541 * The host then replaces the BSM_DRAM_* pointer values to point to the
2542 * normal runtime uCode instructions and a backup uCode data cache buffer
2543 * (filled initially with starting data values for the on-board processor),
2544 * then triggers the "initialize" uCode to load and launch the runtime uCode,
2545 * which begins normal operation.
2547 * When doing a power-save shutdown, runtime uCode saves data SRAM into
2548 * the backup data cache in DRAM before SRAM is powered down.
2550 * When powering back up, the BSM loads the bootstrap program. This reloads
2551 * the runtime uCode instructions and the backup data cache into SRAM,
2552 * and re-launches the runtime uCode from where it left off.
2554 static int iwl3945_load_bsm(struct iwl_priv
*priv
)
2556 __le32
*image
= priv
->ucode_boot
.v_addr
;
2557 u32 len
= priv
->ucode_boot
.len
;
2567 IWL_DEBUG_INFO(priv
, "Begin load bsm\n");
2569 /* make sure bootstrap program is no larger than BSM's SRAM size */
2570 if (len
> IWL39_MAX_BSM_SIZE
)
2573 /* Tell bootstrap uCode where to find the "Initialize" uCode
2574 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2575 * NOTE: iwl3945_initialize_alive_start() will replace these values,
2576 * after the "initialize" uCode has run, to point to
2577 * runtime/protocol instructions and backup data cache. */
2578 pinst
= priv
->ucode_init
.p_addr
;
2579 pdata
= priv
->ucode_init_data
.p_addr
;
2580 inst_len
= priv
->ucode_init
.len
;
2581 data_len
= priv
->ucode_init_data
.len
;
2583 iwl_legacy_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
2584 iwl_legacy_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
2585 iwl_legacy_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
2586 iwl_legacy_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
2588 /* Fill BSM memory with bootstrap instructions */
2589 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
2590 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
2591 reg_offset
+= sizeof(u32
), image
++)
2592 _iwl_legacy_write_prph(priv
, reg_offset
,
2593 le32_to_cpu(*image
));
2595 rc
= iwl3945_verify_bsm(priv
);
2599 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2600 iwl_legacy_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
2601 iwl_legacy_write_prph(priv
, BSM_WR_MEM_DST_REG
,
2602 IWL39_RTC_INST_LOWER_BOUND
);
2603 iwl_legacy_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
2605 /* Load bootstrap code into instruction SRAM now,
2606 * to prepare to load "initialize" uCode */
2607 iwl_legacy_write_prph(priv
, BSM_WR_CTRL_REG
,
2608 BSM_WR_CTRL_REG_BIT_START
);
2610 /* Wait for load of bootstrap uCode to finish */
2611 for (i
= 0; i
< 100; i
++) {
2612 done
= iwl_legacy_read_prph(priv
, BSM_WR_CTRL_REG
);
2613 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
2618 IWL_DEBUG_INFO(priv
, "BSM write complete, poll %d iterations\n", i
);
2620 IWL_ERR(priv
, "BSM write did not complete!\n");
2624 /* Enable future boot loads whenever power management unit triggers it
2625 * (e.g. when powering back up after power-save shutdown) */
2626 iwl_legacy_write_prph(priv
, BSM_WR_CTRL_REG
,
2627 BSM_WR_CTRL_REG_BIT_START_EN
);
2632 static struct iwl_hcmd_ops iwl3945_hcmd
= {
2633 .rxon_assoc
= iwl3945_send_rxon_assoc
,
2634 .commit_rxon
= iwl3945_commit_rxon
,
2637 static struct iwl_lib_ops iwl3945_lib
= {
2638 .txq_attach_buf_to_tfd
= iwl3945_hw_txq_attach_buf_to_tfd
,
2639 .txq_free_tfd
= iwl3945_hw_txq_free_tfd
,
2640 .txq_init
= iwl3945_hw_tx_queue_init
,
2641 .load_ucode
= iwl3945_load_bsm
,
2642 .dump_nic_event_log
= iwl3945_dump_nic_event_log
,
2643 .dump_nic_error_log
= iwl3945_dump_nic_error_log
,
2645 .init
= iwl3945_apm_init
,
2646 .config
= iwl3945_nic_config
,
2649 .regulatory_bands
= {
2650 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2651 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2652 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2653 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2654 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2655 EEPROM_REGULATORY_BAND_NO_HT40
,
2656 EEPROM_REGULATORY_BAND_NO_HT40
,
2658 .acquire_semaphore
= iwl3945_eeprom_acquire_semaphore
,
2659 .release_semaphore
= iwl3945_eeprom_release_semaphore
,
2661 .send_tx_power
= iwl3945_send_tx_power
,
2662 .is_valid_rtc_data_addr
= iwl3945_hw_valid_rtc_data_addr
,
2665 .rx_stats_read
= iwl3945_ucode_rx_stats_read
,
2666 .tx_stats_read
= iwl3945_ucode_tx_stats_read
,
2667 .general_stats_read
= iwl3945_ucode_general_stats_read
,
2671 static const struct iwl_legacy_ops iwl3945_legacy_ops
= {
2672 .post_associate
= iwl3945_post_associate
,
2673 .config_ap
= iwl3945_config_ap
,
2674 .manage_ibss_station
= iwl3945_manage_ibss_station
,
2677 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils
= {
2678 .get_hcmd_size
= iwl3945_get_hcmd_size
,
2679 .build_addsta_hcmd
= iwl3945_build_addsta_hcmd
,
2680 .request_scan
= iwl3945_request_scan
,
2681 .post_scan
= iwl3945_post_scan
,
2684 static const struct iwl_ops iwl3945_ops
= {
2685 .lib
= &iwl3945_lib
,
2686 .hcmd
= &iwl3945_hcmd
,
2687 .utils
= &iwl3945_hcmd_utils
,
2688 .led
= &iwl3945_led_ops
,
2689 .legacy
= &iwl3945_legacy_ops
,
2690 .ieee80211_ops
= &iwl3945_hw_ops
,
2693 static struct iwl_base_params iwl3945_base_params
= {
2694 .eeprom_size
= IWL3945_EEPROM_IMG_SIZE
,
2695 .num_of_queues
= IWL39_NUM_QUEUES
,
2696 .pll_cfg_val
= CSR39_ANA_PLL_CFG_VAL
,
2699 .led_compensation
= 64,
2700 .wd_timeout
= IWL_DEF_WD_TIMEOUT
,
2701 .max_event_log_size
= 512,
2704 static struct iwl_cfg iwl3945_bg_cfg
= {
2706 .fw_name_pre
= IWL3945_FW_PRE
,
2707 .ucode_api_max
= IWL3945_UCODE_API_MAX
,
2708 .ucode_api_min
= IWL3945_UCODE_API_MIN
,
2710 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2711 .ops
= &iwl3945_ops
,
2712 .mod_params
= &iwl3945_mod_params
,
2713 .base_params
= &iwl3945_base_params
,
2714 .led_mode
= IWL_LED_BLINK
,
2717 static struct iwl_cfg iwl3945_abg_cfg
= {
2719 .fw_name_pre
= IWL3945_FW_PRE
,
2720 .ucode_api_max
= IWL3945_UCODE_API_MAX
,
2721 .ucode_api_min
= IWL3945_UCODE_API_MIN
,
2722 .sku
= IWL_SKU_A
|IWL_SKU_G
,
2723 .eeprom_ver
= EEPROM_3945_EEPROM_VERSION
,
2724 .ops
= &iwl3945_ops
,
2725 .mod_params
= &iwl3945_mod_params
,
2726 .base_params
= &iwl3945_base_params
,
2727 .led_mode
= IWL_LED_BLINK
,
2730 DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids
) = {
2731 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg
)},
2732 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg
)},
2733 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg
)},
2734 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg
)},
2735 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID
, iwl3945_abg_cfg
)},
2736 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID
, iwl3945_abg_cfg
)},
2740 MODULE_DEVICE_TABLE(pci
, iwl3945_hw_card_ids
);