1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/pkt_sched.h>
38 #include <linux/ipv6.h>
39 #include <linux/slab.h>
40 #include <net/checksum.h>
41 #include <net/ip6_checksum.h>
42 #include <linux/ethtool.h>
43 #include <linux/if_vlan.h>
44 #include <scsi/fc/fc_fcoe.h>
47 #include "ixgbe_common.h"
48 #include "ixgbe_dcb_82599.h"
49 #include "ixgbe_sriov.h"
51 char ixgbe_driver_name
[] = "ixgbe";
52 static const char ixgbe_driver_string
[] =
53 "Intel(R) 10 Gigabit PCI Express Network Driver";
55 #define DRV_VERSION "2.0.62-k2"
56 const char ixgbe_driver_version
[] = DRV_VERSION
;
57 static char ixgbe_copyright
[] = "Copyright (c) 1999-2010 Intel Corporation.";
59 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
60 [board_82598
] = &ixgbe_82598_info
,
61 [board_82599
] = &ixgbe_82599_info
,
64 /* ixgbe_pci_tbl - PCI Device ID Table
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
72 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
),
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
),
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
),
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
),
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
),
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
),
114 /* required last entry */
117 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
119 #ifdef CONFIG_IXGBE_DCA
120 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
122 static struct notifier_block dca_notifier
= {
123 .notifier_call
= ixgbe_notify_dca
,
129 #ifdef CONFIG_PCI_IOV
130 static unsigned int max_vfs
;
131 module_param(max_vfs
, uint
, 0);
132 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
133 "per physical function");
134 #endif /* CONFIG_PCI_IOV */
136 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
137 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
138 MODULE_LICENSE("GPL");
139 MODULE_VERSION(DRV_VERSION
);
141 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
143 static inline void ixgbe_disable_sriov(struct ixgbe_adapter
*adapter
)
145 struct ixgbe_hw
*hw
= &adapter
->hw
;
150 #ifdef CONFIG_PCI_IOV
151 /* disable iov and allow time for transactions to clear */
152 pci_disable_sriov(adapter
->pdev
);
155 /* turn off device IOV mode */
156 gcr
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
157 gcr
&= ~(IXGBE_GCR_EXT_SRIOV
);
158 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr
);
159 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
160 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
161 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
163 /* set default pool back to 0 */
164 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
165 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
166 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
168 /* take a breather then clean up driver data */
171 kfree(adapter
->vfinfo
);
172 adapter
->vfinfo
= NULL
;
174 adapter
->num_vfs
= 0;
175 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
178 struct ixgbe_reg_info
{
183 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
185 /* General Registers */
186 {IXGBE_CTRL
, "CTRL"},
187 {IXGBE_STATUS
, "STATUS"},
188 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
190 /* Interrupt Registers */
191 {IXGBE_EICR
, "EICR"},
194 {IXGBE_SRRCTL(0), "SRRCTL"},
195 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
196 {IXGBE_RDLEN(0), "RDLEN"},
197 {IXGBE_RDH(0), "RDH"},
198 {IXGBE_RDT(0), "RDT"},
199 {IXGBE_RXDCTL(0), "RXDCTL"},
200 {IXGBE_RDBAL(0), "RDBAL"},
201 {IXGBE_RDBAH(0), "RDBAH"},
204 {IXGBE_TDBAL(0), "TDBAL"},
205 {IXGBE_TDBAH(0), "TDBAH"},
206 {IXGBE_TDLEN(0), "TDLEN"},
207 {IXGBE_TDH(0), "TDH"},
208 {IXGBE_TDT(0), "TDT"},
209 {IXGBE_TXDCTL(0), "TXDCTL"},
211 /* List Terminator */
217 * ixgbe_regdump - register printout routine
219 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
225 switch (reginfo
->ofs
) {
226 case IXGBE_SRRCTL(0):
227 for (i
= 0; i
< 64; i
++)
228 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
230 case IXGBE_DCA_RXCTRL(0):
231 for (i
= 0; i
< 64; i
++)
232 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
235 for (i
= 0; i
< 64; i
++)
236 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
239 for (i
= 0; i
< 64; i
++)
240 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
243 for (i
= 0; i
< 64; i
++)
244 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
246 case IXGBE_RXDCTL(0):
247 for (i
= 0; i
< 64; i
++)
248 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
251 for (i
= 0; i
< 64; i
++)
252 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
255 for (i
= 0; i
< 64; i
++)
256 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
259 for (i
= 0; i
< 64; i
++)
260 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
263 for (i
= 0; i
< 64; i
++)
264 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
267 for (i
= 0; i
< 64; i
++)
268 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
271 for (i
= 0; i
< 64; i
++)
272 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
275 for (i
= 0; i
< 64; i
++)
276 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
278 case IXGBE_TXDCTL(0):
279 for (i
= 0; i
< 64; i
++)
280 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
283 printk(KERN_INFO
"%-15s %08x\n", reginfo
->name
,
284 IXGBE_READ_REG(hw
, reginfo
->ofs
));
288 for (i
= 0; i
< 8; i
++) {
289 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
290 printk(KERN_ERR
"%-15s ", rname
);
291 for (j
= 0; j
< 8; j
++)
292 printk(KERN_CONT
"%08x ", regs
[i
*8+j
]);
293 printk(KERN_CONT
"\n");
299 * ixgbe_dump - Print registers, tx-rings and rx-rings
301 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
303 struct net_device
*netdev
= adapter
->netdev
;
304 struct ixgbe_hw
*hw
= &adapter
->hw
;
305 struct ixgbe_reg_info
*reginfo
;
307 struct ixgbe_ring
*tx_ring
;
308 struct ixgbe_tx_buffer
*tx_buffer_info
;
309 union ixgbe_adv_tx_desc
*tx_desc
;
310 struct my_u0
{ u64 a
; u64 b
; } *u0
;
311 struct ixgbe_ring
*rx_ring
;
312 union ixgbe_adv_rx_desc
*rx_desc
;
313 struct ixgbe_rx_buffer
*rx_buffer_info
;
317 if (!netif_msg_hw(adapter
))
320 /* Print netdevice Info */
322 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
323 printk(KERN_INFO
"Device Name state "
324 "trans_start last_rx\n");
325 printk(KERN_INFO
"%-15s %016lX %016lX %016lX\n",
332 /* Print Registers */
333 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
334 printk(KERN_INFO
" Register Name Value\n");
335 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
336 reginfo
->name
; reginfo
++) {
337 ixgbe_regdump(hw
, reginfo
);
340 /* Print TX Ring Summary */
341 if (!netdev
|| !netif_running(netdev
))
344 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
345 printk(KERN_INFO
"Queue [NTU] [NTC] [bi(ntc)->dma ] "
346 "leng ntw timestamp\n");
347 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
348 tx_ring
= adapter
->tx_ring
[n
];
350 &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
351 printk(KERN_INFO
" %5d %5X %5X %016llX %04X %3X %016llX\n",
352 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
353 (u64
)tx_buffer_info
->dma
,
354 tx_buffer_info
->length
,
355 tx_buffer_info
->next_to_watch
,
356 (u64
)tx_buffer_info
->time_stamp
);
360 if (!netif_msg_tx_done(adapter
))
361 goto rx_ring_summary
;
363 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
365 /* Transmit Descriptor Formats
367 * Advanced Transmit Descriptor
368 * +--------------------------------------------------------------+
369 * 0 | Buffer Address [63:0] |
370 * +--------------------------------------------------------------+
371 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
372 * +--------------------------------------------------------------+
373 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
376 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
377 tx_ring
= adapter
->tx_ring
[n
];
378 printk(KERN_INFO
"------------------------------------\n");
379 printk(KERN_INFO
"TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
380 printk(KERN_INFO
"------------------------------------\n");
381 printk(KERN_INFO
"T [desc] [address 63:0 ] "
382 "[PlPOIdStDDt Ln] [bi->dma ] "
383 "leng ntw timestamp bi->skb\n");
385 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
386 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
387 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
388 u0
= (struct my_u0
*)tx_desc
;
389 printk(KERN_INFO
"T [0x%03X] %016llX %016llX %016llX"
390 " %04X %3X %016llX %p", i
,
393 (u64
)tx_buffer_info
->dma
,
394 tx_buffer_info
->length
,
395 tx_buffer_info
->next_to_watch
,
396 (u64
)tx_buffer_info
->time_stamp
,
397 tx_buffer_info
->skb
);
398 if (i
== tx_ring
->next_to_use
&&
399 i
== tx_ring
->next_to_clean
)
400 printk(KERN_CONT
" NTC/U\n");
401 else if (i
== tx_ring
->next_to_use
)
402 printk(KERN_CONT
" NTU\n");
403 else if (i
== tx_ring
->next_to_clean
)
404 printk(KERN_CONT
" NTC\n");
406 printk(KERN_CONT
"\n");
408 if (netif_msg_pktdata(adapter
) &&
409 tx_buffer_info
->dma
!= 0)
410 print_hex_dump(KERN_INFO
, "",
411 DUMP_PREFIX_ADDRESS
, 16, 1,
412 phys_to_virt(tx_buffer_info
->dma
),
413 tx_buffer_info
->length
, true);
417 /* Print RX Rings Summary */
419 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
420 printk(KERN_INFO
"Queue [NTU] [NTC]\n");
421 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
422 rx_ring
= adapter
->rx_ring
[n
];
423 printk(KERN_INFO
"%5d %5X %5X\n", n
,
424 rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
428 if (!netif_msg_rx_status(adapter
))
431 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
433 /* Advanced Receive Descriptor (Read) Format
435 * +-----------------------------------------------------+
436 * 0 | Packet Buffer Address [63:1] |A0/NSE|
437 * +----------------------------------------------+------+
438 * 8 | Header Buffer Address [63:1] | DD |
439 * +-----------------------------------------------------+
442 * Advanced Receive Descriptor (Write-Back) Format
444 * 63 48 47 32 31 30 21 20 16 15 4 3 0
445 * +------------------------------------------------------+
446 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
447 * | Checksum Ident | | | | Type | Type |
448 * +------------------------------------------------------+
449 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
450 * +------------------------------------------------------+
451 * 63 48 47 32 31 20 19 0
453 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
454 rx_ring
= adapter
->rx_ring
[n
];
455 printk(KERN_INFO
"------------------------------------\n");
456 printk(KERN_INFO
"RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
457 printk(KERN_INFO
"------------------------------------\n");
458 printk(KERN_INFO
"R [desc] [ PktBuf A0] "
459 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
460 "<-- Adv Rx Read format\n");
461 printk(KERN_INFO
"RWB[desc] [PcsmIpSHl PtRs] "
462 "[vl er S cks ln] ---------------- [bi->skb] "
463 "<-- Adv Rx Write-Back format\n");
465 for (i
= 0; i
< rx_ring
->count
; i
++) {
466 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
467 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
468 u0
= (struct my_u0
*)rx_desc
;
469 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
470 if (staterr
& IXGBE_RXD_STAT_DD
) {
471 /* Descriptor Done */
472 printk(KERN_INFO
"RWB[0x%03X] %016llX "
473 "%016llX ---------------- %p", i
,
476 rx_buffer_info
->skb
);
478 printk(KERN_INFO
"R [0x%03X] %016llX "
479 "%016llX %016llX %p", i
,
482 (u64
)rx_buffer_info
->dma
,
483 rx_buffer_info
->skb
);
485 if (netif_msg_pktdata(adapter
)) {
486 print_hex_dump(KERN_INFO
, "",
487 DUMP_PREFIX_ADDRESS
, 16, 1,
488 phys_to_virt(rx_buffer_info
->dma
),
489 rx_ring
->rx_buf_len
, true);
491 if (rx_ring
->rx_buf_len
492 < IXGBE_RXBUFFER_2048
)
493 print_hex_dump(KERN_INFO
, "",
494 DUMP_PREFIX_ADDRESS
, 16, 1,
496 rx_buffer_info
->page_dma
+
497 rx_buffer_info
->page_offset
503 if (i
== rx_ring
->next_to_use
)
504 printk(KERN_CONT
" NTU\n");
505 else if (i
== rx_ring
->next_to_clean
)
506 printk(KERN_CONT
" NTC\n");
508 printk(KERN_CONT
"\n");
517 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
521 /* Let firmware take over control of h/w */
522 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
523 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
524 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
527 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
531 /* Let firmware know the driver has taken over */
532 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
533 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
534 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
538 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
539 * @adapter: pointer to adapter struct
540 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
541 * @queue: queue to map the corresponding interrupt to
542 * @msix_vector: the vector to map to the corresponding queue
545 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
546 u8 queue
, u8 msix_vector
)
549 struct ixgbe_hw
*hw
= &adapter
->hw
;
550 switch (hw
->mac
.type
) {
551 case ixgbe_mac_82598EB
:
552 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
555 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
556 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
557 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
558 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
559 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
561 case ixgbe_mac_82599EB
:
562 if (direction
== -1) {
564 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
565 index
= ((queue
& 1) * 8);
566 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
567 ivar
&= ~(0xFF << index
);
568 ivar
|= (msix_vector
<< index
);
569 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
572 /* tx or rx causes */
573 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
574 index
= ((16 * (queue
& 1)) + (8 * direction
));
575 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
576 ivar
&= ~(0xFF << index
);
577 ivar
|= (msix_vector
<< index
);
578 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
586 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
591 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
592 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
593 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
595 mask
= (qmask
& 0xFFFFFFFF);
596 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
597 mask
= (qmask
>> 32);
598 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
602 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
603 struct ixgbe_tx_buffer
606 if (tx_buffer_info
->dma
) {
607 if (tx_buffer_info
->mapped_as_page
)
608 dma_unmap_page(&adapter
->pdev
->dev
,
610 tx_buffer_info
->length
,
613 dma_unmap_single(&adapter
->pdev
->dev
,
615 tx_buffer_info
->length
,
617 tx_buffer_info
->dma
= 0;
619 if (tx_buffer_info
->skb
) {
620 dev_kfree_skb_any(tx_buffer_info
->skb
);
621 tx_buffer_info
->skb
= NULL
;
623 tx_buffer_info
->time_stamp
= 0;
624 /* tx_buffer_info must be completely set up in the transmit path */
628 * ixgbe_tx_is_paused - check if the tx ring is paused
629 * @adapter: the ixgbe adapter
630 * @tx_ring: the corresponding tx_ring
632 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
633 * corresponding TC of this tx_ring when checking TFCS.
635 * Returns : true if paused
637 static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter
*adapter
,
638 struct ixgbe_ring
*tx_ring
)
640 u32 txoff
= IXGBE_TFCS_TXOFF
;
642 #ifdef CONFIG_IXGBE_DCB
643 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
645 int reg_idx
= tx_ring
->reg_idx
;
646 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
648 switch (adapter
->hw
.mac
.type
) {
649 case ixgbe_mac_82598EB
:
651 txoff
= IXGBE_TFCS_TXOFF0
;
653 case ixgbe_mac_82599EB
:
655 txoff
= IXGBE_TFCS_TXOFF
;
659 if (tc
== 2) /* TC2, TC3 */
660 tc
+= (reg_idx
- 64) >> 4;
661 else if (tc
== 3) /* TC4, TC5, TC6, TC7 */
662 tc
+= 1 + ((reg_idx
- 96) >> 3);
663 } else if (dcb_i
== 4) {
667 tc
+= (reg_idx
- 64) >> 5;
668 if (tc
== 2) /* TC2, TC3 */
669 tc
+= (reg_idx
- 96) >> 4;
679 return IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & txoff
;
682 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
683 struct ixgbe_ring
*tx_ring
,
686 struct ixgbe_hw
*hw
= &adapter
->hw
;
688 /* Detect a transmit hang in hardware, this serializes the
689 * check with the clearing of time_stamp and movement of eop */
690 adapter
->detect_tx_hung
= false;
691 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
692 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
693 !ixgbe_tx_is_paused(adapter
, tx_ring
)) {
694 /* detected Tx unit hang */
695 union ixgbe_adv_tx_desc
*tx_desc
;
696 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
697 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
699 " TDH, TDT <%x>, <%x>\n"
700 " next_to_use <%x>\n"
701 " next_to_clean <%x>\n"
702 "tx_buffer_info[next_to_clean]\n"
703 " time_stamp <%lx>\n"
705 tx_ring
->queue_index
,
706 IXGBE_READ_REG(hw
, tx_ring
->head
),
707 IXGBE_READ_REG(hw
, tx_ring
->tail
),
708 tx_ring
->next_to_use
, eop
,
709 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
716 #define IXGBE_MAX_TXD_PWR 14
717 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
719 /* Tx Descriptors needed, worst case */
720 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
721 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
722 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
723 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
725 static void ixgbe_tx_timeout(struct net_device
*netdev
);
728 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
729 * @q_vector: structure containing interrupt and ring information
730 * @tx_ring: tx ring to clean
732 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
733 struct ixgbe_ring
*tx_ring
)
735 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
736 struct net_device
*netdev
= adapter
->netdev
;
737 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
738 struct ixgbe_tx_buffer
*tx_buffer_info
;
739 unsigned int i
, eop
, count
= 0;
740 unsigned int total_bytes
= 0, total_packets
= 0;
742 i
= tx_ring
->next_to_clean
;
743 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
744 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
746 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
747 (count
< tx_ring
->work_limit
)) {
748 bool cleaned
= false;
749 for ( ; !cleaned
; count
++) {
751 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
752 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
753 cleaned
= (i
== eop
);
754 skb
= tx_buffer_info
->skb
;
756 if (cleaned
&& skb
) {
757 unsigned int segs
, bytecount
;
758 unsigned int hlen
= skb_headlen(skb
);
760 /* gso_segs is currently only valid for tcp */
761 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
763 /* adjust for FCoE Sequence Offload */
764 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
765 && (skb
->protocol
== htons(ETH_P_FCOE
)) &&
767 hlen
= skb_transport_offset(skb
) +
768 sizeof(struct fc_frame_header
) +
769 sizeof(struct fcoe_crc_eof
);
770 segs
= DIV_ROUND_UP(skb
->len
- hlen
,
771 skb_shinfo(skb
)->gso_size
);
773 #endif /* IXGBE_FCOE */
774 /* multiply data chunks by size of headers */
775 bytecount
= ((segs
- 1) * hlen
) + skb
->len
;
776 total_packets
+= segs
;
777 total_bytes
+= bytecount
;
780 ixgbe_unmap_and_free_tx_resource(adapter
,
783 tx_desc
->wb
.status
= 0;
786 if (i
== tx_ring
->count
)
790 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
791 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
794 tx_ring
->next_to_clean
= i
;
796 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
797 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
798 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
799 /* Make sure that anybody stopping the queue after this
800 * sees the new next_to_clean.
803 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
804 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
805 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
806 ++tx_ring
->restart_queue
;
810 if (adapter
->detect_tx_hung
) {
811 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
812 /* schedule immediate reset if we believe we hung */
814 "tx hang %d detected, resetting adapter\n",
815 adapter
->tx_timeout_count
+ 1);
816 ixgbe_tx_timeout(adapter
->netdev
);
820 /* re-arm the interrupt */
821 if (count
>= tx_ring
->work_limit
)
822 ixgbe_irq_rearm_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
824 tx_ring
->total_bytes
+= total_bytes
;
825 tx_ring
->total_packets
+= total_packets
;
826 tx_ring
->stats
.packets
+= total_packets
;
827 tx_ring
->stats
.bytes
+= total_bytes
;
828 return (count
< tx_ring
->work_limit
);
831 #ifdef CONFIG_IXGBE_DCA
832 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
833 struct ixgbe_ring
*rx_ring
)
837 int q
= rx_ring
->reg_idx
;
839 if (rx_ring
->cpu
!= cpu
) {
840 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
841 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
842 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
843 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
844 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
845 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
846 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
847 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
849 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
850 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
851 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
852 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
853 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
854 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
860 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
861 struct ixgbe_ring
*tx_ring
)
865 int q
= tx_ring
->reg_idx
;
866 struct ixgbe_hw
*hw
= &adapter
->hw
;
868 if (tx_ring
->cpu
!= cpu
) {
869 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
870 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(q
));
871 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
872 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
873 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
874 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
875 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
876 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
));
877 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
878 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
879 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
880 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
881 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
), txctrl
);
888 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
892 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
895 /* always use CB2 mode, difference is masked in the CB driver */
896 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
898 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
899 adapter
->tx_ring
[i
]->cpu
= -1;
900 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[i
]);
902 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
903 adapter
->rx_ring
[i
]->cpu
= -1;
904 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[i
]);
908 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
910 struct net_device
*netdev
= dev_get_drvdata(dev
);
911 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
912 unsigned long event
= *(unsigned long *)data
;
915 case DCA_PROVIDER_ADD
:
916 /* if we're already enabled, don't do it again */
917 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
919 if (dca_add_requester(dev
) == 0) {
920 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
921 ixgbe_setup_dca(adapter
);
924 /* Fall Through since DCA is disabled. */
925 case DCA_PROVIDER_REMOVE
:
926 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
927 dca_remove_requester(dev
);
928 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
929 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
937 #endif /* CONFIG_IXGBE_DCA */
939 * ixgbe_receive_skb - Send a completed packet up the stack
940 * @adapter: board private structure
941 * @skb: packet to send up
942 * @status: hardware indication of status of receive
943 * @rx_ring: rx descriptor ring (for a specific queue) to setup
944 * @rx_desc: rx descriptor
946 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
947 struct sk_buff
*skb
, u8 status
,
948 struct ixgbe_ring
*ring
,
949 union ixgbe_adv_rx_desc
*rx_desc
)
951 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
952 struct napi_struct
*napi
= &q_vector
->napi
;
953 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
954 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
956 skb_record_rx_queue(skb
, ring
->queue_index
);
957 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
958 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
959 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
961 napi_gro_receive(napi
, skb
);
963 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
964 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
971 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
972 * @adapter: address of board private structure
973 * @status_err: hardware indication of status of receive
974 * @skb: skb currently being received and modified
976 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
977 union ixgbe_adv_rx_desc
*rx_desc
,
980 u32 status_err
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
982 skb
->ip_summed
= CHECKSUM_NONE
;
984 /* Rx csum disabled */
985 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
988 /* if IP and error */
989 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
990 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
991 adapter
->hw_csum_rx_error
++;
995 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
998 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
999 u16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1002 * 82599 errata, UDP frames with a 0 checksum can be marked as
1005 if ((pkt_info
& IXGBE_RXDADV_PKTTYPE_UDP
) &&
1006 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
1009 adapter
->hw_csum_rx_error
++;
1013 /* It must be a TCP or UDP packet with a valid checksum */
1014 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1017 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
1018 struct ixgbe_ring
*rx_ring
, u32 val
)
1021 * Force memory writes to complete before letting h/w
1022 * know there are new descriptors to fetch. (Only
1023 * applicable for weak-ordered memory model archs,
1027 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
1031 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
1032 * @adapter: address of board private structure
1034 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
1035 struct ixgbe_ring
*rx_ring
,
1038 struct pci_dev
*pdev
= adapter
->pdev
;
1039 union ixgbe_adv_rx_desc
*rx_desc
;
1040 struct ixgbe_rx_buffer
*bi
;
1043 i
= rx_ring
->next_to_use
;
1044 bi
= &rx_ring
->rx_buffer_info
[i
];
1046 while (cleaned_count
--) {
1047 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
1049 if (!bi
->page_dma
&&
1050 (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)) {
1052 bi
->page
= alloc_page(GFP_ATOMIC
);
1054 adapter
->alloc_rx_page_failed
++;
1057 bi
->page_offset
= 0;
1059 /* use a half page if we're re-using */
1060 bi
->page_offset
^= (PAGE_SIZE
/ 2);
1063 bi
->page_dma
= dma_map_page(&pdev
->dev
, bi
->page
,
1070 struct sk_buff
*skb
;
1071 /* netdev_alloc_skb reserves 32 bytes up front!! */
1072 uint bufsz
= rx_ring
->rx_buf_len
+ SMP_CACHE_BYTES
;
1073 skb
= netdev_alloc_skb(adapter
->netdev
, bufsz
);
1076 adapter
->alloc_rx_buff_failed
++;
1080 /* advance the data pointer to the next cache line */
1081 skb_reserve(skb
, (PTR_ALIGN(skb
->data
, SMP_CACHE_BYTES
)
1085 bi
->dma
= dma_map_single(&pdev
->dev
, skb
->data
,
1086 rx_ring
->rx_buf_len
,
1089 /* Refresh the desc even if buffer_addrs didn't change because
1090 * each write-back erases this info. */
1091 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1092 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
1093 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
1095 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
1099 if (i
== rx_ring
->count
)
1101 bi
= &rx_ring
->rx_buffer_info
[i
];
1105 if (rx_ring
->next_to_use
!= i
) {
1106 rx_ring
->next_to_use
= i
;
1108 i
= (rx_ring
->count
- 1);
1110 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
1114 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
1116 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1119 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
1121 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1124 static inline u32
ixgbe_get_rsc_count(union ixgbe_adv_rx_desc
*rx_desc
)
1126 return (le32_to_cpu(rx_desc
->wb
.lower
.lo_dword
.data
) &
1127 IXGBE_RXDADV_RSCCNT_MASK
) >>
1128 IXGBE_RXDADV_RSCCNT_SHIFT
;
1132 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
1133 * @skb: pointer to the last skb in the rsc queue
1134 * @count: pointer to number of packets coalesced in this context
1136 * This function changes a queue full of hw rsc buffers into a completed
1137 * packet. It uses the ->prev pointers to find the first packet and then
1138 * turns it into the frag list owner.
1140 static inline struct sk_buff
*ixgbe_transform_rsc_queue(struct sk_buff
*skb
,
1143 unsigned int frag_list_size
= 0;
1146 struct sk_buff
*prev
= skb
->prev
;
1147 frag_list_size
+= skb
->len
;
1153 skb_shinfo(skb
)->frag_list
= skb
->next
;
1155 skb
->len
+= frag_list_size
;
1156 skb
->data_len
+= frag_list_size
;
1157 skb
->truesize
+= frag_list_size
;
1161 struct ixgbe_rsc_cb
{
1165 #define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
1167 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1168 struct ixgbe_ring
*rx_ring
,
1169 int *work_done
, int work_to_do
)
1171 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1172 struct net_device
*netdev
= adapter
->netdev
;
1173 struct pci_dev
*pdev
= adapter
->pdev
;
1174 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
1175 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
1176 struct sk_buff
*skb
;
1177 unsigned int i
, rsc_count
= 0;
1180 bool cleaned
= false;
1181 int cleaned_count
= 0;
1182 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1185 #endif /* IXGBE_FCOE */
1187 i
= rx_ring
->next_to_clean
;
1188 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
1189 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1190 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1192 while (staterr
& IXGBE_RXD_STAT_DD
) {
1194 if (*work_done
>= work_to_do
)
1198 rmb(); /* read descriptor and rx_buffer_info after status DD */
1199 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1200 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
1201 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
1202 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
1203 if (len
> IXGBE_RX_HDR_SIZE
)
1204 len
= IXGBE_RX_HDR_SIZE
;
1205 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1207 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1211 skb
= rx_buffer_info
->skb
;
1212 prefetch(skb
->data
);
1213 rx_buffer_info
->skb
= NULL
;
1215 if (rx_buffer_info
->dma
) {
1216 if ((adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
1217 (!(staterr
& IXGBE_RXD_STAT_EOP
)) &&
1220 * When HWRSC is enabled, delay unmapping
1221 * of the first packet. It carries the
1222 * header information, HW may still
1223 * access the header after the writeback.
1224 * Only unmap it when EOP is reached
1226 IXGBE_RSC_CB(skb
)->dma
= rx_buffer_info
->dma
;
1228 dma_unmap_single(&pdev
->dev
,
1229 rx_buffer_info
->dma
,
1230 rx_ring
->rx_buf_len
,
1232 rx_buffer_info
->dma
= 0;
1237 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
1238 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
1239 rx_buffer_info
->page_dma
= 0;
1240 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1241 rx_buffer_info
->page
,
1242 rx_buffer_info
->page_offset
,
1245 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
1246 (page_count(rx_buffer_info
->page
) != 1))
1247 rx_buffer_info
->page
= NULL
;
1249 get_page(rx_buffer_info
->page
);
1251 skb
->len
+= upper_len
;
1252 skb
->data_len
+= upper_len
;
1253 skb
->truesize
+= upper_len
;
1257 if (i
== rx_ring
->count
)
1260 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
1264 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
1265 rsc_count
= ixgbe_get_rsc_count(rx_desc
);
1268 u32 nextp
= (staterr
& IXGBE_RXDADV_NEXTP_MASK
) >>
1269 IXGBE_RXDADV_NEXTP_SHIFT
;
1270 next_buffer
= &rx_ring
->rx_buffer_info
[nextp
];
1272 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
1275 if (staterr
& IXGBE_RXD_STAT_EOP
) {
1277 skb
= ixgbe_transform_rsc_queue(skb
, &(rx_ring
->rsc_count
));
1278 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
1279 if (IXGBE_RSC_CB(skb
)->dma
) {
1280 dma_unmap_single(&pdev
->dev
,
1281 IXGBE_RSC_CB(skb
)->dma
,
1282 rx_ring
->rx_buf_len
,
1284 IXGBE_RSC_CB(skb
)->dma
= 0;
1286 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)
1287 rx_ring
->rsc_count
+= skb_shinfo(skb
)->nr_frags
;
1289 rx_ring
->rsc_count
++;
1290 rx_ring
->rsc_flush
++;
1292 rx_ring
->stats
.packets
++;
1293 rx_ring
->stats
.bytes
+= skb
->len
;
1295 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1296 rx_buffer_info
->skb
= next_buffer
->skb
;
1297 rx_buffer_info
->dma
= next_buffer
->dma
;
1298 next_buffer
->skb
= skb
;
1299 next_buffer
->dma
= 0;
1301 skb
->next
= next_buffer
->skb
;
1302 skb
->next
->prev
= skb
;
1304 rx_ring
->non_eop_descs
++;
1308 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
1309 dev_kfree_skb_irq(skb
);
1313 ixgbe_rx_checksum(adapter
, rx_desc
, skb
);
1315 /* probably a little skewed due to removing CRC */
1316 total_rx_bytes
+= skb
->len
;
1319 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
1321 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1322 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
1323 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1327 #endif /* IXGBE_FCOE */
1328 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_ring
, rx_desc
);
1331 rx_desc
->wb
.upper
.status_error
= 0;
1333 /* return some buffers to hardware, one at a time is too slow */
1334 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1335 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1339 /* use prefetched values */
1341 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1343 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1346 rx_ring
->next_to_clean
= i
;
1347 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
1350 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1353 /* include DDPed FCoE data */
1354 if (ddp_bytes
> 0) {
1357 mss
= adapter
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1358 sizeof(struct fc_frame_header
) -
1359 sizeof(struct fcoe_crc_eof
);
1362 total_rx_bytes
+= ddp_bytes
;
1363 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1365 #endif /* IXGBE_FCOE */
1367 rx_ring
->total_packets
+= total_rx_packets
;
1368 rx_ring
->total_bytes
+= total_rx_bytes
;
1369 netdev
->stats
.rx_bytes
+= total_rx_bytes
;
1370 netdev
->stats
.rx_packets
+= total_rx_packets
;
1375 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
1377 * ixgbe_configure_msix - Configure MSI-X hardware
1378 * @adapter: board private structure
1380 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1383 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1385 struct ixgbe_q_vector
*q_vector
;
1386 int i
, j
, q_vectors
, v_idx
, r_idx
;
1389 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1392 * Populate the IVAR table and set the ITR values to the
1393 * corresponding register.
1395 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
1396 q_vector
= adapter
->q_vector
[v_idx
];
1397 /* XXX for_each_set_bit(...) */
1398 r_idx
= find_first_bit(q_vector
->rxr_idx
,
1399 adapter
->num_rx_queues
);
1401 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1402 j
= adapter
->rx_ring
[r_idx
]->reg_idx
;
1403 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
1404 r_idx
= find_next_bit(q_vector
->rxr_idx
,
1405 adapter
->num_rx_queues
,
1408 r_idx
= find_first_bit(q_vector
->txr_idx
,
1409 adapter
->num_tx_queues
);
1411 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1412 j
= adapter
->tx_ring
[r_idx
]->reg_idx
;
1413 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
1414 r_idx
= find_next_bit(q_vector
->txr_idx
,
1415 adapter
->num_tx_queues
,
1419 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
1421 q_vector
->eitr
= adapter
->tx_eitr_param
;
1422 else if (q_vector
->rxr_count
)
1424 q_vector
->eitr
= adapter
->rx_eitr_param
;
1426 ixgbe_write_eitr(q_vector
);
1429 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
1430 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1432 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
1433 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1434 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1436 /* set up to autoclear timer, and the vectors */
1437 mask
= IXGBE_EIMS_ENABLE_MASK
;
1438 if (adapter
->num_vfs
)
1439 mask
&= ~(IXGBE_EIMS_OTHER
|
1440 IXGBE_EIMS_MAILBOX
|
1443 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
1444 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1447 enum latency_range
{
1451 latency_invalid
= 255
1455 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1456 * @adapter: pointer to adapter
1457 * @eitr: eitr setting (ints per sec) to give last timeslice
1458 * @itr_setting: current throttle rate in ints/second
1459 * @packets: the number of packets during this measurement interval
1460 * @bytes: the number of bytes during this measurement interval
1462 * Stores a new ITR value based on packets and byte
1463 * counts during the last interrupt. The advantage of per interrupt
1464 * computation is faster updates and more accurate ITR for the current
1465 * traffic pattern. Constants in this function were computed
1466 * based on theoretical maximum wire speed and thresholds were set based
1467 * on testing data as well as attempting to minimize response time
1468 * while increasing bulk throughput.
1469 * this functionality is controlled by the InterruptThrottleRate module
1470 * parameter (see ixgbe_param.c)
1472 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
1473 u32 eitr
, u8 itr_setting
,
1474 int packets
, int bytes
)
1476 unsigned int retval
= itr_setting
;
1481 goto update_itr_done
;
1484 /* simple throttlerate management
1485 * 0-20MB/s lowest (100000 ints/s)
1486 * 20-100MB/s low (20000 ints/s)
1487 * 100-1249MB/s bulk (8000 ints/s)
1489 /* what was last interrupt timeslice? */
1490 timepassed_us
= 1000000/eitr
;
1491 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1493 switch (itr_setting
) {
1494 case lowest_latency
:
1495 if (bytes_perint
> adapter
->eitr_low
)
1496 retval
= low_latency
;
1499 if (bytes_perint
> adapter
->eitr_high
)
1500 retval
= bulk_latency
;
1501 else if (bytes_perint
<= adapter
->eitr_low
)
1502 retval
= lowest_latency
;
1505 if (bytes_perint
<= adapter
->eitr_high
)
1506 retval
= low_latency
;
1515 * ixgbe_write_eitr - write EITR register in hardware specific way
1516 * @q_vector: structure containing interrupt and ring information
1518 * This function is made to be called by ethtool and by the driver
1519 * when it needs to update EITR registers at runtime. Hardware
1520 * specific quirks/differences are taken care of here.
1522 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1524 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1525 struct ixgbe_hw
*hw
= &adapter
->hw
;
1526 int v_idx
= q_vector
->v_idx
;
1527 u32 itr_reg
= EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
);
1529 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1530 /* must write high and low 16 bits to reset counter */
1531 itr_reg
|= (itr_reg
<< 16);
1532 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1534 * 82599 can support a value of zero, so allow it for
1535 * max interrupt rate, but there is an errata where it can
1536 * not be zero with RSC
1539 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
1543 * set the WDIS bit to not clear the timer bits and cause an
1544 * immediate assertion of the interrupt
1546 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1548 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1551 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
1553 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1555 u8 current_itr
, ret_itr
;
1557 struct ixgbe_ring
*rx_ring
, *tx_ring
;
1559 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1560 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1561 tx_ring
= adapter
->tx_ring
[r_idx
];
1562 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1564 tx_ring
->total_packets
,
1565 tx_ring
->total_bytes
);
1566 /* if the result for this queue would decrease interrupt
1567 * rate for this vector then use that result */
1568 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
1569 q_vector
->tx_itr
- 1 : ret_itr
);
1570 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1574 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1575 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1576 rx_ring
= adapter
->rx_ring
[r_idx
];
1577 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1579 rx_ring
->total_packets
,
1580 rx_ring
->total_bytes
);
1581 /* if the result for this queue would decrease interrupt
1582 * rate for this vector then use that result */
1583 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
1584 q_vector
->rx_itr
- 1 : ret_itr
);
1585 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1589 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1591 switch (current_itr
) {
1592 /* counts and packets in update_itr are dependent on these numbers */
1593 case lowest_latency
:
1597 new_itr
= 20000; /* aka hwitr = ~200 */
1605 if (new_itr
!= q_vector
->eitr
) {
1606 /* do an exponential smoothing */
1607 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1609 /* save the algorithm value here, not the smoothed one */
1610 q_vector
->eitr
= new_itr
;
1612 ixgbe_write_eitr(q_vector
);
1618 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1620 struct ixgbe_hw
*hw
= &adapter
->hw
;
1622 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1623 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1624 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
1625 /* write to clear the interrupt */
1626 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1630 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1632 struct ixgbe_hw
*hw
= &adapter
->hw
;
1634 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1635 /* Clear the interrupt */
1636 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1637 schedule_work(&adapter
->multispeed_fiber_task
);
1638 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1639 /* Clear the interrupt */
1640 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1641 schedule_work(&adapter
->sfp_config_module_task
);
1643 /* Interrupt isn't for us... */
1648 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1650 struct ixgbe_hw
*hw
= &adapter
->hw
;
1653 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1654 adapter
->link_check_timeout
= jiffies
;
1655 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1656 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1657 IXGBE_WRITE_FLUSH(hw
);
1658 schedule_work(&adapter
->watchdog_task
);
1662 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1664 struct net_device
*netdev
= data
;
1665 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1666 struct ixgbe_hw
*hw
= &adapter
->hw
;
1670 * Workaround for Silicon errata. Use clear-by-write instead
1671 * of clear-by-read. Reading with EICS will return the
1672 * interrupt causes without clearing, which later be done
1673 * with the write to EICR.
1675 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1676 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1678 if (eicr
& IXGBE_EICR_LSC
)
1679 ixgbe_check_lsc(adapter
);
1681 if (eicr
& IXGBE_EICR_MAILBOX
)
1682 ixgbe_msg_task(adapter
);
1684 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1685 ixgbe_check_fan_failure(adapter
, eicr
);
1687 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1688 ixgbe_check_sfp_event(adapter
, eicr
);
1690 /* Handle Flow Director Full threshold interrupt */
1691 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
1693 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_FLOW_DIR
);
1694 /* Disable transmits before FDIR Re-initialization */
1695 netif_tx_stop_all_queues(netdev
);
1696 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1697 struct ixgbe_ring
*tx_ring
=
1698 adapter
->tx_ring
[i
];
1699 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE
,
1700 &tx_ring
->reinit_state
))
1701 schedule_work(&adapter
->fdir_reinit_task
);
1705 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1706 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1711 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
1716 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1717 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1718 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1720 mask
= (qmask
& 0xFFFFFFFF);
1721 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(0), mask
);
1722 mask
= (qmask
>> 32);
1723 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
);
1725 /* skip the flush */
1728 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
1733 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1734 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1735 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, mask
);
1737 mask
= (qmask
& 0xFFFFFFFF);
1738 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), mask
);
1739 mask
= (qmask
>> 32);
1740 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), mask
);
1742 /* skip the flush */
1745 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1747 struct ixgbe_q_vector
*q_vector
= data
;
1748 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1749 struct ixgbe_ring
*tx_ring
;
1752 if (!q_vector
->txr_count
)
1755 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1756 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1757 tx_ring
= adapter
->tx_ring
[r_idx
];
1758 tx_ring
->total_bytes
= 0;
1759 tx_ring
->total_packets
= 0;
1760 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1764 /* EIAM disabled interrupts (on this vector) for us */
1765 napi_schedule(&q_vector
->napi
);
1771 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1773 * @data: pointer to our q_vector struct for this interrupt vector
1775 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1777 struct ixgbe_q_vector
*q_vector
= data
;
1778 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1779 struct ixgbe_ring
*rx_ring
;
1783 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1784 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1785 rx_ring
= adapter
->rx_ring
[r_idx
];
1786 rx_ring
->total_bytes
= 0;
1787 rx_ring
->total_packets
= 0;
1788 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1792 if (!q_vector
->rxr_count
)
1795 /* disable interrupts on this vector only */
1796 /* EIAM disabled interrupts (on this vector) for us */
1797 napi_schedule(&q_vector
->napi
);
1802 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1804 struct ixgbe_q_vector
*q_vector
= data
;
1805 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1806 struct ixgbe_ring
*ring
;
1810 if (!q_vector
->txr_count
&& !q_vector
->rxr_count
)
1813 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1814 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1815 ring
= adapter
->tx_ring
[r_idx
];
1816 ring
->total_bytes
= 0;
1817 ring
->total_packets
= 0;
1818 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1822 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1823 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1824 ring
= adapter
->rx_ring
[r_idx
];
1825 ring
->total_bytes
= 0;
1826 ring
->total_packets
= 0;
1827 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1831 /* EIAM disabled interrupts (on this vector) for us */
1832 napi_schedule(&q_vector
->napi
);
1838 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1839 * @napi: napi struct with our devices info in it
1840 * @budget: amount of work driver is allowed to do this pass, in packets
1842 * This function is optimized for cleaning one queue only on a single
1845 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1847 struct ixgbe_q_vector
*q_vector
=
1848 container_of(napi
, struct ixgbe_q_vector
, napi
);
1849 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1850 struct ixgbe_ring
*rx_ring
= NULL
;
1854 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1855 rx_ring
= adapter
->rx_ring
[r_idx
];
1856 #ifdef CONFIG_IXGBE_DCA
1857 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1858 ixgbe_update_rx_dca(adapter
, rx_ring
);
1861 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1863 /* If all Rx work done, exit the polling mode */
1864 if (work_done
< budget
) {
1865 napi_complete(napi
);
1866 if (adapter
->rx_itr_setting
& 1)
1867 ixgbe_set_itr_msix(q_vector
);
1868 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1869 ixgbe_irq_enable_queues(adapter
,
1870 ((u64
)1 << q_vector
->v_idx
));
1877 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1878 * @napi: napi struct with our devices info in it
1879 * @budget: amount of work driver is allowed to do this pass, in packets
1881 * This function will clean more than one rx queue associated with a
1884 static int ixgbe_clean_rxtx_many(struct napi_struct
*napi
, int budget
)
1886 struct ixgbe_q_vector
*q_vector
=
1887 container_of(napi
, struct ixgbe_q_vector
, napi
);
1888 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1889 struct ixgbe_ring
*ring
= NULL
;
1890 int work_done
= 0, i
;
1892 bool tx_clean_complete
= true;
1894 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1895 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1896 ring
= adapter
->tx_ring
[r_idx
];
1897 #ifdef CONFIG_IXGBE_DCA
1898 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1899 ixgbe_update_tx_dca(adapter
, ring
);
1901 tx_clean_complete
&= ixgbe_clean_tx_irq(q_vector
, ring
);
1902 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1906 /* attempt to distribute budget to each queue fairly, but don't allow
1907 * the budget to go below 1 because we'll exit polling */
1908 budget
/= (q_vector
->rxr_count
?: 1);
1909 budget
= max(budget
, 1);
1910 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1911 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1912 ring
= adapter
->rx_ring
[r_idx
];
1913 #ifdef CONFIG_IXGBE_DCA
1914 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1915 ixgbe_update_rx_dca(adapter
, ring
);
1917 ixgbe_clean_rx_irq(q_vector
, ring
, &work_done
, budget
);
1918 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1922 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1923 ring
= adapter
->rx_ring
[r_idx
];
1924 /* If all Rx work done, exit the polling mode */
1925 if (work_done
< budget
) {
1926 napi_complete(napi
);
1927 if (adapter
->rx_itr_setting
& 1)
1928 ixgbe_set_itr_msix(q_vector
);
1929 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1930 ixgbe_irq_enable_queues(adapter
,
1931 ((u64
)1 << q_vector
->v_idx
));
1939 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1940 * @napi: napi struct with our devices info in it
1941 * @budget: amount of work driver is allowed to do this pass, in packets
1943 * This function is optimized for cleaning one queue only on a single
1946 static int ixgbe_clean_txonly(struct napi_struct
*napi
, int budget
)
1948 struct ixgbe_q_vector
*q_vector
=
1949 container_of(napi
, struct ixgbe_q_vector
, napi
);
1950 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1951 struct ixgbe_ring
*tx_ring
= NULL
;
1955 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1956 tx_ring
= adapter
->tx_ring
[r_idx
];
1957 #ifdef CONFIG_IXGBE_DCA
1958 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1959 ixgbe_update_tx_dca(adapter
, tx_ring
);
1962 if (!ixgbe_clean_tx_irq(q_vector
, tx_ring
))
1965 /* If all Tx work done, exit the polling mode */
1966 if (work_done
< budget
) {
1967 napi_complete(napi
);
1968 if (adapter
->tx_itr_setting
& 1)
1969 ixgbe_set_itr_msix(q_vector
);
1970 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1971 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1977 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1980 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1982 set_bit(r_idx
, q_vector
->rxr_idx
);
1983 q_vector
->rxr_count
++;
1986 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1989 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1991 set_bit(t_idx
, q_vector
->txr_idx
);
1992 q_vector
->txr_count
++;
1996 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1997 * @adapter: board private structure to initialize
1998 * @vectors: allotted vector count for descriptor rings
2000 * This function maps descriptor rings to the queue-specific vectors
2001 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2002 * one vector per ring/queue, but on a constrained vector budget, we
2003 * group the rings as "efficiently" as possible. You would add new
2004 * mapping configurations in here.
2006 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
2010 int rxr_idx
= 0, txr_idx
= 0;
2011 int rxr_remaining
= adapter
->num_rx_queues
;
2012 int txr_remaining
= adapter
->num_tx_queues
;
2017 /* No mapping required if MSI-X is disabled. */
2018 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2022 * The ideal configuration...
2023 * We have enough vectors to map one per queue.
2025 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
2026 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
2027 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
2029 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
2030 map_vector_to_txq(adapter
, v_start
, txr_idx
);
2036 * If we don't have enough vectors for a 1-to-1
2037 * mapping, we'll have to group them so there are
2038 * multiple queues per vector.
2040 /* Re-adjusting *qpv takes care of the remainder. */
2041 for (i
= v_start
; i
< vectors
; i
++) {
2042 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
2043 for (j
= 0; j
< rqpv
; j
++) {
2044 map_vector_to_rxq(adapter
, i
, rxr_idx
);
2049 for (i
= v_start
; i
< vectors
; i
++) {
2050 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
2051 for (j
= 0; j
< tqpv
; j
++) {
2052 map_vector_to_txq(adapter
, i
, txr_idx
);
2063 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2064 * @adapter: board private structure
2066 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2067 * interrupts from the kernel.
2069 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2071 struct net_device
*netdev
= adapter
->netdev
;
2072 irqreturn_t (*handler
)(int, void *);
2073 int i
, vector
, q_vectors
, err
;
2076 /* Decrement for Other and TCP Timer vectors */
2077 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2079 /* Map the Tx/Rx rings to the vectors we were allotted. */
2080 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
2084 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
2085 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
2086 &ixgbe_msix_clean_many)
2087 for (vector
= 0; vector
< q_vectors
; vector
++) {
2088 handler
= SET_HANDLER(adapter
->q_vector
[vector
]);
2090 if(handler
== &ixgbe_msix_clean_rx
) {
2091 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2092 netdev
->name
, "rx", ri
++);
2094 else if(handler
== &ixgbe_msix_clean_tx
) {
2095 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2096 netdev
->name
, "tx", ti
++);
2099 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2100 netdev
->name
, "TxRx", vector
);
2102 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2103 handler
, 0, adapter
->name
[vector
],
2104 adapter
->q_vector
[vector
]);
2107 "request_irq failed for MSIX interrupt "
2108 "Error: %d\n", err
);
2109 goto free_queue_irqs
;
2113 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
2114 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2115 ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
2118 "request_irq for msix_lsc failed: %d\n", err
);
2119 goto free_queue_irqs
;
2125 for (i
= vector
- 1; i
>= 0; i
--)
2126 free_irq(adapter
->msix_entries
[--vector
].vector
,
2127 adapter
->q_vector
[i
]);
2128 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2129 pci_disable_msix(adapter
->pdev
);
2130 kfree(adapter
->msix_entries
);
2131 adapter
->msix_entries
= NULL
;
2136 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
2138 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2140 u32 new_itr
= q_vector
->eitr
;
2141 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[0];
2142 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[0];
2144 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2146 tx_ring
->total_packets
,
2147 tx_ring
->total_bytes
);
2148 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2150 rx_ring
->total_packets
,
2151 rx_ring
->total_bytes
);
2153 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
2155 switch (current_itr
) {
2156 /* counts and packets in update_itr are dependent on these numbers */
2157 case lowest_latency
:
2161 new_itr
= 20000; /* aka hwitr = ~200 */
2170 if (new_itr
!= q_vector
->eitr
) {
2171 /* do an exponential smoothing */
2172 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
2174 /* save the algorithm value here, not the smoothed one */
2175 q_vector
->eitr
= new_itr
;
2177 ixgbe_write_eitr(q_vector
);
2184 * ixgbe_irq_enable - Enable default interrupt generation settings
2185 * @adapter: board private structure
2187 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
2191 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2192 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2193 mask
|= IXGBE_EIMS_GPI_SDP1
;
2194 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2195 mask
|= IXGBE_EIMS_ECC
;
2196 mask
|= IXGBE_EIMS_GPI_SDP1
;
2197 mask
|= IXGBE_EIMS_GPI_SDP2
;
2198 if (adapter
->num_vfs
)
2199 mask
|= IXGBE_EIMS_MAILBOX
;
2201 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
2202 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
2203 mask
|= IXGBE_EIMS_FLOW_DIR
;
2205 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2206 ixgbe_irq_enable_queues(adapter
, ~0);
2207 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2209 if (adapter
->num_vfs
> 32) {
2210 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2211 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2216 * ixgbe_intr - legacy mode Interrupt Handler
2217 * @irq: interrupt number
2218 * @data: pointer to a network interface device structure
2220 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2222 struct net_device
*netdev
= data
;
2223 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2224 struct ixgbe_hw
*hw
= &adapter
->hw
;
2225 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2229 * Workaround for silicon errata. Mask the interrupts
2230 * before the read of EICR.
2232 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2234 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2235 * therefore no explict interrupt disable is necessary */
2236 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2238 /* shared interrupt alert!
2239 * make sure interrupts are enabled because the read will
2240 * have disabled interrupts due to EIAM */
2241 ixgbe_irq_enable(adapter
);
2242 return IRQ_NONE
; /* Not our interrupt */
2245 if (eicr
& IXGBE_EICR_LSC
)
2246 ixgbe_check_lsc(adapter
);
2248 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2249 ixgbe_check_sfp_event(adapter
, eicr
);
2251 ixgbe_check_fan_failure(adapter
, eicr
);
2253 if (napi_schedule_prep(&(q_vector
->napi
))) {
2254 adapter
->tx_ring
[0]->total_packets
= 0;
2255 adapter
->tx_ring
[0]->total_bytes
= 0;
2256 adapter
->rx_ring
[0]->total_packets
= 0;
2257 adapter
->rx_ring
[0]->total_bytes
= 0;
2258 /* would disable interrupts here but EIAM disabled it */
2259 __napi_schedule(&(q_vector
->napi
));
2265 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
2267 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2269 for (i
= 0; i
< q_vectors
; i
++) {
2270 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
2271 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
2272 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
2273 q_vector
->rxr_count
= 0;
2274 q_vector
->txr_count
= 0;
2279 * ixgbe_request_irq - initialize interrupts
2280 * @adapter: board private structure
2282 * Attempts to configure interrupts using the best available
2283 * capabilities of the hardware and kernel.
2285 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2287 struct net_device
*netdev
= adapter
->netdev
;
2290 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2291 err
= ixgbe_request_msix_irqs(adapter
);
2292 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2293 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2294 netdev
->name
, netdev
);
2296 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2297 netdev
->name
, netdev
);
2301 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
2306 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2308 struct net_device
*netdev
= adapter
->netdev
;
2310 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2313 q_vectors
= adapter
->num_msix_vectors
;
2316 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
2319 for (; i
>= 0; i
--) {
2320 free_irq(adapter
->msix_entries
[i
].vector
,
2321 adapter
->q_vector
[i
]);
2324 ixgbe_reset_q_vectors(adapter
);
2326 free_irq(adapter
->pdev
->irq
, netdev
);
2331 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2332 * @adapter: board private structure
2334 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2336 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2337 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2339 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2340 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2341 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2342 if (adapter
->num_vfs
> 32)
2343 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
2345 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2346 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2348 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
2349 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2351 synchronize_irq(adapter
->pdev
->irq
);
2356 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2359 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2361 struct ixgbe_hw
*hw
= &adapter
->hw
;
2363 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
2364 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr_param
));
2366 ixgbe_set_ivar(adapter
, 0, 0, 0);
2367 ixgbe_set_ivar(adapter
, 1, 0, 0);
2369 map_vector_to_rxq(adapter
, 0, 0);
2370 map_vector_to_txq(adapter
, 0, 0);
2372 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
2376 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2377 * @adapter: board private structure
2379 * Configure the Tx unit of the MAC after a reset.
2381 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2384 struct ixgbe_hw
*hw
= &adapter
->hw
;
2385 u32 i
, j
, tdlen
, txctrl
;
2387 /* Setup the HW Tx Head and Tail descriptor pointers */
2388 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2389 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2392 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
2393 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
2394 (tdba
& DMA_BIT_MASK(32)));
2395 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
2396 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
2397 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
2398 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
2399 adapter
->tx_ring
[i
]->head
= IXGBE_TDH(j
);
2400 adapter
->tx_ring
[i
]->tail
= IXGBE_TDT(j
);
2402 * Disable Tx Head Writeback RO bit, since this hoses
2403 * bookkeeping if things aren't delivered in order.
2405 switch (hw
->mac
.type
) {
2406 case ixgbe_mac_82598EB
:
2407 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
2409 case ixgbe_mac_82599EB
:
2411 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(j
));
2414 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
2415 switch (hw
->mac
.type
) {
2416 case ixgbe_mac_82598EB
:
2417 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
2419 case ixgbe_mac_82599EB
:
2421 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(j
), txctrl
);
2426 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2430 /* disable the arbiter while setting MTQC */
2431 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2432 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2433 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2435 /* set transmit pool layout */
2436 mask
= (IXGBE_FLAG_SRIOV_ENABLED
| IXGBE_FLAG_DCB_ENABLED
);
2437 switch (adapter
->flags
& mask
) {
2439 case (IXGBE_FLAG_SRIOV_ENABLED
):
2440 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2441 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2444 case (IXGBE_FLAG_DCB_ENABLED
):
2445 /* We enable 8 traffic classes, DCB only */
2446 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2447 (IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
));
2451 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, IXGBE_MTQC_64Q_1PB
);
2455 /* re-eable the arbiter */
2456 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2457 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2461 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2463 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2464 struct ixgbe_ring
*rx_ring
)
2468 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
2470 index
= rx_ring
->reg_idx
;
2471 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2473 mask
= (unsigned long) feature
[RING_F_RSS
].mask
;
2474 index
= index
& mask
;
2476 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
2478 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2479 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2481 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2482 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2484 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2485 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2486 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2488 srrctl
|= (PAGE_SIZE
/ 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2490 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2492 srrctl
|= ALIGN(rx_ring
->rx_buf_len
, 1024) >>
2493 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2494 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2497 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
2500 static u32
ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2505 if (!(adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
2508 mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2509 #ifdef CONFIG_IXGBE_DCB
2510 | IXGBE_FLAG_DCB_ENABLED
2512 | IXGBE_FLAG_SRIOV_ENABLED
2516 case (IXGBE_FLAG_RSS_ENABLED
):
2517 mrqc
= IXGBE_MRQC_RSSEN
;
2519 case (IXGBE_FLAG_SRIOV_ENABLED
):
2520 mrqc
= IXGBE_MRQC_VMDQEN
;
2522 #ifdef CONFIG_IXGBE_DCB
2523 case (IXGBE_FLAG_DCB_ENABLED
):
2524 mrqc
= IXGBE_MRQC_RT8TCEN
;
2526 #endif /* CONFIG_IXGBE_DCB */
2535 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2536 * @adapter: address of board private structure
2537 * @index: index of ring to set
2539 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
, int index
)
2541 struct ixgbe_ring
*rx_ring
;
2542 struct ixgbe_hw
*hw
= &adapter
->hw
;
2547 rx_ring
= adapter
->rx_ring
[index
];
2548 j
= rx_ring
->reg_idx
;
2549 rx_buf_len
= rx_ring
->rx_buf_len
;
2550 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(j
));
2551 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2553 * we must limit the number of descriptors so that the
2554 * total size of max desc * buf_len is not greater
2557 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2558 #if (MAX_SKB_FRAGS > 16)
2559 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2560 #elif (MAX_SKB_FRAGS > 8)
2561 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2562 #elif (MAX_SKB_FRAGS > 4)
2563 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2565 rscctrl
|= IXGBE_RSCCTL_MAXDESC_1
;
2568 if (rx_buf_len
< IXGBE_RXBUFFER_4096
)
2569 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2570 else if (rx_buf_len
< IXGBE_RXBUFFER_8192
)
2571 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2573 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2575 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(j
), rscctrl
);
2579 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2580 * @adapter: board private structure
2582 * Configure the Rx unit of the MAC after a reset.
2584 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
2587 struct ixgbe_hw
*hw
= &adapter
->hw
;
2588 struct ixgbe_ring
*rx_ring
;
2589 struct net_device
*netdev
= adapter
->netdev
;
2590 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2592 u32 rdlen
, rxctrl
, rxcsum
;
2593 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2594 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2595 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2597 u32 reta
= 0, mrqc
= 0;
2601 /* Decide whether to use packet split mode or not */
2602 /* Do not use packet split if we're in SR-IOV Mode */
2603 if (!adapter
->num_vfs
)
2604 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
2606 /* Set the RX buffer length according to the mode */
2607 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2608 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
2609 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2610 /* PSRTYPE must be initialized in 82599 */
2611 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
2612 IXGBE_PSRTYPE_UDPHDR
|
2613 IXGBE_PSRTYPE_IPV4HDR
|
2614 IXGBE_PSRTYPE_IPV6HDR
|
2615 IXGBE_PSRTYPE_L2HDR
;
2617 IXGBE_PSRTYPE(adapter
->num_vfs
),
2621 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
2622 (netdev
->mtu
<= ETH_DATA_LEN
))
2623 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
2625 rx_buf_len
= ALIGN(max_frame
, 1024);
2628 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
2629 fctrl
|= IXGBE_FCTRL_BAM
;
2630 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
2631 fctrl
|= IXGBE_FCTRL_PMCF
;
2632 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
2634 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
2635 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
2636 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
2638 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2640 if (netdev
->features
& NETIF_F_FCOE_MTU
)
2641 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2643 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
2645 rdlen
= adapter
->rx_ring
[0]->count
* sizeof(union ixgbe_adv_rx_desc
);
2646 /* disable receives while setting up the descriptors */
2647 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2648 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2651 * Setup the HW Rx Head and Tail Descriptor Pointers and
2652 * the Base and Length of the Rx Descriptor Ring
2654 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2655 rx_ring
= adapter
->rx_ring
[i
];
2656 rdba
= rx_ring
->dma
;
2657 j
= rx_ring
->reg_idx
;
2658 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_BIT_MASK(32)));
2659 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
2660 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
2661 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
2662 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
2663 rx_ring
->head
= IXGBE_RDH(j
);
2664 rx_ring
->tail
= IXGBE_RDT(j
);
2665 rx_ring
->rx_buf_len
= rx_buf_len
;
2667 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)
2668 rx_ring
->flags
|= IXGBE_RING_RX_PS_ENABLED
;
2670 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2673 if (netdev
->features
& NETIF_F_FCOE_MTU
) {
2674 struct ixgbe_ring_feature
*f
;
2675 f
= &adapter
->ring_feature
[RING_F_FCOE
];
2676 if ((i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
)) {
2677 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2678 if (rx_buf_len
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
2679 rx_ring
->rx_buf_len
=
2680 IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2684 #endif /* IXGBE_FCOE */
2685 ixgbe_configure_srrctl(adapter
, rx_ring
);
2688 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2690 * For VMDq support of different descriptor types or
2691 * buffer sizes through the use of multiple SRRCTL
2692 * registers, RDRXCTL.MVMEN must be set to 1
2694 * also, the manual doesn't mention it clearly but DCA hints
2695 * will only use queue 0's tags unless this bit is set. Side
2696 * effects of setting this bit are only that SRRCTL must be
2697 * fully programmed [0..15]
2699 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2700 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
2701 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2704 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2706 u32 reg_offset
, vf_shift
;
2707 u32 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
2708 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
2709 | IXGBE_VT_CTL_REPLEN
;
2710 vt_reg_bits
|= (adapter
->num_vfs
<<
2711 IXGBE_VT_CTL_POOL_SHIFT
);
2712 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
2713 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, 0);
2715 vf_shift
= adapter
->num_vfs
% 32;
2716 reg_offset
= adapter
->num_vfs
/ 32;
2717 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(0), 0);
2718 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(1), 0);
2719 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(0), 0);
2720 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(1), 0);
2721 /* Enable only the PF's pool for Tx/Rx */
2722 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
2723 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
2724 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
2725 ixgbe_set_vmolr(hw
, adapter
->num_vfs
);
2728 /* Program MRQC for the distribution of queues */
2729 mrqc
= ixgbe_setup_mrqc(adapter
);
2731 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2732 /* Fill out redirection table */
2733 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2734 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
2736 /* reta = 4-byte sliding window of
2737 * 0x00..(indices-1)(indices-1)00..etc. */
2738 reta
= (reta
<< 8) | (j
* 0x11);
2740 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2743 /* Fill out hash function seeds */
2744 for (i
= 0; i
< 10; i
++)
2745 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2747 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2748 mrqc
|= IXGBE_MRQC_RSSEN
;
2749 /* Perform hash on these packet types */
2750 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2751 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2752 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
2753 | IXGBE_MRQC_RSS_FIELD_IPV6
2754 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
2755 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2757 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2759 if (adapter
->num_vfs
) {
2762 /* Map PF MAC address in RAR Entry 0 to first pool
2764 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
2766 /* Set up VF register offsets for selected VT Mode, i.e.
2767 * 64 VFs for SR-IOV */
2768 reg
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
2769 reg
|= IXGBE_GCR_EXT_SRIOV
;
2770 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, reg
);
2773 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2775 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
2776 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
2777 /* Disable indicating checksum in descriptor, enables
2779 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2781 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
2782 /* Enable IPv4 payload checksum for UDP fragments
2783 * if PCSD is not set */
2784 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
2787 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2789 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2790 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2791 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
2792 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
2793 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2796 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
2797 /* Enable 82599 HW-RSC */
2798 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2799 ixgbe_configure_rscctl(adapter
, i
);
2801 /* Disable RSC for ACK packets */
2802 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
2803 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
2807 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
2809 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2810 struct ixgbe_hw
*hw
= &adapter
->hw
;
2811 int pool_ndx
= adapter
->num_vfs
;
2813 /* add VID to filter table */
2814 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
2817 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
2819 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2820 struct ixgbe_hw
*hw
= &adapter
->hw
;
2821 int pool_ndx
= adapter
->num_vfs
;
2823 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2824 ixgbe_irq_disable(adapter
);
2826 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
2828 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2829 ixgbe_irq_enable(adapter
);
2831 /* remove VID from filter table */
2832 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
2836 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
2837 * @adapter: driver data
2839 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
2841 struct ixgbe_hw
*hw
= &adapter
->hw
;
2842 u32 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2845 switch (hw
->mac
.type
) {
2846 case ixgbe_mac_82598EB
:
2847 vlnctrl
&= ~(IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
);
2848 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2849 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2851 case ixgbe_mac_82599EB
:
2852 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
2853 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2854 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2855 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2856 j
= adapter
->rx_ring
[i
]->reg_idx
;
2857 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2858 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
2859 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2868 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
2869 * @adapter: driver data
2871 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
2873 struct ixgbe_hw
*hw
= &adapter
->hw
;
2874 u32 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2877 switch (hw
->mac
.type
) {
2878 case ixgbe_mac_82598EB
:
2879 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2880 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2881 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2883 case ixgbe_mac_82599EB
:
2884 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2885 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2886 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2887 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2888 j
= adapter
->rx_ring
[i
]->reg_idx
;
2889 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2890 vlnctrl
|= IXGBE_RXDCTL_VME
;
2891 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2899 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
2900 struct vlan_group
*grp
)
2902 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2904 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2905 ixgbe_irq_disable(adapter
);
2906 adapter
->vlgrp
= grp
;
2909 * For a DCB driver, always enable VLAN tag stripping so we can
2910 * still receive traffic from a DCB-enabled host even if we're
2913 ixgbe_vlan_filter_enable(adapter
);
2915 ixgbe_vlan_rx_add_vid(netdev
, 0);
2917 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2918 ixgbe_irq_enable(adapter
);
2921 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
2923 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
2925 if (adapter
->vlgrp
) {
2927 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
2928 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
2930 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
2936 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
2937 * @netdev: network interface device structure
2939 * The set_rx_method entry point is called whenever the unicast/multicast
2940 * address list or the network interface flags are updated. This routine is
2941 * responsible for configuring the hardware for proper unicast, multicast and
2944 void ixgbe_set_rx_mode(struct net_device
*netdev
)
2946 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2947 struct ixgbe_hw
*hw
= &adapter
->hw
;
2950 /* Check for Promiscuous and All Multicast modes */
2952 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
2954 if (netdev
->flags
& IFF_PROMISC
) {
2955 hw
->addr_ctrl
.user_set_promisc
= 1;
2956 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2957 /* don't hardware filter vlans in promisc mode */
2958 ixgbe_vlan_filter_disable(adapter
);
2960 if (netdev
->flags
& IFF_ALLMULTI
) {
2961 fctrl
|= IXGBE_FCTRL_MPE
;
2962 fctrl
&= ~IXGBE_FCTRL_UPE
;
2964 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2966 ixgbe_vlan_filter_enable(adapter
);
2967 hw
->addr_ctrl
.user_set_promisc
= 0;
2970 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
2972 /* reprogram secondary unicast list */
2973 hw
->mac
.ops
.update_uc_addr_list(hw
, netdev
);
2975 /* reprogram multicast list */
2976 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
2978 if (adapter
->num_vfs
)
2979 ixgbe_restore_vf_multicasts(adapter
);
2982 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
2985 struct ixgbe_q_vector
*q_vector
;
2986 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2988 /* legacy and MSI only use one vector */
2989 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2992 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2993 struct napi_struct
*napi
;
2994 q_vector
= adapter
->q_vector
[q_idx
];
2995 napi
= &q_vector
->napi
;
2996 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2997 if (!q_vector
->rxr_count
|| !q_vector
->txr_count
) {
2998 if (q_vector
->txr_count
== 1)
2999 napi
->poll
= &ixgbe_clean_txonly
;
3000 else if (q_vector
->rxr_count
== 1)
3001 napi
->poll
= &ixgbe_clean_rxonly
;
3009 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3012 struct ixgbe_q_vector
*q_vector
;
3013 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3015 /* legacy and MSI only use one vector */
3016 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3019 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3020 q_vector
= adapter
->q_vector
[q_idx
];
3021 napi_disable(&q_vector
->napi
);
3025 #ifdef CONFIG_IXGBE_DCB
3027 * ixgbe_configure_dcb - Configure DCB hardware
3028 * @adapter: ixgbe adapter struct
3030 * This is called by the driver on open to configure the DCB hardware.
3031 * This is also called by the gennetlink interface when reconfiguring
3034 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3036 struct ixgbe_hw
*hw
= &adapter
->hw
;
3040 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
3041 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
3042 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
3044 /* reconfigure the hardware */
3045 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
3047 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3048 j
= adapter
->tx_ring
[i
]->reg_idx
;
3049 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3050 /* PThresh workaround for Tx hang with DFP enabled. */
3052 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
3054 /* Enable VLAN tag insert/strip */
3055 ixgbe_vlan_filter_enable(adapter
);
3057 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3061 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3063 struct net_device
*netdev
= adapter
->netdev
;
3064 struct ixgbe_hw
*hw
= &adapter
->hw
;
3067 ixgbe_set_rx_mode(netdev
);
3069 ixgbe_restore_vlan(adapter
);
3070 #ifdef CONFIG_IXGBE_DCB
3071 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3072 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3073 netif_set_gso_max_size(netdev
, 32768);
3075 netif_set_gso_max_size(netdev
, 65536);
3076 ixgbe_configure_dcb(adapter
);
3078 netif_set_gso_max_size(netdev
, 65536);
3081 netif_set_gso_max_size(netdev
, 65536);
3085 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3086 ixgbe_configure_fcoe(adapter
);
3088 #endif /* IXGBE_FCOE */
3089 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3090 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3091 adapter
->tx_ring
[i
]->atr_sample_rate
=
3092 adapter
->atr_sample_rate
;
3093 ixgbe_init_fdir_signature_82599(hw
, adapter
->fdir_pballoc
);
3094 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3095 ixgbe_init_fdir_perfect_82599(hw
, adapter
->fdir_pballoc
);
3098 ixgbe_configure_tx(adapter
);
3099 ixgbe_configure_rx(adapter
);
3100 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3101 ixgbe_alloc_rx_buffers(adapter
, adapter
->rx_ring
[i
],
3102 (adapter
->rx_ring
[i
]->count
- 1));
3105 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3107 switch (hw
->phy
.type
) {
3108 case ixgbe_phy_sfp_avago
:
3109 case ixgbe_phy_sfp_ftl
:
3110 case ixgbe_phy_sfp_intel
:
3111 case ixgbe_phy_sfp_unknown
:
3112 case ixgbe_phy_tw_tyco
:
3113 case ixgbe_phy_tw_unknown
:
3121 * ixgbe_sfp_link_config - set up SFP+ link
3122 * @adapter: pointer to private adapter struct
3124 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3126 struct ixgbe_hw
*hw
= &adapter
->hw
;
3128 if (hw
->phy
.multispeed_fiber
) {
3130 * In multispeed fiber setups, the device may not have
3131 * had a physical connection when the driver loaded.
3132 * If that's the case, the initial link configuration
3133 * couldn't get the MAC into 10G or 1G mode, so we'll
3134 * never have a link status change interrupt fire.
3135 * We need to try and force an autonegotiation
3136 * session, then bring up link.
3138 hw
->mac
.ops
.setup_sfp(hw
);
3139 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
3140 schedule_work(&adapter
->multispeed_fiber_task
);
3143 * Direct Attach Cu and non-multispeed fiber modules
3144 * still need to be configured properly prior to
3147 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
3148 schedule_work(&adapter
->sfp_config_module_task
);
3153 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3154 * @hw: pointer to private hardware struct
3156 * Returns 0 on success, negative on failure
3158 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3161 bool negotiation
, link_up
= false;
3162 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3164 if (hw
->mac
.ops
.check_link
)
3165 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3170 if (hw
->mac
.ops
.get_link_capabilities
)
3171 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
3175 if (hw
->mac
.ops
.setup_link
)
3176 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3181 #define IXGBE_MAX_RX_DESC_POLL 10
3182 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3185 int j
= adapter
->rx_ring
[rxr
]->reg_idx
;
3188 for (k
= 0; k
< IXGBE_MAX_RX_DESC_POLL
; k
++) {
3189 if (IXGBE_READ_REG(&adapter
->hw
,
3190 IXGBE_RXDCTL(j
)) & IXGBE_RXDCTL_ENABLE
)
3195 if (k
>= IXGBE_MAX_RX_DESC_POLL
) {
3196 DPRINTK(DRV
, ERR
, "RXDCTL.ENABLE on Rx queue %d "
3197 "not set within the polling period\n", rxr
);
3199 ixgbe_release_rx_desc(&adapter
->hw
, adapter
->rx_ring
[rxr
],
3200 (adapter
->rx_ring
[rxr
]->count
- 1));
3203 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
3205 struct net_device
*netdev
= adapter
->netdev
;
3206 struct ixgbe_hw
*hw
= &adapter
->hw
;
3208 int num_rx_rings
= adapter
->num_rx_queues
;
3210 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3211 u32 txdctl
, rxdctl
, mhadd
;
3216 ixgbe_get_hw_control(adapter
);
3218 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
3219 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
3220 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3221 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
3222 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
3227 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3228 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3229 gpie
|= IXGBE_GPIE_VTMODE_64
;
3231 /* XXX: to interrupt immediately for EICS writes, enable this */
3232 /* gpie |= IXGBE_GPIE_EIMEN; */
3233 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3236 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3238 * use EIAM to auto-mask when MSI-X interrupt is asserted
3239 * this saves a register write for every interrupt
3241 switch (hw
->mac
.type
) {
3242 case ixgbe_mac_82598EB
:
3243 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3246 case ixgbe_mac_82599EB
:
3247 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3248 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3252 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3253 * specifically only auto mask tx and rx interrupts */
3254 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3257 /* Enable fan failure interrupt if media type is copper */
3258 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
3259 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
3260 gpie
|= IXGBE_SDP1_GPIEN
;
3261 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3264 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3265 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
3266 gpie
|= IXGBE_SDP1_GPIEN
;
3267 gpie
|= IXGBE_SDP2_GPIEN
;
3268 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3272 /* adjust max frame to be able to do baby jumbo for FCoE */
3273 if ((netdev
->features
& NETIF_F_FCOE_MTU
) &&
3274 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3275 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3277 #endif /* IXGBE_FCOE */
3278 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3279 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3280 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3281 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3283 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3286 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3287 j
= adapter
->tx_ring
[i
]->reg_idx
;
3288 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3289 if (adapter
->rx_itr_setting
== 0) {
3290 /* cannot set wthresh when itr==0 */
3291 txdctl
&= ~0x007F0000;
3293 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
3294 txdctl
|= (8 << 16);
3296 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
3299 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3300 /* DMATXCTL.EN must be set after all Tx queue config is done */
3301 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3302 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3303 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3305 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3306 j
= adapter
->tx_ring
[i
]->reg_idx
;
3307 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3308 txdctl
|= IXGBE_TXDCTL_ENABLE
;
3309 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
3310 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3312 /* poll for Tx Enable ready */
3315 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3316 } while (--wait_loop
&&
3317 !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3319 DPRINTK(DRV
, ERR
, "Could not enable "
3320 "Tx Queue %d\n", j
);
3324 for (i
= 0; i
< num_rx_rings
; i
++) {
3325 j
= adapter
->rx_ring
[i
]->reg_idx
;
3326 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3327 /* enable PTHRESH=32 descriptors (half the internal cache)
3328 * and HTHRESH=0 descriptors (to minimize latency on fetch),
3329 * this also removes a pesky rx_no_buffer_count increment */
3331 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3332 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
3333 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3334 ixgbe_rx_desc_queue_enable(adapter
, i
);
3336 /* enable all receives */
3337 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3338 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3339 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
3341 rxdctl
|= IXGBE_RXCTRL_RXEN
;
3342 hw
->mac
.ops
.enable_rx_dma(hw
, rxdctl
);
3344 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3345 ixgbe_configure_msix(adapter
);
3347 ixgbe_configure_msi_and_legacy(adapter
);
3349 /* enable the optics */
3350 if (hw
->phy
.multispeed_fiber
)
3351 hw
->mac
.ops
.enable_tx_laser(hw
);
3353 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
3354 ixgbe_napi_enable_all(adapter
);
3356 /* clear any pending interrupts, may auto mask */
3357 IXGBE_READ_REG(hw
, IXGBE_EICR
);
3359 ixgbe_irq_enable(adapter
);
3362 * If this adapter has a fan, check to see if we had a failure
3363 * before we enabled the interrupt.
3365 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
3366 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
3367 if (esdp
& IXGBE_ESDP_SDP1
)
3369 "Fan has stopped, replace the adapter\n");
3373 * For hot-pluggable SFP+ devices, a new SFP+ module may have
3374 * arrived before interrupts were enabled but after probe. Such
3375 * devices wouldn't have their type identified yet. We need to
3376 * kick off the SFP+ module setup first, then try to bring up link.
3377 * If we're not hot-pluggable SFP+, we just need to configure link
3380 if (hw
->phy
.type
== ixgbe_phy_unknown
) {
3381 err
= hw
->phy
.ops
.identify(hw
);
3382 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3384 * Take the device down and schedule the sfp tasklet
3385 * which will unregister_netdev and log it.
3387 ixgbe_down(adapter
);
3388 schedule_work(&adapter
->sfp_config_module_task
);
3393 if (ixgbe_is_sfp(hw
)) {
3394 ixgbe_sfp_link_config(adapter
);
3396 err
= ixgbe_non_sfp_link_config(hw
);
3398 DPRINTK(PROBE
, ERR
, "link_config FAILED %d\n", err
);
3401 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3402 set_bit(__IXGBE_FDIR_INIT_DONE
,
3403 &(adapter
->tx_ring
[i
]->reinit_state
));
3405 /* enable transmits */
3406 netif_tx_start_all_queues(netdev
);
3408 /* bring the link up in the watchdog, this could race with our first
3409 * link up interrupt but shouldn't be a problem */
3410 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
3411 adapter
->link_check_timeout
= jiffies
;
3412 mod_timer(&adapter
->watchdog_timer
, jiffies
);
3414 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3415 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
3416 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
3417 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
3422 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
3424 WARN_ON(in_interrupt());
3425 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
3427 ixgbe_down(adapter
);
3429 * If SR-IOV enabled then wait a bit before bringing the adapter
3430 * back up to give the VFs time to respond to the reset. The
3431 * two second wait is based upon the watchdog timer cycle in
3434 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3437 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
3440 int ixgbe_up(struct ixgbe_adapter
*adapter
)
3442 /* hardware has been reset, we need to reload some things */
3443 ixgbe_configure(adapter
);
3445 return ixgbe_up_complete(adapter
);
3448 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
3450 struct ixgbe_hw
*hw
= &adapter
->hw
;
3453 err
= hw
->mac
.ops
.init_hw(hw
);
3456 case IXGBE_ERR_SFP_NOT_PRESENT
:
3458 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
3459 dev_err(&adapter
->pdev
->dev
, "master disable timed out\n");
3461 case IXGBE_ERR_EEPROM_VERSION
:
3462 /* We are running on a pre-production device, log a warning */
3463 dev_warn(&adapter
->pdev
->dev
, "This device is a pre-production "
3464 "adapter/LOM. Please be aware there may be issues "
3465 "associated with your hardware. If you are "
3466 "experiencing problems please contact your Intel or "
3467 "hardware representative who provided you with this "
3471 dev_err(&adapter
->pdev
->dev
, "Hardware Error: %d\n", err
);
3474 /* reprogram the RAR[0] in case user changed it. */
3475 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
3480 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3481 * @adapter: board private structure
3482 * @rx_ring: ring to free buffers from
3484 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
3485 struct ixgbe_ring
*rx_ring
)
3487 struct pci_dev
*pdev
= adapter
->pdev
;
3491 /* Free all the Rx ring sk_buffs */
3493 for (i
= 0; i
< rx_ring
->count
; i
++) {
3494 struct ixgbe_rx_buffer
*rx_buffer_info
;
3496 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3497 if (rx_buffer_info
->dma
) {
3498 dma_unmap_single(&pdev
->dev
, rx_buffer_info
->dma
,
3499 rx_ring
->rx_buf_len
,
3501 rx_buffer_info
->dma
= 0;
3503 if (rx_buffer_info
->skb
) {
3504 struct sk_buff
*skb
= rx_buffer_info
->skb
;
3505 rx_buffer_info
->skb
= NULL
;
3507 struct sk_buff
*this = skb
;
3508 if (IXGBE_RSC_CB(this)->dma
) {
3509 dma_unmap_single(&pdev
->dev
,
3510 IXGBE_RSC_CB(this)->dma
,
3511 rx_ring
->rx_buf_len
,
3513 IXGBE_RSC_CB(this)->dma
= 0;
3516 dev_kfree_skb(this);
3519 if (!rx_buffer_info
->page
)
3521 if (rx_buffer_info
->page_dma
) {
3522 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
3523 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
3524 rx_buffer_info
->page_dma
= 0;
3526 put_page(rx_buffer_info
->page
);
3527 rx_buffer_info
->page
= NULL
;
3528 rx_buffer_info
->page_offset
= 0;
3531 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3532 memset(rx_ring
->rx_buffer_info
, 0, size
);
3534 /* Zero out the descriptor ring */
3535 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3537 rx_ring
->next_to_clean
= 0;
3538 rx_ring
->next_to_use
= 0;
3541 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
3543 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
3547 * ixgbe_clean_tx_ring - Free Tx Buffers
3548 * @adapter: board private structure
3549 * @tx_ring: ring to be cleaned
3551 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
3552 struct ixgbe_ring
*tx_ring
)
3554 struct ixgbe_tx_buffer
*tx_buffer_info
;
3558 /* Free all the Tx ring sk_buffs */
3560 for (i
= 0; i
< tx_ring
->count
; i
++) {
3561 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3562 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
3565 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3566 memset(tx_ring
->tx_buffer_info
, 0, size
);
3568 /* Zero out the descriptor ring */
3569 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3571 tx_ring
->next_to_use
= 0;
3572 tx_ring
->next_to_clean
= 0;
3575 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
3577 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3581 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3582 * @adapter: board private structure
3584 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
3588 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3589 ixgbe_clean_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3593 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3594 * @adapter: board private structure
3596 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
3600 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3601 ixgbe_clean_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3604 void ixgbe_down(struct ixgbe_adapter
*adapter
)
3606 struct net_device
*netdev
= adapter
->netdev
;
3607 struct ixgbe_hw
*hw
= &adapter
->hw
;
3612 /* signal that we are down to the interrupt handler */
3613 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3615 /* power down the optics */
3616 if (hw
->phy
.multispeed_fiber
)
3617 hw
->mac
.ops
.disable_tx_laser(hw
);
3619 /* disable receive for all VFs and wait one second */
3620 if (adapter
->num_vfs
) {
3621 /* ping all the active vfs to let them know we are going down */
3622 ixgbe_ping_all_vfs(adapter
);
3624 /* Disable all VFTE/VFRE TX/RX */
3625 ixgbe_disable_tx_rx(adapter
);
3627 /* Mark all the VFs as inactive */
3628 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
3629 adapter
->vfinfo
[i
].clear_to_send
= 0;
3632 /* disable receives */
3633 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3634 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3636 IXGBE_WRITE_FLUSH(hw
);
3639 netif_tx_stop_all_queues(netdev
);
3641 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3642 del_timer_sync(&adapter
->sfp_timer
);
3643 del_timer_sync(&adapter
->watchdog_timer
);
3644 cancel_work_sync(&adapter
->watchdog_task
);
3646 netif_carrier_off(netdev
);
3647 netif_tx_disable(netdev
);
3649 ixgbe_irq_disable(adapter
);
3651 ixgbe_napi_disable_all(adapter
);
3653 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3654 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3655 cancel_work_sync(&adapter
->fdir_reinit_task
);
3657 /* disable transmits in the hardware now that interrupts are off */
3658 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3659 j
= adapter
->tx_ring
[i
]->reg_idx
;
3660 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3661 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
3662 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
3664 /* Disable the Tx DMA engine on 82599 */
3665 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3666 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
3667 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
3668 ~IXGBE_DMATXCTL_TE
));
3670 /* clear n-tuple filters that are cached */
3671 ethtool_ntuple_flush(netdev
);
3673 if (!pci_channel_offline(adapter
->pdev
))
3674 ixgbe_reset(adapter
);
3675 ixgbe_clean_all_tx_rings(adapter
);
3676 ixgbe_clean_all_rx_rings(adapter
);
3678 #ifdef CONFIG_IXGBE_DCA
3679 /* since we reset the hardware DCA settings were cleared */
3680 ixgbe_setup_dca(adapter
);
3685 * ixgbe_poll - NAPI Rx polling callback
3686 * @napi: structure for representing this polling device
3687 * @budget: how many packets driver is allowed to clean
3689 * This function is used for legacy and MSI, NAPI mode
3691 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
3693 struct ixgbe_q_vector
*q_vector
=
3694 container_of(napi
, struct ixgbe_q_vector
, napi
);
3695 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
3696 int tx_clean_complete
, work_done
= 0;
3698 #ifdef CONFIG_IXGBE_DCA
3699 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3700 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[0]);
3701 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[0]);
3705 tx_clean_complete
= ixgbe_clean_tx_irq(q_vector
, adapter
->tx_ring
[0]);
3706 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
[0], &work_done
, budget
);
3708 if (!tx_clean_complete
)
3711 /* If budget not fully consumed, exit the polling mode */
3712 if (work_done
< budget
) {
3713 napi_complete(napi
);
3714 if (adapter
->rx_itr_setting
& 1)
3715 ixgbe_set_itr(adapter
);
3716 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3717 ixgbe_irq_enable_queues(adapter
, IXGBE_EIMS_RTX_QUEUE
);
3723 * ixgbe_tx_timeout - Respond to a Tx Hang
3724 * @netdev: network interface device structure
3726 static void ixgbe_tx_timeout(struct net_device
*netdev
)
3728 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3730 /* Do the reset outside of interrupt context */
3731 schedule_work(&adapter
->reset_task
);
3734 static void ixgbe_reset_task(struct work_struct
*work
)
3736 struct ixgbe_adapter
*adapter
;
3737 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
3739 /* If we're already down or resetting, just bail */
3740 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
3741 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
3744 adapter
->tx_timeout_count
++;
3746 ixgbe_dump(adapter
);
3747 netdev_err(adapter
->netdev
, "Reset adapter\n");
3748 ixgbe_reinit_locked(adapter
);
3751 #ifdef CONFIG_IXGBE_DCB
3752 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
3755 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_DCB
];
3757 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3761 adapter
->num_rx_queues
= f
->indices
;
3762 adapter
->num_tx_queues
= f
->indices
;
3770 * ixgbe_set_rss_queues: Allocate queues for RSS
3771 * @adapter: board private structure to initialize
3773 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3774 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3777 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
3780 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_RSS
];
3782 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3784 adapter
->num_rx_queues
= f
->indices
;
3785 adapter
->num_tx_queues
= f
->indices
;
3795 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3796 * @adapter: board private structure to initialize
3798 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3799 * to the original CPU that initiated the Tx session. This runs in addition
3800 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3801 * Rx load across CPUs using RSS.
3804 static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter
*adapter
)
3807 struct ixgbe_ring_feature
*f_fdir
= &adapter
->ring_feature
[RING_F_FDIR
];
3809 f_fdir
->indices
= min((int)num_online_cpus(), f_fdir
->indices
);
3812 /* Flow Director must have RSS enabled */
3813 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
3814 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3815 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)))) {
3816 adapter
->num_tx_queues
= f_fdir
->indices
;
3817 adapter
->num_rx_queues
= f_fdir
->indices
;
3820 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3821 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
3828 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3829 * @adapter: board private structure to initialize
3831 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3832 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3833 * rx queues out of the max number of rx queues, instead, it is used as the
3834 * index of the first rx queue used by FCoE.
3837 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter
*adapter
)
3840 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
3842 f
->indices
= min((int)num_online_cpus(), f
->indices
);
3843 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
3844 adapter
->num_rx_queues
= 1;
3845 adapter
->num_tx_queues
= 1;
3846 #ifdef CONFIG_IXGBE_DCB
3847 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3848 DPRINTK(PROBE
, INFO
, "FCoE enabled with DCB\n");
3849 ixgbe_set_dcb_queues(adapter
);
3852 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3853 DPRINTK(PROBE
, INFO
, "FCoE enabled with RSS\n");
3854 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
3855 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
3856 ixgbe_set_fdir_queues(adapter
);
3858 ixgbe_set_rss_queues(adapter
);
3860 /* adding FCoE rx rings to the end */
3861 f
->mask
= adapter
->num_rx_queues
;
3862 adapter
->num_rx_queues
+= f
->indices
;
3863 adapter
->num_tx_queues
+= f
->indices
;
3871 #endif /* IXGBE_FCOE */
3873 * ixgbe_set_sriov_queues: Allocate queues for IOV use
3874 * @adapter: board private structure to initialize
3876 * IOV doesn't actually use anything, so just NAK the
3877 * request for now and let the other queue routines
3878 * figure out what to do.
3880 static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter
*adapter
)
3886 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
3887 * @adapter: board private structure to initialize
3889 * This is the top level queue allocation routine. The order here is very
3890 * important, starting with the "most" number of features turned on at once,
3891 * and ending with the smallest set of features. This way large combinations
3892 * can be allocated if they're turned on, and smaller combinations are the
3893 * fallthrough conditions.
3896 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
3898 /* Start with base case */
3899 adapter
->num_rx_queues
= 1;
3900 adapter
->num_tx_queues
= 1;
3901 adapter
->num_rx_pools
= adapter
->num_rx_queues
;
3902 adapter
->num_rx_queues_per_pool
= 1;
3904 if (ixgbe_set_sriov_queues(adapter
))
3908 if (ixgbe_set_fcoe_queues(adapter
))
3911 #endif /* IXGBE_FCOE */
3912 #ifdef CONFIG_IXGBE_DCB
3913 if (ixgbe_set_dcb_queues(adapter
))
3917 if (ixgbe_set_fdir_queues(adapter
))
3920 if (ixgbe_set_rss_queues(adapter
))
3923 /* fallback to base case */
3924 adapter
->num_rx_queues
= 1;
3925 adapter
->num_tx_queues
= 1;
3928 /* Notify the stack of the (possibly) reduced Tx Queue count. */
3929 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
3932 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
3935 int err
, vector_threshold
;
3937 /* We'll want at least 3 (vector_threshold):
3940 * 3) Other (Link Status Change, etc.)
3941 * 4) TCP Timer (optional)
3943 vector_threshold
= MIN_MSIX_COUNT
;
3945 /* The more we get, the more we will assign to Tx/Rx Cleanup
3946 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
3947 * Right now, we simply care about how many we'll get; we'll
3948 * set them up later while requesting irq's.
3950 while (vectors
>= vector_threshold
) {
3951 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
3953 if (!err
) /* Success in acquiring all requested vectors. */
3956 vectors
= 0; /* Nasty failure, quit now */
3957 else /* err == number of vectors we should try again with */
3961 if (vectors
< vector_threshold
) {
3962 /* Can't allocate enough MSI-X interrupts? Oh well.
3963 * This just means we'll go with either a single MSI
3964 * vector or fall back to legacy interrupts.
3966 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
3967 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3968 kfree(adapter
->msix_entries
);
3969 adapter
->msix_entries
= NULL
;
3971 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
3973 * Adjust for only the vectors we'll use, which is minimum
3974 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
3975 * vectors we were allocated.
3977 adapter
->num_msix_vectors
= min(vectors
,
3978 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
3983 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
3984 * @adapter: board private structure to initialize
3986 * Cache the descriptor ring offsets for RSS to the assigned rings.
3989 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
3994 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3995 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3996 adapter
->rx_ring
[i
]->reg_idx
= i
;
3997 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3998 adapter
->tx_ring
[i
]->reg_idx
= i
;
4007 #ifdef CONFIG_IXGBE_DCB
4009 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
4010 * @adapter: board private structure to initialize
4012 * Cache the descriptor ring offsets for DCB to the assigned rings.
4015 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
4019 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
4021 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4022 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
4023 /* the number of queues is assumed to be symmetric */
4024 for (i
= 0; i
< dcb_i
; i
++) {
4025 adapter
->rx_ring
[i
]->reg_idx
= i
<< 3;
4026 adapter
->tx_ring
[i
]->reg_idx
= i
<< 2;
4029 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
4032 * Tx TC0 starts at: descriptor queue 0
4033 * Tx TC1 starts at: descriptor queue 32
4034 * Tx TC2 starts at: descriptor queue 64
4035 * Tx TC3 starts at: descriptor queue 80
4036 * Tx TC4 starts at: descriptor queue 96
4037 * Tx TC5 starts at: descriptor queue 104
4038 * Tx TC6 starts at: descriptor queue 112
4039 * Tx TC7 starts at: descriptor queue 120
4041 * Rx TC0-TC7 are offset by 16 queues each
4043 for (i
= 0; i
< 3; i
++) {
4044 adapter
->tx_ring
[i
]->reg_idx
= i
<< 5;
4045 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4047 for ( ; i
< 5; i
++) {
4048 adapter
->tx_ring
[i
]->reg_idx
=
4050 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4052 for ( ; i
< dcb_i
; i
++) {
4053 adapter
->tx_ring
[i
]->reg_idx
=
4055 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4059 } else if (dcb_i
== 4) {
4061 * Tx TC0 starts at: descriptor queue 0
4062 * Tx TC1 starts at: descriptor queue 64
4063 * Tx TC2 starts at: descriptor queue 96
4064 * Tx TC3 starts at: descriptor queue 112
4066 * Rx TC0-TC3 are offset by 32 queues each
4068 adapter
->tx_ring
[0]->reg_idx
= 0;
4069 adapter
->tx_ring
[1]->reg_idx
= 64;
4070 adapter
->tx_ring
[2]->reg_idx
= 96;
4071 adapter
->tx_ring
[3]->reg_idx
= 112;
4072 for (i
= 0 ; i
< dcb_i
; i
++)
4073 adapter
->rx_ring
[i
]->reg_idx
= i
<< 5;
4091 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
4092 * @adapter: board private structure to initialize
4094 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
4097 static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter
*adapter
)
4102 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
4103 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4104 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))) {
4105 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4106 adapter
->rx_ring
[i
]->reg_idx
= i
;
4107 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4108 adapter
->tx_ring
[i
]->reg_idx
= i
;
4117 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
4118 * @adapter: board private structure to initialize
4120 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
4123 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter
*adapter
)
4125 int i
, fcoe_rx_i
= 0, fcoe_tx_i
= 0;
4127 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
4129 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
4130 #ifdef CONFIG_IXGBE_DCB
4131 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4132 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
4134 ixgbe_cache_ring_dcb(adapter
);
4135 /* find out queues in TC for FCoE */
4136 fcoe_rx_i
= adapter
->rx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4137 fcoe_tx_i
= adapter
->tx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4139 * In 82599, the number of Tx queues for each traffic
4140 * class for both 8-TC and 4-TC modes are:
4141 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
4142 * 8 TCs: 32 32 16 16 8 8 8 8
4143 * 4 TCs: 64 64 32 32
4144 * We have max 8 queues for FCoE, where 8 the is
4145 * FCoE redirection table size. If TC for FCoE is
4146 * less than or equal to TC3, we have enough queues
4147 * to add max of 8 queues for FCoE, so we start FCoE
4148 * tx descriptor from the next one, i.e., reg_idx + 1.
4149 * If TC for FCoE is above TC3, implying 8 TC mode,
4150 * and we need 8 for FCoE, we have to take all queues
4151 * in that traffic class for FCoE.
4153 if ((f
->indices
== IXGBE_FCRETA_SIZE
) && (fcoe
->tc
> 3))
4156 #endif /* CONFIG_IXGBE_DCB */
4157 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4158 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4159 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
4160 ixgbe_cache_ring_fdir(adapter
);
4162 ixgbe_cache_ring_rss(adapter
);
4164 fcoe_rx_i
= f
->mask
;
4165 fcoe_tx_i
= f
->mask
;
4167 for (i
= 0; i
< f
->indices
; i
++, fcoe_rx_i
++, fcoe_tx_i
++) {
4168 adapter
->rx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_rx_i
;
4169 adapter
->tx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_tx_i
;
4176 #endif /* IXGBE_FCOE */
4178 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
4179 * @adapter: board private structure to initialize
4181 * SR-IOV doesn't use any descriptor rings but changes the default if
4182 * no other mapping is used.
4185 static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter
*adapter
)
4187 adapter
->rx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4188 adapter
->tx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4189 if (adapter
->num_vfs
)
4196 * ixgbe_cache_ring_register - Descriptor ring to register mapping
4197 * @adapter: board private structure to initialize
4199 * Once we know the feature-set enabled for the device, we'll cache
4200 * the register offset the descriptor ring is assigned to.
4202 * Note, the order the various feature calls is important. It must start with
4203 * the "most" features enabled at the same time, then trickle down to the
4204 * least amount of features turned on at once.
4206 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
4208 /* start with default case */
4209 adapter
->rx_ring
[0]->reg_idx
= 0;
4210 adapter
->tx_ring
[0]->reg_idx
= 0;
4212 if (ixgbe_cache_ring_sriov(adapter
))
4216 if (ixgbe_cache_ring_fcoe(adapter
))
4219 #endif /* IXGBE_FCOE */
4220 #ifdef CONFIG_IXGBE_DCB
4221 if (ixgbe_cache_ring_dcb(adapter
))
4225 if (ixgbe_cache_ring_fdir(adapter
))
4228 if (ixgbe_cache_ring_rss(adapter
))
4233 * ixgbe_alloc_queues - Allocate memory for all rings
4234 * @adapter: board private structure to initialize
4236 * We allocate one ring per queue at run-time since we don't know the
4237 * number of queues at compile-time. The polling_netdev array is
4238 * intended for Multiqueue, but should work fine with a single queue.
4240 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
4243 int orig_node
= adapter
->node
;
4245 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4246 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
4247 if (orig_node
== -1) {
4248 int cur_node
= next_online_node(adapter
->node
);
4249 if (cur_node
== MAX_NUMNODES
)
4250 cur_node
= first_online_node
;
4251 adapter
->node
= cur_node
;
4253 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4256 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4258 goto err_tx_ring_allocation
;
4259 ring
->count
= adapter
->tx_ring_count
;
4260 ring
->queue_index
= i
;
4261 ring
->numa_node
= adapter
->node
;
4263 adapter
->tx_ring
[i
] = ring
;
4266 /* Restore the adapter's original node */
4267 adapter
->node
= orig_node
;
4269 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4270 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4271 if (orig_node
== -1) {
4272 int cur_node
= next_online_node(adapter
->node
);
4273 if (cur_node
== MAX_NUMNODES
)
4274 cur_node
= first_online_node
;
4275 adapter
->node
= cur_node
;
4277 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4280 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4282 goto err_rx_ring_allocation
;
4283 ring
->count
= adapter
->rx_ring_count
;
4284 ring
->queue_index
= i
;
4285 ring
->numa_node
= adapter
->node
;
4287 adapter
->rx_ring
[i
] = ring
;
4290 /* Restore the adapter's original node */
4291 adapter
->node
= orig_node
;
4293 ixgbe_cache_ring_register(adapter
);
4297 err_rx_ring_allocation
:
4298 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4299 kfree(adapter
->tx_ring
[i
]);
4300 err_tx_ring_allocation
:
4305 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
4306 * @adapter: board private structure to initialize
4308 * Attempt to configure the interrupts using the best available
4309 * capabilities of the hardware and the kernel.
4311 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
4313 struct ixgbe_hw
*hw
= &adapter
->hw
;
4315 int vector
, v_budget
;
4318 * It's easy to be greedy for MSI-X vectors, but it really
4319 * doesn't do us much good if we have a lot more vectors
4320 * than CPU's. So let's be conservative and only ask for
4321 * (roughly) the same number of vectors as there are CPU's.
4323 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
4324 (int)num_online_cpus()) + NON_Q_VECTORS
;
4327 * At the same time, hardware can only support a maximum of
4328 * hw.mac->max_msix_vectors vectors. With features
4329 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
4330 * descriptor queues supported by our device. Thus, we cap it off in
4331 * those rare cases where the cpu count also exceeds our vector limit.
4333 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
4335 /* A failure in MSI-X entry allocation isn't fatal, but it does
4336 * mean we disable MSI-X capabilities of the adapter. */
4337 adapter
->msix_entries
= kcalloc(v_budget
,
4338 sizeof(struct msix_entry
), GFP_KERNEL
);
4339 if (adapter
->msix_entries
) {
4340 for (vector
= 0; vector
< v_budget
; vector
++)
4341 adapter
->msix_entries
[vector
].entry
= vector
;
4343 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
4345 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4349 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
4350 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4351 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4352 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4353 adapter
->atr_sample_rate
= 0;
4354 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4355 ixgbe_disable_sriov(adapter
);
4357 ixgbe_set_num_queues(adapter
);
4359 err
= pci_enable_msi(adapter
->pdev
);
4361 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
4363 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
4364 "falling back to legacy. Error: %d\n", err
);
4374 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
4375 * @adapter: board private structure to initialize
4377 * We allocate one q_vector per queue interrupt. If allocation fails we
4380 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter
*adapter
)
4382 int q_idx
, num_q_vectors
;
4383 struct ixgbe_q_vector
*q_vector
;
4385 int (*poll
)(struct napi_struct
*, int);
4387 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4388 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4389 napi_vectors
= adapter
->num_rx_queues
;
4390 poll
= &ixgbe_clean_rxtx_many
;
4397 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4398 q_vector
= kzalloc_node(sizeof(struct ixgbe_q_vector
),
4399 GFP_KERNEL
, adapter
->node
);
4401 q_vector
= kzalloc(sizeof(struct ixgbe_q_vector
),
4405 q_vector
->adapter
= adapter
;
4406 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
4407 q_vector
->eitr
= adapter
->tx_eitr_param
;
4409 q_vector
->eitr
= adapter
->rx_eitr_param
;
4410 q_vector
->v_idx
= q_idx
;
4411 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
4412 adapter
->q_vector
[q_idx
] = q_vector
;
4420 q_vector
= adapter
->q_vector
[q_idx
];
4421 netif_napi_del(&q_vector
->napi
);
4423 adapter
->q_vector
[q_idx
] = NULL
;
4429 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4430 * @adapter: board private structure to initialize
4432 * This function frees the memory allocated to the q_vectors. In addition if
4433 * NAPI is enabled it will delete any references to the NAPI struct prior
4434 * to freeing the q_vector.
4436 static void ixgbe_free_q_vectors(struct ixgbe_adapter
*adapter
)
4438 int q_idx
, num_q_vectors
;
4440 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4441 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4445 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4446 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[q_idx
];
4447 adapter
->q_vector
[q_idx
] = NULL
;
4448 netif_napi_del(&q_vector
->napi
);
4453 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
4455 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4456 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
4457 pci_disable_msix(adapter
->pdev
);
4458 kfree(adapter
->msix_entries
);
4459 adapter
->msix_entries
= NULL
;
4460 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
4461 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
4462 pci_disable_msi(adapter
->pdev
);
4468 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4469 * @adapter: board private structure to initialize
4471 * We determine which interrupt scheme to use based on...
4472 * - Kernel support (MSI, MSI-X)
4473 * - which can be user-defined (via MODULE_PARAM)
4474 * - Hardware queue count (num_*_queues)
4475 * - defined by miscellaneous hardware support/features (RSS, etc.)
4477 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4481 /* Number of supported queues */
4482 ixgbe_set_num_queues(adapter
);
4484 err
= ixgbe_set_interrupt_capability(adapter
);
4486 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
4487 goto err_set_interrupt
;
4490 err
= ixgbe_alloc_q_vectors(adapter
);
4492 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queue "
4494 goto err_alloc_q_vectors
;
4497 err
= ixgbe_alloc_queues(adapter
);
4499 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
4500 goto err_alloc_queues
;
4503 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
4504 "Tx Queue count = %u\n",
4505 (adapter
->num_rx_queues
> 1) ? "Enabled" :
4506 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
4508 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4513 ixgbe_free_q_vectors(adapter
);
4514 err_alloc_q_vectors
:
4515 ixgbe_reset_interrupt_capability(adapter
);
4521 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4522 * @adapter: board private structure to clear interrupt scheme on
4524 * We go through and clear interrupt specific resources and reset the structure
4525 * to pre-load conditions
4527 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4531 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4532 kfree(adapter
->tx_ring
[i
]);
4533 adapter
->tx_ring
[i
] = NULL
;
4535 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4536 kfree(adapter
->rx_ring
[i
]);
4537 adapter
->rx_ring
[i
] = NULL
;
4540 ixgbe_free_q_vectors(adapter
);
4541 ixgbe_reset_interrupt_capability(adapter
);
4545 * ixgbe_sfp_timer - worker thread to find a missing module
4546 * @data: pointer to our adapter struct
4548 static void ixgbe_sfp_timer(unsigned long data
)
4550 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
4553 * Do the sfp_timer outside of interrupt context due to the
4554 * delays that sfp+ detection requires
4556 schedule_work(&adapter
->sfp_task
);
4560 * ixgbe_sfp_task - worker thread to find a missing module
4561 * @work: pointer to work_struct containing our data
4563 static void ixgbe_sfp_task(struct work_struct
*work
)
4565 struct ixgbe_adapter
*adapter
= container_of(work
,
4566 struct ixgbe_adapter
,
4568 struct ixgbe_hw
*hw
= &adapter
->hw
;
4570 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
4571 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
4572 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
4573 if (ret
== IXGBE_ERR_SFP_NOT_PRESENT
)
4575 ret
= hw
->phy
.ops
.reset(hw
);
4576 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4577 dev_err(&adapter
->pdev
->dev
, "failed to initialize "
4578 "because an unsupported SFP+ module type "
4580 "Reload the driver after installing a "
4581 "supported module.\n");
4582 unregister_netdev(adapter
->netdev
);
4584 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
4587 /* don't need this routine any more */
4588 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4592 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
4593 mod_timer(&adapter
->sfp_timer
,
4594 round_jiffies(jiffies
+ (2 * HZ
)));
4598 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4599 * @adapter: board private structure to initialize
4601 * ixgbe_sw_init initializes the Adapter private data structure.
4602 * Fields are initialized based on PCI device information and
4603 * OS network device settings (MTU size).
4605 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4607 struct ixgbe_hw
*hw
= &adapter
->hw
;
4608 struct pci_dev
*pdev
= adapter
->pdev
;
4609 struct net_device
*dev
= adapter
->netdev
;
4611 #ifdef CONFIG_IXGBE_DCB
4613 struct tc_configuration
*tc
;
4616 /* PCI config space info */
4618 hw
->vendor_id
= pdev
->vendor
;
4619 hw
->device_id
= pdev
->device
;
4620 hw
->revision_id
= pdev
->revision
;
4621 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4622 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4624 /* Set capability flags */
4625 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
4626 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
4627 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4628 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
4629 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
4630 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4631 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4632 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
4633 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4634 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
4635 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4636 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4637 if (dev
->features
& NETIF_F_NTUPLE
) {
4638 /* Flow Director perfect filter enabled */
4639 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4640 adapter
->atr_sample_rate
= 0;
4641 spin_lock_init(&adapter
->fdir_perfect_lock
);
4643 /* Flow Director hash filters enabled */
4644 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4645 adapter
->atr_sample_rate
= 20;
4647 adapter
->ring_feature
[RING_F_FDIR
].indices
=
4648 IXGBE_MAX_FDIR_INDICES
;
4649 adapter
->fdir_pballoc
= 0;
4651 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4652 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4653 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
4654 #ifdef CONFIG_IXGBE_DCB
4655 /* Default traffic class to use for FCoE */
4656 adapter
->fcoe
.tc
= IXGBE_FCOE_DEFTC
;
4658 #endif /* IXGBE_FCOE */
4661 #ifdef CONFIG_IXGBE_DCB
4662 /* Configure DCB traffic classes */
4663 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4664 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4665 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4666 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4667 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4668 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4669 tc
->dcb_pfc
= pfc_disabled
;
4671 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4672 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4673 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
4674 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4675 adapter
->dcb_cfg
.round_robin_enable
= false;
4676 adapter
->dcb_set_bitmap
= 0x00;
4677 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
4678 adapter
->ring_feature
[RING_F_DCB
].indices
);
4682 /* default flow control settings */
4683 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4684 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4686 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
4688 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
4689 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
4690 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4691 hw
->fc
.send_xon
= true;
4692 hw
->fc
.disable_fc_autoneg
= false;
4694 /* enable itr by default in dynamic mode */
4695 adapter
->rx_itr_setting
= 1;
4696 adapter
->rx_eitr_param
= 20000;
4697 adapter
->tx_itr_setting
= 1;
4698 adapter
->tx_eitr_param
= 10000;
4700 /* set defaults for eitr in MegaBytes */
4701 adapter
->eitr_low
= 10;
4702 adapter
->eitr_high
= 20;
4704 /* set default ring sizes */
4705 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4706 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4708 /* initialize eeprom parameters */
4709 if (ixgbe_init_eeprom_params_generic(hw
)) {
4710 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
4714 /* enable rx csum by default */
4715 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
4717 /* get assigned NUMA node */
4718 adapter
->node
= dev_to_node(&pdev
->dev
);
4720 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4726 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4727 * @adapter: board private structure
4728 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4730 * Return 0 on success, negative on failure
4732 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
4733 struct ixgbe_ring
*tx_ring
)
4735 struct pci_dev
*pdev
= adapter
->pdev
;
4738 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4739 tx_ring
->tx_buffer_info
= vmalloc_node(size
, tx_ring
->numa_node
);
4740 if (!tx_ring
->tx_buffer_info
)
4741 tx_ring
->tx_buffer_info
= vmalloc(size
);
4742 if (!tx_ring
->tx_buffer_info
)
4744 memset(tx_ring
->tx_buffer_info
, 0, size
);
4746 /* round up to nearest 4K */
4747 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4748 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4750 tx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, tx_ring
->size
,
4751 &tx_ring
->dma
, GFP_KERNEL
);
4755 tx_ring
->next_to_use
= 0;
4756 tx_ring
->next_to_clean
= 0;
4757 tx_ring
->work_limit
= tx_ring
->count
;
4761 vfree(tx_ring
->tx_buffer_info
);
4762 tx_ring
->tx_buffer_info
= NULL
;
4763 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
4764 "descriptor ring\n");
4769 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4770 * @adapter: board private structure
4772 * If this function returns with an error, then it's possible one or
4773 * more of the rings is populated (while the rest are not). It is the
4774 * callers duty to clean those orphaned rings.
4776 * Return 0 on success, negative on failure
4778 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4782 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4783 err
= ixgbe_setup_tx_resources(adapter
, adapter
->tx_ring
[i
]);
4786 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
4794 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4795 * @adapter: board private structure
4796 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4798 * Returns 0 on success, negative on failure
4800 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
4801 struct ixgbe_ring
*rx_ring
)
4803 struct pci_dev
*pdev
= adapter
->pdev
;
4806 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4807 rx_ring
->rx_buffer_info
= vmalloc_node(size
, adapter
->node
);
4808 if (!rx_ring
->rx_buffer_info
)
4809 rx_ring
->rx_buffer_info
= vmalloc(size
);
4810 if (!rx_ring
->rx_buffer_info
) {
4812 "vmalloc allocation failed for the rx desc ring\n");
4815 memset(rx_ring
->rx_buffer_info
, 0, size
);
4817 /* Round up to nearest 4K */
4818 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4819 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4821 rx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, rx_ring
->size
,
4822 &rx_ring
->dma
, GFP_KERNEL
);
4824 if (!rx_ring
->desc
) {
4826 "Memory allocation failed for the rx desc ring\n");
4827 vfree(rx_ring
->rx_buffer_info
);
4831 rx_ring
->next_to_clean
= 0;
4832 rx_ring
->next_to_use
= 0;
4841 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4842 * @adapter: board private structure
4844 * If this function returns with an error, then it's possible one or
4845 * more of the rings is populated (while the rest are not). It is the
4846 * callers duty to clean those orphaned rings.
4848 * Return 0 on success, negative on failure
4851 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4855 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4856 err
= ixgbe_setup_rx_resources(adapter
, adapter
->rx_ring
[i
]);
4859 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
4867 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4868 * @adapter: board private structure
4869 * @tx_ring: Tx descriptor ring for a specific queue
4871 * Free all transmit software resources
4873 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
4874 struct ixgbe_ring
*tx_ring
)
4876 struct pci_dev
*pdev
= adapter
->pdev
;
4878 ixgbe_clean_tx_ring(adapter
, tx_ring
);
4880 vfree(tx_ring
->tx_buffer_info
);
4881 tx_ring
->tx_buffer_info
= NULL
;
4883 dma_free_coherent(&pdev
->dev
, tx_ring
->size
, tx_ring
->desc
,
4886 tx_ring
->desc
= NULL
;
4890 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4891 * @adapter: board private structure
4893 * Free all transmit software resources
4895 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4899 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4900 if (adapter
->tx_ring
[i
]->desc
)
4901 ixgbe_free_tx_resources(adapter
, adapter
->tx_ring
[i
]);
4905 * ixgbe_free_rx_resources - Free Rx Resources
4906 * @adapter: board private structure
4907 * @rx_ring: ring to clean the resources from
4909 * Free all receive software resources
4911 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
4912 struct ixgbe_ring
*rx_ring
)
4914 struct pci_dev
*pdev
= adapter
->pdev
;
4916 ixgbe_clean_rx_ring(adapter
, rx_ring
);
4918 vfree(rx_ring
->rx_buffer_info
);
4919 rx_ring
->rx_buffer_info
= NULL
;
4921 dma_free_coherent(&pdev
->dev
, rx_ring
->size
, rx_ring
->desc
,
4924 rx_ring
->desc
= NULL
;
4928 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4929 * @adapter: board private structure
4931 * Free all receive software resources
4933 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4937 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4938 if (adapter
->rx_ring
[i
]->desc
)
4939 ixgbe_free_rx_resources(adapter
, adapter
->rx_ring
[i
]);
4943 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4944 * @netdev: network interface device structure
4945 * @new_mtu: new value for maximum frame size
4947 * Returns 0 on success, negative on failure
4949 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4951 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4952 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4954 /* MTU < 68 is an error and causes problems on some kernels */
4955 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4958 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
4959 netdev
->mtu
, new_mtu
);
4960 /* must set new MTU before calling down or up */
4961 netdev
->mtu
= new_mtu
;
4963 if (netif_running(netdev
))
4964 ixgbe_reinit_locked(adapter
);
4970 * ixgbe_open - Called when a network interface is made active
4971 * @netdev: network interface device structure
4973 * Returns 0 on success, negative value on failure
4975 * The open entry point is called when a network interface is made
4976 * active by the system (IFF_UP). At this point all resources needed
4977 * for transmit and receive operations are allocated, the interrupt
4978 * handler is registered with the OS, the watchdog timer is started,
4979 * and the stack is notified that the interface is ready.
4981 static int ixgbe_open(struct net_device
*netdev
)
4983 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4986 /* disallow open during test */
4987 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4990 netif_carrier_off(netdev
);
4992 /* allocate transmit descriptors */
4993 err
= ixgbe_setup_all_tx_resources(adapter
);
4997 /* allocate receive descriptors */
4998 err
= ixgbe_setup_all_rx_resources(adapter
);
5002 ixgbe_configure(adapter
);
5004 err
= ixgbe_request_irq(adapter
);
5008 err
= ixgbe_up_complete(adapter
);
5012 netif_tx_start_all_queues(netdev
);
5017 ixgbe_release_hw_control(adapter
);
5018 ixgbe_free_irq(adapter
);
5021 ixgbe_free_all_rx_resources(adapter
);
5023 ixgbe_free_all_tx_resources(adapter
);
5024 ixgbe_reset(adapter
);
5030 * ixgbe_close - Disables a network interface
5031 * @netdev: network interface device structure
5033 * Returns 0, this is not allowed to fail
5035 * The close entry point is called when an interface is de-activated
5036 * by the OS. The hardware is still under the drivers control, but
5037 * needs to be disabled. A global MAC reset is issued to stop the
5038 * hardware, and all transmit and receive resources are freed.
5040 static int ixgbe_close(struct net_device
*netdev
)
5042 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5044 ixgbe_down(adapter
);
5045 ixgbe_free_irq(adapter
);
5047 ixgbe_free_all_tx_resources(adapter
);
5048 ixgbe_free_all_rx_resources(adapter
);
5050 ixgbe_release_hw_control(adapter
);
5056 static int ixgbe_resume(struct pci_dev
*pdev
)
5058 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5059 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5062 pci_set_power_state(pdev
, PCI_D0
);
5063 pci_restore_state(pdev
);
5065 * pci_restore_state clears dev->state_saved so call
5066 * pci_save_state to restore it.
5068 pci_save_state(pdev
);
5070 err
= pci_enable_device_mem(pdev
);
5072 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
5076 pci_set_master(pdev
);
5078 pci_wake_from_d3(pdev
, false);
5080 err
= ixgbe_init_interrupt_scheme(adapter
);
5082 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
5087 ixgbe_reset(adapter
);
5089 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5091 if (netif_running(netdev
)) {
5092 err
= ixgbe_open(adapter
->netdev
);
5097 netif_device_attach(netdev
);
5101 #endif /* CONFIG_PM */
5103 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5105 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5106 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5107 struct ixgbe_hw
*hw
= &adapter
->hw
;
5109 u32 wufc
= adapter
->wol
;
5114 netif_device_detach(netdev
);
5116 if (netif_running(netdev
)) {
5117 ixgbe_down(adapter
);
5118 ixgbe_free_irq(adapter
);
5119 ixgbe_free_all_tx_resources(adapter
);
5120 ixgbe_free_all_rx_resources(adapter
);
5122 ixgbe_clear_interrupt_scheme(adapter
);
5125 retval
= pci_save_state(pdev
);
5131 ixgbe_set_rx_mode(netdev
);
5133 /* turn on all-multi mode if wake on multicast is enabled */
5134 if (wufc
& IXGBE_WUFC_MC
) {
5135 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5136 fctrl
|= IXGBE_FCTRL_MPE
;
5137 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5140 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5141 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5142 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5144 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5146 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5147 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5150 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
)
5151 pci_wake_from_d3(pdev
, true);
5153 pci_wake_from_d3(pdev
, false);
5155 *enable_wake
= !!wufc
;
5157 ixgbe_release_hw_control(adapter
);
5159 pci_disable_device(pdev
);
5165 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5170 retval
= __ixgbe_shutdown(pdev
, &wake
);
5175 pci_prepare_to_sleep(pdev
);
5177 pci_wake_from_d3(pdev
, false);
5178 pci_set_power_state(pdev
, PCI_D3hot
);
5183 #endif /* CONFIG_PM */
5185 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5189 __ixgbe_shutdown(pdev
, &wake
);
5191 if (system_state
== SYSTEM_POWER_OFF
) {
5192 pci_wake_from_d3(pdev
, wake
);
5193 pci_set_power_state(pdev
, PCI_D3hot
);
5198 * ixgbe_update_stats - Update the board statistics counters.
5199 * @adapter: board private structure
5201 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5203 struct net_device
*netdev
= adapter
->netdev
;
5204 struct ixgbe_hw
*hw
= &adapter
->hw
;
5206 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5207 u64 non_eop_descs
= 0, restart_queue
= 0;
5209 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5212 for (i
= 0; i
< 16; i
++)
5213 adapter
->hw_rx_no_dma_resources
+=
5214 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5215 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5216 rsc_count
+= adapter
->rx_ring
[i
]->rsc_count
;
5217 rsc_flush
+= adapter
->rx_ring
[i
]->rsc_flush
;
5219 adapter
->rsc_total_count
= rsc_count
;
5220 adapter
->rsc_total_flush
= rsc_flush
;
5223 /* gather some stats to the adapter struct that are per queue */
5224 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5225 restart_queue
+= adapter
->tx_ring
[i
]->restart_queue
;
5226 adapter
->restart_queue
= restart_queue
;
5228 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5229 non_eop_descs
+= adapter
->rx_ring
[i
]->non_eop_descs
;
5230 adapter
->non_eop_descs
= non_eop_descs
;
5232 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5233 for (i
= 0; i
< 8; i
++) {
5234 /* for packet buffers not used, the register should read 0 */
5235 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5237 adapter
->stats
.mpc
[i
] += mpc
;
5238 total_mpc
+= adapter
->stats
.mpc
[i
];
5239 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5240 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5241 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5242 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5243 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5244 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5245 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5246 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
5247 IXGBE_PXONRXCNT(i
));
5248 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
5249 IXGBE_PXOFFRXCNT(i
));
5250 adapter
->stats
.qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5252 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
5254 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
5257 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
5259 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
5262 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5263 /* work around hardware counting issue */
5264 adapter
->stats
.gprc
-= missed_rx
;
5266 /* 82598 hardware only has a 32 bit counter in the high register */
5267 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5269 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5270 tmp
= IXGBE_READ_REG(hw
, IXGBE_GORCH
) & 0xF; /* 4 high bits of GORC */
5271 adapter
->stats
.gorc
+= (tmp
<< 32);
5272 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5273 tmp
= IXGBE_READ_REG(hw
, IXGBE_GOTCH
) & 0xF; /* 4 high bits of GOTC */
5274 adapter
->stats
.gotc
+= (tmp
<< 32);
5275 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5276 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5277 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5278 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
5279 adapter
->stats
.fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5280 adapter
->stats
.fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5282 adapter
->stats
.fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5283 adapter
->stats
.fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5284 adapter
->stats
.fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5285 adapter
->stats
.fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5286 adapter
->stats
.fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5287 adapter
->stats
.fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5288 #endif /* IXGBE_FCOE */
5290 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5291 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
5292 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5293 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5294 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5296 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5297 adapter
->stats
.bprc
+= bprc
;
5298 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5299 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5300 adapter
->stats
.mprc
-= bprc
;
5301 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5302 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5303 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5304 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5305 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5306 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5307 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5308 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5309 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5310 adapter
->stats
.lxontxc
+= lxon
;
5311 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5312 adapter
->stats
.lxofftxc
+= lxoff
;
5313 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5314 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5315 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5317 * 82598 errata - tx of flow control packets is included in tx counters
5319 xon_off_tot
= lxon
+ lxoff
;
5320 adapter
->stats
.gptc
-= xon_off_tot
;
5321 adapter
->stats
.mptc
-= xon_off_tot
;
5322 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5323 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5324 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5325 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5326 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5327 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5328 adapter
->stats
.ptc64
-= xon_off_tot
;
5329 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5330 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5331 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5332 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5333 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5334 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5336 /* Fill out the OS statistics structure */
5337 netdev
->stats
.multicast
= adapter
->stats
.mprc
;
5340 netdev
->stats
.rx_errors
= adapter
->stats
.crcerrs
+
5341 adapter
->stats
.rlec
;
5342 netdev
->stats
.rx_dropped
= 0;
5343 netdev
->stats
.rx_length_errors
= adapter
->stats
.rlec
;
5344 netdev
->stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
5345 netdev
->stats
.rx_missed_errors
= total_mpc
;
5349 * ixgbe_watchdog - Timer Call-back
5350 * @data: pointer to adapter cast into an unsigned long
5352 static void ixgbe_watchdog(unsigned long data
)
5354 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5355 struct ixgbe_hw
*hw
= &adapter
->hw
;
5360 * Do the watchdog outside of interrupt context due to the lovely
5361 * delays that some of the newer hardware requires
5364 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5365 goto watchdog_short_circuit
;
5367 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5369 * for legacy and MSI interrupts don't set any bits
5370 * that are enabled for EIAM, because this operation
5371 * would set *both* EIMS and EICS for any bit in EIAM
5373 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5374 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5375 goto watchdog_reschedule
;
5378 /* get one bit for every active tx/rx interrupt vector */
5379 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
5380 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5381 if (qv
->rxr_count
|| qv
->txr_count
)
5382 eics
|= ((u64
)1 << i
);
5385 /* Cause software interrupt to ensure rx rings are cleaned */
5386 ixgbe_irq_rearm_queues(adapter
, eics
);
5388 watchdog_reschedule
:
5389 /* Reset the timer */
5390 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 2 * HZ
));
5392 watchdog_short_circuit
:
5393 schedule_work(&adapter
->watchdog_task
);
5397 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5398 * @work: pointer to work_struct containing our data
5400 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
5402 struct ixgbe_adapter
*adapter
= container_of(work
,
5403 struct ixgbe_adapter
,
5404 multispeed_fiber_task
);
5405 struct ixgbe_hw
*hw
= &adapter
->hw
;
5409 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
5410 autoneg
= hw
->phy
.autoneg_advertised
;
5411 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5412 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5413 hw
->mac
.autotry_restart
= false;
5414 if (hw
->mac
.ops
.setup_link
)
5415 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5416 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5417 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
5421 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5422 * @work: pointer to work_struct containing our data
5424 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
5426 struct ixgbe_adapter
*adapter
= container_of(work
,
5427 struct ixgbe_adapter
,
5428 sfp_config_module_task
);
5429 struct ixgbe_hw
*hw
= &adapter
->hw
;
5432 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
5434 /* Time for electrical oscillations to settle down */
5436 err
= hw
->phy
.ops
.identify_sfp(hw
);
5438 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
5439 dev_err(&adapter
->pdev
->dev
, "failed to initialize because "
5440 "an unsupported SFP+ module type was detected.\n"
5441 "Reload the driver after installing a supported "
5443 unregister_netdev(adapter
->netdev
);
5446 hw
->mac
.ops
.setup_sfp(hw
);
5448 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
5449 /* This will also work for DA Twinax connections */
5450 schedule_work(&adapter
->multispeed_fiber_task
);
5451 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
5455 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5456 * @work: pointer to work_struct containing our data
5458 static void ixgbe_fdir_reinit_task(struct work_struct
*work
)
5460 struct ixgbe_adapter
*adapter
= container_of(work
,
5461 struct ixgbe_adapter
,
5463 struct ixgbe_hw
*hw
= &adapter
->hw
;
5466 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5467 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5468 set_bit(__IXGBE_FDIR_INIT_DONE
,
5469 &(adapter
->tx_ring
[i
]->reinit_state
));
5471 DPRINTK(PROBE
, ERR
, "failed to finish FDIR re-initialization, "
5472 "ignored adding FDIR ATR filters\n");
5474 /* Done FDIR Re-initialization, enable transmits */
5475 netif_tx_start_all_queues(adapter
->netdev
);
5478 static DEFINE_MUTEX(ixgbe_watchdog_lock
);
5481 * ixgbe_watchdog_task - worker thread to bring link up
5482 * @work: pointer to work_struct containing our data
5484 static void ixgbe_watchdog_task(struct work_struct
*work
)
5486 struct ixgbe_adapter
*adapter
= container_of(work
,
5487 struct ixgbe_adapter
,
5489 struct net_device
*netdev
= adapter
->netdev
;
5490 struct ixgbe_hw
*hw
= &adapter
->hw
;
5494 struct ixgbe_ring
*tx_ring
;
5495 int some_tx_pending
= 0;
5497 mutex_lock(&ixgbe_watchdog_lock
);
5499 link_up
= adapter
->link_up
;
5500 link_speed
= adapter
->link_speed
;
5502 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
5503 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5506 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5507 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
5508 hw
->mac
.ops
.fc_enable(hw
, i
);
5510 hw
->mac
.ops
.fc_enable(hw
, 0);
5513 hw
->mac
.ops
.fc_enable(hw
, 0);
5518 time_after(jiffies
, (adapter
->link_check_timeout
+
5519 IXGBE_TRY_LINK_TIMEOUT
))) {
5520 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5521 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5523 adapter
->link_up
= link_up
;
5524 adapter
->link_speed
= link_speed
;
5528 if (!netif_carrier_ok(netdev
)) {
5529 bool flow_rx
, flow_tx
;
5531 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5532 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5533 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5534 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5535 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5537 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5538 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5539 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5540 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5543 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
5544 "Flow Control: %s\n",
5546 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5548 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5549 "1 Gbps" : "unknown speed")),
5550 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5552 (flow_tx
? "TX" : "None"))));
5554 netif_carrier_on(netdev
);
5556 /* Force detection of hung controller */
5557 adapter
->detect_tx_hung
= true;
5560 adapter
->link_up
= false;
5561 adapter
->link_speed
= 0;
5562 if (netif_carrier_ok(netdev
)) {
5563 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
5565 netif_carrier_off(netdev
);
5569 if (!netif_carrier_ok(netdev
)) {
5570 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5571 tx_ring
= adapter
->tx_ring
[i
];
5572 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5573 some_tx_pending
= 1;
5578 if (some_tx_pending
) {
5579 /* We've lost link, so the controller stops DMA,
5580 * but we've got queued Tx work that's never going
5581 * to get done, so reset controller to flush Tx.
5582 * (Do the reset outside of interrupt context).
5584 schedule_work(&adapter
->reset_task
);
5588 ixgbe_update_stats(adapter
);
5589 mutex_unlock(&ixgbe_watchdog_lock
);
5592 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
5593 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
5594 u32 tx_flags
, u8
*hdr_len
)
5596 struct ixgbe_adv_tx_context_desc
*context_desc
;
5599 struct ixgbe_tx_buffer
*tx_buffer_info
;
5600 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
5601 u32 mss_l4len_idx
, l4len
;
5603 if (skb_is_gso(skb
)) {
5604 if (skb_header_cloned(skb
)) {
5605 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5609 l4len
= tcp_hdrlen(skb
);
5612 if (skb
->protocol
== htons(ETH_P_IP
)) {
5613 struct iphdr
*iph
= ip_hdr(skb
);
5616 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5620 } else if (skb_is_gso_v6(skb
)) {
5621 ipv6_hdr(skb
)->payload_len
= 0;
5622 tcp_hdr(skb
)->check
=
5623 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5624 &ipv6_hdr(skb
)->daddr
,
5628 i
= tx_ring
->next_to_use
;
5630 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5631 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
5633 /* VLAN MACLEN IPLEN */
5634 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5636 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5637 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
5638 IXGBE_ADVTXD_MACLEN_SHIFT
);
5639 *hdr_len
+= skb_network_offset(skb
);
5641 (skb_transport_header(skb
) - skb_network_header(skb
));
5643 (skb_transport_header(skb
) - skb_network_header(skb
));
5644 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5645 context_desc
->seqnum_seed
= 0;
5647 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5648 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
5649 IXGBE_ADVTXD_DTYP_CTXT
);
5651 if (skb
->protocol
== htons(ETH_P_IP
))
5652 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5653 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5654 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5658 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
5659 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
5660 /* use index 1 for TSO */
5661 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5662 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
5664 tx_buffer_info
->time_stamp
= jiffies
;
5665 tx_buffer_info
->next_to_watch
= i
;
5668 if (i
== tx_ring
->count
)
5670 tx_ring
->next_to_use
= i
;
5677 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
5678 struct ixgbe_ring
*tx_ring
,
5679 struct sk_buff
*skb
, u32 tx_flags
)
5681 struct ixgbe_adv_tx_context_desc
*context_desc
;
5683 struct ixgbe_tx_buffer
*tx_buffer_info
;
5684 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
5686 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
5687 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
5688 i
= tx_ring
->next_to_use
;
5689 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5690 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
5692 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5694 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5695 vlan_macip_lens
|= (skb_network_offset(skb
) <<
5696 IXGBE_ADVTXD_MACLEN_SHIFT
);
5697 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
5698 vlan_macip_lens
|= (skb_transport_header(skb
) -
5699 skb_network_header(skb
));
5701 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5702 context_desc
->seqnum_seed
= 0;
5704 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
5705 IXGBE_ADVTXD_DTYP_CTXT
);
5707 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
5710 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
)) {
5711 const struct vlan_ethhdr
*vhdr
=
5712 (const struct vlan_ethhdr
*)skb
->data
;
5714 protocol
= vhdr
->h_vlan_encapsulated_proto
;
5716 protocol
= skb
->protocol
;
5720 case cpu_to_be16(ETH_P_IP
):
5721 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5722 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
5724 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5725 else if (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)
5727 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5729 case cpu_to_be16(ETH_P_IPV6
):
5730 /* XXX what about other V6 headers?? */
5731 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
5733 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5734 else if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_SCTP
)
5736 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5739 if (unlikely(net_ratelimit())) {
5740 DPRINTK(PROBE
, WARNING
,
5741 "partial checksum but proto=%x!\n",
5748 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5749 /* use index zero for tx checksum offload */
5750 context_desc
->mss_l4len_idx
= 0;
5752 tx_buffer_info
->time_stamp
= jiffies
;
5753 tx_buffer_info
->next_to_watch
= i
;
5756 if (i
== tx_ring
->count
)
5758 tx_ring
->next_to_use
= i
;
5766 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
5767 struct ixgbe_ring
*tx_ring
,
5768 struct sk_buff
*skb
, u32 tx_flags
,
5771 struct pci_dev
*pdev
= adapter
->pdev
;
5772 struct ixgbe_tx_buffer
*tx_buffer_info
;
5774 unsigned int total
= skb
->len
;
5775 unsigned int offset
= 0, size
, count
= 0, i
;
5776 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
5779 i
= tx_ring
->next_to_use
;
5781 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
)
5782 /* excluding fcoe_crc_eof for FCoE */
5783 total
-= sizeof(struct fcoe_crc_eof
);
5785 len
= min(skb_headlen(skb
), total
);
5787 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5788 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
5790 tx_buffer_info
->length
= size
;
5791 tx_buffer_info
->mapped_as_page
= false;
5792 tx_buffer_info
->dma
= dma_map_single(&pdev
->dev
,
5794 size
, DMA_TO_DEVICE
);
5795 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
5797 tx_buffer_info
->time_stamp
= jiffies
;
5798 tx_buffer_info
->next_to_watch
= i
;
5807 if (i
== tx_ring
->count
)
5812 for (f
= 0; f
< nr_frags
; f
++) {
5813 struct skb_frag_struct
*frag
;
5815 frag
= &skb_shinfo(skb
)->frags
[f
];
5816 len
= min((unsigned int)frag
->size
, total
);
5817 offset
= frag
->page_offset
;
5821 if (i
== tx_ring
->count
)
5824 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5825 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
5827 tx_buffer_info
->length
= size
;
5828 tx_buffer_info
->dma
= dma_map_page(&adapter
->pdev
->dev
,
5832 tx_buffer_info
->mapped_as_page
= true;
5833 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
5835 tx_buffer_info
->time_stamp
= jiffies
;
5836 tx_buffer_info
->next_to_watch
= i
;
5847 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
5848 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
5853 dev_err(&pdev
->dev
, "TX DMA map failed\n");
5855 /* clear timestamp and dma mappings for failed tx_buffer_info map */
5856 tx_buffer_info
->dma
= 0;
5857 tx_buffer_info
->time_stamp
= 0;
5858 tx_buffer_info
->next_to_watch
= 0;
5862 /* clear timestamp and dma mappings for remaining portion of packet */
5865 i
+= tx_ring
->count
;
5867 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5868 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
5874 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
5875 struct ixgbe_ring
*tx_ring
,
5876 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
5878 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
5879 struct ixgbe_tx_buffer
*tx_buffer_info
;
5880 u32 olinfo_status
= 0, cmd_type_len
= 0;
5882 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
5884 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
5886 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
5888 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5889 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
5891 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
5892 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
5894 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
5895 IXGBE_ADVTXD_POPTS_SHIFT
;
5897 /* use index 1 context for tso */
5898 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5899 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
5900 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
5901 IXGBE_ADVTXD_POPTS_SHIFT
;
5903 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
5904 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
5905 IXGBE_ADVTXD_POPTS_SHIFT
;
5907 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5908 olinfo_status
|= IXGBE_ADVTXD_CC
;
5909 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5910 if (tx_flags
& IXGBE_TX_FLAGS_FSO
)
5911 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
5914 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
5916 i
= tx_ring
->next_to_use
;
5918 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5919 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
5920 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
5921 tx_desc
->read
.cmd_type_len
=
5922 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
5923 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
5925 if (i
== tx_ring
->count
)
5929 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
5932 * Force memory writes to complete before letting h/w
5933 * know there are new descriptors to fetch. (Only
5934 * applicable for weak-ordered memory model archs,
5939 tx_ring
->next_to_use
= i
;
5940 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
5943 static void ixgbe_atr(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
,
5944 int queue
, u32 tx_flags
)
5946 /* Right now, we support IPv4 only */
5947 struct ixgbe_atr_input atr_input
;
5949 struct iphdr
*iph
= ip_hdr(skb
);
5950 struct ethhdr
*eth
= (struct ethhdr
*)skb
->data
;
5951 u16 vlan_id
, src_port
, dst_port
, flex_bytes
;
5952 u32 src_ipv4_addr
, dst_ipv4_addr
;
5955 /* check if we're UDP or TCP */
5956 if (iph
->protocol
== IPPROTO_TCP
) {
5958 src_port
= th
->source
;
5959 dst_port
= th
->dest
;
5960 l4type
|= IXGBE_ATR_L4TYPE_TCP
;
5961 /* l4type IPv4 type is 0, no need to assign */
5963 /* Unsupported L4 header, just bail here */
5967 memset(&atr_input
, 0, sizeof(struct ixgbe_atr_input
));
5969 vlan_id
= (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
) >>
5970 IXGBE_TX_FLAGS_VLAN_SHIFT
;
5971 src_ipv4_addr
= iph
->saddr
;
5972 dst_ipv4_addr
= iph
->daddr
;
5973 flex_bytes
= eth
->h_proto
;
5975 ixgbe_atr_set_vlan_id_82599(&atr_input
, vlan_id
);
5976 ixgbe_atr_set_src_port_82599(&atr_input
, dst_port
);
5977 ixgbe_atr_set_dst_port_82599(&atr_input
, src_port
);
5978 ixgbe_atr_set_flex_byte_82599(&atr_input
, flex_bytes
);
5979 ixgbe_atr_set_l4type_82599(&atr_input
, l4type
);
5980 /* src and dst are inverted, think how the receiver sees them */
5981 ixgbe_atr_set_src_ipv4_82599(&atr_input
, dst_ipv4_addr
);
5982 ixgbe_atr_set_dst_ipv4_82599(&atr_input
, src_ipv4_addr
);
5984 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
5985 ixgbe_fdir_add_signature_filter_82599(&adapter
->hw
, &atr_input
, queue
);
5988 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
5989 struct ixgbe_ring
*tx_ring
, int size
)
5991 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
5992 /* Herbert's original patch had:
5993 * smp_mb__after_netif_stop_queue();
5994 * but since that doesn't exist yet, just open code it. */
5997 /* We need to check again in a case another CPU has just
5998 * made room available. */
5999 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
6002 /* A reprieve! - use start_queue because it doesn't call schedule */
6003 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
6004 ++tx_ring
->restart_queue
;
6008 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
6009 struct ixgbe_ring
*tx_ring
, int size
)
6011 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
6013 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
6016 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6018 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6019 int txq
= smp_processor_id();
6021 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6022 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6023 txq
-= dev
->real_num_tx_queues
;
6028 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
6029 ((skb
->protocol
== htons(ETH_P_FCOE
)) ||
6030 (skb
->protocol
== htons(ETH_P_FIP
)))) {
6031 txq
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
6032 txq
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
6036 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6037 if (skb
->priority
== TC_PRIO_CONTROL
)
6038 txq
= adapter
->ring_feature
[RING_F_DCB
].indices
-1;
6040 txq
= (skb
->vlan_tci
& IXGBE_TX_FLAGS_VLAN_PRIO_MASK
)
6045 return skb_tx_hash(dev
, skb
);
6048 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
6049 struct net_device
*netdev
)
6051 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6052 struct ixgbe_ring
*tx_ring
;
6053 struct netdev_queue
*txq
;
6055 unsigned int tx_flags
= 0;
6061 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
6062 tx_flags
|= vlan_tx_tag_get(skb
);
6063 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6064 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6065 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6067 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6068 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6069 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6070 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6071 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6072 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6075 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6078 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
6079 #ifdef CONFIG_IXGBE_DCB
6080 /* for FCoE with DCB, we force the priority to what
6081 * was specified by the switch */
6082 if ((skb
->protocol
== htons(ETH_P_FCOE
)) ||
6083 (skb
->protocol
== htons(ETH_P_FIP
))) {
6084 tx_flags
&= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
6085 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6086 tx_flags
|= ((adapter
->fcoe
.up
<< 13)
6087 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6090 /* flag for FCoE offloads */
6091 if (skb
->protocol
== htons(ETH_P_FCOE
))
6092 tx_flags
|= IXGBE_TX_FLAGS_FCOE
;
6096 /* four things can cause us to need a context descriptor */
6097 if (skb_is_gso(skb
) ||
6098 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
6099 (tx_flags
& IXGBE_TX_FLAGS_VLAN
) ||
6100 (tx_flags
& IXGBE_TX_FLAGS_FCOE
))
6103 count
+= TXD_USE_COUNT(skb_headlen(skb
));
6104 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6105 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6107 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
6109 return NETDEV_TX_BUSY
;
6112 first
= tx_ring
->next_to_use
;
6113 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6115 /* setup tx offload for FCoE */
6116 tso
= ixgbe_fso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6118 dev_kfree_skb_any(skb
);
6119 return NETDEV_TX_OK
;
6122 tx_flags
|= IXGBE_TX_FLAGS_FSO
;
6123 #endif /* IXGBE_FCOE */
6125 if (skb
->protocol
== htons(ETH_P_IP
))
6126 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
6127 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6129 dev_kfree_skb_any(skb
);
6130 return NETDEV_TX_OK
;
6134 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
6135 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
6136 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
6137 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6140 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, tx_flags
, first
);
6142 /* add the ATR filter if ATR is on */
6143 if (tx_ring
->atr_sample_rate
) {
6144 ++tx_ring
->atr_count
;
6145 if ((tx_ring
->atr_count
>= tx_ring
->atr_sample_rate
) &&
6146 test_bit(__IXGBE_FDIR_INIT_DONE
,
6147 &tx_ring
->reinit_state
)) {
6148 ixgbe_atr(adapter
, skb
, tx_ring
->queue_index
,
6150 tx_ring
->atr_count
= 0;
6153 txq
= netdev_get_tx_queue(netdev
, tx_ring
->queue_index
);
6154 txq
->tx_bytes
+= skb
->len
;
6156 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
6158 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
6161 dev_kfree_skb_any(skb
);
6162 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
6163 tx_ring
->next_to_use
= first
;
6166 return NETDEV_TX_OK
;
6170 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6171 * @netdev: network interface device structure
6172 * @p: pointer to an address structure
6174 * Returns 0 on success, negative on failure
6176 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6178 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6179 struct ixgbe_hw
*hw
= &adapter
->hw
;
6180 struct sockaddr
*addr
= p
;
6182 if (!is_valid_ether_addr(addr
->sa_data
))
6183 return -EADDRNOTAVAIL
;
6185 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6186 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6188 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6195 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6197 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6198 struct ixgbe_hw
*hw
= &adapter
->hw
;
6202 if (prtad
!= hw
->phy
.mdio
.prtad
)
6204 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6210 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6211 u16 addr
, u16 value
)
6213 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6214 struct ixgbe_hw
*hw
= &adapter
->hw
;
6216 if (prtad
!= hw
->phy
.mdio
.prtad
)
6218 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6221 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6223 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6225 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6229 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6231 * @netdev: network interface device structure
6233 * Returns non-zero on failure
6235 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6238 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6239 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6241 if (is_valid_ether_addr(mac
->san_addr
)) {
6243 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6250 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6252 * @netdev: network interface device structure
6254 * Returns non-zero on failure
6256 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6259 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6260 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6262 if (is_valid_ether_addr(mac
->san_addr
)) {
6264 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6270 #ifdef CONFIG_NET_POLL_CONTROLLER
6272 * Polling 'interrupt' - used by things like netconsole to send skbs
6273 * without having to re-enable interrupts. It's not called while
6274 * the interrupt routine is executing.
6276 static void ixgbe_netpoll(struct net_device
*netdev
)
6278 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6281 /* if interface is down do nothing */
6282 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6285 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6286 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6287 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
6288 for (i
= 0; i
< num_q_vectors
; i
++) {
6289 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
6290 ixgbe_msix_clean_many(0, q_vector
);
6293 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6295 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6299 static const struct net_device_ops ixgbe_netdev_ops
= {
6300 .ndo_open
= ixgbe_open
,
6301 .ndo_stop
= ixgbe_close
,
6302 .ndo_start_xmit
= ixgbe_xmit_frame
,
6303 .ndo_select_queue
= ixgbe_select_queue
,
6304 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6305 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
6306 .ndo_validate_addr
= eth_validate_addr
,
6307 .ndo_set_mac_address
= ixgbe_set_mac
,
6308 .ndo_change_mtu
= ixgbe_change_mtu
,
6309 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6310 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
6311 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6312 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6313 .ndo_do_ioctl
= ixgbe_ioctl
,
6314 #ifdef CONFIG_NET_POLL_CONTROLLER
6315 .ndo_poll_controller
= ixgbe_netpoll
,
6318 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6319 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6320 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6321 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6322 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6323 #endif /* IXGBE_FCOE */
6326 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6327 const struct ixgbe_info
*ii
)
6329 #ifdef CONFIG_PCI_IOV
6330 struct ixgbe_hw
*hw
= &adapter
->hw
;
6333 if (hw
->mac
.type
!= ixgbe_mac_82599EB
|| !max_vfs
)
6336 /* The 82599 supports up to 64 VFs per physical function
6337 * but this implementation limits allocation to 63 so that
6338 * basic networking resources are still available to the
6341 adapter
->num_vfs
= (max_vfs
> 63) ? 63 : max_vfs
;
6342 adapter
->flags
|= IXGBE_FLAG_SRIOV_ENABLED
;
6343 err
= pci_enable_sriov(adapter
->pdev
, adapter
->num_vfs
);
6346 "Failed to enable PCI sriov: %d\n", err
);
6349 /* If call to enable VFs succeeded then allocate memory
6350 * for per VF control structures.
6353 kcalloc(adapter
->num_vfs
,
6354 sizeof(struct vf_data_storage
), GFP_KERNEL
);
6355 if (adapter
->vfinfo
) {
6356 /* Now that we're sure SR-IOV is enabled
6357 * and memory allocated set up the mailbox parameters
6359 ixgbe_init_mbx_params_pf(hw
);
6360 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
,
6361 sizeof(hw
->mbx
.ops
));
6363 /* Disable RSC when in SR-IOV mode */
6364 adapter
->flags2
&= ~(IXGBE_FLAG2_RSC_CAPABLE
|
6365 IXGBE_FLAG2_RSC_ENABLED
);
6371 "Unable to allocate memory for VF "
6372 "Data Storage - SRIOV disabled\n");
6373 pci_disable_sriov(adapter
->pdev
);
6376 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
6377 adapter
->num_vfs
= 0;
6378 #endif /* CONFIG_PCI_IOV */
6382 * ixgbe_probe - Device Initialization Routine
6383 * @pdev: PCI device information struct
6384 * @ent: entry in ixgbe_pci_tbl
6386 * Returns 0 on success, negative on failure
6388 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6389 * The OS initialization, configuring of the adapter private structure,
6390 * and a hardware reset occur.
6392 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6393 const struct pci_device_id
*ent
)
6395 struct net_device
*netdev
;
6396 struct ixgbe_adapter
*adapter
= NULL
;
6397 struct ixgbe_hw
*hw
;
6398 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6399 static int cards_found
;
6400 int i
, err
, pci_using_dac
;
6401 unsigned int indices
= num_possible_cpus();
6407 err
= pci_enable_device_mem(pdev
);
6411 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6412 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
6415 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
6417 err
= dma_set_coherent_mask(&pdev
->dev
,
6420 dev_err(&pdev
->dev
, "No usable DMA "
6421 "configuration, aborting\n");
6428 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
6429 IORESOURCE_MEM
), ixgbe_driver_name
);
6432 "pci_request_selected_regions failed 0x%x\n", err
);
6436 pci_enable_pcie_error_reporting(pdev
);
6438 pci_set_master(pdev
);
6439 pci_save_state(pdev
);
6441 if (ii
->mac
== ixgbe_mac_82598EB
)
6442 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
6444 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
6446 indices
= max_t(unsigned int, indices
, IXGBE_MAX_DCB_INDICES
);
6448 indices
+= min_t(unsigned int, num_possible_cpus(),
6449 IXGBE_MAX_FCOE_INDICES
);
6451 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
6454 goto err_alloc_etherdev
;
6457 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
6459 pci_set_drvdata(pdev
, netdev
);
6460 adapter
= netdev_priv(netdev
);
6462 adapter
->netdev
= netdev
;
6463 adapter
->pdev
= pdev
;
6466 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
6468 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
6469 pci_resource_len(pdev
, 0));
6475 for (i
= 1; i
<= 5; i
++) {
6476 if (pci_resource_len(pdev
, i
) == 0)
6480 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
6481 ixgbe_set_ethtool_ops(netdev
);
6482 netdev
->watchdog_timeo
= 5 * HZ
;
6483 strcpy(netdev
->name
, pci_name(pdev
));
6485 adapter
->bd_number
= cards_found
;
6488 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
6489 hw
->mac
.type
= ii
->mac
;
6492 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
6493 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
6494 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6495 if (!(eec
& (1 << 8)))
6496 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
6499 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
6500 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
6501 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6502 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
6503 hw
->phy
.mdio
.mmds
= 0;
6504 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
6505 hw
->phy
.mdio
.dev
= netdev
;
6506 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
6507 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
6509 /* set up this timer and work struct before calling get_invariants
6510 * which might start the timer
6512 init_timer(&adapter
->sfp_timer
);
6513 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
6514 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
6516 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
6518 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6519 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
6521 /* a new SFP+ module arrival, called from GPI SDP2 context */
6522 INIT_WORK(&adapter
->sfp_config_module_task
,
6523 ixgbe_sfp_config_module_task
);
6525 ii
->get_invariants(hw
);
6527 /* setup the private structure */
6528 err
= ixgbe_sw_init(adapter
);
6532 /* Make it possible the adapter to be woken up via WOL */
6533 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6534 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6537 * If there is a fan on this device and it has failed log the
6540 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
6541 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
6542 if (esdp
& IXGBE_ESDP_SDP1
)
6543 DPRINTK(PROBE
, CRIT
,
6544 "Fan has stopped, replace the adapter\n");
6547 /* reset_hw fills in the perm_addr as well */
6548 err
= hw
->mac
.ops
.reset_hw(hw
);
6549 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
6550 hw
->mac
.type
== ixgbe_mac_82598EB
) {
6552 * Start a kernel thread to watch for a module to arrive.
6553 * Only do this for 82598, since 82599 will generate
6554 * interrupts on module arrival.
6556 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6557 mod_timer(&adapter
->sfp_timer
,
6558 round_jiffies(jiffies
+ (2 * HZ
)));
6560 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
6561 dev_err(&adapter
->pdev
->dev
, "failed to initialize because "
6562 "an unsupported SFP+ module type was detected.\n"
6563 "Reload the driver after installing a supported "
6567 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
6571 ixgbe_probe_vf(adapter
, ii
);
6573 netdev
->features
= NETIF_F_SG
|
6575 NETIF_F_HW_VLAN_TX
|
6576 NETIF_F_HW_VLAN_RX
|
6577 NETIF_F_HW_VLAN_FILTER
;
6579 netdev
->features
|= NETIF_F_IPV6_CSUM
;
6580 netdev
->features
|= NETIF_F_TSO
;
6581 netdev
->features
|= NETIF_F_TSO6
;
6582 netdev
->features
|= NETIF_F_GRO
;
6584 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6585 netdev
->features
|= NETIF_F_SCTP_CSUM
;
6587 netdev
->vlan_features
|= NETIF_F_TSO
;
6588 netdev
->vlan_features
|= NETIF_F_TSO6
;
6589 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
6590 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
6591 netdev
->vlan_features
|= NETIF_F_SG
;
6593 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6594 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
6595 IXGBE_FLAG_DCB_ENABLED
);
6596 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
6597 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
6599 #ifdef CONFIG_IXGBE_DCB
6600 netdev
->dcbnl_ops
= &dcbnl_ops
;
6604 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6605 if (hw
->mac
.ops
.get_device_caps
) {
6606 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
6607 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
6608 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6611 #endif /* IXGBE_FCOE */
6613 netdev
->features
|= NETIF_F_HIGHDMA
;
6615 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6616 netdev
->features
|= NETIF_F_LRO
;
6618 /* make sure the EEPROM is good */
6619 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
6620 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
6625 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6626 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6628 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
6629 dev_err(&pdev
->dev
, "invalid MAC address\n");
6634 /* power down the optics */
6635 if (hw
->phy
.multispeed_fiber
)
6636 hw
->mac
.ops
.disable_tx_laser(hw
);
6638 init_timer(&adapter
->watchdog_timer
);
6639 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
6640 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
6642 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
6643 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
6645 err
= ixgbe_init_interrupt_scheme(adapter
);
6649 switch (pdev
->device
) {
6650 case IXGBE_DEV_ID_82599_KX4
:
6651 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
6652 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
6658 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
6660 /* pick up the PCI bus settings for reporting later */
6661 hw
->mac
.ops
.get_bus_info(hw
);
6663 /* print bus type/speed/width info */
6664 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
6665 ((hw
->bus
.speed
== ixgbe_bus_speed_5000
) ? "5.0Gb/s":
6666 (hw
->bus
.speed
== ixgbe_bus_speed_2500
) ? "2.5Gb/s":"Unknown"),
6667 ((hw
->bus
.width
== ixgbe_bus_width_pcie_x8
) ? "Width x8" :
6668 (hw
->bus
.width
== ixgbe_bus_width_pcie_x4
) ? "Width x4" :
6669 (hw
->bus
.width
== ixgbe_bus_width_pcie_x1
) ? "Width x1" :
6672 ixgbe_read_pba_num_generic(hw
, &part_num
);
6673 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
6674 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
6675 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
6676 (part_num
>> 8), (part_num
& 0xff));
6678 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6679 hw
->mac
.type
, hw
->phy
.type
,
6680 (part_num
>> 8), (part_num
& 0xff));
6682 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
6683 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
6684 "this card is not sufficient for optimal "
6686 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
6687 "PCI-Express slot is required.\n");
6690 /* save off EEPROM version number */
6691 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
6693 /* reset the hardware with the new settings */
6694 err
= hw
->mac
.ops
.start_hw(hw
);
6696 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
6697 /* We are running on a pre-production device, log a warning */
6698 dev_warn(&pdev
->dev
, "This device is a pre-production "
6699 "adapter/LOM. Please be aware there may be issues "
6700 "associated with your hardware. If you are "
6701 "experiencing problems please contact your Intel or "
6702 "hardware representative who provided you with this "
6705 strcpy(netdev
->name
, "eth%d");
6706 err
= register_netdev(netdev
);
6710 /* carrier off reporting is important to ethtool even BEFORE open */
6711 netif_carrier_off(netdev
);
6713 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
6714 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
6715 INIT_WORK(&adapter
->fdir_reinit_task
, ixgbe_fdir_reinit_task
);
6717 #ifdef CONFIG_IXGBE_DCA
6718 if (dca_add_requester(&pdev
->dev
) == 0) {
6719 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
6720 ixgbe_setup_dca(adapter
);
6723 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6724 DPRINTK(PROBE
, INFO
, "IOV is enabled with %d VFs\n",
6726 for (i
= 0; i
< adapter
->num_vfs
; i
++)
6727 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
6730 /* add san mac addr to netdev */
6731 ixgbe_add_sanmac_netdev(netdev
);
6733 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
6738 ixgbe_release_hw_control(adapter
);
6739 ixgbe_clear_interrupt_scheme(adapter
);
6742 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6743 ixgbe_disable_sriov(adapter
);
6744 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6745 del_timer_sync(&adapter
->sfp_timer
);
6746 cancel_work_sync(&adapter
->sfp_task
);
6747 cancel_work_sync(&adapter
->multispeed_fiber_task
);
6748 cancel_work_sync(&adapter
->sfp_config_module_task
);
6749 iounmap(hw
->hw_addr
);
6751 free_netdev(netdev
);
6753 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
6757 pci_disable_device(pdev
);
6762 * ixgbe_remove - Device Removal Routine
6763 * @pdev: PCI device information struct
6765 * ixgbe_remove is called by the PCI subsystem to alert the driver
6766 * that it should release a PCI device. The could be caused by a
6767 * Hot-Plug event, or because the driver is going to be removed from
6770 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
6772 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6773 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6775 set_bit(__IXGBE_DOWN
, &adapter
->state
);
6776 /* clear the module not found bit to make sure the worker won't
6779 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6780 del_timer_sync(&adapter
->watchdog_timer
);
6782 del_timer_sync(&adapter
->sfp_timer
);
6783 cancel_work_sync(&adapter
->watchdog_task
);
6784 cancel_work_sync(&adapter
->sfp_task
);
6785 cancel_work_sync(&adapter
->multispeed_fiber_task
);
6786 cancel_work_sync(&adapter
->sfp_config_module_task
);
6787 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
6788 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
6789 cancel_work_sync(&adapter
->fdir_reinit_task
);
6790 flush_scheduled_work();
6792 #ifdef CONFIG_IXGBE_DCA
6793 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
6794 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
6795 dca_remove_requester(&pdev
->dev
);
6796 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
6801 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
6802 ixgbe_cleanup_fcoe(adapter
);
6804 #endif /* IXGBE_FCOE */
6806 /* remove the added san mac */
6807 ixgbe_del_sanmac_netdev(netdev
);
6809 if (netdev
->reg_state
== NETREG_REGISTERED
)
6810 unregister_netdev(netdev
);
6812 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6813 ixgbe_disable_sriov(adapter
);
6815 ixgbe_clear_interrupt_scheme(adapter
);
6817 ixgbe_release_hw_control(adapter
);
6819 iounmap(adapter
->hw
.hw_addr
);
6820 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
6823 DPRINTK(PROBE
, INFO
, "complete\n");
6825 free_netdev(netdev
);
6827 pci_disable_pcie_error_reporting(pdev
);
6829 pci_disable_device(pdev
);
6833 * ixgbe_io_error_detected - called when PCI error is detected
6834 * @pdev: Pointer to PCI device
6835 * @state: The current pci connection state
6837 * This function is called after a PCI bus error affecting
6838 * this device has been detected.
6840 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
6841 pci_channel_state_t state
)
6843 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6844 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6846 netif_device_detach(netdev
);
6848 if (state
== pci_channel_io_perm_failure
)
6849 return PCI_ERS_RESULT_DISCONNECT
;
6851 if (netif_running(netdev
))
6852 ixgbe_down(adapter
);
6853 pci_disable_device(pdev
);
6855 /* Request a slot reset. */
6856 return PCI_ERS_RESULT_NEED_RESET
;
6860 * ixgbe_io_slot_reset - called after the pci bus has been reset.
6861 * @pdev: Pointer to PCI device
6863 * Restart the card from scratch, as if from a cold-boot.
6865 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
6867 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6868 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6869 pci_ers_result_t result
;
6872 if (pci_enable_device_mem(pdev
)) {
6874 "Cannot re-enable PCI device after reset.\n");
6875 result
= PCI_ERS_RESULT_DISCONNECT
;
6877 pci_set_master(pdev
);
6878 pci_restore_state(pdev
);
6879 pci_save_state(pdev
);
6881 pci_wake_from_d3(pdev
, false);
6883 ixgbe_reset(adapter
);
6884 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6885 result
= PCI_ERS_RESULT_RECOVERED
;
6888 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
6891 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err
);
6892 /* non-fatal, continue */
6899 * ixgbe_io_resume - called when traffic can start flowing again.
6900 * @pdev: Pointer to PCI device
6902 * This callback is called when the error recovery driver tells us that
6903 * its OK to resume normal operation.
6905 static void ixgbe_io_resume(struct pci_dev
*pdev
)
6907 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6908 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6910 if (netif_running(netdev
)) {
6911 if (ixgbe_up(adapter
)) {
6912 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
6917 netif_device_attach(netdev
);
6920 static struct pci_error_handlers ixgbe_err_handler
= {
6921 .error_detected
= ixgbe_io_error_detected
,
6922 .slot_reset
= ixgbe_io_slot_reset
,
6923 .resume
= ixgbe_io_resume
,
6926 static struct pci_driver ixgbe_driver
= {
6927 .name
= ixgbe_driver_name
,
6928 .id_table
= ixgbe_pci_tbl
,
6929 .probe
= ixgbe_probe
,
6930 .remove
= __devexit_p(ixgbe_remove
),
6932 .suspend
= ixgbe_suspend
,
6933 .resume
= ixgbe_resume
,
6935 .shutdown
= ixgbe_shutdown
,
6936 .err_handler
= &ixgbe_err_handler
6940 * ixgbe_init_module - Driver Registration Routine
6942 * ixgbe_init_module is the first routine called when the driver is
6943 * loaded. All it does is register with the PCI subsystem.
6945 static int __init
ixgbe_init_module(void)
6948 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
6949 ixgbe_driver_string
, ixgbe_driver_version
);
6951 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
6953 #ifdef CONFIG_IXGBE_DCA
6954 dca_register_notify(&dca_notifier
);
6957 ret
= pci_register_driver(&ixgbe_driver
);
6961 module_init(ixgbe_init_module
);
6964 * ixgbe_exit_module - Driver Exit Cleanup Routine
6966 * ixgbe_exit_module is called just before the driver is removed
6969 static void __exit
ixgbe_exit_module(void)
6971 #ifdef CONFIG_IXGBE_DCA
6972 dca_unregister_notify(&dca_notifier
);
6974 pci_unregister_driver(&ixgbe_driver
);
6977 #ifdef CONFIG_IXGBE_DCA
6978 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
6983 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
6984 __ixgbe_notify_dca
);
6986 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
6989 #endif /* CONFIG_IXGBE_DCA */
6992 * ixgbe_get_hw_dev_name - return device name string
6993 * used by hardware layer to print debugging information
6995 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
6997 struct ixgbe_adapter
*adapter
= hw
->back
;
6998 return adapter
->netdev
->name
;
7002 module_exit(ixgbe_exit_module
);