drivers/block/cciss.h

   1 #ifndef CCISS_H
   2 #define CCISS_H
   3
   4 #include <linux/genhd.h>
   5 #include <linux/mutex.h>
   6
   7 #include "cciss_cmd.h"
   8
   9
  10 #define NWD_SHIFT       4
  11 #define MAX_PART        (1 << NWD_SHIFT)
  12
  13 #define IO_OK           0
  14 #define IO_ERROR        1
  15 #define IO_NEEDS_RETRY  3
  16
  17 #define VENDOR_LEN      8
  18 #define MODEL_LEN       16
  19 #define REV_LEN         4
  20
  21 struct ctlr_info;
  22 typedef struct ctlr_info ctlr_info_t;
  23
  24 struct access_method {
  25         void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  26         void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  27         unsigned long (*fifo_full)(ctlr_info_t *h);
  28         unsigned long (*intr_pending)(ctlr_info_t *h);
  29         unsigned long (*command_completed)(ctlr_info_t *h);
  30 };
  31 typedef struct _drive_info_struct
  32 {
  33         unsigned char LunID[8];
  34         int     usage_count;
  35         struct request_queue *queue;
  36         sector_t nr_blocks;
  37         int     block_size;
  38         int     heads;
  39         int     sectors;
  40         int     cylinders;
  41         int     raid_level; /* set to -1 to indicate that
  42                              * the drive is not in use/configured
  43                              */
  44         int     busy_configuring; /* This is set when a drive is being removed
  45                                    * to prevent it from being opened or it's
  46                                    * queue from being started.
  47                                    */
  48         struct  device dev;
  49         __u8 serial_no[16]; /* from inquiry page 0x83,
  50                              * not necc. null terminated.
  51                              */
  52         char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
  53         char model[MODEL_LEN + 1];   /* SCSI model string */
  54         char rev[REV_LEN + 1];       /* SCSI revision string */
  55         char device_initialized;     /* indicates whether dev is initialized */
  56 } drive_info_struct;
  57
  58 struct ctlr_info
  59 {
  60         int     ctlr;
  61         char    devname[8];
  62         char    *product_name;
  63         char    firm_ver[4]; /* Firmware version */
  64         struct pci_dev *pdev;
  65         __u32   board_id;
  66         void __iomem *vaddr;
  67         unsigned long paddr;
  68         int     nr_cmds; /* Number of commands allowed on this controller */
  69         CfgTable_struct __iomem *cfgtable;
  70         int     interrupts_enabled;
  71         int     major;
  72         int     max_commands;
  73         int     commands_outstanding;
  74         int     max_outstanding; /* Debug */
  75         int     num_luns;
  76         int     highest_lun;
  77         int     usage_count;  /* number of opens all all minor devices */
  78         /* Need space for temp sg list
  79          * number of scatter/gathers supported
  80          * number of scatter/gathers in chained block
  81          */
  82         struct  scatterlist **scatter_list;
  83         int     maxsgentries;
  84         int     chainsize;
  85         int     max_cmd_sgentries;
  86         SGDescriptor_struct **cmd_sg_list;
  87
  88 #       define DOORBELL_INT     0
  89 #       define PERF_MODE_INT    1
  90 #       define SIMPLE_MODE_INT  2
  91 #       define MEMQ_MODE_INT    3
  92         unsigned int intr[4];
  93         unsigned int msix_vector;
  94         unsigned int msi_vector;
  95         int     cciss_max_sectors;
  96         BYTE    cciss_read;
  97         BYTE    cciss_write;
  98         BYTE    cciss_read_capacity;
  99
 100         /* information about each logical volume */
 101         drive_info_struct *drv[CISS_MAX_LUN];
 102
 103         struct access_method access;
 104
 105         /* queue and queue Info */
 106         struct hlist_head reqQ;
 107         struct hlist_head cmpQ;
 108         unsigned int Qdepth;
 109         unsigned int maxQsinceinit;
 110         unsigned int maxSG;
 111         spinlock_t lock;
 112
 113         /* pointers to command and error info pool */
 114         CommandList_struct      *cmd_pool;
 115         dma_addr_t              cmd_pool_dhandle;
 116         ErrorInfo_struct        *errinfo_pool;
 117         dma_addr_t              errinfo_pool_dhandle;
 118         unsigned long           *cmd_pool_bits;
 119         int                     nr_allocs;
 120         int                     nr_frees;
 121         int                     busy_configuring;
 122         int                     busy_initializing;
 123         int                     busy_scanning;
 124         struct mutex            busy_shutting_down;
 125
 126         /* This element holds the zero based queue number of the last
 127          * queue to be started.  It is used for fairness.
 128         */
 129         int                     next_to_run;
 130
 131         /* Disk structures we need to pass back */
 132         struct gendisk   *gendisk[CISS_MAX_LUN];
 133 #ifdef CONFIG_CISS_SCSI_TAPE
 134         void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
 135         /* list of block side commands the scsi error handling sucked up */
 136         /* and saved for later processing */
 137 #endif
 138         unsigned char alive;
 139         struct list_head scan_list;
 140         struct completion scan_wait;
 141         struct device dev;
 142 };
 143
 144 /*  Defining the diffent access_menthods */
 145 /*
 146  * Memory mapped FIFO interface (SMART 53xx cards)
 147  */
 148 #define SA5_DOORBELL    0x20
 149 #define SA5_REQUEST_PORT_OFFSET 0x40
 150 #define SA5_REPLY_INTR_MASK_OFFSET      0x34
 151 #define SA5_REPLY_PORT_OFFSET           0x44
 152 #define SA5_INTR_STATUS         0x30
 153 #define SA5_SCRATCHPAD_OFFSET   0xB0
 154
 155 #define SA5_CTCFG_OFFSET        0xB4
 156 #define SA5_CTMEM_OFFSET        0xB8
 157
 158 #define SA5_INTR_OFF            0x08
 159 #define SA5B_INTR_OFF           0x04
 160 #define SA5_INTR_PENDING        0x08
 161 #define SA5B_INTR_PENDING       0x04
 162 #define FIFO_EMPTY              0xffffffff
 163 #define CCISS_FIRMWARE_READY    0xffff0000 /* value in scratchpad register */
 164
 165 #define  CISS_ERROR_BIT         0x02
 166
 167 #define CCISS_INTR_ON   1
 168 #define CCISS_INTR_OFF  0
 169 /*
 170         Send the command to the hardware
 171 */
 172 static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
 173 {
 174 #ifdef CCISS_DEBUG
 175          printk("Sending %x - down to controller\n", c->busaddr );
 176 #endif /* CCISS_DEBUG */
 177          writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 178          h->commands_outstanding++;
 179          if ( h->commands_outstanding > h->max_outstanding)
 180                 h->max_outstanding = h->commands_outstanding;
 181 }
 182
 183 /*
 184  *  This card is the opposite of the other cards.
 185  *   0 turns interrupts on...
 186  *   0x08 turns them off...
 187  */
 188 static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
 189 {
 190         if (val)
 191         { /* Turn interrupts on */
 192                 h->interrupts_enabled = 1;
 193                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 194         } else /* Turn them off */
 195         {
 196                 h->interrupts_enabled = 0;
 197                 writel( SA5_INTR_OFF,
 198                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 199         }
 200 }
 201 /*
 202  *  This card is the opposite of the other cards.
 203  *   0 turns interrupts on...
 204  *   0x04 turns them off...
 205  */
 206 static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
 207 {
 208         if (val)
 209         { /* Turn interrupts on */
 210                 h->interrupts_enabled = 1;
 211                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 212         } else /* Turn them off */
 213         {
 214                 h->interrupts_enabled = 0;
 215                 writel( SA5B_INTR_OFF,
 216                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 217         }
 218 }
 219 /*
 220  *  Returns true if fifo is full.
 221  *
 222  */
 223 static unsigned long SA5_fifo_full(ctlr_info_t *h)
 224 {
 225         if( h->commands_outstanding >= h->max_commands)
 226                 return(1);
 227         else
 228                 return(0);
 229
 230 }
 231 /*
 232  *   returns value read from hardware.
 233  *     returns FIFO_EMPTY if there is nothing to read
 234  */
 235 static unsigned long SA5_completed(ctlr_info_t *h)
 236 {
 237         unsigned long register_value
 238                 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
 239         if(register_value != FIFO_EMPTY)
 240         {
 241                 h->commands_outstanding--;
 242 #ifdef CCISS_DEBUG
 243                 printk("cciss:  Read %lx back from board\n", register_value);
 244 #endif /* CCISS_DEBUG */
 245         }
 246 #ifdef CCISS_DEBUG
 247         else
 248         {
 249                 printk("cciss:  FIFO Empty read\n");
 250         }
 251 #endif
 252         return ( register_value);
 253
 254 }
 255 /*
 256  *      Returns true if an interrupt is pending..
 257  */
 258 static unsigned long SA5_intr_pending(ctlr_info_t *h)
 259 {
 260         unsigned long register_value  =
 261                 readl(h->vaddr + SA5_INTR_STATUS);
 262 #ifdef CCISS_DEBUG
 263         printk("cciss: intr_pending %lx\n", register_value);
 264 #endif  /* CCISS_DEBUG */
 265         if( register_value &  SA5_INTR_PENDING)
 266                 return  1;
 267         return 0 ;
 268 }
 269
 270 /*
 271  *      Returns true if an interrupt is pending..
 272  */
 273 static unsigned long SA5B_intr_pending(ctlr_info_t *h)
 274 {
 275         unsigned long register_value  =
 276                 readl(h->vaddr + SA5_INTR_STATUS);
 277 #ifdef CCISS_DEBUG
 278         printk("cciss: intr_pending %lx\n", register_value);
 279 #endif  /* CCISS_DEBUG */
 280         if( register_value &  SA5B_INTR_PENDING)
 281                 return  1;
 282         return 0 ;
 283 }
 284
 285
 286 static struct access_method SA5_access = {
 287         SA5_submit_command,
 288         SA5_intr_mask,
 289         SA5_fifo_full,
 290         SA5_intr_pending,
 291         SA5_completed,
 292 };
 293
 294 static struct access_method SA5B_access = {
 295         SA5_submit_command,
 296         SA5B_intr_mask,
 297         SA5_fifo_full,
 298         SA5B_intr_pending,
 299         SA5_completed,
 300 };
 301
 302 struct board_type {
 303         __u32   board_id;
 304         char    *product_name;
 305         struct access_method *access;
 306         int nr_cmds; /* Max cmds this kind of ctlr can handle. */
 307 };
 308
 309 #define CCISS_LOCK(i)   (&hba[i]->lock)
 310
 311 #endif /* CCISS_H */