2 * EHCI HCD (Host Controller Driver) for USB.
4 * Bus Glue for AMD Alchemy Au1xxx
6 * Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org>
8 * Modified for AMD Alchemy Au1200 EHC
9 * by K.Boge <karsten.boge@amd.com>
11 * This file is licenced under the GPL.
14 #include <linux/platform_device.h>
15 #include <asm/mach-au1x00/au1000.h>
17 #define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG)
18 #define USB_MCFG_PFEN (1<<31)
19 #define USB_MCFG_RDCOMB (1<<30)
20 #define USB_MCFG_SSDEN (1<<23)
21 #define USB_MCFG_PHYPLLEN (1<<19)
22 #define USB_MCFG_UCECLKEN (1<<18)
23 #define USB_MCFG_EHCCLKEN (1<<17)
24 #ifdef CONFIG_DMA_COHERENT
25 #define USB_MCFG_UCAM (1<<7)
27 #define USB_MCFG_UCAM (0)
29 #define USB_MCFG_EBMEN (1<<3)
30 #define USB_MCFG_EMEMEN (1<<2)
32 #define USBH_ENABLE_CE (USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN)
33 #define USBH_ENABLE_INIT (USB_MCFG_PFEN | USB_MCFG_RDCOMB | \
34 USBH_ENABLE_CE | USB_MCFG_SSDEN | \
35 USB_MCFG_UCAM | USB_MCFG_EBMEN | \
38 #define USBH_DISABLE (USB_MCFG_EBMEN | USB_MCFG_EMEMEN)
40 extern int usb_disabled(void);
42 static void au1xxx_start_ehc(void)
44 /* enable clock to EHCI block and HS PHY PLL*/
45 au_writel(au_readl(USB_HOST_CONFIG
) | USBH_ENABLE_CE
, USB_HOST_CONFIG
);
49 /* enable EHCI mmio */
50 au_writel(au_readl(USB_HOST_CONFIG
) | USBH_ENABLE_INIT
, USB_HOST_CONFIG
);
55 static void au1xxx_stop_ehc(void)
60 au_writel(au_readl(USB_HOST_CONFIG
) & ~USBH_DISABLE
, USB_HOST_CONFIG
);
64 /* Disable EHC clock. If the HS PHY is unused disable it too. */
65 c
= au_readl(USB_HOST_CONFIG
) & ~USB_MCFG_EHCCLKEN
;
66 if (!(c
& USB_MCFG_UCECLKEN
)) /* UDC disabled? */
67 c
&= ~USB_MCFG_PHYPLLEN
; /* yes: disable HS PHY PLL */
68 au_writel(c
, USB_HOST_CONFIG
);
72 static int au1xxx_ehci_setup(struct usb_hcd
*hcd
)
74 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
75 int ret
= ehci_init(hcd
);
77 ehci
->need_io_watchdog
= 0;
81 static const struct hc_driver ehci_au1xxx_hc_driver
= {
82 .description
= hcd_name
,
83 .product_desc
= "Au1xxx EHCI",
84 .hcd_priv_size
= sizeof(struct ehci_hcd
),
87 * generic hardware linkage
90 .flags
= HCD_MEMORY
| HCD_USB2
,
93 * basic lifecycle operations
95 * FIXME -- ehci_init() doesn't do enough here.
96 * See ehci-ppc-soc for a complete implementation.
98 .reset
= au1xxx_ehci_setup
,
101 .shutdown
= ehci_shutdown
,
104 * managing i/o requests and associated device resources
106 .urb_enqueue
= ehci_urb_enqueue
,
107 .urb_dequeue
= ehci_urb_dequeue
,
108 .endpoint_disable
= ehci_endpoint_disable
,
109 .endpoint_reset
= ehci_endpoint_reset
,
114 .get_frame_number
= ehci_get_frame
,
119 .hub_status_data
= ehci_hub_status_data
,
120 .hub_control
= ehci_hub_control
,
121 .bus_suspend
= ehci_bus_suspend
,
122 .bus_resume
= ehci_bus_resume
,
123 .relinquish_port
= ehci_relinquish_port
,
124 .port_handed_over
= ehci_port_handed_over
,
126 .clear_tt_buffer_complete
= ehci_clear_tt_buffer_complete
,
129 static int ehci_hcd_au1xxx_drv_probe(struct platform_device
*pdev
)
132 struct ehci_hcd
*ehci
;
133 struct resource
*res
;
139 #if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
140 /* Au1200 AB USB does not support coherent memory */
141 if (!(read_c0_prid() & 0xff)) {
142 printk(KERN_INFO
"%s: this is chip revision AB!\n", pdev
->name
);
143 printk(KERN_INFO
"%s: update your board or re-configure"
144 " the kernel\n", pdev
->name
);
149 if (pdev
->resource
[1].flags
!= IORESOURCE_IRQ
) {
150 pr_debug("resource[1] is not IORESOURCE_IRQ");
153 hcd
= usb_create_hcd(&ehci_au1xxx_hc_driver
, &pdev
->dev
, "Au1xxx");
157 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
158 hcd
->rsrc_start
= res
->start
;
159 hcd
->rsrc_len
= resource_size(res
);
161 if (!request_mem_region(hcd
->rsrc_start
, hcd
->rsrc_len
, hcd_name
)) {
162 pr_debug("request_mem_region failed");
167 hcd
->regs
= ioremap(hcd
->rsrc_start
, hcd
->rsrc_len
);
169 pr_debug("ioremap failed");
176 ehci
= hcd_to_ehci(hcd
);
177 ehci
->caps
= hcd
->regs
;
178 ehci
->regs
= hcd
->regs
+
179 HC_LENGTH(ehci
, readl(&ehci
->caps
->hc_capbase
));
180 /* cache this readonly data; minimize chip reads */
181 ehci
->hcs_params
= readl(&ehci
->caps
->hcs_params
);
183 ret
= usb_add_hcd(hcd
, pdev
->resource
[1].start
,
184 IRQF_DISABLED
| IRQF_SHARED
);
186 platform_set_drvdata(pdev
, hcd
);
193 release_mem_region(hcd
->rsrc_start
, hcd
->rsrc_len
);
199 static int ehci_hcd_au1xxx_drv_remove(struct platform_device
*pdev
)
201 struct usb_hcd
*hcd
= platform_get_drvdata(pdev
);
205 release_mem_region(hcd
->rsrc_start
, hcd
->rsrc_len
);
208 platform_set_drvdata(pdev
, NULL
);
214 static int ehci_hcd_au1xxx_drv_suspend(struct device
*dev
)
216 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
217 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
221 if (time_before(jiffies
, ehci
->next_statechange
))
224 /* Root hub was already suspended. Disable irq emission and
225 * mark HW unaccessible. The PM and USB cores make sure that
226 * the root hub is either suspended or stopped.
228 ehci_prepare_ports_for_controller_suspend(ehci
, device_may_wakeup(dev
));
229 spin_lock_irqsave(&ehci
->lock
, flags
);
230 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
231 (void)ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
233 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
234 spin_unlock_irqrestore(&ehci
->lock
, flags
);
236 // could save FLADJ in case of Vaux power loss
237 // ... we'd only use it to handle clock skew
244 static int ehci_hcd_au1xxx_drv_resume(struct device
*dev
)
246 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
247 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
251 // maybe restore FLADJ
253 if (time_before(jiffies
, ehci
->next_statechange
))
256 /* Mark hardware accessible again as we are out of D3 state by now */
257 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
259 /* If CF is still set, we maintained PCI Vaux power.
260 * Just undo the effect of ehci_pci_suspend().
262 if (ehci_readl(ehci
, &ehci
->regs
->configured_flag
) == FLAG_CF
) {
263 int mask
= INTR_MASK
;
265 ehci_prepare_ports_for_controller_resume(ehci
);
266 if (!hcd
->self
.root_hub
->do_remote_wakeup
)
268 ehci_writel(ehci
, mask
, &ehci
->regs
->intr_enable
);
269 ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
273 ehci_dbg(ehci
, "lost power, restarting\n");
274 usb_root_hub_lost_power(hcd
->self
.root_hub
);
276 /* Else reset, to cope with power loss or flush-to-storage
277 * style "resume" having let BIOS kick in during reboot.
279 (void) ehci_halt(ehci
);
280 (void) ehci_reset(ehci
);
282 /* emptying the schedule aborts any urbs */
283 spin_lock_irq(&ehci
->lock
);
285 end_unlink_async(ehci
);
287 spin_unlock_irq(&ehci
->lock
);
289 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
290 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
291 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
293 /* here we "know" root ports should always stay powered */
294 ehci_port_power(ehci
, 1);
296 hcd
->state
= HC_STATE_SUSPENDED
;
301 static const struct dev_pm_ops au1xxx_ehci_pmops
= {
302 .suspend
= ehci_hcd_au1xxx_drv_suspend
,
303 .resume
= ehci_hcd_au1xxx_drv_resume
,
306 #define AU1XXX_EHCI_PMOPS &au1xxx_ehci_pmops
309 #define AU1XXX_EHCI_PMOPS NULL
312 static struct platform_driver ehci_hcd_au1xxx_driver
= {
313 .probe
= ehci_hcd_au1xxx_drv_probe
,
314 .remove
= ehci_hcd_au1xxx_drv_remove
,
315 .shutdown
= usb_hcd_platform_shutdown
,
317 .name
= "au1xxx-ehci",
318 .owner
= THIS_MODULE
,
319 .pm
= AU1XXX_EHCI_PMOPS
,
323 MODULE_ALIAS("platform:au1xxx-ehci");