drivers/usb/musb/omap2430.c

   1 /*
   2  * Copyright (C) 2005-2007 by Texas Instruments
   3  * Some code has been taken from tusb6010.c
   4  * Copyrights for that are attributable to:
   5  * Copyright (C) 2006 Nokia Corporation
   6  * Tony Lindgren <tony@atomide.com>
   7  *
   8  * This file is part of the Inventra Controller Driver for Linux.
   9  *
  10  * The Inventra Controller Driver for Linux is free software; you
  11  * can redistribute it and/or modify it under the terms of the GNU
  12  * General Public License version 2 as published by the Free Software
  13  * Foundation.
  14  *
  15  * The Inventra Controller Driver for Linux is distributed in
  16  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17  * without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19  * License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with The Inventra Controller Driver for Linux ; if not,
  23  * write to the Free Software Foundation, Inc., 59 Temple Place,
  24  * Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27 #include <linux/module.h>
  28 #include <linux/kernel.h>
  29 #include <linux/sched.h>
  30 #include <linux/init.h>
  31 #include <linux/list.h>
  32 #include <linux/clk.h>
  33 #include <linux/io.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/dma-mapping.h>
  36
  37 #include "musb_core.h"
  38 #include "omap2430.h"
  39
  40 static struct timer_list musb_idle_timer;
  41
  42 static void musb_do_idle(unsigned long _musb)
  43 {
  44         struct musb     *musb = (void *)_musb;
  45         unsigned long   flags;
  46 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  47         u8      power;
  48 #endif
  49         u8      devctl;
  50
  51         spin_lock_irqsave(&musb->lock, flags);
  52
  53         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  54
  55         switch (musb->xceiv->state) {
  56         case OTG_STATE_A_WAIT_BCON:
  57                 devctl &= ~MUSB_DEVCTL_SESSION;
  58                 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  59
  60                 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  61                 if (devctl & MUSB_DEVCTL_BDEVICE) {
  62                         musb->xceiv->state = OTG_STATE_B_IDLE;
  63                         MUSB_DEV_MODE(musb);
  64                 } else {
  65                         musb->xceiv->state = OTG_STATE_A_IDLE;
  66                         MUSB_HST_MODE(musb);
  67                 }
  68                 break;
  69 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  70         case OTG_STATE_A_SUSPEND:
  71                 /* finish RESUME signaling? */
  72                 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  73                         power = musb_readb(musb->mregs, MUSB_POWER);
  74                         power &= ~MUSB_POWER_RESUME;
  75                         DBG(1, "root port resume stopped, power %02x\n", power);
  76                         musb_writeb(musb->mregs, MUSB_POWER, power);
  77                         musb->is_active = 1;
  78                         musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  79                                                 | MUSB_PORT_STAT_RESUME);
  80                         musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  81                         usb_hcd_poll_rh_status(musb_to_hcd(musb));
  82                         /* NOTE: it might really be A_WAIT_BCON ... */
  83                         musb->xceiv->state = OTG_STATE_A_HOST;
  84                 }
  85                 break;
  86 #endif
  87 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  88         case OTG_STATE_A_HOST:
  89                 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  90                 if (devctl &  MUSB_DEVCTL_BDEVICE)
  91                         musb->xceiv->state = OTG_STATE_B_IDLE;
  92                 else
  93                         musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  94 #endif
  95         default:
  96                 break;
  97         }
  98         spin_unlock_irqrestore(&musb->lock, flags);
  99 }
 100
 101
 102 static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
 103 {
 104         unsigned long           default_timeout = jiffies + msecs_to_jiffies(3);
 105         static unsigned long    last_timer;
 106
 107         if (timeout == 0)
 108                 timeout = default_timeout;
 109
 110         /* Never idle if active, or when VBUS timeout is not set as host */
 111         if (musb->is_active || ((musb->a_wait_bcon == 0)
 112                         && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
 113                 DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
 114                 del_timer(&musb_idle_timer);
 115                 last_timer = jiffies;
 116                 return;
 117         }
 118
 119         if (time_after(last_timer, timeout)) {
 120                 if (!timer_pending(&musb_idle_timer))
 121                         last_timer = timeout;
 122                 else {
 123                         DBG(4, "Longer idle timer already pending, ignoring\n");
 124                         return;
 125                 }
 126         }
 127         last_timer = timeout;
 128
 129         DBG(4, "%s inactive, for idle timer for %lu ms\n",
 130                 otg_state_string(musb),
 131                 (unsigned long)jiffies_to_msecs(timeout - jiffies));
 132         mod_timer(&musb_idle_timer, timeout);
 133 }
 134
 135 static void omap2430_musb_enable(struct musb *musb)
 136 {
 137 }
 138
 139 static void omap2430_musb_disable(struct musb *musb)
 140 {
 141 }
 142
 143 static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
 144 {
 145         u8              devctl;
 146         /* HDRC controls CPEN, but beware current surges during device
 147          * connect.  They can trigger transient overcurrent conditions
 148          * that must be ignored.
 149          */
 150
 151         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 152
 153         if (is_on) {
 154                 musb->is_active = 1;
 155                 musb->xceiv->default_a = 1;
 156                 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 157                 devctl |= MUSB_DEVCTL_SESSION;
 158
 159                 MUSB_HST_MODE(musb);
 160         } else {
 161                 musb->is_active = 0;
 162
 163                 /* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
 164                  * jumping right to B_IDLE...
 165                  */
 166
 167                 musb->xceiv->default_a = 0;
 168                 musb->xceiv->state = OTG_STATE_B_IDLE;
 169                 devctl &= ~MUSB_DEVCTL_SESSION;
 170
 171                 MUSB_DEV_MODE(musb);
 172         }
 173         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 174
 175         DBG(1, "VBUS %s, devctl %02x "
 176                 /* otg %3x conf %08x prcm %08x */ "\n",
 177                 otg_state_string(musb),
 178                 musb_readb(musb->mregs, MUSB_DEVCTL));
 179 }
 180
 181 static int omap2430_musb_resume(struct musb *musb);
 182
 183 static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
 184 {
 185         u8      devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 186
 187         devctl |= MUSB_DEVCTL_SESSION;
 188         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 189
 190         return 0;
 191 }
 192
 193 static int omap2430_musb_init(struct musb *musb)
 194 {
 195         u32 l;
 196         struct device *dev = musb->controller;
 197         struct musb_hdrc_platform_data *plat = dev->platform_data;
 198         struct omap_musb_board_data *data = plat->board_data;
 199
 200         /* We require some kind of external transceiver, hooked
 201          * up through ULPI.  TWL4030-family PMICs include one,
 202          * which needs a driver, drivers aren't always needed.
 203          */
 204         musb->xceiv = otg_get_transceiver();
 205         if (!musb->xceiv) {
 206                 pr_err("HS USB OTG: no transceiver configured\n");
 207                 return -ENODEV;
 208         }
 209
 210         omap2430_musb_resume(musb);
 211
 212         l = musb_readl(musb->mregs, OTG_SYSCONFIG);
 213         l &= ~ENABLEWAKEUP;     /* disable wakeup */
 214         l &= ~NOSTDBY;          /* remove possible nostdby */
 215         l |= SMARTSTDBY;        /* enable smart standby */
 216         l &= ~AUTOIDLE;         /* disable auto idle */
 217         l &= ~NOIDLE;           /* remove possible noidle */
 218         l |= SMARTIDLE;         /* enable smart idle */
 219         /*
 220          * MUSB AUTOIDLE don't work in 3430.
 221          * Workaround by Richard Woodruff/TI
 222          */
 223         if (!cpu_is_omap3430())
 224                 l |= AUTOIDLE;          /* enable auto idle */
 225         musb_writel(musb->mregs, OTG_SYSCONFIG, l);
 226
 227         l = musb_readl(musb->mregs, OTG_INTERFSEL);
 228
 229         if (data->interface_type == MUSB_INTERFACE_UTMI) {
 230                 /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
 231                 l &= ~ULPI_12PIN;       /* Disable ULPI */
 232                 l |= UTMI_8BIT;         /* Enable UTMI  */
 233         } else {
 234                 l |= ULPI_12PIN;
 235         }
 236
 237         musb_writel(musb->mregs, OTG_INTERFSEL, l);
 238
 239         pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
 240                         "sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
 241                         musb_readl(musb->mregs, OTG_REVISION),
 242                         musb_readl(musb->mregs, OTG_SYSCONFIG),
 243                         musb_readl(musb->mregs, OTG_SYSSTATUS),
 244                         musb_readl(musb->mregs, OTG_INTERFSEL),
 245                         musb_readl(musb->mregs, OTG_SIMENABLE));
 246
 247         if (is_host_enabled(musb))
 248                 musb->board_set_vbus = omap2430_musb_set_vbus;
 249
 250         setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
 251
 252         return 0;
 253 }
 254
 255 #ifdef CONFIG_PM
 256 void musb_platform_save_context(struct musb *musb,
 257                 struct musb_context_registers *musb_context)
 258 {
 259         musb_context->otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
 260         musb_context->otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
 261 }
 262
 263 void musb_platform_restore_context(struct musb *musb,
 264                 struct musb_context_registers *musb_context)
 265 {
 266         musb_writel(musb->mregs, OTG_SYSCONFIG, musb_context->otg_sysconfig);
 267         musb_writel(musb->mregs, OTG_FORCESTDBY, musb_context->otg_forcestandby);
 268 }
 269 #endif
 270
 271 static int omap2430_musb_suspend(struct musb *musb)
 272 {
 273         u32 l;
 274
 275         if (!musb->clock)
 276                 return 0;
 277
 278         /* in any role */
 279         l = musb_readl(musb->mregs, OTG_FORCESTDBY);
 280         l |= ENABLEFORCE;       /* enable MSTANDBY */
 281         musb_writel(musb->mregs, OTG_FORCESTDBY, l);
 282
 283         l = musb_readl(musb->mregs, OTG_SYSCONFIG);
 284         l |= ENABLEWAKEUP;      /* enable wakeup */
 285         musb_writel(musb->mregs, OTG_SYSCONFIG, l);
 286
 287         otg_set_suspend(musb->xceiv, 1);
 288
 289         if (musb->set_clock)
 290                 musb->set_clock(musb->clock, 0);
 291         else
 292                 clk_disable(musb->clock);
 293
 294         return 0;
 295 }
 296
 297 static int omap2430_musb_resume(struct musb *musb)
 298 {
 299         u32 l;
 300
 301         if (!musb->clock)
 302                 return 0;
 303
 304         otg_set_suspend(musb->xceiv, 0);
 305
 306         if (musb->set_clock)
 307                 musb->set_clock(musb->clock, 1);
 308         else
 309                 clk_enable(musb->clock);
 310
 311         l = musb_readl(musb->mregs, OTG_SYSCONFIG);
 312         l &= ~ENABLEWAKEUP;     /* disable wakeup */
 313         musb_writel(musb->mregs, OTG_SYSCONFIG, l);
 314
 315         l = musb_readl(musb->mregs, OTG_FORCESTDBY);
 316         l &= ~ENABLEFORCE;      /* disable MSTANDBY */
 317         musb_writel(musb->mregs, OTG_FORCESTDBY, l);
 318
 319         return 0;
 320 }
 321
 322 static int omap2430_musb_exit(struct musb *musb)
 323 {
 324
 325         omap2430_musb_suspend(musb);
 326
 327         otg_put_transceiver(musb->xceiv);
 328         return 0;
 329 }
 330
 331 const struct musb_platform_ops musb_ops = {
 332         .init           = omap2430_musb_init,
 333         .exit           = omap2430_musb_exit,
 334
 335         .suspend        = omap2430_musb_suspend,
 336         .resume         = omap2430_musb_resume,
 337
 338         .enable         = omap2430_musb_enable,
 339         .disable        = omap2430_musb_disable,
 340
 341         .set_mode       = omap2430_musb_set_mode,
 342         .try_idle       = omap2430_musb_try_idle,
 343
 344         .set_vbus       = omap2430_musb_set_vbus,
 345 };
 346
 347 static u64 omap2430_dmamask = DMA_BIT_MASK(32);
 348
 349 static int __init omap2430_probe(struct platform_device *pdev)
 350 {
 351         struct musb_hdrc_platform_data  *pdata = pdev->dev.platform_data;
 352         struct platform_device          *musb;
 353
 354         int                             ret = -ENOMEM;
 355
 356         musb = platform_device_alloc("musb-hdrc", -1);
 357         if (!musb) {
 358                 dev_err(&pdev->dev, "failed to allocate musb device\n");
 359                 goto err0;
 360         }
 361
 362         musb->dev.parent                = &pdev->dev;
 363         musb->dev.dma_mask              = &omap2430_dmamask;
 364         musb->dev.coherent_dma_mask     = omap2430_dmamask;
 365
 366         platform_set_drvdata(pdev, musb);
 367
 368         ret = platform_device_add_resources(musb, pdev->resource,
 369                         pdev->num_resources);
 370         if (ret) {
 371                 dev_err(&pdev->dev, "failed to add resources\n");
 372                 goto err1;
 373         }
 374
 375         ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
 376         if (ret) {
 377                 dev_err(&pdev->dev, "failed to add platform_data\n");
 378                 goto err1;
 379         }
 380
 381         ret = platform_device_add(musb);
 382         if (ret) {
 383                 dev_err(&pdev->dev, "failed to register musb device\n");
 384                 goto err1;
 385         }
 386
 387         return 0;
 388
 389 err1:
 390         platform_device_put(musb);
 391
 392 err0:
 393         return ret;
 394 }
 395
 396 static int __exit omap2430_remove(struct platform_device *pdev)
 397 {
 398         struct platform_device          *musb = platform_get_drvdata(pdev);
 399
 400         platform_device_del(musb);
 401         platform_device_put(musb);
 402
 403         return 0;
 404 }
 405
 406 static struct platform_driver omap2430_driver = {
 407         .remove         = __exit_p(omap2430_remove),
 408         .driver         = {
 409                 .name   = "musb-omap2430",
 410         },
 411 };
 412
 413 MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
 414 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 415 MODULE_LICENSE("GPL v2");
 416
 417 static int __init omap2430_init(void)
 418 {
 419         return platform_driver_probe(&omap2430_driver, omap2430_probe);
 420 }
 421 subsys_initcall(omap2430_init);
 422
 423 static void __exit omap2430_exit(void)
 424 {
 425         platform_driver_unregister(&omap2430_driver);
 426 }
 427 module_exit(omap2430_exit);