sparc64: Use a seperate counter for timer interrupts and NMI checks, like x86.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / sparc / kernel / setup_64.c
bloba2a79e76344f78c606fed829ce18c4c77775b3ac
1 /*
2 * linux/arch/sparc64/kernel/setup.c
4 * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
8 #include <linux/errno.h>
9 #include <linux/sched.h>
10 #include <linux/kernel.h>
11 #include <linux/mm.h>
12 #include <linux/stddef.h>
13 #include <linux/unistd.h>
14 #include <linux/ptrace.h>
15 #include <linux/slab.h>
16 #include <asm/smp.h>
17 #include <linux/user.h>
18 #include <linux/screen_info.h>
19 #include <linux/delay.h>
20 #include <linux/fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/syscalls.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/string.h>
26 #include <linux/init.h>
27 #include <linux/inet.h>
28 #include <linux/console.h>
29 #include <linux/root_dev.h>
30 #include <linux/interrupt.h>
31 #include <linux/cpu.h>
32 #include <linux/initrd.h>
34 #include <asm/system.h>
35 #include <asm/io.h>
36 #include <asm/processor.h>
37 #include <asm/oplib.h>
38 #include <asm/page.h>
39 #include <asm/pgtable.h>
40 #include <asm/idprom.h>
41 #include <asm/head.h>
42 #include <asm/starfire.h>
43 #include <asm/mmu_context.h>
44 #include <asm/timer.h>
45 #include <asm/sections.h>
46 #include <asm/setup.h>
47 #include <asm/mmu.h>
48 #include <asm/ns87303.h>
49 #include <asm/btext.h>
51 #ifdef CONFIG_IP_PNP
52 #include <net/ipconfig.h>
53 #endif
55 #include "entry.h"
56 #include "kernel.h"
58 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
59 * operations in asm/ns87303.h
61 DEFINE_SPINLOCK(ns87303_lock);
62 EXPORT_SYMBOL(ns87303_lock);
64 struct screen_info screen_info = {
65 0, 0, /* orig-x, orig-y */
66 0, /* unused */
67 0, /* orig-video-page */
68 0, /* orig-video-mode */
69 128, /* orig-video-cols */
70 0, 0, 0, /* unused, ega_bx, unused */
71 54, /* orig-video-lines */
72 0, /* orig-video-isVGA */
73 16 /* orig-video-points */
76 static void
77 prom_console_write(struct console *con, const char *s, unsigned n)
79 prom_write(s, n);
82 /* Exported for mm/init.c:paging_init. */
83 unsigned long cmdline_memory_size = 0;
85 static struct console prom_early_console = {
86 .name = "earlyprom",
87 .write = prom_console_write,
88 .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
89 .index = -1,
92 /*
93 * Process kernel command line switches that are specific to the
94 * SPARC or that require special low-level processing.
96 static void __init process_switch(char c)
98 switch (c) {
99 case 'd':
100 case 's':
101 break;
102 case 'h':
103 prom_printf("boot_flags_init: Halt!\n");
104 prom_halt();
105 break;
106 case 'p':
107 /* Just ignore, this behavior is now the default. */
108 break;
109 case 'P':
110 /* Force UltraSPARC-III P-Cache on. */
111 if (tlb_type != cheetah) {
112 printk("BOOT: Ignoring P-Cache force option.\n");
113 break;
115 cheetah_pcache_forced_on = 1;
116 add_taint(TAINT_MACHINE_CHECK);
117 cheetah_enable_pcache();
118 break;
120 default:
121 printk("Unknown boot switch (-%c)\n", c);
122 break;
126 static void __init boot_flags_init(char *commands)
128 while (*commands) {
129 /* Move to the start of the next "argument". */
130 while (*commands && *commands == ' ')
131 commands++;
133 /* Process any command switches, otherwise skip it. */
134 if (*commands == '\0')
135 break;
136 if (*commands == '-') {
137 commands++;
138 while (*commands && *commands != ' ')
139 process_switch(*commands++);
140 continue;
142 if (!strncmp(commands, "mem=", 4)) {
144 * "mem=XXX[kKmM]" overrides the PROM-reported
145 * memory size.
147 cmdline_memory_size = simple_strtoul(commands + 4,
148 &commands, 0);
149 if (*commands == 'K' || *commands == 'k') {
150 cmdline_memory_size <<= 10;
151 commands++;
152 } else if (*commands=='M' || *commands=='m') {
153 cmdline_memory_size <<= 20;
154 commands++;
157 while (*commands && *commands != ' ')
158 commands++;
162 extern unsigned short root_flags;
163 extern unsigned short root_dev;
164 extern unsigned short ram_flags;
165 #define RAMDISK_IMAGE_START_MASK 0x07FF
166 #define RAMDISK_PROMPT_FLAG 0x8000
167 #define RAMDISK_LOAD_FLAG 0x4000
169 extern int root_mountflags;
171 char reboot_command[COMMAND_LINE_SIZE];
173 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
175 void __init per_cpu_patch(void)
177 struct cpuid_patch_entry *p;
178 unsigned long ver;
179 int is_jbus;
181 if (tlb_type == spitfire && !this_is_starfire)
182 return;
184 is_jbus = 0;
185 if (tlb_type != hypervisor) {
186 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
187 is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
188 (ver >> 32UL) == __SERRANO_ID);
191 p = &__cpuid_patch;
192 while (p < &__cpuid_patch_end) {
193 unsigned long addr = p->addr;
194 unsigned int *insns;
196 switch (tlb_type) {
197 case spitfire:
198 insns = &p->starfire[0];
199 break;
200 case cheetah:
201 case cheetah_plus:
202 if (is_jbus)
203 insns = &p->cheetah_jbus[0];
204 else
205 insns = &p->cheetah_safari[0];
206 break;
207 case hypervisor:
208 insns = &p->sun4v[0];
209 break;
210 default:
211 prom_printf("Unknown cpu type, halting.\n");
212 prom_halt();
215 *(unsigned int *) (addr + 0) = insns[0];
216 wmb();
217 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
219 *(unsigned int *) (addr + 4) = insns[1];
220 wmb();
221 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
223 *(unsigned int *) (addr + 8) = insns[2];
224 wmb();
225 __asm__ __volatile__("flush %0" : : "r" (addr + 8));
227 *(unsigned int *) (addr + 12) = insns[3];
228 wmb();
229 __asm__ __volatile__("flush %0" : : "r" (addr + 12));
231 p++;
235 void __init sun4v_patch(void)
237 extern void sun4v_hvapi_init(void);
238 struct sun4v_1insn_patch_entry *p1;
239 struct sun4v_2insn_patch_entry *p2;
241 if (tlb_type != hypervisor)
242 return;
244 p1 = &__sun4v_1insn_patch;
245 while (p1 < &__sun4v_1insn_patch_end) {
246 unsigned long addr = p1->addr;
248 *(unsigned int *) (addr + 0) = p1->insn;
249 wmb();
250 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
252 p1++;
255 p2 = &__sun4v_2insn_patch;
256 while (p2 < &__sun4v_2insn_patch_end) {
257 unsigned long addr = p2->addr;
259 *(unsigned int *) (addr + 0) = p2->insns[0];
260 wmb();
261 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
263 *(unsigned int *) (addr + 4) = p2->insns[1];
264 wmb();
265 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
267 p2++;
270 sun4v_hvapi_init();
273 #ifdef CONFIG_SMP
274 void __init boot_cpu_id_too_large(int cpu)
276 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
277 cpu, NR_CPUS);
278 prom_halt();
280 #endif
282 void __init setup_arch(char **cmdline_p)
284 /* Initialize PROM console and command line. */
285 *cmdline_p = prom_getbootargs();
286 strcpy(boot_command_line, *cmdline_p);
287 parse_early_param();
289 boot_flags_init(*cmdline_p);
290 #ifdef CONFIG_EARLYFB
291 if (btext_find_display())
292 #endif
293 register_console(&prom_early_console);
295 if (tlb_type == hypervisor)
296 printk("ARCH: SUN4V\n");
297 else
298 printk("ARCH: SUN4U\n");
300 #ifdef CONFIG_DUMMY_CONSOLE
301 conswitchp = &dummy_con;
302 #endif
304 idprom_init();
306 if (!root_flags)
307 root_mountflags &= ~MS_RDONLY;
308 ROOT_DEV = old_decode_dev(root_dev);
309 #ifdef CONFIG_BLK_DEV_RAM
310 rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
311 rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
312 rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
313 #endif
315 task_thread_info(&init_task)->kregs = &fake_swapper_regs;
317 #ifdef CONFIG_IP_PNP
318 if (!ic_set_manually) {
319 int chosen = prom_finddevice ("/chosen");
320 u32 cl, sv, gw;
322 cl = prom_getintdefault (chosen, "client-ip", 0);
323 sv = prom_getintdefault (chosen, "server-ip", 0);
324 gw = prom_getintdefault (chosen, "gateway-ip", 0);
325 if (cl && sv) {
326 ic_myaddr = cl;
327 ic_servaddr = sv;
328 if (gw)
329 ic_gateway = gw;
330 #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
331 ic_proto_enabled = 0;
332 #endif
335 #endif
337 /* Get boot processor trap_block[] setup. */
338 init_cur_cpu_trap(current_thread_info());
340 paging_init();
343 /* BUFFER is PAGE_SIZE bytes long. */
345 extern void smp_info(struct seq_file *);
346 extern void smp_bogo(struct seq_file *);
347 extern void mmu_info(struct seq_file *);
349 unsigned int dcache_parity_tl1_occurred;
350 unsigned int icache_parity_tl1_occurred;
352 int ncpus_probed;
354 static int show_cpuinfo(struct seq_file *m, void *__unused)
356 seq_printf(m,
357 "cpu\t\t: %s\n"
358 "fpu\t\t: %s\n"
359 "pmu\t\t: %s\n"
360 "prom\t\t: %s\n"
361 "type\t\t: %s\n"
362 "ncpus probed\t: %d\n"
363 "ncpus active\t: %d\n"
364 "D$ parity tl1\t: %u\n"
365 "I$ parity tl1\t: %u\n"
366 #ifndef CONFIG_SMP
367 "Cpu0ClkTck\t: %016lx\n"
368 #endif
370 sparc_cpu_type,
371 sparc_fpu_type,
372 sparc_pmu_type,
373 prom_version,
374 ((tlb_type == hypervisor) ?
375 "sun4v" :
376 "sun4u"),
377 ncpus_probed,
378 num_online_cpus(),
379 dcache_parity_tl1_occurred,
380 icache_parity_tl1_occurred
381 #ifndef CONFIG_SMP
382 , cpu_data(0).clock_tick
383 #endif
385 #ifdef CONFIG_SMP
386 smp_bogo(m);
387 #endif
388 mmu_info(m);
389 #ifdef CONFIG_SMP
390 smp_info(m);
391 #endif
392 return 0;
395 static void *c_start(struct seq_file *m, loff_t *pos)
397 /* The pointer we are returning is arbitrary,
398 * it just has to be non-NULL and not IS_ERR
399 * in the success case.
401 return *pos == 0 ? &c_start : NULL;
404 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
406 ++*pos;
407 return c_start(m, pos);
410 static void c_stop(struct seq_file *m, void *v)
414 const struct seq_operations cpuinfo_op = {
415 .start =c_start,
416 .next = c_next,
417 .stop = c_stop,
418 .show = show_cpuinfo,
421 extern int stop_a_enabled;
423 void sun_do_break(void)
425 if (!stop_a_enabled)
426 return;
428 prom_printf("\n");
429 flush_user_windows();
431 prom_cmdline();
433 EXPORT_SYMBOL(sun_do_break);
435 int stop_a_enabled = 1;
436 EXPORT_SYMBOL(stop_a_enabled);