[ALSA] ac97 - Fix CLFE channel setting of ALC850
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / i2c / cs8427.c
blob9deba80a587cb8255ac69e643b6316057e51f6df
1 /*
2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <sound/core.h>
28 #include <sound/control.h>
29 #include <sound/pcm.h>
30 #include <sound/cs8427.h>
31 #include <sound/asoundef.h>
33 static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
35 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
36 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
37 MODULE_LICENSE("GPL");
39 #define CS8427_ADDR (0x20>>1) /* fixed address */
41 struct cs8427_stream {
42 struct snd_pcm_substream *substream;
43 char hw_status[24]; /* hardware status */
44 char def_status[24]; /* default status */
45 char pcm_status[24]; /* PCM private status */
46 char hw_udata[32];
47 struct snd_kcontrol *pcm_ctl;
50 struct cs8427 {
51 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
52 unsigned int rate;
53 unsigned int reset_timeout;
54 struct cs8427_stream playback;
55 struct cs8427_stream capture;
58 static unsigned char swapbits(unsigned char val)
60 int bit;
61 unsigned char res = 0;
62 for (bit = 0; bit < 8; bit++) {
63 res <<= 1;
64 res |= val & 1;
65 val >>= 1;
67 return res;
70 int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
71 unsigned char val)
73 int err;
74 unsigned char buf[2];
76 buf[0] = reg & 0x7f;
77 buf[1] = val;
78 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
79 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err);
80 return err < 0 ? err : -EIO;
82 return 0;
85 static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
87 int err;
88 unsigned char buf;
90 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
91 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
92 return err < 0 ? err : -EIO;
94 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
95 snd_printk(KERN_ERR "unable to read register 0x%x byte from CS8427\n", reg);
96 return err < 0 ? err : -EIO;
98 return buf;
101 static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
103 struct cs8427 *chip = device->private_data;
104 int err;
106 udata = udata ? CS8427_BSEL : 0;
107 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
108 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
109 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
110 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
111 chip->regmap[CS8427_REG_CSDATABUF]);
112 if (err < 0)
113 return err;
115 return 0;
118 static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
119 int udata,
120 unsigned char *ndata,
121 int count)
123 struct cs8427 *chip = device->private_data;
124 char *hw_data = udata ? chip->playback.hw_udata : chip->playback.hw_status;
125 char data[32];
126 int err, idx;
128 if (!memcmp(hw_data, ndata, count))
129 return 0;
130 if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
131 return err;
132 memcpy(hw_data, ndata, count);
133 if (udata) {
134 memset(data, 0, sizeof(data));
135 if (memcmp(hw_data, data, count) == 0) {
136 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
137 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | CS8427_EFTUI;
138 if ((err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
139 chip->regmap[CS8427_REG_UDATABUF])) < 0)
140 return err;
141 return 0;
144 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
145 for (idx = 0; idx < count; idx++)
146 data[idx + 1] = swapbits(ndata[idx]);
147 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
148 return -EIO;
149 return 1;
152 static void snd_cs8427_free(struct snd_i2c_device *device)
154 kfree(device->private_data);
157 int snd_cs8427_create(struct snd_i2c_bus *bus,
158 unsigned char addr,
159 unsigned int reset_timeout,
160 struct snd_i2c_device **r_cs8427)
162 static unsigned char initvals1[] = {
163 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
164 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */
165 CS8427_SWCLK | CS8427_TCBLDIR,
166 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */
167 0x00,
168 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */
169 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
170 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base =
171 recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */
172 CS8427_RXDILRCK,
173 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */
174 CS8427_SIDEL | CS8427_SILRPOL,
175 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */
176 CS8427_SODEL | CS8427_SOLRPOL,
178 static unsigned char initvals2[] = {
179 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
180 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */
181 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */
182 0xff, /* set everything */
183 /* CS8427_REG_CSDATABUF:
184 Registers 32-55 window to CS buffer
185 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
186 Inhibit D->E transfers (all) of CS data.
187 Allow E->F transfer of CS data.
188 One byte mode; both A/B channels get same written CB data.
189 A channel info is output to chip's EMPH* pin. */
190 CS8427_CBMR | CS8427_DETCI,
191 /* CS8427_REG_UDATABUF:
192 Use internal buffer to transmit User (U) data.
193 Chip's U pin is an output.
194 Transmit all O's for user data.
195 Inhibit D->E transfers.
196 Inhibit E->F transfers. */
197 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
199 int err;
200 struct cs8427 *chip;
201 struct snd_i2c_device *device;
202 unsigned char buf[24];
204 if ((err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
205 &device)) < 0)
206 return err;
207 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
208 if (chip == NULL) {
209 snd_i2c_device_free(device);
210 return -ENOMEM;
212 device->private_free = snd_cs8427_free;
214 snd_i2c_lock(bus);
215 if ((err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER)) !=
216 CS8427_VER8427A) {
217 snd_i2c_unlock(bus);
218 snd_printk(KERN_ERR "unable to find CS8427 signature "
219 "(expected 0x%x, read 0x%x),\n",
220 CS8427_VER8427A, err);
221 snd_printk(KERN_ERR " initialization is not completed\n");
222 return -EFAULT;
224 /* turn off run bit while making changes to configuration */
225 if ((err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00)) < 0)
226 goto __fail;
227 /* send initial values */
228 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
229 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
230 err = err < 0 ? err : -EIO;
231 goto __fail;
233 /* Turn off CS8427 interrupt stuff that is not used in hardware */
234 memset(buf, 0, 7);
235 /* from address 9 to 15 */
236 buf[0] = 9; /* register */
237 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
238 goto __fail;
239 /* send transfer initialization sequence */
240 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
241 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
242 err = err < 0 ? err : -EIO;
243 goto __fail;
245 /* write default channel status bytes */
246 buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
247 buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
248 buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
249 buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
250 memset(buf + 4, 0, 24 - 4);
251 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
252 goto __fail;
253 memcpy(chip->playback.def_status, buf, 24);
254 memcpy(chip->playback.pcm_status, buf, 24);
255 snd_i2c_unlock(bus);
257 /* turn on run bit and rock'n'roll */
258 if (reset_timeout < 1)
259 reset_timeout = 1;
260 chip->reset_timeout = reset_timeout;
261 snd_cs8427_reset(device);
263 #if 0 // it's nice for read tests
265 char buf[128];
266 int xx;
267 buf[0] = 0x81;
268 snd_i2c_sendbytes(device, buf, 1);
269 snd_i2c_readbytes(device, buf, 127);
270 for (xx = 0; xx < 127; xx++)
271 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
273 #endif
275 if (r_cs8427)
276 *r_cs8427 = device;
277 return 0;
279 __fail:
280 snd_i2c_unlock(bus);
281 snd_i2c_device_free(device);
282 return err < 0 ? err : -EIO;
286 * Reset the chip using run bit, also lock PLL using ILRCK and
287 * put back AES3INPUT. This workaround is described in latest
288 * CS8427 datasheet, otherwise TXDSERIAL will not work.
290 static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
292 struct cs8427 *chip;
293 unsigned long end_time;
294 int data;
296 snd_assert(cs8427, return);
297 chip = cs8427->private_data;
298 snd_i2c_lock(cs8427->bus);
299 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
300 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
301 chip->regmap[CS8427_REG_CLOCKSOURCE]);
302 udelay(200);
303 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
304 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
305 chip->regmap[CS8427_REG_CLOCKSOURCE]);
306 udelay(200);
307 snd_i2c_unlock(cs8427->bus);
308 end_time = jiffies + chip->reset_timeout;
309 while (time_after_eq(end_time, jiffies)) {
310 snd_i2c_lock(cs8427->bus);
311 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
312 snd_i2c_unlock(cs8427->bus);
313 if (!(data & CS8427_UNLOCK))
314 break;
315 schedule_timeout_uninterruptible(1);
317 snd_i2c_lock(cs8427->bus);
318 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
319 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
320 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
321 chip->regmap[CS8427_REG_CLOCKSOURCE]);
322 snd_i2c_unlock(cs8427->bus);
325 static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
326 struct snd_ctl_elem_info *uinfo)
328 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
329 uinfo->count = 1;
330 uinfo->value.integer.min = 0;
331 uinfo->value.integer.max = 255;
332 return 0;
335 static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
336 struct snd_ctl_elem_value *ucontrol)
338 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
339 int data;
341 snd_i2c_lock(device->bus);
342 data = snd_cs8427_reg_read(device, kcontrol->private_value);
343 snd_i2c_unlock(device->bus);
344 if (data < 0)
345 return data;
346 ucontrol->value.integer.value[0] = data;
347 return 0;
350 static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
351 struct snd_ctl_elem_info *uinfo)
353 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
354 uinfo->count = 10;
355 return 0;
358 static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
359 struct snd_ctl_elem_value *ucontrol)
361 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
362 unsigned char reg = CS8427_REG_QSUBCODE;
363 int err;
365 snd_i2c_lock(device->bus);
366 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
367 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
368 snd_i2c_unlock(device->bus);
369 return err < 0 ? err : -EIO;
371 if ((err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10)) != 10) {
372 snd_printk(KERN_ERR "unable to read Q-subcode bytes from CS8427\n");
373 snd_i2c_unlock(device->bus);
374 return err < 0 ? err : -EIO;
376 snd_i2c_unlock(device->bus);
377 return 0;
380 static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
382 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
383 uinfo->count = 1;
384 return 0;
387 static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_value *ucontrol)
390 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
391 struct cs8427 *chip = device->private_data;
393 snd_i2c_lock(device->bus);
394 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
395 snd_i2c_unlock(device->bus);
396 return 0;
399 static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
400 struct snd_ctl_elem_value *ucontrol)
402 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
403 struct cs8427 *chip = device->private_data;
404 unsigned char *status = kcontrol->private_value ?
405 chip->playback.pcm_status : chip->playback.def_status;
406 struct snd_pcm_runtime *runtime = chip->playback.substream ?
407 chip->playback.substream->runtime : NULL;
408 int err, change;
410 snd_i2c_lock(device->bus);
411 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
412 memcpy(status, ucontrol->value.iec958.status, 24);
413 if (change && (kcontrol->private_value ? runtime != NULL : runtime == NULL)) {
414 err = snd_cs8427_send_corudata(device, 0, status, 24);
415 if (err < 0)
416 change = err;
418 snd_i2c_unlock(device->bus);
419 return change;
422 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_info *uinfo)
425 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
426 uinfo->count = 1;
427 return 0;
430 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_value *ucontrol)
433 memset(ucontrol->value.iec958.status, 0xff, 24);
434 return 0;
437 static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
439 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
440 .info = snd_cs8427_in_status_info,
441 .name = "IEC958 CS8427 Input Status",
442 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
443 .get = snd_cs8427_in_status_get,
444 .private_value = 15,
447 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
448 .info = snd_cs8427_in_status_info,
449 .name = "IEC958 CS8427 Error Status",
450 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
451 .get = snd_cs8427_in_status_get,
452 .private_value = 16,
455 .access = SNDRV_CTL_ELEM_ACCESS_READ,
456 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
457 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
458 .info = snd_cs8427_spdif_mask_info,
459 .get = snd_cs8427_spdif_mask_get,
462 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
463 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
464 .info = snd_cs8427_spdif_info,
465 .get = snd_cs8427_spdif_get,
466 .put = snd_cs8427_spdif_put,
467 .private_value = 0
470 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
471 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
472 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
473 .info = snd_cs8427_spdif_info,
474 .get = snd_cs8427_spdif_get,
475 .put = snd_cs8427_spdif_put,
476 .private_value = 1
479 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
480 .info = snd_cs8427_qsubcode_info,
481 .name = "IEC958 Q-subcode Capture Default",
482 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
483 .get = snd_cs8427_qsubcode_get
486 int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
487 struct snd_pcm_substream *play_substream,
488 struct snd_pcm_substream *cap_substream)
490 struct cs8427 *chip = cs8427->private_data;
491 struct snd_kcontrol *kctl;
492 unsigned int idx;
493 int err;
495 snd_assert(play_substream && cap_substream, return -EINVAL);
496 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
497 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
498 if (kctl == NULL)
499 return -ENOMEM;
500 kctl->id.device = play_substream->pcm->device;
501 kctl->id.subdevice = play_substream->number;
502 err = snd_ctl_add(cs8427->bus->card, kctl);
503 if (err < 0)
504 return err;
505 if (!strcmp(kctl->id.name, SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
506 chip->playback.pcm_ctl = kctl;
509 chip->playback.substream = play_substream;
510 chip->capture.substream = cap_substream;
511 snd_assert(chip->playback.pcm_ctl, return -EIO);
512 return 0;
515 int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
517 struct cs8427 *chip;
519 snd_assert(cs8427, return -ENXIO);
520 chip = cs8427->private_data;
521 if (active)
522 memcpy(chip->playback.pcm_status, chip->playback.def_status, 24);
523 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
524 snd_ctl_notify(cs8427->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
525 SNDRV_CTL_EVENT_MASK_INFO, &chip->playback.pcm_ctl->id);
526 return 0;
529 int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
531 struct cs8427 *chip;
532 char *status;
533 int err, reset;
535 snd_assert(cs8427, return -ENXIO);
536 chip = cs8427->private_data;
537 status = chip->playback.pcm_status;
538 snd_i2c_lock(cs8427->bus);
539 if (status[0] & IEC958_AES0_PROFESSIONAL) {
540 status[0] &= ~IEC958_AES0_PRO_FS;
541 switch (rate) {
542 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
543 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
544 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
545 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
547 } else {
548 status[3] &= ~IEC958_AES3_CON_FS;
549 switch (rate) {
550 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
551 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
552 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
555 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
556 if (err > 0)
557 snd_ctl_notify(cs8427->bus->card,
558 SNDRV_CTL_EVENT_MASK_VALUE,
559 &chip->playback.pcm_ctl->id);
560 reset = chip->rate != rate;
561 chip->rate = rate;
562 snd_i2c_unlock(cs8427->bus);
563 if (reset)
564 snd_cs8427_reset(cs8427);
565 return err < 0 ? err : 0;
568 static int __init alsa_cs8427_module_init(void)
570 return 0;
573 static void __exit alsa_cs8427_module_exit(void)
577 module_init(alsa_cs8427_module_init)
578 module_exit(alsa_cs8427_module_exit)
580 EXPORT_SYMBOL(snd_cs8427_create);
581 EXPORT_SYMBOL(snd_cs8427_reset);
582 EXPORT_SYMBOL(snd_cs8427_reg_write);
583 EXPORT_SYMBOL(snd_cs8427_iec958_build);
584 EXPORT_SYMBOL(snd_cs8427_iec958_active);
585 EXPORT_SYMBOL(snd_cs8427_iec958_pcm);