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drm/i915/sdvo: Only enable HDMI encodings only if the commandset is supported
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blob843182528b798590d12e471d2c1f21ebc0c9c563
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
51
52
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61 };
62
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
65 struct intel_sdvo {
66 struct intel_encoder base;
67
68 struct i2c_adapter *i2c;
69 u8 slave_addr;
70
71 struct i2c_adapter ddc;
72
73 /* Register for the SDVO device: SDVOB or SDVOC */
74 int sdvo_reg;
75
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
78
79 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
83 struct intel_sdvo_caps caps;
84
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
87
88 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
94 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
103 /* This is for current tv format name */
104 int tv_format_index;
105
106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
110 bool has_hdmi_monitor;
111 bool has_hdmi_audio;
112
113 /**
114 * This is set if we detect output of sdvo device as LVDS and
115 * have a valid fixed mode to use with the panel.
116 */
117 bool is_lvds;
118
119 /**
120 * This is sdvo fixed pannel mode pointer
121 */
122 struct drm_display_mode *sdvo_lvds_fixed_mode;
123
124 /* DDC bus used by this SDVO encoder */
125 uint8_t ddc_bus;
126
127 /* Input timings for adjusted_mode */
128 struct intel_sdvo_dtd input_dtd;
129 };
130
131 struct intel_sdvo_connector {
132 struct intel_connector base;
133
134 /* Mark the type of connector */
135 uint16_t output_flag;
136
137 int force_audio;
138
139 /* This contains all current supported TV format */
140 u8 tv_format_supported[TV_FORMAT_NUM];
141 int format_supported_num;
142 struct drm_property *tv_format;
143
144 struct drm_property *force_audio_property;
145
146 /* add the property for the SDVO-TV */
147 struct drm_property *left;
148 struct drm_property *right;
149 struct drm_property *top;
150 struct drm_property *bottom;
151 struct drm_property *hpos;
152 struct drm_property *vpos;
153 struct drm_property *contrast;
154 struct drm_property *saturation;
155 struct drm_property *hue;
156 struct drm_property *sharpness;
157 struct drm_property *flicker_filter;
158 struct drm_property *flicker_filter_adaptive;
159 struct drm_property *flicker_filter_2d;
160 struct drm_property *tv_chroma_filter;
161 struct drm_property *tv_luma_filter;
162 struct drm_property *dot_crawl;
163
164 /* add the property for the SDVO-TV/LVDS */
165 struct drm_property *brightness;
166
167 /* Add variable to record current setting for the above property */
168 u32 left_margin, right_margin, top_margin, bottom_margin;
169
170 /* this is to get the range of margin.*/
171 u32 max_hscan, max_vscan;
172 u32 max_hpos, cur_hpos;
173 u32 max_vpos, cur_vpos;
174 u32 cur_brightness, max_brightness;
175 u32 cur_contrast, max_contrast;
176 u32 cur_saturation, max_saturation;
177 u32 cur_hue, max_hue;
178 u32 cur_sharpness, max_sharpness;
179 u32 cur_flicker_filter, max_flicker_filter;
180 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
181 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
182 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
183 u32 cur_tv_luma_filter, max_tv_luma_filter;
184 u32 cur_dot_crawl, max_dot_crawl;
185 };
186
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
188 {
189 return container_of(encoder, struct intel_sdvo, base.base);
190 }
191
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193 {
194 return container_of(intel_attached_encoder(connector),
195 struct intel_sdvo, base);
196 }
197
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199 {
200 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
201 }
202
203 static bool
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
205 static bool
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector,
208 int type);
209 static bool
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector);
212
213 /**
214 * Writes the SDVOB or SDVOC with the given value, but always writes both
215 * SDVOB and SDVOC to work around apparent hardware issues (according to
216 * comments in the BIOS).
217 */
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
219 {
220 struct drm_device *dev = intel_sdvo->base.base.dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
222 u32 bval = val, cval = val;
223 int i;
224
225 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226 I915_WRITE(intel_sdvo->sdvo_reg, val);
227 I915_READ(intel_sdvo->sdvo_reg);
228 return;
229 }
230
231 if (intel_sdvo->sdvo_reg == SDVOB) {
232 cval = I915_READ(SDVOC);
233 } else {
234 bval = I915_READ(SDVOB);
235 }
236 /*
237 * Write the registers twice for luck. Sometimes,
238 * writing them only once doesn't appear to 'stick'.
239 * The BIOS does this too. Yay, magic
240 */
241 for (i = 0; i < 2; i++)
242 {
243 I915_WRITE(SDVOB, bval);
244 I915_READ(SDVOB);
245 I915_WRITE(SDVOC, cval);
246 I915_READ(SDVOC);
247 }
248 }
249
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
251 {
252 struct i2c_msg msgs[] = {
253 {
254 .addr = intel_sdvo->slave_addr,
255 .flags = 0,
256 .len = 1,
257 .buf = &addr,
258 },
259 {
260 .addr = intel_sdvo->slave_addr,
261 .flags = I2C_M_RD,
262 .len = 1,
263 .buf = ch,
264 }
265 };
266 int ret;
267
268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
269 return true;
270
271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
272 return false;
273 }
274
275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276 /** Mapping of command numbers to names, for debug output */
277 static const struct _sdvo_cmd_name {
278 u8 cmd;
279 const char *name;
280 } sdvo_cmd_names[] = {
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
324
325 /* Add the op code for SDVO enhancements */
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
370
371 /* HDMI op code */
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
392 };
393
394 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
396
397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
398 const void *args, int args_len)
399 {
400 int i;
401
402 DRM_DEBUG_KMS("%s: W: %02X ",
403 SDVO_NAME(intel_sdvo), cmd);
404 for (i = 0; i < args_len; i++)
405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
406 for (; i < 8; i++)
407 DRM_LOG_KMS(" ");
408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
409 if (cmd == sdvo_cmd_names[i].cmd) {
410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
411 break;
412 }
413 }
414 if (i == ARRAY_SIZE(sdvo_cmd_names))
415 DRM_LOG_KMS("(%02X)", cmd);
416 DRM_LOG_KMS("\n");
417 }
418
419 static const char *cmd_status_names[] = {
420 "Power on",
421 "Success",
422 "Not supported",
423 "Invalid arg",
424 "Pending",
425 "Target not specified",
426 "Scaling not supported"
427 };
428
429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430 const void *args, int args_len)
431 {
432 u8 buf[args_len*2 + 2], status;
433 struct i2c_msg msgs[args_len + 3];
434 int i, ret;
435
436 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
437
438 for (i = 0; i < args_len; i++) {
439 msgs[i].addr = intel_sdvo->slave_addr;
440 msgs[i].flags = 0;
441 msgs[i].len = 2;
442 msgs[i].buf = buf + 2 *i;
443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444 buf[2*i + 1] = ((u8*)args)[i];
445 }
446 msgs[i].addr = intel_sdvo->slave_addr;
447 msgs[i].flags = 0;
448 msgs[i].len = 2;
449 msgs[i].buf = buf + 2*i;
450 buf[2*i + 0] = SDVO_I2C_OPCODE;
451 buf[2*i + 1] = cmd;
452
453 /* the following two are to read the response */
454 status = SDVO_I2C_CMD_STATUS;
455 msgs[i+1].addr = intel_sdvo->slave_addr;
456 msgs[i+1].flags = 0;
457 msgs[i+1].len = 1;
458 msgs[i+1].buf = &status;
459
460 msgs[i+2].addr = intel_sdvo->slave_addr;
461 msgs[i+2].flags = I2C_M_RD;
462 msgs[i+2].len = 1;
463 msgs[i+2].buf = &status;
464
465 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
466 if (ret < 0) {
467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
468 return false;
469 }
470 if (ret != i+3) {
471 /* failure in I2C transfer */
472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
473 return false;
474 }
475
476 i = 3;
477 while (status == SDVO_CMD_STATUS_PENDING && i--) {
478 if (!intel_sdvo_read_byte(intel_sdvo,
479 SDVO_I2C_CMD_STATUS,
480 &status))
481 return false;
482 }
483 if (status != SDVO_CMD_STATUS_SUCCESS) {
484 DRM_DEBUG_KMS("command returns response %s [%d]\n",
485 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
486 status);
487 return false;
488 }
489
490 return true;
491 }
492
493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
495 {
496 u8 retry = 5;
497 u8 status;
498 int i;
499
500 /*
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
505 *
506 * Check 5 times in case the hardware failed to read the docs.
507 */
508 do {
509 if (!intel_sdvo_read_byte(intel_sdvo,
510 SDVO_I2C_CMD_STATUS,
511 &status))
512 return false;
513 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
514
515 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
518 else
519 DRM_LOG_KMS("(??? %d)", status);
520
521 if (status != SDVO_CMD_STATUS_SUCCESS)
522 goto log_fail;
523
524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
529 goto log_fail;
530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
531 }
532 DRM_LOG_KMS("\n");
533 return true;
534
535 log_fail:
536 DRM_LOG_KMS("\n");
537 return false;
538 }
539
540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
541 {
542 if (mode->clock >= 100000)
543 return 1;
544 else if (mode->clock >= 50000)
545 return 2;
546 else
547 return 4;
548 }
549
550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551 u8 ddc_bus)
552 {
553 return intel_sdvo_write_cmd(intel_sdvo,
554 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
555 &ddc_bus, 1);
556 }
557
558 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
559 {
560 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
561 }
562
563 static bool
564 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
565 {
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
567 return false;
568
569 return intel_sdvo_read_response(intel_sdvo, value, len);
570 }
571
572 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
573 {
574 struct intel_sdvo_set_target_input_args targets = {0};
575 return intel_sdvo_set_value(intel_sdvo,
576 SDVO_CMD_SET_TARGET_INPUT,
577 &targets, sizeof(targets));
578 }
579
580 /**
581 * Return whether each input is trained.
582 *
583 * This function is making an assumption about the layout of the response,
584 * which should be checked against the docs.
585 */
586 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
587 {
588 struct intel_sdvo_get_trained_inputs_response response;
589
590 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591 &response, sizeof(response)))
592 return false;
593
594 *input_1 = response.input0_trained;
595 *input_2 = response.input1_trained;
596 return true;
597 }
598
599 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
600 u16 outputs)
601 {
602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_ACTIVE_OUTPUTS,
604 &outputs, sizeof(outputs));
605 }
606
607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
608 int mode)
609 {
610 u8 state = SDVO_ENCODER_STATE_ON;
611
612 switch (mode) {
613 case DRM_MODE_DPMS_ON:
614 state = SDVO_ENCODER_STATE_ON;
615 break;
616 case DRM_MODE_DPMS_STANDBY:
617 state = SDVO_ENCODER_STATE_STANDBY;
618 break;
619 case DRM_MODE_DPMS_SUSPEND:
620 state = SDVO_ENCODER_STATE_SUSPEND;
621 break;
622 case DRM_MODE_DPMS_OFF:
623 state = SDVO_ENCODER_STATE_OFF;
624 break;
625 }
626
627 return intel_sdvo_set_value(intel_sdvo,
628 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 }
630
631 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
632 int *clock_min,
633 int *clock_max)
634 {
635 struct intel_sdvo_pixel_clock_range clocks;
636
637 if (!intel_sdvo_get_value(intel_sdvo,
638 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
639 &clocks, sizeof(clocks)))
640 return false;
641
642 /* Convert the values from units of 10 kHz to kHz. */
643 *clock_min = clocks.min * 10;
644 *clock_max = clocks.max * 10;
645 return true;
646 }
647
648 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
649 u16 outputs)
650 {
651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_TARGET_OUTPUT,
653 &outputs, sizeof(outputs));
654 }
655
656 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
657 struct intel_sdvo_dtd *dtd)
658 {
659 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
660 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
661 }
662
663 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
664 struct intel_sdvo_dtd *dtd)
665 {
666 return intel_sdvo_set_timing(intel_sdvo,
667 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
668 }
669
670 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
671 struct intel_sdvo_dtd *dtd)
672 {
673 return intel_sdvo_set_timing(intel_sdvo,
674 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
675 }
676
677 static bool
678 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
679 uint16_t clock,
680 uint16_t width,
681 uint16_t height)
682 {
683 struct intel_sdvo_preferred_input_timing_args args;
684
685 memset(&args, 0, sizeof(args));
686 args.clock = clock;
687 args.width = width;
688 args.height = height;
689 args.interlace = 0;
690
691 if (intel_sdvo->is_lvds &&
692 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
693 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
694 args.scaled = 1;
695
696 return intel_sdvo_set_value(intel_sdvo,
697 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
698 &args, sizeof(args));
699 }
700
701 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
702 struct intel_sdvo_dtd *dtd)
703 {
704 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
705 &dtd->part1, sizeof(dtd->part1)) &&
706 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
707 &dtd->part2, sizeof(dtd->part2));
708 }
709
710 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
711 {
712 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
713 }
714
715 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
716 const struct drm_display_mode *mode)
717 {
718 uint16_t width, height;
719 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
720 uint16_t h_sync_offset, v_sync_offset;
721
722 width = mode->crtc_hdisplay;
723 height = mode->crtc_vdisplay;
724
725 /* do some mode translations */
726 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
727 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
728
729 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
730 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
731
732 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
733 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
734
735 dtd->part1.clock = mode->clock / 10;
736 dtd->part1.h_active = width & 0xff;
737 dtd->part1.h_blank = h_blank_len & 0xff;
738 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
739 ((h_blank_len >> 8) & 0xf);
740 dtd->part1.v_active = height & 0xff;
741 dtd->part1.v_blank = v_blank_len & 0xff;
742 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
743 ((v_blank_len >> 8) & 0xf);
744
745 dtd->part2.h_sync_off = h_sync_offset & 0xff;
746 dtd->part2.h_sync_width = h_sync_len & 0xff;
747 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
748 (v_sync_len & 0xf);
749 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
750 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
751 ((v_sync_len & 0x30) >> 4);
752
753 dtd->part2.dtd_flags = 0x18;
754 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
755 dtd->part2.dtd_flags |= 0x2;
756 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
757 dtd->part2.dtd_flags |= 0x4;
758
759 dtd->part2.sdvo_flags = 0;
760 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
761 dtd->part2.reserved = 0;
762 }
763
764 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
765 const struct intel_sdvo_dtd *dtd)
766 {
767 mode->hdisplay = dtd->part1.h_active;
768 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
769 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
770 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
771 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
772 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
773 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
774 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
775
776 mode->vdisplay = dtd->part1.v_active;
777 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
778 mode->vsync_start = mode->vdisplay;
779 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
780 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
781 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
782 mode->vsync_end = mode->vsync_start +
783 (dtd->part2.v_sync_off_width & 0xf);
784 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
785 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
786 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
787
788 mode->clock = dtd->part1.clock * 10;
789
790 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
791 if (dtd->part2.dtd_flags & 0x2)
792 mode->flags |= DRM_MODE_FLAG_PHSYNC;
793 if (dtd->part2.dtd_flags & 0x4)
794 mode->flags |= DRM_MODE_FLAG_PVSYNC;
795 }
796
797 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
798 {
799 struct intel_sdvo_encode encode;
800
801 return intel_sdvo_get_value(intel_sdvo,
802 SDVO_CMD_GET_SUPP_ENCODE,
803 &encode, sizeof(encode));
804 }
805
806 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
807 uint8_t mode)
808 {
809 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
810 }
811
812 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
813 uint8_t mode)
814 {
815 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
816 }
817
818 #if 0
819 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
820 {
821 int i, j;
822 uint8_t set_buf_index[2];
823 uint8_t av_split;
824 uint8_t buf_size;
825 uint8_t buf[48];
826 uint8_t *pos;
827
828 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
829
830 for (i = 0; i <= av_split; i++) {
831 set_buf_index[0] = i; set_buf_index[1] = 0;
832 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
833 set_buf_index, 2);
834 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
835 intel_sdvo_read_response(encoder, &buf_size, 1);
836
837 pos = buf;
838 for (j = 0; j <= buf_size; j += 8) {
839 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
840 NULL, 0);
841 intel_sdvo_read_response(encoder, pos, 8);
842 pos += 8;
843 }
844 }
845 }
846 #endif
847
848 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
849 {
850 struct dip_infoframe avi_if = {
851 .type = DIP_TYPE_AVI,
852 .ver = DIP_VERSION_AVI,
853 .len = DIP_LEN_AVI,
854 };
855 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
856 uint8_t set_buf_index[2] = { 1, 0 };
857 uint64_t *data = (uint64_t *)&avi_if;
858 unsigned i;
859
860 intel_dip_infoframe_csum(&avi_if);
861
862 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
863 set_buf_index, 2))
864 return false;
865
866 for (i = 0; i < sizeof(avi_if); i += 8) {
867 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
868 data, 8))
869 return false;
870 data++;
871 }
872
873 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
874 &tx_rate, 1);
875 }
876
877 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
878 {
879 struct intel_sdvo_tv_format format;
880 uint32_t format_map;
881
882 format_map = 1 << intel_sdvo->tv_format_index;
883 memset(&format, 0, sizeof(format));
884 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
885
886 BUILD_BUG_ON(sizeof(format) != 6);
887 return intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_TV_FORMAT,
889 &format, sizeof(format));
890 }
891
892 static bool
893 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
894 struct drm_display_mode *mode)
895 {
896 struct intel_sdvo_dtd output_dtd;
897
898 if (!intel_sdvo_set_target_output(intel_sdvo,
899 intel_sdvo->attached_output))
900 return false;
901
902 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
903 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
904 return false;
905
906 return true;
907 }
908
909 static bool
910 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
911 struct drm_display_mode *mode,
912 struct drm_display_mode *adjusted_mode)
913 {
914 /* Reset the input timing to the screen. Assume always input 0. */
915 if (!intel_sdvo_set_target_input(intel_sdvo))
916 return false;
917
918 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
919 mode->clock / 10,
920 mode->hdisplay,
921 mode->vdisplay))
922 return false;
923
924 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
925 &intel_sdvo->input_dtd))
926 return false;
927
928 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
929
930 drm_mode_set_crtcinfo(adjusted_mode, 0);
931 return true;
932 }
933
934 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
935 struct drm_display_mode *mode,
936 struct drm_display_mode *adjusted_mode)
937 {
938 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
939 int multiplier;
940
941 /* We need to construct preferred input timings based on our
942 * output timings. To do that, we have to set the output
943 * timings, even though this isn't really the right place in
944 * the sequence to do it. Oh well.
945 */
946 if (intel_sdvo->is_tv) {
947 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
948 return false;
949
950 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
951 mode,
952 adjusted_mode);
953 } else if (intel_sdvo->is_lvds) {
954 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
955 intel_sdvo->sdvo_lvds_fixed_mode))
956 return false;
957
958 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
959 mode,
960 adjusted_mode);
961 }
962
963 /* Make the CRTC code factor in the SDVO pixel multiplier. The
964 * SDVO device will factor out the multiplier during mode_set.
965 */
966 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
967 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
968
969 return true;
970 }
971
972 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
973 struct drm_display_mode *mode,
974 struct drm_display_mode *adjusted_mode)
975 {
976 struct drm_device *dev = encoder->dev;
977 struct drm_i915_private *dev_priv = dev->dev_private;
978 struct drm_crtc *crtc = encoder->crtc;
979 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
981 u32 sdvox;
982 struct intel_sdvo_in_out_map in_out;
983 struct intel_sdvo_dtd input_dtd;
984 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
985 int rate;
986
987 if (!mode)
988 return;
989
990 /* First, set the input mapping for the first input to our controlled
991 * output. This is only correct if we're a single-input device, in
992 * which case the first input is the output from the appropriate SDVO
993 * channel on the motherboard. In a two-input device, the first input
994 * will be SDVOB and the second SDVOC.
995 */
996 in_out.in0 = intel_sdvo->attached_output;
997 in_out.in1 = 0;
998
999 intel_sdvo_set_value(intel_sdvo,
1000 SDVO_CMD_SET_IN_OUT_MAP,
1001 &in_out, sizeof(in_out));
1002
1003 /* Set the output timings to the screen */
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1006 return;
1007
1008 /* We have tried to get input timing in mode_fixup, and filled into
1009 * adjusted_mode.
1010 */
1011 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1012 input_dtd = intel_sdvo->input_dtd;
1013 } else {
1014 /* Set the output timing to the screen */
1015 if (!intel_sdvo_set_target_output(intel_sdvo,
1016 intel_sdvo->attached_output))
1017 return;
1018
1019 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1020 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1021 }
1022
1023 /* Set the input timing to the screen. Assume always input 0. */
1024 if (!intel_sdvo_set_target_input(intel_sdvo))
1025 return;
1026
1027 if (intel_sdvo->has_hdmi_monitor &&
1028 !intel_sdvo_set_avi_infoframe(intel_sdvo))
1029 return;
1030
1031 if (intel_sdvo->is_tv &&
1032 !intel_sdvo_set_tv_format(intel_sdvo))
1033 return;
1034
1035 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1036
1037 switch (pixel_multiplier) {
1038 default:
1039 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1040 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1041 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1042 }
1043 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1044 return;
1045
1046 /* Set the SDVO control regs. */
1047 if (INTEL_INFO(dev)->gen >= 4) {
1048 sdvox = SDVO_BORDER_ENABLE;
1049 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1050 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1051 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1052 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1053 } else {
1054 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1055 switch (intel_sdvo->sdvo_reg) {
1056 case SDVOB:
1057 sdvox &= SDVOB_PRESERVE_MASK;
1058 break;
1059 case SDVOC:
1060 sdvox &= SDVOC_PRESERVE_MASK;
1061 break;
1062 }
1063 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1064 }
1065 if (intel_crtc->pipe == 1)
1066 sdvox |= SDVO_PIPE_B_SELECT;
1067 if (intel_sdvo->has_hdmi_audio)
1068 sdvox |= SDVO_AUDIO_ENABLE;
1069
1070 if (INTEL_INFO(dev)->gen >= 4) {
1071 /* done in crtc_mode_set as the dpll_md reg must be written early */
1072 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1073 /* done in crtc_mode_set as it lives inside the dpll register */
1074 } else {
1075 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1076 }
1077
1078 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1079 sdvox |= SDVO_STALL_SELECT;
1080 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1081 }
1082
1083 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1084 {
1085 struct drm_device *dev = encoder->dev;
1086 struct drm_i915_private *dev_priv = dev->dev_private;
1087 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1088 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1089 u32 temp;
1090
1091 if (mode != DRM_MODE_DPMS_ON) {
1092 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1093 if (0)
1094 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1095
1096 if (mode == DRM_MODE_DPMS_OFF) {
1097 temp = I915_READ(intel_sdvo->sdvo_reg);
1098 if ((temp & SDVO_ENABLE) != 0) {
1099 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1100 }
1101 }
1102 } else {
1103 bool input1, input2;
1104 int i;
1105 u8 status;
1106
1107 temp = I915_READ(intel_sdvo->sdvo_reg);
1108 if ((temp & SDVO_ENABLE) == 0)
1109 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1110 for (i = 0; i < 2; i++)
1111 intel_wait_for_vblank(dev, intel_crtc->pipe);
1112
1113 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1114 /* Warn if the device reported failure to sync.
1115 * A lot of SDVO devices fail to notify of sync, but it's
1116 * a given it the status is a success, we succeeded.
1117 */
1118 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1119 DRM_DEBUG_KMS("First %s output reported failure to "
1120 "sync\n", SDVO_NAME(intel_sdvo));
1121 }
1122
1123 if (0)
1124 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1125 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1126 }
1127 return;
1128 }
1129
1130 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1131 struct drm_display_mode *mode)
1132 {
1133 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1134
1135 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1136 return MODE_NO_DBLESCAN;
1137
1138 if (intel_sdvo->pixel_clock_min > mode->clock)
1139 return MODE_CLOCK_LOW;
1140
1141 if (intel_sdvo->pixel_clock_max < mode->clock)
1142 return MODE_CLOCK_HIGH;
1143
1144 if (intel_sdvo->is_lvds) {
1145 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1146 return MODE_PANEL;
1147
1148 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1149 return MODE_PANEL;
1150 }
1151
1152 return MODE_OK;
1153 }
1154
1155 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1156 {
1157 if (!intel_sdvo_get_value(intel_sdvo,
1158 SDVO_CMD_GET_DEVICE_CAPS,
1159 caps, sizeof(*caps)))
1160 return false;
1161
1162 DRM_DEBUG_KMS("SDVO capabilities:\n"
1163 " vendor_id: %d\n"
1164 " device_id: %d\n"
1165 " device_rev_id: %d\n"
1166 " sdvo_version_major: %d\n"
1167 " sdvo_version_minor: %d\n"
1168 " sdvo_inputs_mask: %d\n"
1169 " smooth_scaling: %d\n"
1170 " sharp_scaling: %d\n"
1171 " up_scaling: %d\n"
1172 " down_scaling: %d\n"
1173 " stall_support: %d\n"
1174 " output_flags: %d\n",
1175 caps->vendor_id,
1176 caps->device_id,
1177 caps->device_rev_id,
1178 caps->sdvo_version_major,
1179 caps->sdvo_version_minor,
1180 caps->sdvo_inputs_mask,
1181 caps->smooth_scaling,
1182 caps->sharp_scaling,
1183 caps->up_scaling,
1184 caps->down_scaling,
1185 caps->stall_support,
1186 caps->output_flags);
1187
1188 return true;
1189 }
1190
1191 /* No use! */
1192 #if 0
1193 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1194 {
1195 struct drm_connector *connector = NULL;
1196 struct intel_sdvo *iout = NULL;
1197 struct intel_sdvo *sdvo;
1198
1199 /* find the sdvo connector */
1200 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1201 iout = to_intel_sdvo(connector);
1202
1203 if (iout->type != INTEL_OUTPUT_SDVO)
1204 continue;
1205
1206 sdvo = iout->dev_priv;
1207
1208 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1209 return connector;
1210
1211 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1212 return connector;
1213
1214 }
1215
1216 return NULL;
1217 }
1218
1219 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1220 {
1221 u8 response[2];
1222 u8 status;
1223 struct intel_sdvo *intel_sdvo;
1224 DRM_DEBUG_KMS("\n");
1225
1226 if (!connector)
1227 return 0;
1228
1229 intel_sdvo = to_intel_sdvo(connector);
1230
1231 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1232 &response, 2) && response[0];
1233 }
1234
1235 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1236 {
1237 u8 response[2];
1238 u8 status;
1239 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1240
1241 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1242 intel_sdvo_read_response(intel_sdvo, &response, 2);
1243
1244 if (on) {
1245 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1246 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1247
1248 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1249 } else {
1250 response[0] = 0;
1251 response[1] = 0;
1252 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1253 }
1254
1255 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1256 intel_sdvo_read_response(intel_sdvo, &response, 2);
1257 }
1258 #endif
1259
1260 static bool
1261 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1262 {
1263 int caps = 0;
1264
1265 if (intel_sdvo->caps.output_flags &
1266 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1267 caps++;
1268 if (intel_sdvo->caps.output_flags &
1269 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1270 caps++;
1271 if (intel_sdvo->caps.output_flags &
1272 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1273 caps++;
1274 if (intel_sdvo->caps.output_flags &
1275 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1276 caps++;
1277 if (intel_sdvo->caps.output_flags &
1278 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1279 caps++;
1280
1281 if (intel_sdvo->caps.output_flags &
1282 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1283 caps++;
1284
1285 if (intel_sdvo->caps.output_flags &
1286 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1287 caps++;
1288
1289 return (caps > 1);
1290 }
1291
1292 static struct edid *
1293 intel_sdvo_get_edid(struct drm_connector *connector)
1294 {
1295 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1296 return drm_get_edid(connector, &sdvo->ddc);
1297 }
1298
1299 static struct drm_connector *
1300 intel_find_analog_connector(struct drm_device *dev)
1301 {
1302 struct drm_connector *connector;
1303 struct intel_sdvo *encoder;
1304
1305 list_for_each_entry(encoder,
1306 &dev->mode_config.encoder_list,
1307 base.base.head) {
1308 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1309 list_for_each_entry(connector,
1310 &dev->mode_config.connector_list,
1311 head) {
1312 if (&encoder->base ==
1313 intel_attached_encoder(connector))
1314 return connector;
1315 }
1316 }
1317 }
1318
1319 return NULL;
1320 }
1321
1322 static int
1323 intel_analog_is_connected(struct drm_device *dev)
1324 {
1325 struct drm_connector *analog_connector;
1326
1327 analog_connector = intel_find_analog_connector(dev);
1328 if (!analog_connector)
1329 return false;
1330
1331 if (analog_connector->funcs->detect(analog_connector, false) ==
1332 connector_status_disconnected)
1333 return false;
1334
1335 return true;
1336 }
1337
1338 /* Mac mini hack -- use the same DDC as the analog connector */
1339 static struct edid *
1340 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1341 {
1342 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1343
1344 if (!intel_analog_is_connected(connector->dev))
1345 return NULL;
1346
1347 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1348 }
1349
1350 enum drm_connector_status
1351 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1352 {
1353 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1354 enum drm_connector_status status;
1355 struct edid *edid;
1356
1357 edid = intel_sdvo_get_edid(connector);
1358
1359 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1360 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1361
1362 /*
1363 * Don't use the 1 as the argument of DDC bus switch to get
1364 * the EDID. It is used for SDVO SPD ROM.
1365 */
1366 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1367 intel_sdvo->ddc_bus = ddc;
1368 edid = intel_sdvo_get_edid(connector);
1369 if (edid)
1370 break;
1371 }
1372 /*
1373 * If we found the EDID on the other bus,
1374 * assume that is the correct DDC bus.
1375 */
1376 if (edid == NULL)
1377 intel_sdvo->ddc_bus = saved_ddc;
1378 }
1379
1380 /*
1381 * When there is no edid and no monitor is connected with VGA
1382 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1383 */
1384 if (edid == NULL)
1385 edid = intel_sdvo_get_analog_edid(connector);
1386
1387 status = connector_status_unknown;
1388 if (edid != NULL) {
1389 /* DDC bus is shared, match EDID to connector type */
1390 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1391 status = connector_status_connected;
1392 if (intel_sdvo->is_hdmi) {
1393 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1394 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1395 }
1396 }
1397 connector->display_info.raw_edid = NULL;
1398 kfree(edid);
1399 }
1400
1401 if (status == connector_status_connected) {
1402 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1403 if (intel_sdvo_connector->force_audio)
1404 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1405 }
1406
1407 return status;
1408 }
1409
1410 static enum drm_connector_status
1411 intel_sdvo_detect(struct drm_connector *connector, bool force)
1412 {
1413 uint16_t response;
1414 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1415 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1416 enum drm_connector_status ret;
1417
1418 if (!intel_sdvo_write_cmd(intel_sdvo,
1419 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1420 return connector_status_unknown;
1421 if (intel_sdvo->is_tv) {
1422 /* add 30ms delay when the output type is SDVO-TV */
1423 mdelay(30);
1424 }
1425 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1426 return connector_status_unknown;
1427
1428 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1429 response & 0xff, response >> 8,
1430 intel_sdvo_connector->output_flag);
1431
1432 if (response == 0)
1433 return connector_status_disconnected;
1434
1435 intel_sdvo->attached_output = response;
1436
1437 if ((intel_sdvo_connector->output_flag & response) == 0)
1438 ret = connector_status_disconnected;
1439 else if (response & SDVO_TMDS_MASK)
1440 ret = intel_sdvo_hdmi_sink_detect(connector);
1441 else
1442 ret = connector_status_connected;
1443
1444 /* May update encoder flag for like clock for SDVO TV, etc.*/
1445 if (ret == connector_status_connected) {
1446 intel_sdvo->is_tv = false;
1447 intel_sdvo->is_lvds = false;
1448 intel_sdvo->base.needs_tv_clock = false;
1449
1450 if (response & SDVO_TV_MASK) {
1451 intel_sdvo->is_tv = true;
1452 intel_sdvo->base.needs_tv_clock = true;
1453 }
1454 if (response & SDVO_LVDS_MASK)
1455 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1456 }
1457
1458 return ret;
1459 }
1460
1461 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1462 {
1463 struct edid *edid;
1464
1465 /* set the bus switch and get the modes */
1466 edid = intel_sdvo_get_edid(connector);
1467
1468 /*
1469 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1470 * link between analog and digital outputs. So, if the regular SDVO
1471 * DDC fails, check to see if the analog output is disconnected, in
1472 * which case we'll look there for the digital DDC data.
1473 */
1474 if (edid == NULL)
1475 edid = intel_sdvo_get_analog_edid(connector);
1476
1477 if (edid != NULL) {
1478 drm_mode_connector_update_edid_property(connector, edid);
1479 drm_add_edid_modes(connector, edid);
1480 connector->display_info.raw_edid = NULL;
1481 kfree(edid);
1482 }
1483 }
1484
1485 /*
1486 * Set of SDVO TV modes.
1487 * Note! This is in reply order (see loop in get_tv_modes).
1488 * XXX: all 60Hz refresh?
1489 */
1490 struct drm_display_mode sdvo_tv_modes[] = {
1491 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1492 416, 0, 200, 201, 232, 233, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1495 416, 0, 240, 241, 272, 273, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1498 496, 0, 300, 301, 332, 333, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1501 736, 0, 350, 351, 382, 383, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1504 736, 0, 400, 401, 432, 433, 0,
1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1507 736, 0, 480, 481, 512, 513, 0,
1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1510 800, 0, 480, 481, 512, 513, 0,
1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1513 800, 0, 576, 577, 608, 609, 0,
1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1516 816, 0, 350, 351, 382, 383, 0,
1517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1519 816, 0, 400, 401, 432, 433, 0,
1520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1522 816, 0, 480, 481, 512, 513, 0,
1523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1525 816, 0, 540, 541, 572, 573, 0,
1526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1527 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1528 816, 0, 576, 577, 608, 609, 0,
1529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1530 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1531 864, 0, 576, 577, 608, 609, 0,
1532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1534 896, 0, 600, 601, 632, 633, 0,
1535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1536 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1537 928, 0, 624, 625, 656, 657, 0,
1538 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1539 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1540 1016, 0, 766, 767, 798, 799, 0,
1541 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1542 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1543 1120, 0, 768, 769, 800, 801, 0,
1544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1545 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1546 1376, 0, 1024, 1025, 1056, 1057, 0,
1547 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1548 };
1549
1550 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1551 {
1552 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1553 struct intel_sdvo_sdtv_resolution_request tv_res;
1554 uint32_t reply = 0, format_map = 0;
1555 int i;
1556
1557 /* Read the list of supported input resolutions for the selected TV
1558 * format.
1559 */
1560 format_map = 1 << intel_sdvo->tv_format_index;
1561 memcpy(&tv_res, &format_map,
1562 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1563
1564 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1565 return;
1566
1567 BUILD_BUG_ON(sizeof(tv_res) != 3);
1568 if (!intel_sdvo_write_cmd(intel_sdvo,
1569 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1570 &tv_res, sizeof(tv_res)))
1571 return;
1572 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1573 return;
1574
1575 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1576 if (reply & (1 << i)) {
1577 struct drm_display_mode *nmode;
1578 nmode = drm_mode_duplicate(connector->dev,
1579 &sdvo_tv_modes[i]);
1580 if (nmode)
1581 drm_mode_probed_add(connector, nmode);
1582 }
1583 }
1584
1585 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1586 {
1587 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1588 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1589 struct drm_display_mode *newmode;
1590
1591 /*
1592 * Attempt to get the mode list from DDC.
1593 * Assume that the preferred modes are
1594 * arranged in priority order.
1595 */
1596 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1597 if (list_empty(&connector->probed_modes) == false)
1598 goto end;
1599
1600 /* Fetch modes from VBT */
1601 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1602 newmode = drm_mode_duplicate(connector->dev,
1603 dev_priv->sdvo_lvds_vbt_mode);
1604 if (newmode != NULL) {
1605 /* Guarantee the mode is preferred */
1606 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1607 DRM_MODE_TYPE_DRIVER);
1608 drm_mode_probed_add(connector, newmode);
1609 }
1610 }
1611
1612 end:
1613 list_for_each_entry(newmode, &connector->probed_modes, head) {
1614 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1615 intel_sdvo->sdvo_lvds_fixed_mode =
1616 drm_mode_duplicate(connector->dev, newmode);
1617
1618 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1619 0);
1620
1621 intel_sdvo->is_lvds = true;
1622 break;
1623 }
1624 }
1625
1626 }
1627
1628 static int intel_sdvo_get_modes(struct drm_connector *connector)
1629 {
1630 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1631
1632 if (IS_TV(intel_sdvo_connector))
1633 intel_sdvo_get_tv_modes(connector);
1634 else if (IS_LVDS(intel_sdvo_connector))
1635 intel_sdvo_get_lvds_modes(connector);
1636 else
1637 intel_sdvo_get_ddc_modes(connector);
1638
1639 return !list_empty(&connector->probed_modes);
1640 }
1641
1642 static void
1643 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1644 {
1645 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1646 struct drm_device *dev = connector->dev;
1647
1648 if (intel_sdvo_connector->left)
1649 drm_property_destroy(dev, intel_sdvo_connector->left);
1650 if (intel_sdvo_connector->right)
1651 drm_property_destroy(dev, intel_sdvo_connector->right);
1652 if (intel_sdvo_connector->top)
1653 drm_property_destroy(dev, intel_sdvo_connector->top);
1654 if (intel_sdvo_connector->bottom)
1655 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1656 if (intel_sdvo_connector->hpos)
1657 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1658 if (intel_sdvo_connector->vpos)
1659 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1660 if (intel_sdvo_connector->saturation)
1661 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1662 if (intel_sdvo_connector->contrast)
1663 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1664 if (intel_sdvo_connector->hue)
1665 drm_property_destroy(dev, intel_sdvo_connector->hue);
1666 if (intel_sdvo_connector->sharpness)
1667 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1668 if (intel_sdvo_connector->flicker_filter)
1669 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1670 if (intel_sdvo_connector->flicker_filter_2d)
1671 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1672 if (intel_sdvo_connector->flicker_filter_adaptive)
1673 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1674 if (intel_sdvo_connector->tv_luma_filter)
1675 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1676 if (intel_sdvo_connector->tv_chroma_filter)
1677 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1678 if (intel_sdvo_connector->dot_crawl)
1679 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1680 if (intel_sdvo_connector->brightness)
1681 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1682 }
1683
1684 static void intel_sdvo_destroy(struct drm_connector *connector)
1685 {
1686 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1687
1688 if (intel_sdvo_connector->tv_format)
1689 drm_property_destroy(connector->dev,
1690 intel_sdvo_connector->tv_format);
1691
1692 intel_sdvo_destroy_enhance_property(connector);
1693 drm_sysfs_connector_remove(connector);
1694 drm_connector_cleanup(connector);
1695 kfree(connector);
1696 }
1697
1698 static int
1699 intel_sdvo_set_property(struct drm_connector *connector,
1700 struct drm_property *property,
1701 uint64_t val)
1702 {
1703 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1704 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1705 uint16_t temp_value;
1706 uint8_t cmd;
1707 int ret;
1708
1709 ret = drm_connector_property_set_value(connector, property, val);
1710 if (ret)
1711 return ret;
1712
1713 if (property == intel_sdvo_connector->force_audio_property) {
1714 if (val == intel_sdvo_connector->force_audio)
1715 return 0;
1716
1717 intel_sdvo_connector->force_audio = val;
1718
1719 if (val > 0 && intel_sdvo->has_hdmi_audio)
1720 return 0;
1721 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1722 return 0;
1723
1724 intel_sdvo->has_hdmi_audio = val > 0;
1725 goto done;
1726 }
1727
1728 #define CHECK_PROPERTY(name, NAME) \
1729 if (intel_sdvo_connector->name == property) { \
1730 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1731 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1732 cmd = SDVO_CMD_SET_##NAME; \
1733 intel_sdvo_connector->cur_##name = temp_value; \
1734 goto set_value; \
1735 }
1736
1737 if (property == intel_sdvo_connector->tv_format) {
1738 if (val >= TV_FORMAT_NUM)
1739 return -EINVAL;
1740
1741 if (intel_sdvo->tv_format_index ==
1742 intel_sdvo_connector->tv_format_supported[val])
1743 return 0;
1744
1745 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1746 goto done;
1747 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1748 temp_value = val;
1749 if (intel_sdvo_connector->left == property) {
1750 drm_connector_property_set_value(connector,
1751 intel_sdvo_connector->right, val);
1752 if (intel_sdvo_connector->left_margin == temp_value)
1753 return 0;
1754
1755 intel_sdvo_connector->left_margin = temp_value;
1756 intel_sdvo_connector->right_margin = temp_value;
1757 temp_value = intel_sdvo_connector->max_hscan -
1758 intel_sdvo_connector->left_margin;
1759 cmd = SDVO_CMD_SET_OVERSCAN_H;
1760 goto set_value;
1761 } else if (intel_sdvo_connector->right == property) {
1762 drm_connector_property_set_value(connector,
1763 intel_sdvo_connector->left, val);
1764 if (intel_sdvo_connector->right_margin == temp_value)
1765 return 0;
1766
1767 intel_sdvo_connector->left_margin = temp_value;
1768 intel_sdvo_connector->right_margin = temp_value;
1769 temp_value = intel_sdvo_connector->max_hscan -
1770 intel_sdvo_connector->left_margin;
1771 cmd = SDVO_CMD_SET_OVERSCAN_H;
1772 goto set_value;
1773 } else if (intel_sdvo_connector->top == property) {
1774 drm_connector_property_set_value(connector,
1775 intel_sdvo_connector->bottom, val);
1776 if (intel_sdvo_connector->top_margin == temp_value)
1777 return 0;
1778
1779 intel_sdvo_connector->top_margin = temp_value;
1780 intel_sdvo_connector->bottom_margin = temp_value;
1781 temp_value = intel_sdvo_connector->max_vscan -
1782 intel_sdvo_connector->top_margin;
1783 cmd = SDVO_CMD_SET_OVERSCAN_V;
1784 goto set_value;
1785 } else if (intel_sdvo_connector->bottom == property) {
1786 drm_connector_property_set_value(connector,
1787 intel_sdvo_connector->top, val);
1788 if (intel_sdvo_connector->bottom_margin == temp_value)
1789 return 0;
1790
1791 intel_sdvo_connector->top_margin = temp_value;
1792 intel_sdvo_connector->bottom_margin = temp_value;
1793 temp_value = intel_sdvo_connector->max_vscan -
1794 intel_sdvo_connector->top_margin;
1795 cmd = SDVO_CMD_SET_OVERSCAN_V;
1796 goto set_value;
1797 }
1798 CHECK_PROPERTY(hpos, HPOS)
1799 CHECK_PROPERTY(vpos, VPOS)
1800 CHECK_PROPERTY(saturation, SATURATION)
1801 CHECK_PROPERTY(contrast, CONTRAST)
1802 CHECK_PROPERTY(hue, HUE)
1803 CHECK_PROPERTY(brightness, BRIGHTNESS)
1804 CHECK_PROPERTY(sharpness, SHARPNESS)
1805 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1806 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1807 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1808 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1809 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1810 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1811 }
1812
1813 return -EINVAL; /* unknown property */
1814
1815 set_value:
1816 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1817 return -EIO;
1818
1819
1820 done:
1821 if (intel_sdvo->base.base.crtc) {
1822 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1823 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1824 crtc->y, crtc->fb);
1825 }
1826
1827 return 0;
1828 #undef CHECK_PROPERTY
1829 }
1830
1831 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1832 .dpms = intel_sdvo_dpms,
1833 .mode_fixup = intel_sdvo_mode_fixup,
1834 .prepare = intel_encoder_prepare,
1835 .mode_set = intel_sdvo_mode_set,
1836 .commit = intel_encoder_commit,
1837 };
1838
1839 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1840 .dpms = drm_helper_connector_dpms,
1841 .detect = intel_sdvo_detect,
1842 .fill_modes = drm_helper_probe_single_connector_modes,
1843 .set_property = intel_sdvo_set_property,
1844 .destroy = intel_sdvo_destroy,
1845 };
1846
1847 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1848 .get_modes = intel_sdvo_get_modes,
1849 .mode_valid = intel_sdvo_mode_valid,
1850 .best_encoder = intel_best_encoder,
1851 };
1852
1853 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1854 {
1855 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1856
1857 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1858 drm_mode_destroy(encoder->dev,
1859 intel_sdvo->sdvo_lvds_fixed_mode);
1860
1861 i2c_del_adapter(&intel_sdvo->ddc);
1862 intel_encoder_destroy(encoder);
1863 }
1864
1865 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1866 .destroy = intel_sdvo_enc_destroy,
1867 };
1868
1869 static void
1870 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1871 {
1872 uint16_t mask = 0;
1873 unsigned int num_bits;
1874
1875 /* Make a mask of outputs less than or equal to our own priority in the
1876 * list.
1877 */
1878 switch (sdvo->controlled_output) {
1879 case SDVO_OUTPUT_LVDS1:
1880 mask |= SDVO_OUTPUT_LVDS1;
1881 case SDVO_OUTPUT_LVDS0:
1882 mask |= SDVO_OUTPUT_LVDS0;
1883 case SDVO_OUTPUT_TMDS1:
1884 mask |= SDVO_OUTPUT_TMDS1;
1885 case SDVO_OUTPUT_TMDS0:
1886 mask |= SDVO_OUTPUT_TMDS0;
1887 case SDVO_OUTPUT_RGB1:
1888 mask |= SDVO_OUTPUT_RGB1;
1889 case SDVO_OUTPUT_RGB0:
1890 mask |= SDVO_OUTPUT_RGB0;
1891 break;
1892 }
1893
1894 /* Count bits to find what number we are in the priority list. */
1895 mask &= sdvo->caps.output_flags;
1896 num_bits = hweight16(mask);
1897 /* If more than 3 outputs, default to DDC bus 3 for now. */
1898 if (num_bits > 3)
1899 num_bits = 3;
1900
1901 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1902 sdvo->ddc_bus = 1 << num_bits;
1903 }
1904
1905 /**
1906 * Choose the appropriate DDC bus for control bus switch command for this
1907 * SDVO output based on the controlled output.
1908 *
1909 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1910 * outputs, then LVDS outputs.
1911 */
1912 static void
1913 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1914 struct intel_sdvo *sdvo, u32 reg)
1915 {
1916 struct sdvo_device_mapping *mapping;
1917
1918 if (IS_SDVOB(reg))
1919 mapping = &(dev_priv->sdvo_mappings[0]);
1920 else
1921 mapping = &(dev_priv->sdvo_mappings[1]);
1922
1923 if (mapping->initialized)
1924 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1925 else
1926 intel_sdvo_guess_ddc_bus(sdvo);
1927 }
1928
1929 static void
1930 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1931 struct intel_sdvo *sdvo, u32 reg)
1932 {
1933 struct sdvo_device_mapping *mapping;
1934 u8 pin, speed;
1935
1936 if (IS_SDVOB(reg))
1937 mapping = &dev_priv->sdvo_mappings[0];
1938 else
1939 mapping = &dev_priv->sdvo_mappings[1];
1940
1941 pin = GMBUS_PORT_DPB;
1942 speed = GMBUS_RATE_1MHZ >> 8;
1943 if (mapping->initialized) {
1944 pin = mapping->i2c_pin;
1945 speed = mapping->i2c_speed;
1946 }
1947
1948 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1949 intel_gmbus_set_speed(sdvo->i2c, speed);
1950 intel_gmbus_force_bit(sdvo->i2c, true);
1951 }
1952
1953 static bool
1954 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1955 {
1956 int is_hdmi;
1957
1958 if (!intel_sdvo_check_supp_encode(intel_sdvo))
1959 return false;
1960
1961 if (!intel_sdvo_set_target_output(intel_sdvo,
1962 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
1963 return false;
1964
1965 is_hdmi = 0;
1966 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
1967 return false;
1968
1969 return !!is_hdmi;
1970 }
1971
1972 static u8
1973 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1974 {
1975 struct drm_i915_private *dev_priv = dev->dev_private;
1976 struct sdvo_device_mapping *my_mapping, *other_mapping;
1977
1978 if (IS_SDVOB(sdvo_reg)) {
1979 my_mapping = &dev_priv->sdvo_mappings[0];
1980 other_mapping = &dev_priv->sdvo_mappings[1];
1981 } else {
1982 my_mapping = &dev_priv->sdvo_mappings[1];
1983 other_mapping = &dev_priv->sdvo_mappings[0];
1984 }
1985
1986 /* If the BIOS described our SDVO device, take advantage of it. */
1987 if (my_mapping->slave_addr)
1988 return my_mapping->slave_addr;
1989
1990 /* If the BIOS only described a different SDVO device, use the
1991 * address that it isn't using.
1992 */
1993 if (other_mapping->slave_addr) {
1994 if (other_mapping->slave_addr == 0x70)
1995 return 0x72;
1996 else
1997 return 0x70;
1998 }
1999
2000 /* No SDVO device info is found for another DVO port,
2001 * so use mapping assumption we had before BIOS parsing.
2002 */
2003 if (IS_SDVOB(sdvo_reg))
2004 return 0x70;
2005 else
2006 return 0x72;
2007 }
2008
2009 static void
2010 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2011 struct intel_sdvo *encoder)
2012 {
2013 drm_connector_init(encoder->base.base.dev,
2014 &connector->base.base,
2015 &intel_sdvo_connector_funcs,
2016 connector->base.base.connector_type);
2017
2018 drm_connector_helper_add(&connector->base.base,
2019 &intel_sdvo_connector_helper_funcs);
2020
2021 connector->base.base.interlace_allowed = 0;
2022 connector->base.base.doublescan_allowed = 0;
2023 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2024
2025 intel_connector_attach_encoder(&connector->base, &encoder->base);
2026 drm_sysfs_connector_add(&connector->base.base);
2027 }
2028
2029 static void
2030 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2031 {
2032 struct drm_device *dev = connector->base.base.dev;
2033
2034 connector->force_audio_property =
2035 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2036 if (connector->force_audio_property) {
2037 connector->force_audio_property->values[0] = -1;
2038 connector->force_audio_property->values[1] = 1;
2039 drm_connector_attach_property(&connector->base.base,
2040 connector->force_audio_property, 0);
2041 }
2042 }
2043
2044 static bool
2045 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2046 {
2047 struct drm_encoder *encoder = &intel_sdvo->base.base;
2048 struct drm_connector *connector;
2049 struct intel_connector *intel_connector;
2050 struct intel_sdvo_connector *intel_sdvo_connector;
2051
2052 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2053 if (!intel_sdvo_connector)
2054 return false;
2055
2056 if (device == 0) {
2057 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2058 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2059 } else if (device == 1) {
2060 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2061 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2062 }
2063
2064 intel_connector = &intel_sdvo_connector->base;
2065 connector = &intel_connector->base;
2066 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2067 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2068 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2069
2070 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2071 /* enable hdmi encoding mode if supported */
2072 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2073 intel_sdvo_set_colorimetry(intel_sdvo,
2074 SDVO_COLORIMETRY_RGB256);
2075 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2076
2077 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2078 intel_sdvo->is_hdmi = true;
2079 }
2080 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2081 (1 << INTEL_ANALOG_CLONE_BIT));
2082
2083 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2084
2085 return true;
2086 }
2087
2088 static bool
2089 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2090 {
2091 struct drm_encoder *encoder = &intel_sdvo->base.base;
2092 struct drm_connector *connector;
2093 struct intel_connector *intel_connector;
2094 struct intel_sdvo_connector *intel_sdvo_connector;
2095
2096 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2097 if (!intel_sdvo_connector)
2098 return false;
2099
2100 intel_connector = &intel_sdvo_connector->base;
2101 connector = &intel_connector->base;
2102 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2103 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2104
2105 intel_sdvo->controlled_output |= type;
2106 intel_sdvo_connector->output_flag = type;
2107
2108 intel_sdvo->is_tv = true;
2109 intel_sdvo->base.needs_tv_clock = true;
2110 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2111
2112 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2113
2114 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2115 goto err;
2116
2117 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2118 goto err;
2119
2120 return true;
2121
2122 err:
2123 intel_sdvo_destroy(connector);
2124 return false;
2125 }
2126
2127 static bool
2128 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2129 {
2130 struct drm_encoder *encoder = &intel_sdvo->base.base;
2131 struct drm_connector *connector;
2132 struct intel_connector *intel_connector;
2133 struct intel_sdvo_connector *intel_sdvo_connector;
2134
2135 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2136 if (!intel_sdvo_connector)
2137 return false;
2138
2139 intel_connector = &intel_sdvo_connector->base;
2140 connector = &intel_connector->base;
2141 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2142 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2143 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2144
2145 if (device == 0) {
2146 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2147 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2148 } else if (device == 1) {
2149 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2150 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2151 }
2152
2153 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2154 (1 << INTEL_ANALOG_CLONE_BIT));
2155
2156 intel_sdvo_connector_init(intel_sdvo_connector,
2157 intel_sdvo);
2158 return true;
2159 }
2160
2161 static bool
2162 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2163 {
2164 struct drm_encoder *encoder = &intel_sdvo->base.base;
2165 struct drm_connector *connector;
2166 struct intel_connector *intel_connector;
2167 struct intel_sdvo_connector *intel_sdvo_connector;
2168
2169 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2170 if (!intel_sdvo_connector)
2171 return false;
2172
2173 intel_connector = &intel_sdvo_connector->base;
2174 connector = &intel_connector->base;
2175 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2176 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2177
2178 if (device == 0) {
2179 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2180 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2181 } else if (device == 1) {
2182 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2183 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2184 }
2185
2186 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2187 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2188
2189 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2190 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2191 goto err;
2192
2193 return true;
2194
2195 err:
2196 intel_sdvo_destroy(connector);
2197 return false;
2198 }
2199
2200 static bool
2201 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2202 {
2203 intel_sdvo->is_tv = false;
2204 intel_sdvo->base.needs_tv_clock = false;
2205 intel_sdvo->is_lvds = false;
2206
2207 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2208
2209 if (flags & SDVO_OUTPUT_TMDS0)
2210 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2211 return false;
2212
2213 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2214 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2215 return false;
2216
2217 /* TV has no XXX1 function block */
2218 if (flags & SDVO_OUTPUT_SVID0)
2219 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2220 return false;
2221
2222 if (flags & SDVO_OUTPUT_CVBS0)
2223 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2224 return false;
2225
2226 if (flags & SDVO_OUTPUT_RGB0)
2227 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2228 return false;
2229
2230 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2231 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2232 return false;
2233
2234 if (flags & SDVO_OUTPUT_LVDS0)
2235 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2236 return false;
2237
2238 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2239 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2240 return false;
2241
2242 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2243 unsigned char bytes[2];
2244
2245 intel_sdvo->controlled_output = 0;
2246 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2247 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2248 SDVO_NAME(intel_sdvo),
2249 bytes[0], bytes[1]);
2250 return false;
2251 }
2252 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2253
2254 return true;
2255 }
2256
2257 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2258 struct intel_sdvo_connector *intel_sdvo_connector,
2259 int type)
2260 {
2261 struct drm_device *dev = intel_sdvo->base.base.dev;
2262 struct intel_sdvo_tv_format format;
2263 uint32_t format_map, i;
2264
2265 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2266 return false;
2267
2268 if (!intel_sdvo_get_value(intel_sdvo,
2269 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2270 &format, sizeof(format)))
2271 return false;
2272
2273 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2274
2275 if (format_map == 0)
2276 return false;
2277
2278 intel_sdvo_connector->format_supported_num = 0;
2279 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2280 if (format_map & (1 << i))
2281 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2282
2283
2284 intel_sdvo_connector->tv_format =
2285 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2286 "mode", intel_sdvo_connector->format_supported_num);
2287 if (!intel_sdvo_connector->tv_format)
2288 return false;
2289
2290 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2291 drm_property_add_enum(
2292 intel_sdvo_connector->tv_format, i,
2293 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2294
2295 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2296 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2297 intel_sdvo_connector->tv_format, 0);
2298 return true;
2299
2300 }
2301
2302 #define ENHANCEMENT(name, NAME) do { \
2303 if (enhancements.name) { \
2304 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2305 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2306 return false; \
2307 intel_sdvo_connector->max_##name = data_value[0]; \
2308 intel_sdvo_connector->cur_##name = response; \
2309 intel_sdvo_connector->name = \
2310 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2311 if (!intel_sdvo_connector->name) return false; \
2312 intel_sdvo_connector->name->values[0] = 0; \
2313 intel_sdvo_connector->name->values[1] = data_value[0]; \
2314 drm_connector_attach_property(connector, \
2315 intel_sdvo_connector->name, \
2316 intel_sdvo_connector->cur_##name); \
2317 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2318 data_value[0], data_value[1], response); \
2319 } \
2320 } while(0)
2321
2322 static bool
2323 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2324 struct intel_sdvo_connector *intel_sdvo_connector,
2325 struct intel_sdvo_enhancements_reply enhancements)
2326 {
2327 struct drm_device *dev = intel_sdvo->base.base.dev;
2328 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2329 uint16_t response, data_value[2];
2330
2331 /* when horizontal overscan is supported, Add the left/right property */
2332 if (enhancements.overscan_h) {
2333 if (!intel_sdvo_get_value(intel_sdvo,
2334 SDVO_CMD_GET_MAX_OVERSCAN_H,
2335 &data_value, 4))
2336 return false;
2337
2338 if (!intel_sdvo_get_value(intel_sdvo,
2339 SDVO_CMD_GET_OVERSCAN_H,
2340 &response, 2))
2341 return false;
2342
2343 intel_sdvo_connector->max_hscan = data_value[0];
2344 intel_sdvo_connector->left_margin = data_value[0] - response;
2345 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2346 intel_sdvo_connector->left =
2347 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2348 "left_margin", 2);
2349 if (!intel_sdvo_connector->left)
2350 return false;
2351
2352 intel_sdvo_connector->left->values[0] = 0;
2353 intel_sdvo_connector->left->values[1] = data_value[0];
2354 drm_connector_attach_property(connector,
2355 intel_sdvo_connector->left,
2356 intel_sdvo_connector->left_margin);
2357
2358 intel_sdvo_connector->right =
2359 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2360 "right_margin", 2);
2361 if (!intel_sdvo_connector->right)
2362 return false;
2363
2364 intel_sdvo_connector->right->values[0] = 0;
2365 intel_sdvo_connector->right->values[1] = data_value[0];
2366 drm_connector_attach_property(connector,
2367 intel_sdvo_connector->right,
2368 intel_sdvo_connector->right_margin);
2369 DRM_DEBUG_KMS("h_overscan: max %d, "
2370 "default %d, current %d\n",
2371 data_value[0], data_value[1], response);
2372 }
2373
2374 if (enhancements.overscan_v) {
2375 if (!intel_sdvo_get_value(intel_sdvo,
2376 SDVO_CMD_GET_MAX_OVERSCAN_V,
2377 &data_value, 4))
2378 return false;
2379
2380 if (!intel_sdvo_get_value(intel_sdvo,
2381 SDVO_CMD_GET_OVERSCAN_V,
2382 &response, 2))
2383 return false;
2384
2385 intel_sdvo_connector->max_vscan = data_value[0];
2386 intel_sdvo_connector->top_margin = data_value[0] - response;
2387 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2388 intel_sdvo_connector->top =
2389 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2390 "top_margin", 2);
2391 if (!intel_sdvo_connector->top)
2392 return false;
2393
2394 intel_sdvo_connector->top->values[0] = 0;
2395 intel_sdvo_connector->top->values[1] = data_value[0];
2396 drm_connector_attach_property(connector,
2397 intel_sdvo_connector->top,
2398 intel_sdvo_connector->top_margin);
2399
2400 intel_sdvo_connector->bottom =
2401 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2402 "bottom_margin", 2);
2403 if (!intel_sdvo_connector->bottom)
2404 return false;
2405
2406 intel_sdvo_connector->bottom->values[0] = 0;
2407 intel_sdvo_connector->bottom->values[1] = data_value[0];
2408 drm_connector_attach_property(connector,
2409 intel_sdvo_connector->bottom,
2410 intel_sdvo_connector->bottom_margin);
2411 DRM_DEBUG_KMS("v_overscan: max %d, "
2412 "default %d, current %d\n",
2413 data_value[0], data_value[1], response);
2414 }
2415
2416 ENHANCEMENT(hpos, HPOS);
2417 ENHANCEMENT(vpos, VPOS);
2418 ENHANCEMENT(saturation, SATURATION);
2419 ENHANCEMENT(contrast, CONTRAST);
2420 ENHANCEMENT(hue, HUE);
2421 ENHANCEMENT(sharpness, SHARPNESS);
2422 ENHANCEMENT(brightness, BRIGHTNESS);
2423 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2424 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2425 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2426 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2427 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2428
2429 if (enhancements.dot_crawl) {
2430 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2431 return false;
2432
2433 intel_sdvo_connector->max_dot_crawl = 1;
2434 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2435 intel_sdvo_connector->dot_crawl =
2436 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2437 if (!intel_sdvo_connector->dot_crawl)
2438 return false;
2439
2440 intel_sdvo_connector->dot_crawl->values[0] = 0;
2441 intel_sdvo_connector->dot_crawl->values[1] = 1;
2442 drm_connector_attach_property(connector,
2443 intel_sdvo_connector->dot_crawl,
2444 intel_sdvo_connector->cur_dot_crawl);
2445 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2446 }
2447
2448 return true;
2449 }
2450
2451 static bool
2452 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2453 struct intel_sdvo_connector *intel_sdvo_connector,
2454 struct intel_sdvo_enhancements_reply enhancements)
2455 {
2456 struct drm_device *dev = intel_sdvo->base.base.dev;
2457 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2458 uint16_t response, data_value[2];
2459
2460 ENHANCEMENT(brightness, BRIGHTNESS);
2461
2462 return true;
2463 }
2464 #undef ENHANCEMENT
2465
2466 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2467 struct intel_sdvo_connector *intel_sdvo_connector)
2468 {
2469 union {
2470 struct intel_sdvo_enhancements_reply reply;
2471 uint16_t response;
2472 } enhancements;
2473
2474 enhancements.response = 0;
2475 intel_sdvo_get_value(intel_sdvo,
2476 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2477 &enhancements, sizeof(enhancements));
2478 if (enhancements.response == 0) {
2479 DRM_DEBUG_KMS("No enhancement is supported\n");
2480 return true;
2481 }
2482
2483 if (IS_TV(intel_sdvo_connector))
2484 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2485 else if(IS_LVDS(intel_sdvo_connector))
2486 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2487 else
2488 return true;
2489 }
2490
2491 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2492 struct i2c_msg *msgs,
2493 int num)
2494 {
2495 struct intel_sdvo *sdvo = adapter->algo_data;
2496
2497 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2498 return -EIO;
2499
2500 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2501 }
2502
2503 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2504 {
2505 struct intel_sdvo *sdvo = adapter->algo_data;
2506 return sdvo->i2c->algo->functionality(sdvo->i2c);
2507 }
2508
2509 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2510 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2511 .functionality = intel_sdvo_ddc_proxy_func
2512 };
2513
2514 static bool
2515 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2516 struct drm_device *dev)
2517 {
2518 sdvo->ddc.owner = THIS_MODULE;
2519 sdvo->ddc.class = I2C_CLASS_DDC;
2520 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2521 sdvo->ddc.dev.parent = &dev->pdev->dev;
2522 sdvo->ddc.algo_data = sdvo;
2523 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2524
2525 return i2c_add_adapter(&sdvo->ddc) == 0;
2526 }
2527
2528 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2529 {
2530 struct drm_i915_private *dev_priv = dev->dev_private;
2531 struct intel_encoder *intel_encoder;
2532 struct intel_sdvo *intel_sdvo;
2533 int i;
2534
2535 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2536 if (!intel_sdvo)
2537 return false;
2538
2539 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2540 kfree(intel_sdvo);
2541 return false;
2542 }
2543
2544 intel_sdvo->sdvo_reg = sdvo_reg;
2545
2546 intel_encoder = &intel_sdvo->base;
2547 intel_encoder->type = INTEL_OUTPUT_SDVO;
2548 /* encoder type will be decided later */
2549 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2550
2551 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2552 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2553
2554 /* Read the regs to test if we can talk to the device */
2555 for (i = 0; i < 0x40; i++) {
2556 u8 byte;
2557
2558 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2559 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2560 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2561 goto err;
2562 }
2563 }
2564
2565 if (IS_SDVOB(sdvo_reg))
2566 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2567 else
2568 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2569
2570 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2571
2572 /* In default case sdvo lvds is false */
2573 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2574 goto err;
2575
2576 if (intel_sdvo_output_setup(intel_sdvo,
2577 intel_sdvo->caps.output_flags) != true) {
2578 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2579 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2580 goto err;
2581 }
2582
2583 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2584
2585 /* Set the input timing to the screen. Assume always input 0. */
2586 if (!intel_sdvo_set_target_input(intel_sdvo))
2587 goto err;
2588
2589 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2590 &intel_sdvo->pixel_clock_min,
2591 &intel_sdvo->pixel_clock_max))
2592 goto err;
2593
2594 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2595 "clock range %dMHz - %dMHz, "
2596 "input 1: %c, input 2: %c, "
2597 "output 1: %c, output 2: %c\n",
2598 SDVO_NAME(intel_sdvo),
2599 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2600 intel_sdvo->caps.device_rev_id,
2601 intel_sdvo->pixel_clock_min / 1000,
2602 intel_sdvo->pixel_clock_max / 1000,
2603 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2604 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2605 /* check currently supported outputs */
2606 intel_sdvo->caps.output_flags &
2607 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2608 intel_sdvo->caps.output_flags &
2609 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2610 return true;
2611
2612 err:
2613 drm_encoder_cleanup(&intel_encoder->base);
2614 i2c_del_adapter(&intel_sdvo->ddc);
2615 kfree(intel_sdvo);
2616
2617 return false;
2618 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree