drm/vmwgfx: Implement basic pm operations.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / vmwgfx / vmwgfx_drv.c
blobdedd121d8fe7153381942922581a20e413037582
1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "drmP.h"
29 #include "vmwgfx_drv.h"
30 #include "ttm/ttm_placement.h"
31 #include "ttm/ttm_bo_driver.h"
32 #include "ttm/ttm_object.h"
33 #include "ttm/ttm_module.h"
35 #define VMWGFX_DRIVER_NAME "vmwgfx"
36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37 #define VMWGFX_CHIP_SVGAII 0
38 #define VMW_FB_RESERVATION 0
40 /**
41 * Fully encoded drm commands. Might move to vmw_drm.h
44 #define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47 #define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50 #define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53 #define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
57 #define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60 #define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63 #define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
67 #define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70 #define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73 #define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76 #define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79 #define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82 #define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85 #define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88 #define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
93 /**
94 * The core DRM version of this macro doesn't account for
95 * DRM_COMMAND_BASE.
98 #define VMW_IOCTL_DEF(ioctl, func, flags) \
99 [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
102 * Ioctl definitions.
105 static struct drm_ioctl_desc vmw_ioctls[] = {
106 VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
107 DRM_AUTH | DRM_UNLOCKED),
108 VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
109 DRM_AUTH | DRM_UNLOCKED),
110 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
111 DRM_AUTH | DRM_UNLOCKED),
112 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
113 vmw_kms_cursor_bypass_ioctl,
114 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
116 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
118 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
119 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
120 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
121 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
123 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
124 DRM_AUTH | DRM_UNLOCKED),
125 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
126 DRM_AUTH | DRM_UNLOCKED),
127 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
128 DRM_AUTH | DRM_UNLOCKED),
129 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
130 DRM_AUTH | DRM_UNLOCKED),
131 VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
132 DRM_AUTH | DRM_UNLOCKED),
133 VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
134 DRM_AUTH | DRM_UNLOCKED),
135 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
136 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
137 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
138 DRM_AUTH | DRM_UNLOCKED)
141 static struct pci_device_id vmw_pci_id_list[] = {
142 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
143 {0, 0, 0}
146 static char *vmw_devname = "vmwgfx";
148 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
149 static void vmw_master_init(struct vmw_master *);
150 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
151 void *ptr);
153 static void vmw_print_capabilities(uint32_t capabilities)
155 DRM_INFO("Capabilities:\n");
156 if (capabilities & SVGA_CAP_RECT_COPY)
157 DRM_INFO(" Rect copy.\n");
158 if (capabilities & SVGA_CAP_CURSOR)
159 DRM_INFO(" Cursor.\n");
160 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
161 DRM_INFO(" Cursor bypass.\n");
162 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
163 DRM_INFO(" Cursor bypass 2.\n");
164 if (capabilities & SVGA_CAP_8BIT_EMULATION)
165 DRM_INFO(" 8bit emulation.\n");
166 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
167 DRM_INFO(" Alpha cursor.\n");
168 if (capabilities & SVGA_CAP_3D)
169 DRM_INFO(" 3D.\n");
170 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
171 DRM_INFO(" Extended Fifo.\n");
172 if (capabilities & SVGA_CAP_MULTIMON)
173 DRM_INFO(" Multimon.\n");
174 if (capabilities & SVGA_CAP_PITCHLOCK)
175 DRM_INFO(" Pitchlock.\n");
176 if (capabilities & SVGA_CAP_IRQMASK)
177 DRM_INFO(" Irq mask.\n");
178 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
179 DRM_INFO(" Display Topology.\n");
180 if (capabilities & SVGA_CAP_GMR)
181 DRM_INFO(" GMR.\n");
182 if (capabilities & SVGA_CAP_TRACES)
183 DRM_INFO(" Traces.\n");
186 static int vmw_request_device(struct vmw_private *dev_priv)
188 int ret;
190 vmw_kms_save_vga(dev_priv);
192 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
193 if (unlikely(ret != 0)) {
194 DRM_ERROR("Unable to initialize FIFO.\n");
195 return ret;
198 return 0;
201 static void vmw_release_device(struct vmw_private *dev_priv)
203 vmw_fifo_release(dev_priv, &dev_priv->fifo);
204 vmw_kms_restore_vga(dev_priv);
208 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
210 struct vmw_private *dev_priv;
211 int ret;
213 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
214 if (unlikely(dev_priv == NULL)) {
215 DRM_ERROR("Failed allocating a device private struct.\n");
216 return -ENOMEM;
218 memset(dev_priv, 0, sizeof(*dev_priv));
220 dev_priv->dev = dev;
221 dev_priv->vmw_chipset = chipset;
222 dev_priv->last_read_sequence = (uint32_t) -100;
223 mutex_init(&dev_priv->hw_mutex);
224 mutex_init(&dev_priv->cmdbuf_mutex);
225 rwlock_init(&dev_priv->resource_lock);
226 idr_init(&dev_priv->context_idr);
227 idr_init(&dev_priv->surface_idr);
228 idr_init(&dev_priv->stream_idr);
229 ida_init(&dev_priv->gmr_ida);
230 mutex_init(&dev_priv->init_mutex);
231 init_waitqueue_head(&dev_priv->fence_queue);
232 init_waitqueue_head(&dev_priv->fifo_queue);
233 atomic_set(&dev_priv->fence_queue_waiters, 0);
234 atomic_set(&dev_priv->fifo_queue_waiters, 0);
235 INIT_LIST_HEAD(&dev_priv->gmr_lru);
237 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
238 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
239 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
241 mutex_lock(&dev_priv->hw_mutex);
242 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
244 if (dev_priv->capabilities & SVGA_CAP_GMR) {
245 dev_priv->max_gmr_descriptors =
246 vmw_read(dev_priv,
247 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
248 dev_priv->max_gmr_ids =
249 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
252 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
253 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
254 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
255 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
257 mutex_unlock(&dev_priv->hw_mutex);
259 vmw_print_capabilities(dev_priv->capabilities);
261 if (dev_priv->capabilities & SVGA_CAP_GMR) {
262 DRM_INFO("Max GMR ids is %u\n",
263 (unsigned)dev_priv->max_gmr_ids);
264 DRM_INFO("Max GMR descriptors is %u\n",
265 (unsigned)dev_priv->max_gmr_descriptors);
267 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
268 dev_priv->vram_start, dev_priv->vram_size / 1024);
269 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
270 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
272 ret = vmw_ttm_global_init(dev_priv);
273 if (unlikely(ret != 0))
274 goto out_err0;
277 vmw_master_init(&dev_priv->fbdev_master);
278 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
279 dev_priv->active_master = &dev_priv->fbdev_master;
282 ret = ttm_bo_device_init(&dev_priv->bdev,
283 dev_priv->bo_global_ref.ref.object,
284 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
285 false);
286 if (unlikely(ret != 0)) {
287 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
288 goto out_err1;
291 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
292 (dev_priv->vram_size >> PAGE_SHIFT));
293 if (unlikely(ret != 0)) {
294 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
295 goto out_err2;
298 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
299 dev_priv->mmio_size, DRM_MTRR_WC);
301 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
302 dev_priv->mmio_size);
304 if (unlikely(dev_priv->mmio_virt == NULL)) {
305 ret = -ENOMEM;
306 DRM_ERROR("Failed mapping MMIO.\n");
307 goto out_err3;
310 dev_priv->tdev = ttm_object_device_init
311 (dev_priv->mem_global_ref.object, 12);
313 if (unlikely(dev_priv->tdev == NULL)) {
314 DRM_ERROR("Unable to initialize TTM object management.\n");
315 ret = -ENOMEM;
316 goto out_err4;
319 dev->dev_private = dev_priv;
321 if (!dev->devname)
322 dev->devname = vmw_devname;
324 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
325 ret = drm_irq_install(dev);
326 if (unlikely(ret != 0)) {
327 DRM_ERROR("Failed installing irq: %d\n", ret);
328 goto out_no_irq;
332 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
333 dev_priv->stealth = (ret != 0);
334 if (dev_priv->stealth) {
336 * Request at least the mmio PCI resource.
339 DRM_INFO("It appears like vesafb is loaded. "
340 "Ignore above error if any. Entering stealth mode.\n");
341 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
342 if (unlikely(ret != 0)) {
343 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
344 goto out_no_device;
346 vmw_kms_init(dev_priv);
347 vmw_overlay_init(dev_priv);
348 } else {
349 ret = vmw_request_device(dev_priv);
350 if (unlikely(ret != 0))
351 goto out_no_device;
352 vmw_kms_init(dev_priv);
353 vmw_overlay_init(dev_priv);
354 vmw_fb_init(dev_priv);
357 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
358 register_pm_notifier(&dev_priv->pm_nb);
360 return 0;
362 out_no_device:
363 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
364 drm_irq_uninstall(dev_priv->dev);
365 if (dev->devname == vmw_devname)
366 dev->devname = NULL;
367 out_no_irq:
368 ttm_object_device_release(&dev_priv->tdev);
369 out_err4:
370 iounmap(dev_priv->mmio_virt);
371 out_err3:
372 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
373 dev_priv->mmio_size, DRM_MTRR_WC);
374 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
375 out_err2:
376 (void)ttm_bo_device_release(&dev_priv->bdev);
377 out_err1:
378 vmw_ttm_global_release(dev_priv);
379 out_err0:
380 ida_destroy(&dev_priv->gmr_ida);
381 idr_destroy(&dev_priv->surface_idr);
382 idr_destroy(&dev_priv->context_idr);
383 idr_destroy(&dev_priv->stream_idr);
384 kfree(dev_priv);
385 return ret;
388 static int vmw_driver_unload(struct drm_device *dev)
390 struct vmw_private *dev_priv = vmw_priv(dev);
392 DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
394 unregister_pm_notifier(&dev_priv->pm_nb);
396 if (!dev_priv->stealth) {
397 vmw_fb_close(dev_priv);
398 vmw_kms_close(dev_priv);
399 vmw_overlay_close(dev_priv);
400 vmw_release_device(dev_priv);
401 pci_release_regions(dev->pdev);
402 } else {
403 vmw_kms_close(dev_priv);
404 vmw_overlay_close(dev_priv);
405 pci_release_region(dev->pdev, 2);
407 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
408 drm_irq_uninstall(dev_priv->dev);
409 if (dev->devname == vmw_devname)
410 dev->devname = NULL;
411 ttm_object_device_release(&dev_priv->tdev);
412 iounmap(dev_priv->mmio_virt);
413 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
414 dev_priv->mmio_size, DRM_MTRR_WC);
415 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
416 (void)ttm_bo_device_release(&dev_priv->bdev);
417 vmw_ttm_global_release(dev_priv);
418 ida_destroy(&dev_priv->gmr_ida);
419 idr_destroy(&dev_priv->surface_idr);
420 idr_destroy(&dev_priv->context_idr);
421 idr_destroy(&dev_priv->stream_idr);
423 kfree(dev_priv);
425 return 0;
428 static void vmw_postclose(struct drm_device *dev,
429 struct drm_file *file_priv)
431 struct vmw_fpriv *vmw_fp;
433 vmw_fp = vmw_fpriv(file_priv);
434 ttm_object_file_release(&vmw_fp->tfile);
435 if (vmw_fp->locked_master)
436 drm_master_put(&vmw_fp->locked_master);
437 kfree(vmw_fp);
440 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
442 struct vmw_private *dev_priv = vmw_priv(dev);
443 struct vmw_fpriv *vmw_fp;
444 int ret = -ENOMEM;
446 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
447 if (unlikely(vmw_fp == NULL))
448 return ret;
450 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
451 if (unlikely(vmw_fp->tfile == NULL))
452 goto out_no_tfile;
454 file_priv->driver_priv = vmw_fp;
456 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
457 dev_priv->bdev.dev_mapping =
458 file_priv->filp->f_path.dentry->d_inode->i_mapping;
460 return 0;
462 out_no_tfile:
463 kfree(vmw_fp);
464 return ret;
467 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
468 unsigned long arg)
470 struct drm_file *file_priv = filp->private_data;
471 struct drm_device *dev = file_priv->minor->dev;
472 unsigned int nr = DRM_IOCTL_NR(cmd);
475 * Do extra checking on driver private ioctls.
478 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
479 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
480 struct drm_ioctl_desc *ioctl =
481 &vmw_ioctls[nr - DRM_COMMAND_BASE];
483 if (unlikely(ioctl->cmd != cmd)) {
484 DRM_ERROR("Invalid command format, ioctl %d\n",
485 nr - DRM_COMMAND_BASE);
486 return -EINVAL;
490 return drm_ioctl(filp, cmd, arg);
493 static int vmw_firstopen(struct drm_device *dev)
495 struct vmw_private *dev_priv = vmw_priv(dev);
496 dev_priv->is_opened = true;
498 return 0;
501 static void vmw_lastclose(struct drm_device *dev)
503 struct vmw_private *dev_priv = vmw_priv(dev);
504 struct drm_crtc *crtc;
505 struct drm_mode_set set;
506 int ret;
509 * Do nothing on the lastclose call from drm_unload.
512 if (!dev_priv->is_opened)
513 return;
515 dev_priv->is_opened = false;
516 set.x = 0;
517 set.y = 0;
518 set.fb = NULL;
519 set.mode = NULL;
520 set.connectors = NULL;
521 set.num_connectors = 0;
523 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
524 set.crtc = crtc;
525 ret = crtc->funcs->set_config(&set);
526 WARN_ON(ret != 0);
531 static void vmw_master_init(struct vmw_master *vmaster)
533 ttm_lock_init(&vmaster->lock);
536 static int vmw_master_create(struct drm_device *dev,
537 struct drm_master *master)
539 struct vmw_master *vmaster;
541 DRM_INFO("Master create.\n");
542 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
543 if (unlikely(vmaster == NULL))
544 return -ENOMEM;
546 ttm_lock_init(&vmaster->lock);
547 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
548 master->driver_priv = vmaster;
550 return 0;
553 static void vmw_master_destroy(struct drm_device *dev,
554 struct drm_master *master)
556 struct vmw_master *vmaster = vmw_master(master);
558 DRM_INFO("Master destroy.\n");
559 master->driver_priv = NULL;
560 kfree(vmaster);
564 static int vmw_master_set(struct drm_device *dev,
565 struct drm_file *file_priv,
566 bool from_open)
568 struct vmw_private *dev_priv = vmw_priv(dev);
569 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
570 struct vmw_master *active = dev_priv->active_master;
571 struct vmw_master *vmaster = vmw_master(file_priv->master);
572 int ret = 0;
574 DRM_INFO("Master set.\n");
575 if (dev_priv->stealth) {
576 ret = vmw_request_device(dev_priv);
577 if (unlikely(ret != 0))
578 return ret;
581 if (active) {
582 BUG_ON(active != &dev_priv->fbdev_master);
583 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
584 if (unlikely(ret != 0))
585 goto out_no_active_lock;
587 ttm_lock_set_kill(&active->lock, true, SIGTERM);
588 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
589 if (unlikely(ret != 0)) {
590 DRM_ERROR("Unable to clean VRAM on "
591 "master drop.\n");
594 dev_priv->active_master = NULL;
597 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
598 if (!from_open) {
599 ttm_vt_unlock(&vmaster->lock);
600 BUG_ON(vmw_fp->locked_master != file_priv->master);
601 drm_master_put(&vmw_fp->locked_master);
604 dev_priv->active_master = vmaster;
606 return 0;
608 out_no_active_lock:
609 vmw_release_device(dev_priv);
610 return ret;
613 static void vmw_master_drop(struct drm_device *dev,
614 struct drm_file *file_priv,
615 bool from_release)
617 struct vmw_private *dev_priv = vmw_priv(dev);
618 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
619 struct vmw_master *vmaster = vmw_master(file_priv->master);
620 int ret;
622 DRM_INFO("Master drop.\n");
625 * Make sure the master doesn't disappear while we have
626 * it locked.
629 vmw_fp->locked_master = drm_master_get(file_priv->master);
630 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
632 if (unlikely((ret != 0))) {
633 DRM_ERROR("Unable to lock TTM at VT switch.\n");
634 drm_master_put(&vmw_fp->locked_master);
637 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
639 if (dev_priv->stealth) {
640 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
641 if (unlikely(ret != 0))
642 DRM_ERROR("Unable to clean VRAM on master drop.\n");
643 vmw_release_device(dev_priv);
645 dev_priv->active_master = &dev_priv->fbdev_master;
646 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
647 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
649 if (!dev_priv->stealth)
650 vmw_fb_on(dev_priv);
654 static void vmw_remove(struct pci_dev *pdev)
656 struct drm_device *dev = pci_get_drvdata(pdev);
658 drm_put_dev(dev);
661 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
662 void *ptr)
664 struct vmw_private *dev_priv =
665 container_of(nb, struct vmw_private, pm_nb);
666 struct vmw_master *vmaster = dev_priv->active_master;
668 switch (val) {
669 case PM_HIBERNATION_PREPARE:
670 case PM_SUSPEND_PREPARE:
671 ttm_suspend_lock(&vmaster->lock);
674 * This empties VRAM and unbinds all GMR bindings.
675 * Buffer contents is moved to swappable memory.
677 ttm_bo_swapout_all(&dev_priv->bdev);
678 break;
679 case PM_POST_HIBERNATION:
680 case PM_POST_SUSPEND:
681 ttm_suspend_unlock(&vmaster->lock);
682 break;
683 case PM_RESTORE_PREPARE:
684 break;
685 case PM_POST_RESTORE:
686 break;
687 default:
688 break;
690 return 0;
694 * These might not be needed with the virtual SVGA device.
697 int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
699 pci_save_state(pdev);
700 pci_disable_device(pdev);
701 pci_set_power_state(pdev, PCI_D3hot);
702 return 0;
705 int vmw_pci_resume(struct pci_dev *pdev)
707 pci_set_power_state(pdev, PCI_D0);
708 pci_restore_state(pdev);
709 return pci_enable_device(pdev);
712 static struct drm_driver driver = {
713 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
714 DRIVER_MODESET,
715 .load = vmw_driver_load,
716 .unload = vmw_driver_unload,
717 .firstopen = vmw_firstopen,
718 .lastclose = vmw_lastclose,
719 .irq_preinstall = vmw_irq_preinstall,
720 .irq_postinstall = vmw_irq_postinstall,
721 .irq_uninstall = vmw_irq_uninstall,
722 .irq_handler = vmw_irq_handler,
723 .reclaim_buffers_locked = NULL,
724 .get_map_ofs = drm_core_get_map_ofs,
725 .get_reg_ofs = drm_core_get_reg_ofs,
726 .ioctls = vmw_ioctls,
727 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
728 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
729 .master_create = vmw_master_create,
730 .master_destroy = vmw_master_destroy,
731 .master_set = vmw_master_set,
732 .master_drop = vmw_master_drop,
733 .open = vmw_driver_open,
734 .postclose = vmw_postclose,
735 .fops = {
736 .owner = THIS_MODULE,
737 .open = drm_open,
738 .release = drm_release,
739 .unlocked_ioctl = vmw_unlocked_ioctl,
740 .mmap = vmw_mmap,
741 .poll = drm_poll,
742 .fasync = drm_fasync,
743 #if defined(CONFIG_COMPAT)
744 .compat_ioctl = drm_compat_ioctl,
745 #endif
747 .pci_driver = {
748 .name = VMWGFX_DRIVER_NAME,
749 .id_table = vmw_pci_id_list,
750 .probe = vmw_probe,
751 .remove = vmw_remove,
752 .suspend = vmw_pci_suspend,
753 .resume = vmw_pci_resume
755 .name = VMWGFX_DRIVER_NAME,
756 .desc = VMWGFX_DRIVER_DESC,
757 .date = VMWGFX_DRIVER_DATE,
758 .major = VMWGFX_DRIVER_MAJOR,
759 .minor = VMWGFX_DRIVER_MINOR,
760 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
763 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
765 return drm_get_dev(pdev, ent, &driver);
768 static int __init vmwgfx_init(void)
770 int ret;
771 ret = drm_init(&driver);
772 if (ret)
773 DRM_ERROR("Failed initializing DRM.\n");
774 return ret;
777 static void __exit vmwgfx_exit(void)
779 drm_exit(&driver);
782 module_init(vmwgfx_init);
783 module_exit(vmwgfx_exit);
785 MODULE_AUTHOR("VMware Inc. and others");
786 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
787 MODULE_LICENSE("GPL and additional rights");