drivers/gpu/drm/nouveau/nv50_sor.c

   1 /*
   2  * Copyright (C) 2008 Maarten Maathuis.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "drmP.h"
  28 #include "drm_crtc_helper.h"
  29
  30 #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  31 #include "nouveau_reg.h"
  32 #include "nouveau_drv.h"
  33 #include "nouveau_dma.h"
  34 #include "nouveau_encoder.h"
  35 #include "nouveau_connector.h"
  36 #include "nouveau_crtc.h"
  37 #include "nv50_display.h"
  38
  39 static void
  40 nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
  41 {
  42         struct drm_device *dev = to_drm_encoder(nv_encoder)->dev;
  43         struct drm_nouveau_private *dev_priv = dev->dev_private;
  44         struct nouveau_channel *evo = dev_priv->evo;
  45         int ret;
  46
  47         NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  48
  49         ret = RING_SPACE(evo, 2);
  50         if (ret) {
  51                 NV_ERROR(dev, "no space while disconnecting SOR\n");
  52                 return;
  53         }
  54         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  55         OUT_RING(evo, 0);
  56 }
  57
  58 static void
  59 nv50_sor_dp_link_train(struct drm_encoder *encoder)
  60 {
  61         struct drm_device *dev = encoder->dev;
  62         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  63         struct bit_displayport_encoder_table *dpe;
  64         int dpe_headerlen;
  65
  66         dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
  67         if (!dpe) {
  68                 NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
  69                 return;
  70         }
  71
  72         if (dpe->script0) {
  73                 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
  74                 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
  75                                             nv_encoder->dcb);
  76         }
  77
  78         if (!nouveau_dp_link_train(encoder))
  79                 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
  80
  81         if (dpe->script1) {
  82                 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
  83                 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
  84                                             nv_encoder->dcb);
  85         }
  86 }
  87
  88 static void
  89 nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  90 {
  91         struct drm_device *dev = encoder->dev;
  92         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  93         struct drm_encoder *enc;
  94         uint32_t val;
  95         int or = nv_encoder->or;
  96
  97         NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
  98
  99         nv_encoder->last_dpms = mode;
 100         list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
 101                 struct nouveau_encoder *nvenc = nouveau_encoder(enc);
 102
 103                 if (nvenc == nv_encoder ||
 104                     nvenc->disconnect != nv50_sor_disconnect ||
 105                     nvenc->dcb->or != nv_encoder->dcb->or)
 106                         continue;
 107
 108                 if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
 109                         return;
 110         }
 111
 112         /* wait for it to be done */
 113         if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
 114                      NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
 115                 NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
 116                 NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
 117                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
 118         }
 119
 120         val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
 121
 122         if (mode == DRM_MODE_DPMS_ON)
 123                 val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 124         else
 125                 val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 126
 127         nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
 128                 NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
 129         if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
 130                      NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
 131                 NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
 132                 NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
 133                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
 134         }
 135
 136         if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON)
 137                 nv50_sor_dp_link_train(encoder);
 138 }
 139
 140 static void
 141 nv50_sor_save(struct drm_encoder *encoder)
 142 {
 143         NV_ERROR(encoder->dev, "!!\n");
 144 }
 145
 146 static void
 147 nv50_sor_restore(struct drm_encoder *encoder)
 148 {
 149         NV_ERROR(encoder->dev, "!!\n");
 150 }
 151
 152 static bool
 153 nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
 154                     struct drm_display_mode *adjusted_mode)
 155 {
 156         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 157         struct nouveau_connector *connector;
 158
 159         NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
 160
 161         connector = nouveau_encoder_connector_get(nv_encoder);
 162         if (!connector) {
 163                 NV_ERROR(encoder->dev, "Encoder has no connector\n");
 164                 return false;
 165         }
 166
 167         if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
 168              connector->native_mode) {
 169                 int id = adjusted_mode->base.id;
 170                 *adjusted_mode = *connector->native_mode;
 171                 adjusted_mode->base.id = id;
 172         }
 173
 174         return true;
 175 }
 176
 177 static void
 178 nv50_sor_prepare(struct drm_encoder *encoder)
 179 {
 180 }
 181
 182 static void
 183 nv50_sor_commit(struct drm_encoder *encoder)
 184 {
 185 }
 186
 187 static void
 188 nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 189                   struct drm_display_mode *adjusted_mode)
 190 {
 191         struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
 192         struct nouveau_channel *evo = dev_priv->evo;
 193         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 194         struct drm_device *dev = encoder->dev;
 195         struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
 196         uint32_t mode_ctl = 0;
 197         int ret;
 198
 199         NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
 200
 201         nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
 202
 203         switch (nv_encoder->dcb->type) {
 204         case OUTPUT_TMDS:
 205                 if (nv_encoder->dcb->sorconf.link & 1) {
 206                         if (adjusted_mode->clock < 165000)
 207                                 mode_ctl = 0x0100;
 208                         else
 209                                 mode_ctl = 0x0500;
 210                 } else
 211                         mode_ctl = 0x0200;
 212                 break;
 213         case OUTPUT_DP:
 214                 mode_ctl |= (nv_encoder->dp.mc_unknown << 16);
 215                 if (nv_encoder->dcb->sorconf.link & 1)
 216                         mode_ctl |= 0x00000800;
 217                 else
 218                         mode_ctl |= 0x00000900;
 219                 break;
 220         default:
 221                 break;
 222         }
 223
 224         if (crtc->index == 1)
 225                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
 226         else
 227                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
 228
 229         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 230                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
 231
 232         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 233                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
 234
 235         ret = RING_SPACE(evo, 2);
 236         if (ret) {
 237                 NV_ERROR(dev, "no space while connecting SOR\n");
 238                 return;
 239         }
 240         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
 241         OUT_RING(evo, mode_ctl);
 242 }
 243
 244 static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
 245         .dpms = nv50_sor_dpms,
 246         .save = nv50_sor_save,
 247         .restore = nv50_sor_restore,
 248         .mode_fixup = nv50_sor_mode_fixup,
 249         .prepare = nv50_sor_prepare,
 250         .commit = nv50_sor_commit,
 251         .mode_set = nv50_sor_mode_set,
 252         .detect = NULL
 253 };
 254
 255 static void
 256 nv50_sor_destroy(struct drm_encoder *encoder)
 257 {
 258         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 259
 260         if (!encoder)
 261                 return;
 262
 263         NV_DEBUG_KMS(encoder->dev, "\n");
 264
 265         drm_encoder_cleanup(encoder);
 266
 267         kfree(nv_encoder);
 268 }
 269
 270 static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
 271         .destroy = nv50_sor_destroy,
 272 };
 273
 274 int
 275 nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
 276 {
 277         struct nouveau_encoder *nv_encoder = NULL;
 278         struct drm_encoder *encoder;
 279         bool dum;
 280         int type;
 281
 282         NV_DEBUG_KMS(dev, "\n");
 283
 284         switch (entry->type) {
 285         case OUTPUT_TMDS:
 286                 NV_INFO(dev, "Detected a TMDS output\n");
 287                 type = DRM_MODE_ENCODER_TMDS;
 288                 break;
 289         case OUTPUT_LVDS:
 290                 NV_INFO(dev, "Detected a LVDS output\n");
 291                 type = DRM_MODE_ENCODER_LVDS;
 292
 293                 if (nouveau_bios_parse_lvds_table(dev, 0, &dum, &dum)) {
 294                         NV_ERROR(dev, "Failed parsing LVDS table\n");
 295                         return -EINVAL;
 296                 }
 297                 break;
 298         case OUTPUT_DP:
 299                 NV_INFO(dev, "Detected a DP output\n");
 300                 type = DRM_MODE_ENCODER_TMDS;
 301                 break;
 302         default:
 303                 return -EINVAL;
 304         }
 305
 306         nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
 307         if (!nv_encoder)
 308                 return -ENOMEM;
 309         encoder = to_drm_encoder(nv_encoder);
 310
 311         nv_encoder->dcb = entry;
 312         nv_encoder->or = ffs(entry->or) - 1;
 313
 314         nv_encoder->disconnect = nv50_sor_disconnect;
 315
 316         drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
 317         drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
 318
 319         encoder->possible_crtcs = entry->heads;
 320         encoder->possible_clones = 0;
 321
 322         if (nv_encoder->dcb->type == OUTPUT_DP) {
 323                 int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
 324                 uint32_t tmp;
 325
 326                 tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));
 327
 328                 switch ((tmp & 0x00000f00) >> 8) {
 329                 case 8:
 330                 case 9:
 331                         nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16;
 332                         tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
 333                         nv_encoder->dp.unk0 = tmp & 0x000001fc;
 334                         tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link));
 335                         nv_encoder->dp.unk1 = tmp & 0x010f7f3f;
 336                         break;
 337                 default:
 338                         break;
 339                 }
 340
 341                 if (!nv_encoder->dp.mc_unknown)
 342                         nv_encoder->dp.mc_unknown = 5;
 343         }
 344
 345         return 0;
 346 }