2 * arch/powerpc/platforms/pseries/xics.c
4 * Copyright 2000 IBM Corporation.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
14 #include <linux/types.h>
15 #include <linux/threads.h>
16 #include <linux/kernel.h>
17 #include <linux/irq.h>
18 #include <linux/smp.h>
19 #include <linux/interrupt.h>
20 #include <linux/signal.h>
21 #include <linux/init.h>
22 #include <linux/gfp.h>
23 #include <linux/radix-tree.h>
24 #include <linux/cpu.h>
26 #include <asm/firmware.h>
29 #include <asm/pgtable.h>
32 #include <asm/hvcall.h>
33 #include <asm/machdep.h>
34 #include <asm/i8259.h>
37 #include "plpar_wrappers.h"
40 #define XICS_IRQ_SPURIOUS 0
42 /* Want a priority other than 0. Various HW issues require this. */
43 #define DEFAULT_PRIORITY 5
46 * Mark IPIs as higher priority so we can take them inside interrupts that
47 * arent marked IRQF_DISABLED
49 #define IPI_PRIORITY 4
67 static struct xics_ipl __iomem
*xics_per_cpu
[NR_CPUS
];
69 static unsigned int default_server
= 0xFF;
70 static unsigned int default_distrib_server
= 0;
71 static unsigned int interrupt_server_size
= 8;
73 static struct irq_host
*xics_host
;
76 * XICS only has a single IPI, so encode the messages per CPU
78 struct xics_ipi_struct xics_ipi_message
[NR_CPUS
] __cacheline_aligned
;
80 /* RTAS service tokens */
81 static int ibm_get_xive
;
82 static int ibm_set_xive
;
83 static int ibm_int_on
;
84 static int ibm_int_off
;
87 /* Direct HW low level accessors */
90 static inline unsigned int direct_xirr_info_get(void)
92 int cpu
= smp_processor_id();
94 return in_be32(&xics_per_cpu
[cpu
]->xirr
.word
);
97 static inline void direct_xirr_info_set(int value
)
99 int cpu
= smp_processor_id();
101 out_be32(&xics_per_cpu
[cpu
]->xirr
.word
, value
);
104 static inline void direct_cppr_info(u8 value
)
106 int cpu
= smp_processor_id();
108 out_8(&xics_per_cpu
[cpu
]->xirr
.bytes
[0], value
);
111 static inline void direct_qirr_info(int n_cpu
, u8 value
)
113 out_8(&xics_per_cpu
[n_cpu
]->qirr
.bytes
[0], value
);
117 /* LPAR low level accessors */
120 static inline unsigned int lpar_xirr_info_get(void)
122 unsigned long lpar_rc
;
123 unsigned long return_value
;
125 lpar_rc
= plpar_xirr(&return_value
);
126 if (lpar_rc
!= H_SUCCESS
)
127 panic(" bad return code xirr - rc = %lx \n", lpar_rc
);
128 return (unsigned int)return_value
;
131 static inline void lpar_xirr_info_set(int value
)
133 unsigned long lpar_rc
;
134 unsigned long val64
= value
& 0xffffffff;
136 lpar_rc
= plpar_eoi(val64
);
137 if (lpar_rc
!= H_SUCCESS
)
138 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc
,
142 static inline void lpar_cppr_info(u8 value
)
144 unsigned long lpar_rc
;
146 lpar_rc
= plpar_cppr(value
);
147 if (lpar_rc
!= H_SUCCESS
)
148 panic("bad return code cppr - rc = %lx\n", lpar_rc
);
151 static inline void lpar_qirr_info(int n_cpu
, u8 value
)
153 unsigned long lpar_rc
;
155 lpar_rc
= plpar_ipi(get_hard_smp_processor_id(n_cpu
), value
);
156 if (lpar_rc
!= H_SUCCESS
)
157 panic("bad return code qirr - rc = %lx\n", lpar_rc
);
161 /* High level handlers and init code */
165 static int get_irq_server(unsigned int virq
, unsigned int strict_check
)
168 /* For the moment only implement delivery to all cpus or one cpu */
169 cpumask_t cpumask
= irq_desc
[virq
].affinity
;
170 cpumask_t tmp
= CPU_MASK_NONE
;
172 if (!distribute_irqs
)
173 return default_server
;
175 if (!cpus_equal(cpumask
, CPU_MASK_ALL
)) {
176 cpus_and(tmp
, cpu_online_map
, cpumask
);
178 server
= first_cpu(tmp
);
180 if (server
< NR_CPUS
)
181 return get_hard_smp_processor_id(server
);
187 if (cpus_equal(cpu_online_map
, cpu_present_map
))
188 return default_distrib_server
;
190 return default_server
;
193 static int get_irq_server(unsigned int virq
, unsigned int strict_check
)
195 return default_server
;
200 static void xics_unmask_irq(unsigned int virq
)
206 pr_debug("xics: unmask virq %d\n", virq
);
208 irq
= (unsigned int)irq_map
[virq
].hwirq
;
209 pr_debug(" -> map to hwirq 0x%x\n", irq
);
210 if (irq
== XICS_IPI
|| irq
== XICS_IRQ_SPURIOUS
)
213 server
= get_irq_server(virq
, 0);
215 call_status
= rtas_call(ibm_set_xive
, 3, 1, NULL
, irq
, server
,
217 if (call_status
!= 0) {
218 printk(KERN_ERR
"xics_enable_irq: irq=%u: ibm_set_xive "
219 "returned %d\n", irq
, call_status
);
220 printk("set_xive %x, server %x\n", ibm_set_xive
, server
);
224 /* Now unmask the interrupt (often a no-op) */
225 call_status
= rtas_call(ibm_int_on
, 1, 1, NULL
, irq
);
226 if (call_status
!= 0) {
227 printk(KERN_ERR
"xics_enable_irq: irq=%u: ibm_int_on "
228 "returned %d\n", irq
, call_status
);
233 static void xics_mask_real_irq(unsigned int irq
)
240 call_status
= rtas_call(ibm_int_off
, 1, 1, NULL
, irq
);
241 if (call_status
!= 0) {
242 printk(KERN_ERR
"xics_disable_real_irq: irq=%u: "
243 "ibm_int_off returned %d\n", irq
, call_status
);
247 /* Have to set XIVE to 0xff to be able to remove a slot */
248 call_status
= rtas_call(ibm_set_xive
, 3, 1, NULL
, irq
,
249 default_server
, 0xff);
250 if (call_status
!= 0) {
251 printk(KERN_ERR
"xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
252 " returned %d\n", irq
, call_status
);
257 static void xics_mask_irq(unsigned int virq
)
261 pr_debug("xics: mask virq %d\n", virq
);
263 irq
= (unsigned int)irq_map
[virq
].hwirq
;
264 if (irq
== XICS_IPI
|| irq
== XICS_IRQ_SPURIOUS
)
266 xics_mask_real_irq(irq
);
269 static unsigned int xics_startup(unsigned int virq
)
273 /* force a reverse mapping of the interrupt so it gets in the cache */
274 irq
= (unsigned int)irq_map
[virq
].hwirq
;
275 irq_radix_revmap(xics_host
, irq
);
278 xics_unmask_irq(virq
);
282 static void xics_eoi_direct(unsigned int virq
)
284 unsigned int irq
= (unsigned int)irq_map
[virq
].hwirq
;
287 direct_xirr_info_set((0xff << 24) | irq
);
291 static void xics_eoi_lpar(unsigned int virq
)
293 unsigned int irq
= (unsigned int)irq_map
[virq
].hwirq
;
296 lpar_xirr_info_set((0xff << 24) | irq
);
299 static inline unsigned int xics_remap_irq(unsigned int vec
)
305 if (vec
== XICS_IRQ_SPURIOUS
)
307 irq
= irq_radix_revmap(xics_host
, vec
);
308 if (likely(irq
!= NO_IRQ
))
311 printk(KERN_ERR
"Interrupt %u (real) is invalid,"
312 " disabling it.\n", vec
);
313 xics_mask_real_irq(vec
);
317 static unsigned int xics_get_irq_direct(void)
319 return xics_remap_irq(direct_xirr_info_get());
322 static unsigned int xics_get_irq_lpar(void)
324 return xics_remap_irq(lpar_xirr_info_get());
329 static irqreturn_t
xics_ipi_dispatch(int cpu
)
331 WARN_ON(cpu_is_offline(cpu
));
333 while (xics_ipi_message
[cpu
].value
) {
334 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION
,
335 &xics_ipi_message
[cpu
].value
)) {
337 smp_message_recv(PPC_MSG_CALL_FUNCTION
);
339 if (test_and_clear_bit(PPC_MSG_RESCHEDULE
,
340 &xics_ipi_message
[cpu
].value
)) {
342 smp_message_recv(PPC_MSG_RESCHEDULE
);
345 if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK
,
346 &xics_ipi_message
[cpu
].value
)) {
348 smp_message_recv(PPC_MSG_MIGRATE_TASK
);
351 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
352 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK
,
353 &xics_ipi_message
[cpu
].value
)) {
355 smp_message_recv(PPC_MSG_DEBUGGER_BREAK
);
362 static irqreturn_t
xics_ipi_action_direct(int irq
, void *dev_id
)
364 int cpu
= smp_processor_id();
366 direct_qirr_info(cpu
, 0xff);
368 return xics_ipi_dispatch(cpu
);
371 static irqreturn_t
xics_ipi_action_lpar(int irq
, void *dev_id
)
373 int cpu
= smp_processor_id();
375 lpar_qirr_info(cpu
, 0xff);
377 return xics_ipi_dispatch(cpu
);
380 void xics_cause_IPI(int cpu
)
382 if (firmware_has_feature(FW_FEATURE_LPAR
))
383 lpar_qirr_info(cpu
, IPI_PRIORITY
);
385 direct_qirr_info(cpu
, IPI_PRIORITY
);
388 #endif /* CONFIG_SMP */
390 static void xics_set_cpu_priority(unsigned char cppr
)
392 if (firmware_has_feature(FW_FEATURE_LPAR
))
393 lpar_cppr_info(cppr
);
395 direct_cppr_info(cppr
);
399 static void xics_set_affinity(unsigned int virq
, cpumask_t cpumask
)
406 irq
= (unsigned int)irq_map
[virq
].hwirq
;
407 if (irq
== XICS_IPI
|| irq
== XICS_IRQ_SPURIOUS
)
410 status
= rtas_call(ibm_get_xive
, 1, 3, xics_status
, irq
);
413 printk(KERN_ERR
"xics_set_affinity: irq=%u ibm,get-xive "
414 "returns %d\n", irq
, status
);
419 * For the moment only implement delivery to all cpus or one cpu.
420 * Get current irq_server for the given irq
422 irq_server
= get_irq_server(virq
, 1);
423 if (irq_server
== -1) {
425 cpumask_scnprintf(cpulist
, sizeof(cpulist
), cpumask
);
426 printk(KERN_WARNING
"xics_set_affinity: No online cpus in "
427 "the mask %s for irq %d\n", cpulist
, virq
);
431 status
= rtas_call(ibm_set_xive
, 3, 1, NULL
,
432 irq
, irq_server
, xics_status
[1]);
435 printk(KERN_ERR
"xics_set_affinity: irq=%u ibm,set-xive "
436 "returns %d\n", irq
, status
);
441 void xics_setup_cpu(void)
443 xics_set_cpu_priority(0xff);
446 * Put the calling processor into the GIQ. This is really only
447 * necessary from a secondary thread as the OF start-cpu interface
448 * performs this function for us on primary threads.
450 * XXX: undo of teardown on kexec needs this too, as may hotplug
452 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE
,
453 (1UL << interrupt_server_size
) - 1 - default_distrib_server
, 1);
457 static struct irq_chip xics_pic_direct
= {
458 .typename
= " XICS ",
459 .startup
= xics_startup
,
460 .mask
= xics_mask_irq
,
461 .unmask
= xics_unmask_irq
,
462 .eoi
= xics_eoi_direct
,
463 .set_affinity
= xics_set_affinity
467 static struct irq_chip xics_pic_lpar
= {
468 .typename
= " XICS ",
469 .startup
= xics_startup
,
470 .mask
= xics_mask_irq
,
471 .unmask
= xics_unmask_irq
,
472 .eoi
= xics_eoi_lpar
,
473 .set_affinity
= xics_set_affinity
477 static int xics_host_match(struct irq_host
*h
, struct device_node
*node
)
479 /* IBM machines have interrupt parents of various funky types for things
480 * like vdevices, events, etc... The trick we use here is to match
481 * everything here except the legacy 8259 which is compatible "chrp,iic"
483 return !of_device_is_compatible(node
, "chrp,iic");
486 static int xics_host_map_direct(struct irq_host
*h
, unsigned int virq
,
489 pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq
, hw
);
491 get_irq_desc(virq
)->status
|= IRQ_LEVEL
;
492 set_irq_chip_and_handler(virq
, &xics_pic_direct
, handle_fasteoi_irq
);
496 static int xics_host_map_lpar(struct irq_host
*h
, unsigned int virq
,
499 pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq
, hw
);
501 get_irq_desc(virq
)->status
|= IRQ_LEVEL
;
502 set_irq_chip_and_handler(virq
, &xics_pic_lpar
, handle_fasteoi_irq
);
506 static int xics_host_xlate(struct irq_host
*h
, struct device_node
*ct
,
507 u32
*intspec
, unsigned int intsize
,
508 irq_hw_number_t
*out_hwirq
, unsigned int *out_flags
)
511 /* Current xics implementation translates everything
512 * to level. It is not technically right for MSIs but this
513 * is irrelevant at this point. We might get smarter in the future
515 *out_hwirq
= intspec
[0];
516 *out_flags
= IRQ_TYPE_LEVEL_LOW
;
521 static struct irq_host_ops xics_host_direct_ops
= {
522 .match
= xics_host_match
,
523 .map
= xics_host_map_direct
,
524 .xlate
= xics_host_xlate
,
527 static struct irq_host_ops xics_host_lpar_ops
= {
528 .match
= xics_host_match
,
529 .map
= xics_host_map_lpar
,
530 .xlate
= xics_host_xlate
,
533 static void __init
xics_init_host(void)
535 struct irq_host_ops
*ops
;
537 if (firmware_has_feature(FW_FEATURE_LPAR
))
538 ops
= &xics_host_lpar_ops
;
540 ops
= &xics_host_direct_ops
;
541 xics_host
= irq_alloc_host(NULL
, IRQ_HOST_MAP_TREE
, 0, ops
,
543 BUG_ON(xics_host
== NULL
);
544 irq_set_default_host(xics_host
);
547 static void __init
xics_map_one_cpu(int hw_id
, unsigned long addr
,
553 /* This may look gross but it's good enough for now, we don't quite
554 * have a hard -> linux processor id matching.
556 for_each_possible_cpu(i
) {
559 if (hw_id
== get_hard_smp_processor_id(i
)) {
560 xics_per_cpu
[i
] = ioremap(addr
, size
);
567 xics_per_cpu
[0] = ioremap(addr
, size
);
568 #endif /* CONFIG_SMP */
571 static void __init
xics_init_one_node(struct device_node
*np
,
577 /* This code does the theorically broken assumption that the interrupt
578 * server numbers are the same as the hard CPU numbers.
579 * This happens to be the case so far but we are playing with fire...
580 * should be fixed one of these days. -BenH.
582 ireg
= of_get_property(np
, "ibm,interrupt-server-ranges", NULL
);
584 /* Do that ever happen ? we'll know soon enough... but even good'old
585 * f80 does have that property ..
587 WARN_ON(ireg
== NULL
);
590 * set node starting index for this node
594 ireg
= of_get_property(np
, "reg", &ilen
);
596 panic("xics_init_IRQ: can't find interrupt reg property");
598 while (ilen
>= (4 * sizeof(u32
))) {
599 unsigned long addr
, size
;
601 /* XXX Use proper OF parsing code here !!! */
602 addr
= (unsigned long)*ireg
++ << 32;
606 size
= (unsigned long)*ireg
++ << 32;
610 xics_map_one_cpu(*indx
, addr
, size
);
616 static void __init
xics_setup_8259_cascade(void)
618 struct device_node
*np
, *old
, *found
= NULL
;
621 unsigned long intack
= 0;
623 for_each_node_by_type(np
, "interrupt-controller")
624 if (of_device_is_compatible(np
, "chrp,iic")) {
629 printk(KERN_DEBUG
"xics: no ISA interrupt controller\n");
632 cascade
= irq_of_parse_and_map(found
, 0);
633 if (cascade
== NO_IRQ
) {
634 printk(KERN_ERR
"xics: failed to map cascade interrupt");
637 pr_debug("xics: cascade mapped to irq %d\n", cascade
);
639 for (old
= of_node_get(found
); old
!= NULL
; old
= np
) {
640 np
= of_get_parent(old
);
644 if (strcmp(np
->name
, "pci") != 0)
646 addrp
= of_get_property(np
, "8259-interrupt-acknowledge", NULL
);
649 naddr
= of_n_addr_cells(np
);
650 intack
= addrp
[naddr
-1];
652 intack
|= ((unsigned long)addrp
[naddr
-2]) << 32;
655 printk(KERN_DEBUG
"xics: PCI 8259 intack at 0x%016lx\n", intack
);
656 i8259_init(found
, intack
);
658 set_irq_chained_handler(cascade
, pseries_8259_cascade
);
661 static struct device_node
*cpuid_to_of_node(int cpu
)
663 struct device_node
*np
;
664 u32 hcpuid
= get_hard_smp_processor_id(cpu
);
666 for_each_node_by_type(np
, "cpu") {
670 intserv
= of_get_property(np
, "ibm,ppc-interrupt-server#s",
674 intserv
= of_get_property(np
, "reg", &len
);
676 i
= len
/ sizeof(u32
);
679 if (intserv
[i
] == hcpuid
)
686 void __init
xics_init_IRQ(void)
689 struct device_node
*np
;
691 const u32
*ireg
, *isize
;
695 ppc64_boot_msg(0x20, "XICS Init");
697 ibm_get_xive
= rtas_token("ibm,get-xive");
698 ibm_set_xive
= rtas_token("ibm,set-xive");
699 ibm_int_on
= rtas_token("ibm,int-on");
700 ibm_int_off
= rtas_token("ibm,int-off");
702 for_each_node_by_type(np
, "PowerPC-External-Interrupt-Presentation") {
704 if (firmware_has_feature(FW_FEATURE_LPAR
))
706 xics_init_one_node(np
, &indx
);
713 /* Find the server numbers for the boot cpu. */
714 np
= cpuid_to_of_node(boot_cpuid
);
716 ireg
= of_get_property(np
, "ibm,ppc-interrupt-gserver#s", &ilen
);
718 goto skip_gserver_check
;
719 i
= ilen
/ sizeof(int);
720 hcpuid
= get_hard_smp_processor_id(boot_cpuid
);
722 /* Global interrupt distribution server is specified in the last
723 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
724 * entry fom this property for current boot cpu id and use it as
725 * default distribution server
727 for (j
= 0; j
< i
; j
+= 2) {
728 if (ireg
[j
] == hcpuid
) {
729 default_server
= hcpuid
;
730 default_distrib_server
= ireg
[j
+1];
732 isize
= of_get_property(np
,
733 "ibm,interrupt-server#-size", NULL
);
735 interrupt_server_size
= *isize
;
741 if (firmware_has_feature(FW_FEATURE_LPAR
))
742 ppc_md
.get_irq
= xics_get_irq_lpar
;
744 ppc_md
.get_irq
= xics_get_irq_direct
;
748 xics_setup_8259_cascade();
750 ppc64_boot_msg(0x21, "XICS Done");
755 void xics_request_IPIs(void)
760 ipi
= irq_create_mapping(xics_host
, XICS_IPI
);
761 BUG_ON(ipi
== NO_IRQ
);
764 * IPIs are marked IRQF_DISABLED as they must run with irqs
767 set_irq_handler(ipi
, handle_percpu_irq
);
768 if (firmware_has_feature(FW_FEATURE_LPAR
))
769 rc
= request_irq(ipi
, xics_ipi_action_lpar
, IRQF_DISABLED
,
772 rc
= request_irq(ipi
, xics_ipi_action_direct
, IRQF_DISABLED
,
776 #endif /* CONFIG_SMP */
778 void xics_teardown_cpu(int secondary
)
780 int cpu
= smp_processor_id();
782 struct irq_desc
*desc
;
784 xics_set_cpu_priority(0);
789 if (firmware_has_feature(FW_FEATURE_LPAR
))
790 lpar_qirr_info(cpu
, 0xff);
792 direct_qirr_info(cpu
, 0xff);
795 * we need to EOI the IPI if we got here from kexec down IPI
797 * probably need to check all the other interrupts too
798 * should we be flagging idle loop instead?
799 * or creating some task to be scheduled?
802 ipi
= irq_find_mapping(xics_host
, XICS_IPI
);
803 if (ipi
== XICS_IRQ_SPURIOUS
)
805 desc
= get_irq_desc(ipi
);
806 if (desc
->chip
&& desc
->chip
->eoi
)
807 desc
->chip
->eoi(ipi
);
810 * Some machines need to have at least one cpu in the GIQ,
811 * so leave the master cpu in the group.
814 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE
,
815 (1UL << interrupt_server_size
) - 1 -
816 default_distrib_server
, 0);
819 #ifdef CONFIG_HOTPLUG_CPU
821 /* Interrupts are disabled. */
822 void xics_migrate_irqs_away(void)
825 int cpu
= smp_processor_id(), hw_cpu
= hard_smp_processor_id();
826 unsigned int irq
, virq
;
828 /* Reject any interrupt that was queued to us... */
829 xics_set_cpu_priority(0);
831 /* remove ourselves from the global interrupt queue */
832 status
= rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE
,
833 (1UL << interrupt_server_size
) - 1 - default_distrib_server
, 0);
836 /* Allow IPIs again... */
837 xics_set_cpu_priority(DEFAULT_PRIORITY
);
840 struct irq_desc
*desc
;
844 /* We cant set affinity on ISA interrupts */
845 if (virq
< NUM_ISA_INTERRUPTS
)
847 if (irq_map
[virq
].host
!= xics_host
)
849 irq
= (unsigned int)irq_map
[virq
].hwirq
;
850 /* We need to get IPIs still. */
851 if (irq
== XICS_IPI
|| irq
== XICS_IRQ_SPURIOUS
)
853 desc
= get_irq_desc(virq
);
855 /* We only need to migrate enabled IRQS */
856 if (desc
== NULL
|| desc
->chip
== NULL
857 || desc
->action
== NULL
858 || desc
->chip
->set_affinity
== NULL
)
861 spin_lock_irqsave(&desc
->lock
, flags
);
863 status
= rtas_call(ibm_get_xive
, 1, 3, xics_status
, irq
);
865 printk(KERN_ERR
"migrate_irqs_away: irq=%u "
866 "ibm,get-xive returns %d\n",
872 * We only support delivery to all cpus or to one cpu.
873 * The irq has to be migrated only in the single cpu
876 if (xics_status
[0] != hw_cpu
)
879 printk(KERN_WARNING
"IRQ %u affinity broken off cpu %u\n",
882 /* Reset affinity to all cpus */
883 desc
->chip
->set_affinity(virq
, CPU_MASK_ALL
);
884 irq_desc
[irq
].affinity
= CPU_MASK_ALL
;
886 spin_unlock_irqrestore(&desc
->lock
, flags
);