arch/x86/include/asm/ipi.h

   1 #ifndef _ASM_X86_IPI_H
   2 #define _ASM_X86_IPI_H
   3
   4 #ifdef CONFIG_X86_LOCAL_APIC
   5
   6 /*
   7  * Copyright 2004 James Cleverdon, IBM.
   8  * Subject to the GNU Public License, v.2
   9  *
  10  * Generic APIC InterProcessor Interrupt code.
  11  *
  12  * Moved to include file by James Cleverdon from
  13  * arch/x86-64/kernel/smp.c
  14  *
  15  * Copyrights from kernel/smp.c:
  16  *
  17  * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
  18  * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
  19  * (c) 2002,2003 Andi Kleen, SuSE Labs.
  20  * Subject to the GNU Public License, v.2
  21  */
  22
  23 #include <asm/hw_irq.h>
  24 #include <asm/apic.h>
  25 #include <asm/smp.h>
  26
  27 /*
  28  * the following functions deal with sending IPIs between CPUs.
  29  *
  30  * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
  31  */
  32
  33 static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
  34                                          unsigned int dest)
  35 {
  36         unsigned int icr = shortcut | dest;
  37
  38         switch (vector) {
  39         default:
  40                 icr |= APIC_DM_FIXED | vector;
  41                 break;
  42         case NMI_VECTOR:
  43                 icr |= APIC_DM_NMI;
  44                 break;
  45         }
  46         return icr;
  47 }
  48
  49 static inline int __prepare_ICR2(unsigned int mask)
  50 {
  51         return SET_APIC_DEST_FIELD(mask);
  52 }
  53
  54 static inline void __xapic_wait_icr_idle(void)
  55 {
  56         while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
  57                 cpu_relax();
  58 }
  59
  60 static inline void
  61 __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
  62 {
  63         /*
  64          * Subtle. In the case of the 'never do double writes' workaround
  65          * we have to lock out interrupts to be safe.  As we don't care
  66          * of the value read we use an atomic rmw access to avoid costly
  67          * cli/sti.  Otherwise we use an even cheaper single atomic write
  68          * to the APIC.
  69          */
  70         unsigned int cfg;
  71
  72         /*
  73          * Wait for idle.
  74          */
  75         __xapic_wait_icr_idle();
  76
  77         /*
  78          * No need to touch the target chip field
  79          */
  80         cfg = __prepare_ICR(shortcut, vector, dest);
  81
  82         /*
  83          * Send the IPI. The write to APIC_ICR fires this off.
  84          */
  85         native_apic_mem_write(APIC_ICR, cfg);
  86 }
  87
  88 /*
  89  * This is used to send an IPI with no shorthand notation (the destination is
  90  * specified in bits 56 to 63 of the ICR).
  91  */
  92 static inline void
  93  __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
  94 {
  95         unsigned long cfg;
  96
  97         /*
  98          * Wait for idle.
  99          */
 100         if (unlikely(vector == NMI_VECTOR))
 101                 safe_apic_wait_icr_idle();
 102         else
 103                 __xapic_wait_icr_idle();
 104
 105         /*
 106          * prepare target chip field
 107          */
 108         cfg = __prepare_ICR2(mask);
 109         native_apic_mem_write(APIC_ICR2, cfg);
 110
 111         /*
 112          * program the ICR
 113          */
 114         cfg = __prepare_ICR(0, vector, dest);
 115
 116         /*
 117          * Send the IPI. The write to APIC_ICR fires this off.
 118          */
 119         native_apic_mem_write(APIC_ICR, cfg);
 120 }
 121
 122 static inline void
 123 default_send_IPI_mask_sequence(const struct cpumask *mask, int vector)
 124 {
 125         unsigned long query_cpu;
 126         unsigned long flags;
 127
 128         /*
 129          * Hack. The clustered APIC addressing mode doesn't allow us to send
 130          * to an arbitrary mask, so I do a unicast to each CPU instead.
 131          * - mbligh
 132          */
 133         local_irq_save(flags);
 134         for_each_cpu(query_cpu, mask) {
 135                 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
 136                                 query_cpu), vector, APIC_DEST_PHYSICAL);
 137         }
 138         local_irq_restore(flags);
 139 }
 140
 141 static inline void
 142 default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 143 {
 144         unsigned int this_cpu = smp_processor_id();
 145         unsigned int query_cpu;
 146         unsigned long flags;
 147
 148         /* See Hack comment above */
 149
 150         local_irq_save(flags);
 151         for_each_cpu(query_cpu, mask) {
 152                 if (query_cpu == this_cpu)
 153                         continue;
 154                 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
 155                                  query_cpu), vector, APIC_DEST_PHYSICAL);
 156         }
 157         local_irq_restore(flags);
 158 }
 159
 160
 161 /* Avoid include hell */
 162 #define NMI_VECTOR 0x02
 163
 164 void default_send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
 165 void default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 166
 167 extern int no_broadcast;
 168
 169 #ifdef CONFIG_X86_64
 170 #include <asm/genapic.h>
 171 #else
 172 static inline void default_send_IPI_mask(const struct cpumask *mask, int vector)
 173 {
 174         default_send_IPI_mask_bitmask(mask, vector);
 175 }
 176 void default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 177 #endif
 178
 179 static inline void __default_local_send_IPI_allbutself(int vector)
 180 {
 181         if (no_broadcast || vector == NMI_VECTOR)
 182                 apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
 183         else
 184                 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
 185 }
 186
 187 static inline void __default_local_send_IPI_all(int vector)
 188 {
 189         if (no_broadcast || vector == NMI_VECTOR)
 190                 apic->send_IPI_mask(cpu_online_mask, vector);
 191         else
 192                 __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
 193 }
 194
 195 #ifdef CONFIG_X86_32
 196 static inline void default_send_IPI_allbutself(int vector)
 197 {
 198         /*
 199          * if there are no other CPUs in the system then we get an APIC send
 200          * error if we try to broadcast, thus avoid sending IPIs in this case.
 201          */
 202         if (!(num_online_cpus() > 1))
 203                 return;
 204
 205         __default_local_send_IPI_allbutself(vector);
 206 }
 207
 208 static inline void default_send_IPI_all(int vector)
 209 {
 210         __default_local_send_IPI_all(vector);
 211 }
 212 #endif
 213
 214 #endif
 215
 216 #endif /* _ASM_X86_IPI_H */