drivers/net/e1000e/e1000.h

   1 /*******************************************************************************
   2
   3   Intel PRO/1000 Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 /* Linux PRO/1000 Ethernet Driver main header file */
  30
  31 #ifndef _E1000_H_
  32 #define _E1000_H_
  33
  34 #include <linux/types.h>
  35 #include <linux/timer.h>
  36 #include <linux/workqueue.h>
  37 #include <linux/io.h>
  38 #include <linux/netdevice.h>
  39
  40 #include "hw.h"
  41
  42 struct e1000_info;
  43
  44 #define e_printk(level, adapter, format, arg...) \
  45         printk(level "%s: %s: " format, pci_name(adapter->pdev), \
  46                adapter->netdev->name, ## arg)
  47
  48 #ifdef DEBUG
  49 #define e_dbg(format, arg...) \
  50         e_printk(KERN_DEBUG , adapter, format, ## arg)
  51 #else
  52 #define e_dbg(format, arg...) do { (void)(adapter); } while (0)
  53 #endif
  54
  55 #define e_err(format, arg...) \
  56         e_printk(KERN_ERR, adapter, format, ## arg)
  57 #define e_info(format, arg...) \
  58         e_printk(KERN_INFO, adapter, format, ## arg)
  59 #define e_warn(format, arg...) \
  60         e_printk(KERN_WARNING, adapter, format, ## arg)
  61 #define e_notice(format, arg...) \
  62         e_printk(KERN_NOTICE, adapter, format, ## arg)
  63
  64
  65 /* Interrupt modes, as used by the IntMode parameter */
  66 #define E1000E_INT_MODE_LEGACY          0
  67 #define E1000E_INT_MODE_MSI             1
  68 #define E1000E_INT_MODE_MSIX            2
  69
  70 /* Tx/Rx descriptor defines */
  71 #define E1000_DEFAULT_TXD               256
  72 #define E1000_MAX_TXD                   4096
  73 #define E1000_MIN_TXD                   64
  74
  75 #define E1000_DEFAULT_RXD               256
  76 #define E1000_MAX_RXD                   4096
  77 #define E1000_MIN_RXD                   64
  78
  79 #define E1000_MIN_ITR_USECS             10 /* 100000 irq/sec */
  80 #define E1000_MAX_ITR_USECS             10000 /* 100    irq/sec */
  81
  82 /* Early Receive defines */
  83 #define E1000_ERT_2048                  0x100
  84
  85 #define E1000_FC_PAUSE_TIME             0x0680 /* 858 usec */
  86
  87 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
  88 /* How many Rx Buffers do we bundle into one write to the hardware ? */
  89 #define E1000_RX_BUFFER_WRITE           16 /* Must be power of 2 */
  90
  91 #define AUTO_ALL_MODES                  0
  92 #define E1000_EEPROM_APME               0x0400
  93
  94 #define E1000_MNG_VLAN_NONE             (-1)
  95
  96 /* Number of packet split data buffers (not including the header buffer) */
  97 #define PS_PAGE_BUFFERS                 (MAX_PS_BUFFERS - 1)
  98
  99 #define DEFAULT_JUMBO                   9234
 100
 101 /* BM/HV Specific Registers */
 102 #define BM_PORT_CTRL_PAGE                 769
 103
 104 #define PHY_UPPER_SHIFT                   21
 105 #define BM_PHY_REG(page, reg) \
 106         (((reg) & MAX_PHY_REG_ADDRESS) |\
 107          (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
 108          (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
 109
 110 /* PHY Wakeup Registers and defines */
 111 #define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
 112 #define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
 113 #define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
 114 #define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
 115 #define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
 116 #define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
 117 #define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
 118 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
 119 #define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
 120
 121 #define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
 122 #define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
 123 #define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
 124 #define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
 125 #define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
 126 #define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
 127 #define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
 128
 129 #define HV_SCC_UPPER            PHY_REG(778, 16) /* Single Collision Count */
 130 #define HV_SCC_LOWER            PHY_REG(778, 17)
 131 #define HV_ECOL_UPPER           PHY_REG(778, 18) /* Excessive Collision Count */
 132 #define HV_ECOL_LOWER           PHY_REG(778, 19)
 133 #define HV_MCC_UPPER            PHY_REG(778, 20) /* Multiple Collision Count */
 134 #define HV_MCC_LOWER            PHY_REG(778, 21)
 135 #define HV_LATECOL_UPPER        PHY_REG(778, 23) /* Late Collision Count */
 136 #define HV_LATECOL_LOWER        PHY_REG(778, 24)
 137 #define HV_COLC_UPPER           PHY_REG(778, 25) /* Collision Count */
 138 #define HV_COLC_LOWER           PHY_REG(778, 26)
 139 #define HV_DC_UPPER             PHY_REG(778, 27) /* Defer Count */
 140 #define HV_DC_LOWER             PHY_REG(778, 28)
 141 #define HV_TNCRS_UPPER          PHY_REG(778, 29) /* Transmit with no CRS */
 142 #define HV_TNCRS_LOWER          PHY_REG(778, 30)
 143
 144 enum e1000_boards {
 145         board_82571,
 146         board_82572,
 147         board_82573,
 148         board_82574,
 149         board_82583,
 150         board_80003es2lan,
 151         board_ich8lan,
 152         board_ich9lan,
 153         board_ich10lan,
 154         board_pchlan,
 155 };
 156
 157 struct e1000_queue_stats {
 158         u64 packets;
 159         u64 bytes;
 160 };
 161
 162 struct e1000_ps_page {
 163         struct page *page;
 164         u64 dma; /* must be u64 - written to hw */
 165 };
 166
 167 /*
 168  * wrappers around a pointer to a socket buffer,
 169  * so a DMA handle can be stored along with the buffer
 170  */
 171 struct e1000_buffer {
 172         dma_addr_t dma;
 173         struct sk_buff *skb;
 174         union {
 175                 /* Tx */
 176                 struct {
 177                         unsigned long time_stamp;
 178                         u16 length;
 179                         u16 next_to_watch;
 180                 };
 181                 /* Rx */
 182                 /* arrays of page information for packet split */
 183                 struct e1000_ps_page *ps_pages;
 184         };
 185         struct page *page;
 186 };
 187
 188 struct e1000_ring {
 189         void *desc;                     /* pointer to ring memory  */
 190         dma_addr_t dma;                 /* phys address of ring    */
 191         unsigned int size;              /* length of ring in bytes */
 192         unsigned int count;             /* number of desc. in ring */
 193
 194         u16 next_to_use;
 195         u16 next_to_clean;
 196
 197         u16 head;
 198         u16 tail;
 199
 200         /* array of buffer information structs */
 201         struct e1000_buffer *buffer_info;
 202
 203         char name[IFNAMSIZ + 5];
 204         u32 ims_val;
 205         u32 itr_val;
 206         u16 itr_register;
 207         int set_itr;
 208
 209         struct sk_buff *rx_skb_top;
 210
 211         struct e1000_queue_stats stats;
 212 };
 213
 214 /* PHY register snapshot values */
 215 struct e1000_phy_regs {
 216         u16 bmcr;               /* basic mode control register    */
 217         u16 bmsr;               /* basic mode status register     */
 218         u16 advertise;          /* auto-negotiation advertisement */
 219         u16 lpa;                /* link partner ability register  */
 220         u16 expansion;          /* auto-negotiation expansion reg */
 221         u16 ctrl1000;           /* 1000BASE-T control register    */
 222         u16 stat1000;           /* 1000BASE-T status register     */
 223         u16 estatus;            /* extended status register       */
 224 };
 225
 226 /* board specific private data structure */
 227 struct e1000_adapter {
 228         struct timer_list watchdog_timer;
 229         struct timer_list phy_info_timer;
 230         struct timer_list blink_timer;
 231
 232         struct work_struct reset_task;
 233         struct work_struct watchdog_task;
 234
 235         const struct e1000_info *ei;
 236
 237         struct vlan_group *vlgrp;
 238         u32 bd_number;
 239         u32 rx_buffer_len;
 240         u16 mng_vlan_id;
 241         u16 link_speed;
 242         u16 link_duplex;
 243         u16 eeprom_vers;
 244
 245         /* track device up/down/testing state */
 246         unsigned long state;
 247
 248         /* Interrupt Throttle Rate */
 249         u32 itr;
 250         u32 itr_setting;
 251         u16 tx_itr;
 252         u16 rx_itr;
 253
 254         /*
 255          * Tx
 256          */
 257         struct e1000_ring *tx_ring /* One per active queue */
 258                                                 ____cacheline_aligned_in_smp;
 259
 260         struct napi_struct napi;
 261
 262         unsigned long tx_queue_len;
 263         unsigned int restart_queue;
 264         u32 txd_cmd;
 265
 266         bool detect_tx_hung;
 267         u8 tx_timeout_factor;
 268
 269         u32 tx_int_delay;
 270         u32 tx_abs_int_delay;
 271
 272         unsigned int total_tx_bytes;
 273         unsigned int total_tx_packets;
 274         unsigned int total_rx_bytes;
 275         unsigned int total_rx_packets;
 276
 277         /* Tx stats */
 278         u64 tpt_old;
 279         u64 colc_old;
 280         u32 gotc;
 281         u64 gotc_old;
 282         u32 tx_timeout_count;
 283         u32 tx_fifo_head;
 284         u32 tx_head_addr;
 285         u32 tx_fifo_size;
 286         u32 tx_dma_failed;
 287
 288         /*
 289          * Rx
 290          */
 291         bool (*clean_rx) (struct e1000_adapter *adapter,
 292                           int *work_done, int work_to_do)
 293                                                 ____cacheline_aligned_in_smp;
 294         void (*alloc_rx_buf) (struct e1000_adapter *adapter,
 295                               int cleaned_count);
 296         struct e1000_ring *rx_ring;
 297
 298         u32 rx_int_delay;
 299         u32 rx_abs_int_delay;
 300
 301         /* Rx stats */
 302         u64 hw_csum_err;
 303         u64 hw_csum_good;
 304         u64 rx_hdr_split;
 305         u32 gorc;
 306         u64 gorc_old;
 307         u32 alloc_rx_buff_failed;
 308         u32 rx_dma_failed;
 309
 310         unsigned int rx_ps_pages;
 311         u16 rx_ps_bsize0;
 312         u32 max_frame_size;
 313         u32 min_frame_size;
 314
 315         /* OS defined structs */
 316         struct net_device *netdev;
 317         struct pci_dev *pdev;
 318         struct net_device_stats net_stats;
 319
 320         /* structs defined in e1000_hw.h */
 321         struct e1000_hw hw;
 322
 323         struct e1000_hw_stats stats;
 324         struct e1000_phy_info phy_info;
 325         struct e1000_phy_stats phy_stats;
 326
 327         /* Snapshot of PHY registers */
 328         struct e1000_phy_regs phy_regs;
 329
 330         struct e1000_ring test_tx_ring;
 331         struct e1000_ring test_rx_ring;
 332         u32 test_icr;
 333
 334         u32 msg_enable;
 335         struct msix_entry *msix_entries;
 336         int int_mode;
 337         u32 eiac_mask;
 338
 339         u32 eeprom_wol;
 340         u32 wol;
 341         u32 pba;
 342         u32 max_hw_frame_size;
 343
 344         bool fc_autoneg;
 345
 346         unsigned long led_status;
 347
 348         unsigned int flags;
 349         unsigned int flags2;
 350         struct work_struct downshift_task;
 351         struct work_struct update_phy_task;
 352         struct work_struct led_blink_task;
 353 };
 354
 355 struct e1000_info {
 356         enum e1000_mac_type     mac;
 357         unsigned int            flags;
 358         unsigned int            flags2;
 359         u32                     pba;
 360         u32                     max_hw_frame_size;
 361         s32                     (*get_variants)(struct e1000_adapter *);
 362         struct e1000_mac_operations *mac_ops;
 363         struct e1000_phy_operations *phy_ops;
 364         struct e1000_nvm_operations *nvm_ops;
 365 };
 366
 367 /* hardware capability, feature, and workaround flags */
 368 #define FLAG_HAS_AMT                      (1 << 0)
 369 #define FLAG_HAS_FLASH                    (1 << 1)
 370 #define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
 371 #define FLAG_HAS_WOL                      (1 << 3)
 372 #define FLAG_HAS_ERT                      (1 << 4)
 373 #define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
 374 #define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
 375 #define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
 376 #define FLAG_READ_ONLY_NVM                (1 << 8)
 377 #define FLAG_IS_ICH                       (1 << 9)
 378 #define FLAG_HAS_MSIX                     (1 << 10)
 379 #define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
 380 #define FLAG_IS_QUAD_PORT_A               (1 << 12)
 381 #define FLAG_IS_QUAD_PORT                 (1 << 13)
 382 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
 383 #define FLAG_APME_IN_WUC                  (1 << 15)
 384 #define FLAG_APME_IN_CTRL3                (1 << 16)
 385 #define FLAG_APME_CHECK_PORT_B            (1 << 17)
 386 #define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
 387 #define FLAG_NO_WAKE_UCAST                (1 << 19)
 388 #define FLAG_MNG_PT_ENABLED               (1 << 20)
 389 #define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
 390 #define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
 391 #define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
 392 #define FLAG_RX_NEEDS_RESTART             (1 << 24)
 393 #define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
 394 #define FLAG_SMART_POWER_DOWN             (1 << 26)
 395 #define FLAG_MSI_ENABLED                  (1 << 27)
 396 #define FLAG_RX_CSUM_ENABLED              (1 << 28)
 397 #define FLAG_TSO_FORCE                    (1 << 29)
 398 #define FLAG_RX_RESTART_NOW               (1 << 30)
 399 #define FLAG_MSI_TEST_FAILED              (1 << 31)
 400
 401 /* CRC Stripping defines */
 402 #define FLAG2_CRC_STRIPPING               (1 << 0)
 403 #define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
 404
 405 #define E1000_RX_DESC_PS(R, i)      \
 406         (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
 407 #define E1000_GET_DESC(R, i, type)      (&(((struct type *)((R).desc))[i]))
 408 #define E1000_RX_DESC(R, i)             E1000_GET_DESC(R, i, e1000_rx_desc)
 409 #define E1000_TX_DESC(R, i)             E1000_GET_DESC(R, i, e1000_tx_desc)
 410 #define E1000_CONTEXT_DESC(R, i)        E1000_GET_DESC(R, i, e1000_context_desc)
 411
 412 enum e1000_state_t {
 413         __E1000_TESTING,
 414         __E1000_RESETTING,
 415         __E1000_DOWN
 416 };
 417
 418 enum latency_range {
 419         lowest_latency = 0,
 420         low_latency = 1,
 421         bulk_latency = 2,
 422         latency_invalid = 255
 423 };
 424
 425 extern char e1000e_driver_name[];
 426 extern const char e1000e_driver_version[];
 427
 428 extern void e1000e_check_options(struct e1000_adapter *adapter);
 429 extern void e1000e_set_ethtool_ops(struct net_device *netdev);
 430
 431 extern int e1000e_up(struct e1000_adapter *adapter);
 432 extern void e1000e_down(struct e1000_adapter *adapter);
 433 extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
 434 extern void e1000e_reset(struct e1000_adapter *adapter);
 435 extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
 436 extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
 437 extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
 438 extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
 439 extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
 440 extern void e1000e_update_stats(struct e1000_adapter *adapter);
 441 extern bool e1000_has_link(struct e1000_adapter *adapter);
 442 extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
 443 extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
 444
 445 extern unsigned int copybreak;
 446
 447 extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
 448
 449 extern struct e1000_info e1000_82571_info;
 450 extern struct e1000_info e1000_82572_info;
 451 extern struct e1000_info e1000_82573_info;
 452 extern struct e1000_info e1000_82574_info;
 453 extern struct e1000_info e1000_82583_info;
 454 extern struct e1000_info e1000_ich8_info;
 455 extern struct e1000_info e1000_ich9_info;
 456 extern struct e1000_info e1000_ich10_info;
 457 extern struct e1000_info e1000_pch_info;
 458 extern struct e1000_info e1000_es2_info;
 459
 460 extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
 461
 462 extern s32  e1000e_commit_phy(struct e1000_hw *hw);
 463
 464 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
 465
 466 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
 467 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
 468
 469 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
 470 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
 471                                                  bool state);
 472 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
 473 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
 474 extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
 475
 476 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
 477 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
 478 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
 479 extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
 480 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
 481 extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
 482 extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
 483 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
 484 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
 485 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
 486 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
 487 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
 488 extern s32 e1000e_id_led_init(struct e1000_hw *hw);
 489 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
 490 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
 491 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
 492 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
 493 extern s32 e1000e_setup_link(struct e1000_hw *hw);
 494 extern void e1000e_clear_vfta(struct e1000_hw *hw);
 495 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
 496 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
 497                                                u8 *mc_addr_list,
 498                                                u32 mc_addr_count,
 499                                                u32 rar_used_count,
 500                                                u32 rar_count);
 501 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
 502 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
 503 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
 504 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
 505 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
 506 extern void e1000e_config_collision_dist(struct e1000_hw *hw);
 507 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
 508 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
 509 extern s32 e1000e_blink_led(struct e1000_hw *hw);
 510 extern void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
 511 extern void e1000e_reset_adaptive(struct e1000_hw *hw);
 512 extern void e1000e_update_adaptive(struct e1000_hw *hw);
 513
 514 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
 515 extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
 516 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
 517 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
 518 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
 519 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
 520 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
 521 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
 522 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
 523 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
 524 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
 525 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
 526 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
 527 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
 528 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
 529 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
 530 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
 531 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
 532 extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
 533 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
 534 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
 535 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
 536 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
 537 extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
 538 extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
 539 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
 540 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
 541 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
 542 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
 543                                u32 usec_interval, bool *success);
 544 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
 545 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
 546 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
 547 extern s32 e1000e_check_downshift(struct e1000_hw *hw);
 548 extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
 549 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
 550 extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
 551 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
 552 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
 553 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
 554 extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
 555 extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
 556 extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
 557
 558 static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
 559 {
 560         return hw->phy.ops.reset_phy(hw);
 561 }
 562
 563 static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
 564 {
 565         return hw->phy.ops.check_reset_block(hw);
 566 }
 567
 568 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
 569 {
 570         return hw->phy.ops.read_phy_reg(hw, offset, data);
 571 }
 572
 573 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
 574 {
 575         return hw->phy.ops.write_phy_reg(hw, offset, data);
 576 }
 577
 578 static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
 579 {
 580         return hw->phy.ops.get_cable_length(hw);
 581 }
 582
 583 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
 584 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
 585 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
 586 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
 587 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
 588 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
 589 extern void e1000e_release_nvm(struct e1000_hw *hw);
 590 extern void e1000e_reload_nvm(struct e1000_hw *hw);
 591 extern s32 e1000e_read_mac_addr(struct e1000_hw *hw);
 592
 593 static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
 594 {
 595         return hw->nvm.ops.validate_nvm(hw);
 596 }
 597
 598 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
 599 {
 600         return hw->nvm.ops.update_nvm(hw);
 601 }
 602
 603 static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 604 {
 605         return hw->nvm.ops.read_nvm(hw, offset, words, data);
 606 }
 607
 608 static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 609 {
 610         return hw->nvm.ops.write_nvm(hw, offset, words, data);
 611 }
 612
 613 static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
 614 {
 615         return hw->phy.ops.get_phy_info(hw);
 616 }
 617
 618 static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
 619 {
 620         return hw->mac.ops.check_mng_mode(hw);
 621 }
 622
 623 extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
 624 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
 625 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
 626
 627 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
 628 {
 629         return readl(hw->hw_addr + reg);
 630 }
 631
 632 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 633 {
 634         writel(val, hw->hw_addr + reg);
 635 }
 636
 637 #endif /* _E1000_H_ */