arch/arm/mach-ux500/cpu.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   5  * License terms: GNU General Public License (GPL) version 2
   6  */
   7
   8 #include <linux/platform_device.h>
   9 #include <linux/amba/bus.h>
  10 #include <linux/io.h>
  11 #include <linux/clk.h>
  12
  13 #include <asm/hardware/cache-l2x0.h>
  14 #include <asm/hardware/gic.h>
  15 #include <asm/mach/map.h>
  16
  17 #include <mach/hardware.h>
  18 #include <mach/setup.h>
  19 #include <mach/devices.h>
  20
  21 #include "clock.h"
  22
  23 static struct map_desc ux500_io_desc[] __initdata = {
  24         __IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),
  25         __IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),
  26
  27         __IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),
  28         __IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),
  29         __IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),
  30         __IO_DEV_DESC(UX500_TWD_BASE, SZ_4K),
  31         __IO_DEV_DESC(UX500_SCU_BASE, SZ_4K),
  32
  33         __IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),
  34         __IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),
  35         __IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),
  36         __IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),
  37         __IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),
  38
  39         __IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),
  40         __IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),
  41
  42         __IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),
  43 };
  44
  45 static struct amba_device *ux500_amba_devs[] __initdata = {
  46         &ux500_pl031_device,
  47 };
  48
  49 void __init ux500_map_io(void)
  50 {
  51         iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
  52 }
  53
  54 void __init ux500_init_devices(void)
  55 {
  56         amba_add_devices(ux500_amba_devs, ARRAY_SIZE(ux500_amba_devs));
  57 }
  58
  59 void __init ux500_init_irq(void)
  60 {
  61         gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
  62         gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
  63 }
  64
  65 #ifdef CONFIG_CACHE_L2X0
  66 static int ux500_l2x0_init(void)
  67 {
  68         void __iomem *l2x0_base;
  69
  70         l2x0_base = __io_address(UX500_L2CC_BASE);
  71
  72         /* 64KB way size, 8 way associativity, force WA */
  73         l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
  74
  75         return 0;
  76 }
  77 early_initcall(ux500_l2x0_init);
  78 #endif