2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
32 /*----------------------------------------------------------------------*/
35 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
36 * Use this for GPIO or shift-register level hardware APIs.
38 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39 * to glue code. These bitbang setup() and cleanup() routines are always
40 * used, though maybe they're called from controller-aware code.
42 * chipselect() and friends may use use spi_device->controller_data and
43 * controller registers as appropriate.
46 * NOTE: SPI controller pins can often be used as GPIO pins instead,
47 * which means you could use a bitbang driver either to get hardware
48 * working quickly, or testing for differences that aren't speed related.
51 struct spi_bitbang_cs
{
52 unsigned nsecs
; /* (clock cycle time)/2 */
53 u32 (*txrx_word
)(struct spi_device
*spi
, unsigned nsecs
,
55 unsigned (*txrx_bufs
)(struct spi_device
*,
57 struct spi_device
*spi
,
60 unsigned, struct spi_transfer
*);
63 static unsigned bitbang_txrx_8(
64 struct spi_device
*spi
,
65 u32 (*txrx_word
)(struct spi_device
*spi
,
69 struct spi_transfer
*t
71 unsigned bits
= spi
->bits_per_word
;
72 unsigned count
= t
->len
;
73 const u8
*tx
= t
->tx_buf
;
76 while (likely(count
> 0)) {
81 word
= txrx_word(spi
, ns
, word
, bits
);
86 return t
->len
- count
;
89 static unsigned bitbang_txrx_16(
90 struct spi_device
*spi
,
91 u32 (*txrx_word
)(struct spi_device
*spi
,
95 struct spi_transfer
*t
97 unsigned bits
= spi
->bits_per_word
;
98 unsigned count
= t
->len
;
99 const u16
*tx
= t
->tx_buf
;
102 while (likely(count
> 1)) {
107 word
= txrx_word(spi
, ns
, word
, bits
);
112 return t
->len
- count
;
115 static unsigned bitbang_txrx_32(
116 struct spi_device
*spi
,
117 u32 (*txrx_word
)(struct spi_device
*spi
,
121 struct spi_transfer
*t
123 unsigned bits
= spi
->bits_per_word
;
124 unsigned count
= t
->len
;
125 const u32
*tx
= t
->tx_buf
;
128 while (likely(count
> 3)) {
133 word
= txrx_word(spi
, ns
, word
, bits
);
138 return t
->len
- count
;
141 int spi_bitbang_setup_transfer(struct spi_device
*spi
, struct spi_transfer
*t
)
143 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
148 bits_per_word
= t
->bits_per_word
;
155 /* spi_transfer level calls that work per-word */
157 bits_per_word
= spi
->bits_per_word
;
158 if (bits_per_word
<= 8)
159 cs
->txrx_bufs
= bitbang_txrx_8
;
160 else if (bits_per_word
<= 16)
161 cs
->txrx_bufs
= bitbang_txrx_16
;
162 else if (bits_per_word
<= 32)
163 cs
->txrx_bufs
= bitbang_txrx_32
;
167 /* nsecs = (clock period)/2 */
169 hz
= spi
->max_speed_hz
;
171 cs
->nsecs
= (1000000000/2) / hz
;
172 if (cs
->nsecs
> (MAX_UDELAY_MS
* 1000 * 1000))
178 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer
);
181 * spi_bitbang_setup - default setup for per-word I/O loops
183 int spi_bitbang_setup(struct spi_device
*spi
)
185 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
186 struct spi_bitbang
*bitbang
;
190 bitbang
= spi_master_get_devdata(spi
->master
);
193 cs
= kzalloc(sizeof *cs
, GFP_KERNEL
);
196 spi
->controller_state
= cs
;
199 /* per-word shift register access, in hardware or bitbanging */
200 cs
->txrx_word
= bitbang
->txrx_word
[spi
->mode
& (SPI_CPOL
|SPI_CPHA
)];
204 retval
= bitbang
->setup_transfer(spi
, NULL
);
208 dev_dbg(&spi
->dev
, "%s, %u nsec/bit\n", __func__
, 2 * cs
->nsecs
);
210 /* NOTE we _need_ to call chipselect() early, ideally with adapter
211 * setup, unless the hardware defaults cooperate to avoid confusion
212 * between normal (active low) and inverted chipselects.
215 /* deselect chip (low or high) */
216 spin_lock_irqsave(&bitbang
->lock
, flags
);
217 if (!bitbang
->busy
) {
218 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
221 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
225 EXPORT_SYMBOL_GPL(spi_bitbang_setup
);
228 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
230 void spi_bitbang_cleanup(struct spi_device
*spi
)
232 kfree(spi
->controller_state
);
234 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup
);
236 static int spi_bitbang_bufs(struct spi_device
*spi
, struct spi_transfer
*t
)
238 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
239 unsigned nsecs
= cs
->nsecs
;
241 return cs
->txrx_bufs(spi
, cs
->txrx_word
, nsecs
, t
);
244 /*----------------------------------------------------------------------*/
247 * SECOND PART ... simple transfer queue runner.
249 * This costs a task context per controller, running the queue by
250 * performing each transfer in sequence. Smarter hardware can queue
251 * several DMA transfers at once, and process several controller queues
252 * in parallel; this driver doesn't match such hardware very well.
254 * Drivers can provide word-at-a-time i/o primitives, or provide
255 * transfer-at-a-time ones to leverage dma or fifo hardware.
257 static void bitbang_work(struct work_struct
*work
)
259 struct spi_bitbang
*bitbang
=
260 container_of(work
, struct spi_bitbang
, work
);
263 spin_lock_irqsave(&bitbang
->lock
, flags
);
265 while (!list_empty(&bitbang
->queue
)) {
266 struct spi_message
*m
;
267 struct spi_device
*spi
;
269 struct spi_transfer
*t
= NULL
;
275 m
= container_of(bitbang
->queue
.next
, struct spi_message
,
277 list_del_init(&m
->queue
);
278 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
280 /* FIXME this is made-up ... the correct value is known to
281 * word-at-a-time bitbang code, and presumably chipselect()
282 * should enforce these requirements too?
291 list_for_each_entry (t
, &m
->transfers
, transfer_list
) {
293 /* override speed or wordsize? */
294 if (t
->speed_hz
|| t
->bits_per_word
)
297 /* init (-1) or override (1) transfer params */
299 status
= bitbang
->setup_transfer(spi
, t
);
306 /* set up default clock polarity, and activate chip;
307 * this implicitly updates clock and spi modes as
308 * previously recorded for this device via setup().
309 * (and also deselects any other chip that might be
313 bitbang
->chipselect(spi
, BITBANG_CS_ACTIVE
);
316 cs_change
= t
->cs_change
;
317 if (!t
->tx_buf
&& !t
->rx_buf
&& t
->len
) {
322 /* transfer data. the lower level code handles any
323 * new dma mappings it needs. our caller always gave
324 * us dma-safe buffers.
327 /* REVISIT dma API still needs a designated
328 * DMA_ADDR_INVALID; ~0 might be better.
330 if (!m
->is_dma_mapped
)
331 t
->rx_dma
= t
->tx_dma
= 0;
332 status
= bitbang
->txrx_bufs(spi
, t
);
335 m
->actual_length
+= status
;
336 if (status
!= t
->len
) {
337 /* always report some kind of error */
344 /* protocol tweaks before next transfer */
346 udelay(t
->delay_usecs
);
350 if (t
->transfer_list
.next
== &m
->transfers
)
353 /* sometimes a short mid-message deselect of the chip
354 * may be needed to terminate a mode or command
357 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
362 m
->complete(m
->context
);
364 /* normally deactivate chipselect ... unless no error and
365 * cs_change has hinted that the next message will probably
366 * be for this chip too.
368 if (!(status
== 0 && cs_change
)) {
370 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
374 spin_lock_irqsave(&bitbang
->lock
, flags
);
377 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
381 * spi_bitbang_transfer - default submit to transfer queue
383 int spi_bitbang_transfer(struct spi_device
*spi
, struct spi_message
*m
)
385 struct spi_bitbang
*bitbang
;
389 m
->actual_length
= 0;
390 m
->status
= -EINPROGRESS
;
392 bitbang
= spi_master_get_devdata(spi
->master
);
394 spin_lock_irqsave(&bitbang
->lock
, flags
);
395 if (!spi
->max_speed_hz
)
398 list_add_tail(&m
->queue
, &bitbang
->queue
);
399 queue_work(bitbang
->workqueue
, &bitbang
->work
);
401 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
405 EXPORT_SYMBOL_GPL(spi_bitbang_transfer
);
407 /*----------------------------------------------------------------------*/
410 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
411 * @bitbang: driver handle
413 * Caller should have zero-initialized all parts of the structure, and then
414 * provided callbacks for chip selection and I/O loops. If the master has
415 * a transfer method, its final step should call spi_bitbang_transfer; or,
416 * that's the default if the transfer routine is not initialized. It should
417 * also set up the bus number and number of chipselects.
419 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
420 * hardware that basically exposes a shift register) or per-spi_transfer
421 * (which takes better advantage of hardware like fifos or DMA engines).
423 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
424 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
425 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
426 * routine isn't initialized.
428 * This routine registers the spi_master, which will process requests in a
429 * dedicated task, keeping IRQs unblocked most of the time. To stop
430 * processing those requests, call spi_bitbang_stop().
432 int spi_bitbang_start(struct spi_bitbang
*bitbang
)
436 if (!bitbang
->master
|| !bitbang
->chipselect
)
439 INIT_WORK(&bitbang
->work
, bitbang_work
);
440 spin_lock_init(&bitbang
->lock
);
441 INIT_LIST_HEAD(&bitbang
->queue
);
443 if (!bitbang
->master
->mode_bits
)
444 bitbang
->master
->mode_bits
= SPI_CPOL
| SPI_CPHA
| bitbang
->flags
;
446 if (!bitbang
->master
->transfer
)
447 bitbang
->master
->transfer
= spi_bitbang_transfer
;
448 if (!bitbang
->txrx_bufs
) {
449 bitbang
->use_dma
= 0;
450 bitbang
->txrx_bufs
= spi_bitbang_bufs
;
451 if (!bitbang
->master
->setup
) {
452 if (!bitbang
->setup_transfer
)
453 bitbang
->setup_transfer
=
454 spi_bitbang_setup_transfer
;
455 bitbang
->master
->setup
= spi_bitbang_setup
;
456 bitbang
->master
->cleanup
= spi_bitbang_cleanup
;
458 } else if (!bitbang
->master
->setup
)
460 if (bitbang
->master
->transfer
== spi_bitbang_transfer
&&
461 !bitbang
->setup_transfer
)
464 /* this task is the only thing to touch the SPI bits */
466 bitbang
->workqueue
= create_singlethread_workqueue(
467 dev_name(bitbang
->master
->dev
.parent
));
468 if (bitbang
->workqueue
== NULL
) {
473 /* driver may get busy before register() returns, especially
474 * if someone registered boardinfo for devices
476 status
= spi_register_master(bitbang
->master
);
483 destroy_workqueue(bitbang
->workqueue
);
487 EXPORT_SYMBOL_GPL(spi_bitbang_start
);
490 * spi_bitbang_stop - stops the task providing spi communication
492 int spi_bitbang_stop(struct spi_bitbang
*bitbang
)
494 spi_unregister_master(bitbang
->master
);
496 WARN_ON(!list_empty(&bitbang
->queue
));
498 destroy_workqueue(bitbang
->workqueue
);
502 EXPORT_SYMBOL_GPL(spi_bitbang_stop
);
504 MODULE_LICENSE("GPL");