arch/arm/mach-s3c64xx/mach-mini6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
   2  *
   3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
   4  * Copyright 2008 Openmoko, Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13 */
  14
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/fb.h>
  18 #include <linux/gpio.h>
  19 #include <linux/kernel.h>
  20 #include <linux/list.h>
  21 #include <linux/dm9000.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/partitions.h>
  24 #include <linux/serial_core.h>
  25 #include <linux/types.h>
  26
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30
  31 #include <mach/map.h>
  32 #include <mach/regs-fb.h>
  33 #include <mach/regs-gpio.h>
  34 #include <mach/regs-modem.h>
  35 #include <mach/regs-srom.h>
  36 #include <mach/s3c6410.h>
  37
  38 #include <plat/adc.h>
  39 #include <plat/cpu.h>
  40 #include <plat/devs.h>
  41 #include <plat/fb.h>
  42 #include <plat/nand.h>
  43 #include <plat/regs-serial.h>
  44 #include <plat/ts.h>
  45
  46 #include <video/platform_lcd.h>
  47
  48 #define UCON S3C2410_UCON_DEFAULT
  49 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  50 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  51
  52 static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
  53         [0] = {
  54                 .hwport = 0,
  55                 .flags  = 0,
  56                 .ucon   = UCON,
  57                 .ulcon  = ULCON,
  58                 .ufcon  = UFCON,
  59         },
  60         [1] = {
  61                 .hwport = 1,
  62                 .flags  = 0,
  63                 .ucon   = UCON,
  64                 .ulcon  = ULCON,
  65                 .ufcon  = UFCON,
  66         },
  67         [2] = {
  68                 .hwport = 2,
  69                 .flags  = 0,
  70                 .ucon   = UCON,
  71                 .ulcon  = ULCON,
  72                 .ufcon  = UFCON,
  73         },
  74         [3] = {
  75                 .hwport = 3,
  76                 .flags  = 0,
  77                 .ucon   = UCON,
  78                 .ulcon  = ULCON,
  79                 .ufcon  = UFCON,
  80         },
  81 };
  82
  83 /* DM9000AEP 10/100 ethernet controller */
  84
  85 static struct resource mini6410_dm9k_resource[] = {
  86         [0] = {
  87                 .start  = S3C64XX_PA_XM0CSN1,
  88                 .end    = S3C64XX_PA_XM0CSN1 + 1,
  89                 .flags  = IORESOURCE_MEM
  90         },
  91         [1] = {
  92                 .start  = S3C64XX_PA_XM0CSN1 + 4,
  93                 .end    = S3C64XX_PA_XM0CSN1 + 5,
  94                 .flags  = IORESOURCE_MEM
  95         },
  96         [2] = {
  97                 .start  = S3C_EINT(7),
  98                 .end    = S3C_EINT(7),
  99                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
 100         }
 101 };
 102
 103 static struct dm9000_plat_data mini6410_dm9k_pdata = {
 104         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
 105 };
 106
 107 static struct platform_device mini6410_device_eth = {
 108         .name           = "dm9000",
 109         .id             = -1,
 110         .num_resources  = ARRAY_SIZE(mini6410_dm9k_resource),
 111         .resource       = mini6410_dm9k_resource,
 112         .dev            = {
 113                 .platform_data  = &mini6410_dm9k_pdata,
 114         },
 115 };
 116
 117 static struct mtd_partition mini6410_nand_part[] = {
 118         [0] = {
 119                 .name   = "uboot",
 120                 .size   = SZ_1M,
 121                 .offset = 0,
 122         },
 123         [1] = {
 124                 .name   = "kernel",
 125                 .size   = SZ_2M,
 126                 .offset = SZ_1M,
 127         },
 128         [2] = {
 129                 .name   = "rootfs",
 130                 .size   = MTDPART_SIZ_FULL,
 131                 .offset = SZ_1M + SZ_2M,
 132         },
 133 };
 134
 135 static struct s3c2410_nand_set mini6410_nand_sets[] = {
 136         [0] = {
 137                 .name           = "nand",
 138                 .nr_chips       = 1,
 139                 .nr_partitions  = ARRAY_SIZE(mini6410_nand_part),
 140                 .partitions     = mini6410_nand_part,
 141         },
 142 };
 143
 144 static struct s3c2410_platform_nand mini6410_nand_info = {
 145         .tacls          = 25,
 146         .twrph0         = 55,
 147         .twrph1         = 40,
 148         .nr_sets        = ARRAY_SIZE(mini6410_nand_sets),
 149         .sets           = mini6410_nand_sets,
 150 };
 151
 152 static struct s3c_fb_pd_win mini6410_fb_win[] = {
 153         {
 154                 .win_mode       = {     /* 4.3" 480x272 */
 155                         .left_margin    = 3,
 156                         .right_margin   = 2,
 157                         .upper_margin   = 1,
 158                         .lower_margin   = 1,
 159                         .hsync_len      = 40,
 160                         .vsync_len      = 1,
 161                         .xres           = 480,
 162                         .yres           = 272,
 163                 },
 164                 .max_bpp        = 32,
 165                 .default_bpp    = 16,
 166         }, {
 167                 .win_mode       = {     /* 7.0" 800x480 */
 168                         .left_margin    = 8,
 169                         .right_margin   = 13,
 170                         .upper_margin   = 7,
 171                         .lower_margin   = 5,
 172                         .hsync_len      = 3,
 173                         .vsync_len      = 1,
 174                         .xres           = 800,
 175                         .yres           = 480,
 176                 },
 177                 .max_bpp        = 32,
 178                 .default_bpp    = 16,
 179         },
 180 };
 181
 182 static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
 183         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 184         .win[0]         = &mini6410_fb_win[0],
 185         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 186         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 187 };
 188
 189 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
 190                                    unsigned int power)
 191 {
 192         if (power)
 193                 gpio_direction_output(S3C64XX_GPE(0), 1);
 194         else
 195                 gpio_direction_output(S3C64XX_GPE(0), 0);
 196 }
 197
 198 static struct plat_lcd_data mini6410_lcd_power_data = {
 199         .set_power      = mini6410_lcd_power_set,
 200 };
 201
 202 static struct platform_device mini6410_lcd_powerdev = {
 203         .name                   = "platform-lcd",
 204         .dev.parent             = &s3c_device_fb.dev,
 205         .dev.platform_data      = &mini6410_lcd_power_data,
 206 };
 207
 208 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 209         .delay                  = 10000,
 210         .presc                  = 49,
 211         .oversampling_shift     = 2,
 212 };
 213
 214 static struct platform_device *mini6410_devices[] __initdata = {
 215         &mini6410_device_eth,
 216         &s3c_device_hsmmc0,
 217         &s3c_device_hsmmc1,
 218         &s3c_device_ohci,
 219         &s3c_device_nand,
 220         &s3c_device_fb,
 221         &mini6410_lcd_powerdev,
 222         &s3c_device_adc,
 223         &s3c_device_ts,
 224 };
 225
 226 static void __init mini6410_map_io(void)
 227 {
 228         u32 tmp;
 229
 230         s3c64xx_init_io(NULL, 0);
 231         s3c24xx_init_clocks(12000000);
 232         s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
 233
 234         /* set the LCD type */
 235         tmp = __raw_readl(S3C64XX_SPCON);
 236         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 237         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 238         __raw_writel(tmp, S3C64XX_SPCON);
 239
 240         /* remove the LCD bypass */
 241         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 242         tmp &= ~MIFPCON_LCD_BYPASS;
 243         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 244 }
 245
 246 /*
 247  * mini6410_features string
 248  *
 249  * 0-9 LCD configuration
 250  *
 251  */
 252 static char mini6410_features_str[12] __initdata = "0";
 253
 254 static int __init mini6410_features_setup(char *str)
 255 {
 256         if (str)
 257                 strlcpy(mini6410_features_str, str,
 258                         sizeof(mini6410_features_str));
 259         return 1;
 260 }
 261
 262 __setup("mini6410=", mini6410_features_setup);
 263
 264 #define FEATURE_SCREEN (1 << 0)
 265
 266 struct mini6410_features_t {
 267         int done;
 268         int lcd_index;
 269 };
 270
 271 static void mini6410_parse_features(
 272                 struct mini6410_features_t *features,
 273                 const char *features_str)
 274 {
 275         const char *fp = features_str;
 276
 277         features->done = 0;
 278         features->lcd_index = 0;
 279
 280         while (*fp) {
 281                 char f = *fp++;
 282
 283                 switch (f) {
 284                 case '0'...'9': /* tft screen */
 285                         if (features->done & FEATURE_SCREEN) {
 286                                 printk(KERN_INFO "MINI6410: '%c' ignored, "
 287                                         "screen type already set\n", f);
 288                         } else {
 289                                 int li = f - '0';
 290                                 if (li >= ARRAY_SIZE(mini6410_fb_win))
 291                                         printk(KERN_INFO "MINI6410: '%c' out "
 292                                                 "of range LCD mode\n", f);
 293                                 else {
 294                                         features->lcd_index = li;
 295                                 }
 296                         }
 297                         features->done |= FEATURE_SCREEN;
 298                         break;
 299                 }
 300         }
 301 }
 302
 303 static void __init mini6410_machine_init(void)
 304 {
 305         u32 cs1;
 306         struct mini6410_features_t features = { 0 };
 307
 308         printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
 309                         mini6410_features_str);
 310
 311         /* Parse the feature string */
 312         mini6410_parse_features(&features, mini6410_features_str);
 313
 314         mini6410_lcd_pdata.win[0] = &mini6410_fb_win[features.lcd_index];
 315
 316         printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
 317                 mini6410_lcd_pdata.win[0]->win_mode.xres,
 318                 mini6410_lcd_pdata.win[0]->win_mode.yres);
 319
 320         s3c_nand_set_platdata(&mini6410_nand_info);
 321         s3c_fb_set_platdata(&mini6410_lcd_pdata);
 322         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 323
 324         /* configure nCS1 width to 16 bits */
 325
 326         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 327                 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 328         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 329                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 330                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 331                         S3C64XX_SROM_BW__NCS1__SHIFT;
 332         __raw_writel(cs1, S3C64XX_SROM_BW);
 333
 334         /* set timing for nCS1 suitable for ethernet chip */
 335
 336         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 337                 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 338                 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 339                 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 340                 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
 341                 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 342                 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 343
 344         gpio_request(S3C64XX_GPF(15), "LCD power");
 345         gpio_request(S3C64XX_GPE(0), "LCD power");
 346
 347         platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
 348 }
 349
 350 MACHINE_START(MINI6410, "MINI6410")
 351         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
 352         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 353         .init_irq       = s3c6410_init_irq,
 354         .map_io         = mini6410_map_io,
 355         .init_machine   = mini6410_machine_init,
 356         .timer          = &s3c24xx_timer,
 357 MACHINE_END