include/asm-x86/mpspec.h

   1 #ifndef _AM_X86_MPSPEC_H
   2 #define _AM_X86_MPSPEC_H
   3
   4 #include <linux/init.h>
   5
   6 #include <asm/mpspec_def.h>
   7
   8 #ifdef CONFIG_X86_32
   9 #include <mach_mpspec.h>
  10
  11 extern unsigned int def_to_bigsmp;
  12 extern int apic_version[MAX_APICS];
  13 extern u8 apicid_2_node[];
  14 extern int pic_mode;
  15
  16 #ifdef CONFIG_X86_NUMAQ
  17 extern int mp_bus_id_to_node[MAX_MP_BUSSES];
  18 extern int mp_bus_id_to_local[MAX_MP_BUSSES];
  19 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
  20 #endif
  21
  22 #define MAX_APICID 256
  23
  24 #else
  25
  26 #define MAX_MP_BUSSES 256
  27 /* Each PCI slot may be a combo card with its own bus.  4 IRQ pins per slot. */
  28 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
  29
  30 #endif
  31
  32 extern void early_find_smp_config(void);
  33 extern void early_get_smp_config(void);
  34
  35 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
  36 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
  37 #endif
  38
  39 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
  40
  41 extern unsigned int boot_cpu_physical_apicid;
  42 extern unsigned int max_physical_apicid;
  43 extern int smp_found_config;
  44 extern int mpc_default_type;
  45 extern unsigned long mp_lapic_addr;
  46
  47 extern void find_smp_config(void);
  48 extern void get_smp_config(void);
  49 #ifdef CONFIG_X86_MPPARSE
  50 extern void early_reserve_e820_mpc_new(void);
  51 #else
  52 static inline void early_reserve_e820_mpc_new(void) { }
  53 #endif
  54
  55 void __cpuinit generic_processor_info(int apicid, int version);
  56 #ifdef CONFIG_ACPI
  57 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
  58 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
  59                                    u32 gsi);
  60 extern void mp_config_acpi_legacy_irqs(void);
  61 extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
  62 #ifdef CONFIG_X86_IO_APIC
  63 extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
  64                                 u32 gsi, int triggering, int polarity);
  65 #else
  66 static inline int
  67 mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
  68                    u32 gsi, int triggering, int polarity)
  69 {
  70         return 0;
  71 }
  72 #endif
  73 #endif /* CONFIG_ACPI */
  74
  75 #define PHYSID_ARRAY_SIZE       BITS_TO_LONGS(MAX_APICS)
  76
  77 struct physid_mask {
  78         unsigned long mask[PHYSID_ARRAY_SIZE];
  79 };
  80
  81 typedef struct physid_mask physid_mask_t;
  82
  83 #define physid_set(physid, map)                 set_bit(physid, (map).mask)
  84 #define physid_clear(physid, map)               clear_bit(physid, (map).mask)
  85 #define physid_isset(physid, map)               test_bit(physid, (map).mask)
  86 #define physid_test_and_set(physid, map)                        \
  87         test_and_set_bit(physid, (map).mask)
  88
  89 #define physids_and(dst, src1, src2)                                    \
  90         bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  91
  92 #define physids_or(dst, src1, src2)                                     \
  93         bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  94
  95 #define physids_clear(map)                                      \
  96         bitmap_zero((map).mask, MAX_APICS)
  97
  98 #define physids_complement(dst, src)                            \
  99         bitmap_complement((dst).mask, (src).mask, MAX_APICS)
 100
 101 #define physids_empty(map)                                      \
 102         bitmap_empty((map).mask, MAX_APICS)
 103
 104 #define physids_equal(map1, map2)                               \
 105         bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
 106
 107 #define physids_weight(map)                                     \
 108         bitmap_weight((map).mask, MAX_APICS)
 109
 110 #define physids_shift_right(d, s, n)                            \
 111         bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
 112
 113 #define physids_shift_left(d, s, n)                             \
 114         bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
 115
 116 #define physids_coerce(map)                     ((map).mask[0])
 117
 118 #define physids_promote(physids)                                        \
 119         ({                                                              \
 120                 physid_mask_t __physid_mask = PHYSID_MASK_NONE;         \
 121                 __physid_mask.mask[0] = physids;                        \
 122                 __physid_mask;                                          \
 123         })
 124
 125 /* Note: will create very large stack frames if physid_mask_t is big */
 126 #define physid_mask_of_physid(physid)                                   \
 127         ({                                                              \
 128                 physid_mask_t __physid_mask = PHYSID_MASK_NONE;         \
 129                 physid_set(physid, __physid_mask);                      \
 130                 __physid_mask;                                          \
 131         })
 132
 133 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
 134 {
 135         physids_clear(*map);
 136         physid_set(physid, *map);
 137 }
 138
 139 #define PHYSID_MASK_ALL         { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
 140 #define PHYSID_MASK_NONE        { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
 141
 142 extern physid_mask_t phys_cpu_present_map;
 143
 144 #endif