1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
41 #define I810_BUF_FREE 2
42 #define I810_BUF_CLIENT 1
43 #define I810_BUF_HARDWARE 0
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED 1
48 static drm_buf_t
*i810_freelist_get(drm_device_t
* dev
)
50 drm_device_dma_t
*dma
= dev
->dma
;
54 /* Linear search might not be the best solution */
56 for (i
= 0; i
< dma
->buf_count
; i
++) {
57 drm_buf_t
*buf
= dma
->buflist
[i
];
58 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
59 /* In use is already a pointer */
60 used
= cmpxchg(buf_priv
->in_use
, I810_BUF_FREE
,
62 if (used
== I810_BUF_FREE
) {
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
73 static int i810_freelist_put(drm_device_t
* dev
, drm_buf_t
* buf
)
75 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
78 /* In use is already a pointer */
79 used
= cmpxchg(buf_priv
->in_use
, I810_BUF_CLIENT
, I810_BUF_FREE
);
80 if (used
!= I810_BUF_CLIENT
) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf
->idx
);
88 static int i810_mmap_buffers(struct file
*filp
, struct vm_area_struct
*vma
)
90 drm_file_t
*priv
= filp
->private_data
;
92 drm_i810_private_t
*dev_priv
;
94 drm_i810_buf_priv_t
*buf_priv
;
97 dev
= priv
->head
->dev
;
98 dev_priv
= dev
->dev_private
;
99 buf
= dev_priv
->mmap_buffer
;
100 buf_priv
= buf
->dev_private
;
102 vma
->vm_flags
|= (VM_IO
| VM_DONTCOPY
);
105 buf_priv
->currently_mapped
= I810_BUF_MAPPED
;
108 if (io_remap_pfn_range(vma
, vma
->vm_start
,
109 VM_OFFSET(vma
) >> PAGE_SHIFT
,
110 vma
->vm_end
- vma
->vm_start
, vma
->vm_page_prot
))
115 static struct file_operations i810_buffer_fops
= {
118 .release
= drm_release
,
120 .mmap
= i810_mmap_buffers
,
121 .fasync
= drm_fasync
,
124 static int i810_map_buffer(drm_buf_t
* buf
, struct file
*filp
)
126 drm_file_t
*priv
= filp
->private_data
;
127 drm_device_t
*dev
= priv
->head
->dev
;
128 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
129 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
130 struct file_operations
*old_fops
;
133 if (buf_priv
->currently_mapped
== I810_BUF_MAPPED
)
136 down_write(¤t
->mm
->mmap_sem
);
137 old_fops
= filp
->f_op
;
138 filp
->f_op
= &i810_buffer_fops
;
139 dev_priv
->mmap_buffer
= buf
;
140 buf_priv
->virtual = (void *)do_mmap(filp
, 0, buf
->total
,
141 PROT_READ
| PROT_WRITE
,
142 MAP_SHARED
, buf
->bus_address
);
143 dev_priv
->mmap_buffer
= NULL
;
144 filp
->f_op
= old_fops
;
145 if ((unsigned long)buf_priv
->virtual > -1024UL) {
147 DRM_ERROR("mmap error\n");
148 retcode
= (signed int)buf_priv
->virtual;
149 buf_priv
->virtual = NULL
;
151 up_write(¤t
->mm
->mmap_sem
);
156 static int i810_unmap_buffer(drm_buf_t
* buf
)
158 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
161 if (buf_priv
->currently_mapped
!= I810_BUF_MAPPED
)
164 down_write(¤t
->mm
->mmap_sem
);
165 retcode
= do_munmap(current
->mm
,
166 (unsigned long)buf_priv
->virtual,
167 (size_t) buf
->total
);
168 up_write(¤t
->mm
->mmap_sem
);
170 buf_priv
->currently_mapped
= I810_BUF_UNMAPPED
;
171 buf_priv
->virtual = NULL
;
176 static int i810_dma_get_buffer(drm_device_t
* dev
, drm_i810_dma_t
* d
,
180 drm_i810_buf_priv_t
*buf_priv
;
183 buf
= i810_freelist_get(dev
);
186 DRM_DEBUG("retcode=%d\n", retcode
);
190 retcode
= i810_map_buffer(buf
, filp
);
192 i810_freelist_put(dev
, buf
);
193 DRM_ERROR("mapbuf failed, retcode %d\n", retcode
);
197 buf_priv
= buf
->dev_private
;
199 d
->request_idx
= buf
->idx
;
200 d
->request_size
= buf
->total
;
201 d
->virtual = buf_priv
->virtual;
206 static int i810_dma_cleanup(drm_device_t
* dev
)
208 drm_device_dma_t
*dma
= dev
->dma
;
210 /* Make sure interrupts are disabled here because the uninstall ioctl
211 * may not have been called from userspace and after dev_private
212 * is freed, it's too late.
214 if (drm_core_check_feature(dev
, DRIVER_HAVE_IRQ
) && dev
->irq_enabled
)
215 drm_irq_uninstall(dev
);
217 if (dev
->dev_private
) {
219 drm_i810_private_t
*dev_priv
=
220 (drm_i810_private_t
*) dev
->dev_private
;
222 if (dev_priv
->ring
.virtual_start
) {
223 drm_ioremapfree((void *)dev_priv
->ring
.virtual_start
,
224 dev_priv
->ring
.Size
, dev
);
226 if (dev_priv
->hw_status_page
) {
227 pci_free_consistent(dev
->pdev
, PAGE_SIZE
,
228 dev_priv
->hw_status_page
,
229 dev_priv
->dma_status_page
);
230 /* Need to rewrite hardware status page */
231 I810_WRITE(0x02080, 0x1ffff000);
233 drm_free(dev
->dev_private
, sizeof(drm_i810_private_t
),
235 dev
->dev_private
= NULL
;
237 for (i
= 0; i
< dma
->buf_count
; i
++) {
238 drm_buf_t
*buf
= dma
->buflist
[i
];
239 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
240 if (buf_priv
->kernel_virtual
&& buf
->total
)
241 drm_ioremapfree(buf_priv
->kernel_virtual
,
248 static int i810_wait_ring(drm_device_t
* dev
, int n
)
250 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
251 drm_i810_ring_buffer_t
*ring
= &(dev_priv
->ring
);
254 unsigned int last_head
= I810_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
256 end
= jiffies
+ (HZ
* 3);
257 while (ring
->space
< n
) {
258 ring
->head
= I810_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
259 ring
->space
= ring
->head
- (ring
->tail
+ 8);
261 ring
->space
+= ring
->Size
;
263 if (ring
->head
!= last_head
) {
264 end
= jiffies
+ (HZ
* 3);
265 last_head
= ring
->head
;
269 if (time_before(end
, jiffies
)) {
270 DRM_ERROR("space: %d wanted %d\n", ring
->space
, n
);
271 DRM_ERROR("lockup\n");
281 static void i810_kernel_lost_context(drm_device_t
* dev
)
283 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
284 drm_i810_ring_buffer_t
*ring
= &(dev_priv
->ring
);
286 ring
->head
= I810_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
287 ring
->tail
= I810_READ(LP_RING
+ RING_TAIL
);
288 ring
->space
= ring
->head
- (ring
->tail
+ 8);
290 ring
->space
+= ring
->Size
;
293 static int i810_freelist_init(drm_device_t
* dev
, drm_i810_private_t
* dev_priv
)
295 drm_device_dma_t
*dma
= dev
->dma
;
297 u32
*hw_status
= (u32
*) (dev_priv
->hw_status_page
+ my_idx
);
300 if (dma
->buf_count
> 1019) {
301 /* Not enough space in the status page for the freelist */
305 for (i
= 0; i
< dma
->buf_count
; i
++) {
306 drm_buf_t
*buf
= dma
->buflist
[i
];
307 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
309 buf_priv
->in_use
= hw_status
++;
310 buf_priv
->my_use_idx
= my_idx
;
313 *buf_priv
->in_use
= I810_BUF_FREE
;
315 buf_priv
->kernel_virtual
= drm_ioremap(buf
->bus_address
,
321 static int i810_dma_initialize(drm_device_t
* dev
,
322 drm_i810_private_t
* dev_priv
,
323 drm_i810_init_t
* init
)
325 struct list_head
*list
;
327 memset(dev_priv
, 0, sizeof(drm_i810_private_t
));
329 list_for_each(list
, &dev
->maplist
->head
) {
330 drm_map_list_t
*r_list
= list_entry(list
, drm_map_list_t
, head
);
332 r_list
->map
->type
== _DRM_SHM
&&
333 r_list
->map
->flags
& _DRM_CONTAINS_LOCK
) {
334 dev_priv
->sarea_map
= r_list
->map
;
338 if (!dev_priv
->sarea_map
) {
339 dev
->dev_private
= (void *)dev_priv
;
340 i810_dma_cleanup(dev
);
341 DRM_ERROR("can not find sarea!\n");
344 dev_priv
->mmio_map
= drm_core_findmap(dev
, init
->mmio_offset
);
345 if (!dev_priv
->mmio_map
) {
346 dev
->dev_private
= (void *)dev_priv
;
347 i810_dma_cleanup(dev
);
348 DRM_ERROR("can not find mmio map!\n");
351 dev
->agp_buffer_token
= init
->buffers_offset
;
352 dev
->agp_buffer_map
= drm_core_findmap(dev
, init
->buffers_offset
);
353 if (!dev
->agp_buffer_map
) {
354 dev
->dev_private
= (void *)dev_priv
;
355 i810_dma_cleanup(dev
);
356 DRM_ERROR("can not find dma buffer map!\n");
360 dev_priv
->sarea_priv
= (drm_i810_sarea_t
*)
361 ((u8
*) dev_priv
->sarea_map
->handle
+ init
->sarea_priv_offset
);
363 dev_priv
->ring
.Start
= init
->ring_start
;
364 dev_priv
->ring
.End
= init
->ring_end
;
365 dev_priv
->ring
.Size
= init
->ring_size
;
367 dev_priv
->ring
.virtual_start
= drm_ioremap(dev
->agp
->base
+
369 init
->ring_size
, dev
);
371 if (dev_priv
->ring
.virtual_start
== NULL
) {
372 dev
->dev_private
= (void *)dev_priv
;
373 i810_dma_cleanup(dev
);
374 DRM_ERROR("can not ioremap virtual address for"
379 dev_priv
->ring
.tail_mask
= dev_priv
->ring
.Size
- 1;
381 dev_priv
->w
= init
->w
;
382 dev_priv
->h
= init
->h
;
383 dev_priv
->pitch
= init
->pitch
;
384 dev_priv
->back_offset
= init
->back_offset
;
385 dev_priv
->depth_offset
= init
->depth_offset
;
386 dev_priv
->front_offset
= init
->front_offset
;
388 dev_priv
->overlay_offset
= init
->overlay_offset
;
389 dev_priv
->overlay_physical
= init
->overlay_physical
;
391 dev_priv
->front_di1
= init
->front_offset
| init
->pitch_bits
;
392 dev_priv
->back_di1
= init
->back_offset
| init
->pitch_bits
;
393 dev_priv
->zi1
= init
->depth_offset
| init
->pitch_bits
;
395 /* Program Hardware Status Page */
396 dev_priv
->hw_status_page
=
397 pci_alloc_consistent(dev
->pdev
, PAGE_SIZE
,
398 &dev_priv
->dma_status_page
);
399 if (!dev_priv
->hw_status_page
) {
400 dev
->dev_private
= (void *)dev_priv
;
401 i810_dma_cleanup(dev
);
402 DRM_ERROR("Can not allocate hardware status page\n");
405 memset(dev_priv
->hw_status_page
, 0, PAGE_SIZE
);
406 DRM_DEBUG("hw status page @ %p\n", dev_priv
->hw_status_page
);
408 I810_WRITE(0x02080, dev_priv
->dma_status_page
);
409 DRM_DEBUG("Enabled hardware status page\n");
411 /* Now we need to init our freelist */
412 if (i810_freelist_init(dev
, dev_priv
) != 0) {
413 dev
->dev_private
= (void *)dev_priv
;
414 i810_dma_cleanup(dev
);
415 DRM_ERROR("Not enough space in the status page for"
419 dev
->dev_private
= (void *)dev_priv
;
424 /* i810 DRM version 1.1 used a smaller init structure with different
425 * ordering of values than is currently used (drm >= 1.2). There is
426 * no defined way to detect the XFree version to correct this problem,
427 * however by checking using this procedure we can detect the correct
430 * #1 Read the Smaller init structure from user-space
431 * #2 Verify the overlay_physical is a valid physical address, or NULL
432 * If it isn't then we have a v1.1 client. Fix up params.
433 * If it is, then we have a 1.2 client... get the rest of the data.
435 static int i810_dma_init_compat(drm_i810_init_t
* init
, unsigned long arg
)
438 /* Get v1.1 init data */
439 if (copy_from_user(init
, (drm_i810_pre12_init_t __user
*) arg
,
440 sizeof(drm_i810_pre12_init_t
))) {
444 if ((!init
->overlay_physical
) || (init
->overlay_physical
> 4096)) {
446 /* This is a v1.2 client, just get the v1.2 init data */
447 DRM_INFO("Using POST v1.2 init.\n");
448 if (copy_from_user(init
, (drm_i810_init_t __user
*) arg
,
449 sizeof(drm_i810_init_t
))) {
454 /* This is a v1.1 client, fix the params */
455 DRM_INFO("Using PRE v1.2 init.\n");
456 init
->pitch_bits
= init
->h
;
457 init
->pitch
= init
->w
;
458 init
->h
= init
->overlay_physical
;
459 init
->w
= init
->overlay_offset
;
460 init
->overlay_physical
= 0;
461 init
->overlay_offset
= 0;
467 static int i810_dma_init(struct inode
*inode
, struct file
*filp
,
468 unsigned int cmd
, unsigned long arg
)
470 drm_file_t
*priv
= filp
->private_data
;
471 drm_device_t
*dev
= priv
->head
->dev
;
472 drm_i810_private_t
*dev_priv
;
473 drm_i810_init_t init
;
476 /* Get only the init func */
478 (&init
, (void __user
*)arg
, sizeof(drm_i810_init_func_t
)))
483 /* This case is for backward compatibility. It
484 * handles XFree 4.1.0 and 4.2.0, and has to
485 * do some parameter checking as described below.
486 * It will someday go away.
488 retcode
= i810_dma_init_compat(&init
, arg
);
492 dev_priv
= drm_alloc(sizeof(drm_i810_private_t
),
494 if (dev_priv
== NULL
)
496 retcode
= i810_dma_initialize(dev
, dev_priv
, &init
);
500 case I810_INIT_DMA_1_4
:
501 DRM_INFO("Using v1.4 init.\n");
502 if (copy_from_user(&init
, (drm_i810_init_t __user
*) arg
,
503 sizeof(drm_i810_init_t
))) {
506 dev_priv
= drm_alloc(sizeof(drm_i810_private_t
),
508 if (dev_priv
== NULL
)
510 retcode
= i810_dma_initialize(dev
, dev_priv
, &init
);
513 case I810_CLEANUP_DMA
:
514 DRM_INFO("DMA Cleanup\n");
515 retcode
= i810_dma_cleanup(dev
);
522 /* Most efficient way to verify state for the i810 is as it is
523 * emitted. Non-conformant state is silently dropped.
525 * Use 'volatile' & local var tmp to force the emitted values to be
526 * identical to the verified ones.
528 static void i810EmitContextVerified(drm_device_t
* dev
,
529 volatile unsigned int *code
)
531 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
536 BEGIN_LP_RING(I810_CTX_SETUP_SIZE
);
538 OUT_RING(GFX_OP_COLOR_FACTOR
);
539 OUT_RING(code
[I810_CTXREG_CF1
]);
541 OUT_RING(GFX_OP_STIPPLE
);
542 OUT_RING(code
[I810_CTXREG_ST1
]);
544 for (i
= 4; i
< I810_CTX_SETUP_SIZE
; i
++) {
547 if ((tmp
& (7 << 29)) == (3 << 29) &&
548 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
552 printk("constext state dropped!!!\n");
561 static void i810EmitTexVerified(drm_device_t
* dev
, volatile unsigned int *code
)
563 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
568 BEGIN_LP_RING(I810_TEX_SETUP_SIZE
);
570 OUT_RING(GFX_OP_MAP_INFO
);
571 OUT_RING(code
[I810_TEXREG_MI1
]);
572 OUT_RING(code
[I810_TEXREG_MI2
]);
573 OUT_RING(code
[I810_TEXREG_MI3
]);
575 for (i
= 4; i
< I810_TEX_SETUP_SIZE
; i
++) {
578 if ((tmp
& (7 << 29)) == (3 << 29) &&
579 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
583 printk("texture state dropped!!!\n");
592 /* Need to do some additional checking when setting the dest buffer.
594 static void i810EmitDestVerified(drm_device_t
* dev
,
595 volatile unsigned int *code
)
597 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
601 BEGIN_LP_RING(I810_DEST_SETUP_SIZE
+ 2);
603 tmp
= code
[I810_DESTREG_DI1
];
604 if (tmp
== dev_priv
->front_di1
|| tmp
== dev_priv
->back_di1
) {
605 OUT_RING(CMD_OP_DESTBUFFER_INFO
);
608 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
609 tmp
, dev_priv
->front_di1
, dev_priv
->back_di1
);
613 OUT_RING(CMD_OP_Z_BUFFER_INFO
);
614 OUT_RING(dev_priv
->zi1
);
616 OUT_RING(GFX_OP_DESTBUFFER_VARS
);
617 OUT_RING(code
[I810_DESTREG_DV1
]);
619 OUT_RING(GFX_OP_DRAWRECT_INFO
);
620 OUT_RING(code
[I810_DESTREG_DR1
]);
621 OUT_RING(code
[I810_DESTREG_DR2
]);
622 OUT_RING(code
[I810_DESTREG_DR3
]);
623 OUT_RING(code
[I810_DESTREG_DR4
]);
629 static void i810EmitState(drm_device_t
* dev
)
631 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
632 drm_i810_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
633 unsigned int dirty
= sarea_priv
->dirty
;
635 DRM_DEBUG("%s %x\n", __FUNCTION__
, dirty
);
637 if (dirty
& I810_UPLOAD_BUFFERS
) {
638 i810EmitDestVerified(dev
, sarea_priv
->BufferState
);
639 sarea_priv
->dirty
&= ~I810_UPLOAD_BUFFERS
;
642 if (dirty
& I810_UPLOAD_CTX
) {
643 i810EmitContextVerified(dev
, sarea_priv
->ContextState
);
644 sarea_priv
->dirty
&= ~I810_UPLOAD_CTX
;
647 if (dirty
& I810_UPLOAD_TEX0
) {
648 i810EmitTexVerified(dev
, sarea_priv
->TexState
[0]);
649 sarea_priv
->dirty
&= ~I810_UPLOAD_TEX0
;
652 if (dirty
& I810_UPLOAD_TEX1
) {
653 i810EmitTexVerified(dev
, sarea_priv
->TexState
[1]);
654 sarea_priv
->dirty
&= ~I810_UPLOAD_TEX1
;
660 static void i810_dma_dispatch_clear(drm_device_t
* dev
, int flags
,
661 unsigned int clear_color
,
662 unsigned int clear_zval
)
664 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
665 drm_i810_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
666 int nbox
= sarea_priv
->nbox
;
667 drm_clip_rect_t
*pbox
= sarea_priv
->boxes
;
668 int pitch
= dev_priv
->pitch
;
673 if (dev_priv
->current_page
== 1) {
674 unsigned int tmp
= flags
;
676 flags
&= ~(I810_FRONT
| I810_BACK
);
677 if (tmp
& I810_FRONT
)
683 i810_kernel_lost_context(dev
);
685 if (nbox
> I810_NR_SAREA_CLIPRECTS
)
686 nbox
= I810_NR_SAREA_CLIPRECTS
;
688 for (i
= 0; i
< nbox
; i
++, pbox
++) {
689 unsigned int x
= pbox
->x1
;
690 unsigned int y
= pbox
->y1
;
691 unsigned int width
= (pbox
->x2
- x
) * cpp
;
692 unsigned int height
= pbox
->y2
- y
;
693 unsigned int start
= y
* pitch
+ x
* cpp
;
695 if (pbox
->x1
> pbox
->x2
||
696 pbox
->y1
> pbox
->y2
||
697 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
700 if (flags
& I810_FRONT
) {
702 OUT_RING(BR00_BITBLT_CLIENT
| BR00_OP_COLOR_BLT
| 0x3);
703 OUT_RING(BR13_SOLID_PATTERN
| (0xF0 << 16) | pitch
);
704 OUT_RING((height
<< 16) | width
);
706 OUT_RING(clear_color
);
711 if (flags
& I810_BACK
) {
713 OUT_RING(BR00_BITBLT_CLIENT
| BR00_OP_COLOR_BLT
| 0x3);
714 OUT_RING(BR13_SOLID_PATTERN
| (0xF0 << 16) | pitch
);
715 OUT_RING((height
<< 16) | width
);
716 OUT_RING(dev_priv
->back_offset
+ start
);
717 OUT_RING(clear_color
);
722 if (flags
& I810_DEPTH
) {
724 OUT_RING(BR00_BITBLT_CLIENT
| BR00_OP_COLOR_BLT
| 0x3);
725 OUT_RING(BR13_SOLID_PATTERN
| (0xF0 << 16) | pitch
);
726 OUT_RING((height
<< 16) | width
);
727 OUT_RING(dev_priv
->depth_offset
+ start
);
728 OUT_RING(clear_zval
);
735 static void i810_dma_dispatch_swap(drm_device_t
* dev
)
737 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
738 drm_i810_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
739 int nbox
= sarea_priv
->nbox
;
740 drm_clip_rect_t
*pbox
= sarea_priv
->boxes
;
741 int pitch
= dev_priv
->pitch
;
746 DRM_DEBUG("swapbuffers\n");
748 i810_kernel_lost_context(dev
);
750 if (nbox
> I810_NR_SAREA_CLIPRECTS
)
751 nbox
= I810_NR_SAREA_CLIPRECTS
;
753 for (i
= 0; i
< nbox
; i
++, pbox
++) {
754 unsigned int w
= pbox
->x2
- pbox
->x1
;
755 unsigned int h
= pbox
->y2
- pbox
->y1
;
756 unsigned int dst
= pbox
->x1
* cpp
+ pbox
->y1
* pitch
;
757 unsigned int start
= dst
;
759 if (pbox
->x1
> pbox
->x2
||
760 pbox
->y1
> pbox
->y2
||
761 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
765 OUT_RING(BR00_BITBLT_CLIENT
| BR00_OP_SRC_COPY_BLT
| 0x4);
766 OUT_RING(pitch
| (0xCC << 16));
767 OUT_RING((h
<< 16) | (w
* cpp
));
768 if (dev_priv
->current_page
== 0)
769 OUT_RING(dev_priv
->front_offset
+ start
);
771 OUT_RING(dev_priv
->back_offset
+ start
);
773 if (dev_priv
->current_page
== 0)
774 OUT_RING(dev_priv
->back_offset
+ start
);
776 OUT_RING(dev_priv
->front_offset
+ start
);
781 static void i810_dma_dispatch_vertex(drm_device_t
* dev
,
782 drm_buf_t
* buf
, int discard
, int used
)
784 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
785 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
786 drm_i810_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
787 drm_clip_rect_t
*box
= sarea_priv
->boxes
;
788 int nbox
= sarea_priv
->nbox
;
789 unsigned long address
= (unsigned long)buf
->bus_address
;
790 unsigned long start
= address
- dev
->agp
->base
;
794 i810_kernel_lost_context(dev
);
796 if (nbox
> I810_NR_SAREA_CLIPRECTS
)
797 nbox
= I810_NR_SAREA_CLIPRECTS
;
802 if (sarea_priv
->dirty
)
805 if (buf_priv
->currently_mapped
== I810_BUF_MAPPED
) {
806 unsigned int prim
= (sarea_priv
->vertex_prim
& PR_MASK
);
808 *(u32
*) buf_priv
->kernel_virtual
=
809 ((GFX_OP_PRIMITIVE
| prim
| ((used
/ 4) - 2)));
812 *(u32
*) ((u32
) buf_priv
->kernel_virtual
+ used
) = 0;
816 i810_unmap_buffer(buf
);
823 OUT_RING(GFX_OP_SCISSOR
| SC_UPDATE_SCISSOR
|
825 OUT_RING(GFX_OP_SCISSOR_INFO
);
826 OUT_RING(box
[i
].x1
| (box
[i
].y1
<< 16));
827 OUT_RING((box
[i
].x2
-
828 1) | ((box
[i
].y2
- 1) << 16));
833 OUT_RING(CMD_OP_BATCH_BUFFER
);
834 OUT_RING(start
| BB1_PROTECTED
);
835 OUT_RING(start
+ used
- 4);
839 } while (++i
< nbox
);
845 (void)cmpxchg(buf_priv
->in_use
, I810_BUF_CLIENT
,
849 OUT_RING(CMD_STORE_DWORD_IDX
);
851 OUT_RING(dev_priv
->counter
);
852 OUT_RING(CMD_STORE_DWORD_IDX
);
853 OUT_RING(buf_priv
->my_use_idx
);
854 OUT_RING(I810_BUF_FREE
);
855 OUT_RING(CMD_REPORT_HEAD
);
861 static void i810_dma_dispatch_flip(drm_device_t
* dev
)
863 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
864 int pitch
= dev_priv
->pitch
;
867 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
869 dev_priv
->current_page
,
870 dev_priv
->sarea_priv
->pf_current_page
);
872 i810_kernel_lost_context(dev
);
875 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
879 BEGIN_LP_RING(I810_DEST_SETUP_SIZE
+ 2);
880 /* On i815 at least ASYNC is buggy */
881 /* pitch<<5 is from 11.2.8 p158,
882 its the pitch / 8 then left shifted 8,
883 so (pitch >> 3) << 8 */
884 OUT_RING(CMD_OP_FRONTBUFFER_INFO
| (pitch
<< 5) /*| ASYNC_FLIP */ );
885 if (dev_priv
->current_page
== 0) {
886 OUT_RING(dev_priv
->back_offset
);
887 dev_priv
->current_page
= 1;
889 OUT_RING(dev_priv
->front_offset
);
890 dev_priv
->current_page
= 0;
896 OUT_RING(CMD_OP_WAIT_FOR_EVENT
| WAIT_FOR_PLANE_A_FLIP
);
900 /* Increment the frame counter. The client-side 3D driver must
901 * throttle the framerate by waiting for this value before
902 * performing the swapbuffer ioctl.
904 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
908 static void i810_dma_quiescent(drm_device_t
* dev
)
910 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
913 /* printk("%s\n", __FUNCTION__); */
915 i810_kernel_lost_context(dev
);
918 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
919 OUT_RING(CMD_REPORT_HEAD
);
924 i810_wait_ring(dev
, dev_priv
->ring
.Size
- 8);
927 static int i810_flush_queue(drm_device_t
* dev
)
929 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
930 drm_device_dma_t
*dma
= dev
->dma
;
934 /* printk("%s\n", __FUNCTION__); */
936 i810_kernel_lost_context(dev
);
939 OUT_RING(CMD_REPORT_HEAD
);
943 i810_wait_ring(dev
, dev_priv
->ring
.Size
- 8);
945 for (i
= 0; i
< dma
->buf_count
; i
++) {
946 drm_buf_t
*buf
= dma
->buflist
[i
];
947 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
949 int used
= cmpxchg(buf_priv
->in_use
, I810_BUF_HARDWARE
,
952 if (used
== I810_BUF_HARDWARE
)
953 DRM_DEBUG("reclaimed from HARDWARE\n");
954 if (used
== I810_BUF_CLIENT
)
955 DRM_DEBUG("still on client\n");
961 /* Must be called with the lock held */
962 void i810_reclaim_buffers(drm_device_t
* dev
, struct file
*filp
)
964 drm_device_dma_t
*dma
= dev
->dma
;
969 if (!dev
->dev_private
)
974 i810_flush_queue(dev
);
976 for (i
= 0; i
< dma
->buf_count
; i
++) {
977 drm_buf_t
*buf
= dma
->buflist
[i
];
978 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
980 if (buf
->filp
== filp
&& buf_priv
) {
981 int used
= cmpxchg(buf_priv
->in_use
, I810_BUF_CLIENT
,
984 if (used
== I810_BUF_CLIENT
)
985 DRM_DEBUG("reclaimed from client\n");
986 if (buf_priv
->currently_mapped
== I810_BUF_MAPPED
)
987 buf_priv
->currently_mapped
= I810_BUF_UNMAPPED
;
992 static int i810_flush_ioctl(struct inode
*inode
, struct file
*filp
,
993 unsigned int cmd
, unsigned long arg
)
995 drm_file_t
*priv
= filp
->private_data
;
996 drm_device_t
*dev
= priv
->head
->dev
;
998 LOCK_TEST_WITH_RETURN(dev
, filp
);
1000 i810_flush_queue(dev
);
1004 static int i810_dma_vertex(struct inode
*inode
, struct file
*filp
,
1005 unsigned int cmd
, unsigned long arg
)
1007 drm_file_t
*priv
= filp
->private_data
;
1008 drm_device_t
*dev
= priv
->head
->dev
;
1009 drm_device_dma_t
*dma
= dev
->dma
;
1010 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1011 u32
*hw_status
= dev_priv
->hw_status_page
;
1012 drm_i810_sarea_t
*sarea_priv
= (drm_i810_sarea_t
*)
1013 dev_priv
->sarea_priv
;
1014 drm_i810_vertex_t vertex
;
1017 (&vertex
, (drm_i810_vertex_t __user
*) arg
, sizeof(vertex
)))
1020 LOCK_TEST_WITH_RETURN(dev
, filp
);
1022 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1023 vertex
.idx
, vertex
.used
, vertex
.discard
);
1025 if (vertex
.idx
< 0 || vertex
.idx
> dma
->buf_count
)
1028 i810_dma_dispatch_vertex(dev
,
1029 dma
->buflist
[vertex
.idx
],
1030 vertex
.discard
, vertex
.used
);
1032 atomic_add(vertex
.used
, &dev
->counts
[_DRM_STAT_SECONDARY
]);
1033 atomic_inc(&dev
->counts
[_DRM_STAT_DMA
]);
1034 sarea_priv
->last_enqueue
= dev_priv
->counter
- 1;
1035 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1040 static int i810_clear_bufs(struct inode
*inode
, struct file
*filp
,
1041 unsigned int cmd
, unsigned long arg
)
1043 drm_file_t
*priv
= filp
->private_data
;
1044 drm_device_t
*dev
= priv
->head
->dev
;
1045 drm_i810_clear_t clear
;
1048 (&clear
, (drm_i810_clear_t __user
*) arg
, sizeof(clear
)))
1051 LOCK_TEST_WITH_RETURN(dev
, filp
);
1053 /* GH: Someone's doing nasty things... */
1054 if (!dev
->dev_private
) {
1058 i810_dma_dispatch_clear(dev
, clear
.flags
,
1059 clear
.clear_color
, clear
.clear_depth
);
1063 static int i810_swap_bufs(struct inode
*inode
, struct file
*filp
,
1064 unsigned int cmd
, unsigned long arg
)
1066 drm_file_t
*priv
= filp
->private_data
;
1067 drm_device_t
*dev
= priv
->head
->dev
;
1069 DRM_DEBUG("i810_swap_bufs\n");
1071 LOCK_TEST_WITH_RETURN(dev
, filp
);
1073 i810_dma_dispatch_swap(dev
);
1077 static int i810_getage(struct inode
*inode
, struct file
*filp
, unsigned int cmd
,
1080 drm_file_t
*priv
= filp
->private_data
;
1081 drm_device_t
*dev
= priv
->head
->dev
;
1082 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1083 u32
*hw_status
= dev_priv
->hw_status_page
;
1084 drm_i810_sarea_t
*sarea_priv
= (drm_i810_sarea_t
*)
1085 dev_priv
->sarea_priv
;
1087 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1091 static int i810_getbuf(struct inode
*inode
, struct file
*filp
, unsigned int cmd
,
1094 drm_file_t
*priv
= filp
->private_data
;
1095 drm_device_t
*dev
= priv
->head
->dev
;
1098 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1099 u32
*hw_status
= dev_priv
->hw_status_page
;
1100 drm_i810_sarea_t
*sarea_priv
= (drm_i810_sarea_t
*)
1101 dev_priv
->sarea_priv
;
1103 if (copy_from_user(&d
, (drm_i810_dma_t __user
*) arg
, sizeof(d
)))
1106 LOCK_TEST_WITH_RETURN(dev
, filp
);
1110 retcode
= i810_dma_get_buffer(dev
, &d
, filp
);
1112 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1113 current
->pid
, retcode
, d
.granted
);
1115 if (copy_to_user((drm_dma_t __user
*) arg
, &d
, sizeof(d
)))
1117 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1122 static int i810_copybuf(struct inode
*inode
,
1123 struct file
*filp
, unsigned int cmd
, unsigned long arg
)
1125 /* Never copy - 2.4.x doesn't need it */
1129 static int i810_docopy(struct inode
*inode
, struct file
*filp
, unsigned int cmd
,
1132 /* Never copy - 2.4.x doesn't need it */
1136 static void i810_dma_dispatch_mc(drm_device_t
* dev
, drm_buf_t
* buf
, int used
,
1137 unsigned int last_render
)
1139 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
1140 drm_i810_buf_priv_t
*buf_priv
= buf
->dev_private
;
1141 drm_i810_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
1142 unsigned long address
= (unsigned long)buf
->bus_address
;
1143 unsigned long start
= address
- dev
->agp
->base
;
1147 i810_kernel_lost_context(dev
);
1149 u
= cmpxchg(buf_priv
->in_use
, I810_BUF_CLIENT
, I810_BUF_HARDWARE
);
1150 if (u
!= I810_BUF_CLIENT
) {
1151 DRM_DEBUG("MC found buffer that isn't mine!\n");
1154 if (used
> 4 * 1024)
1157 sarea_priv
->dirty
= 0x7f;
1159 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address
, used
);
1161 dev_priv
->counter
++;
1162 DRM_DEBUG("dispatch counter : %ld\n", dev_priv
->counter
);
1163 DRM_DEBUG("i810_dma_dispatch_mc\n");
1164 DRM_DEBUG("start : %lx\n", start
);
1165 DRM_DEBUG("used : %d\n", used
);
1166 DRM_DEBUG("start + used - 4 : %ld\n", start
+ used
- 4);
1168 if (buf_priv
->currently_mapped
== I810_BUF_MAPPED
) {
1170 *(u32
*) ((u32
) buf_priv
->virtual + used
) = 0;
1174 i810_unmap_buffer(buf
);
1177 OUT_RING(CMD_OP_BATCH_BUFFER
);
1178 OUT_RING(start
| BB1_PROTECTED
);
1179 OUT_RING(start
+ used
- 4);
1184 OUT_RING(CMD_STORE_DWORD_IDX
);
1185 OUT_RING(buf_priv
->my_use_idx
);
1186 OUT_RING(I810_BUF_FREE
);
1189 OUT_RING(CMD_STORE_DWORD_IDX
);
1191 OUT_RING(last_render
);
1196 static int i810_dma_mc(struct inode
*inode
, struct file
*filp
,
1197 unsigned int cmd
, unsigned long arg
)
1199 drm_file_t
*priv
= filp
->private_data
;
1200 drm_device_t
*dev
= priv
->head
->dev
;
1201 drm_device_dma_t
*dma
= dev
->dma
;
1202 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1203 u32
*hw_status
= dev_priv
->hw_status_page
;
1204 drm_i810_sarea_t
*sarea_priv
= (drm_i810_sarea_t
*)
1205 dev_priv
->sarea_priv
;
1208 if (copy_from_user(&mc
, (drm_i810_mc_t __user
*) arg
, sizeof(mc
)))
1211 LOCK_TEST_WITH_RETURN(dev
, filp
);
1213 if (mc
.idx
>= dma
->buf_count
|| mc
.idx
< 0)
1216 i810_dma_dispatch_mc(dev
, dma
->buflist
[mc
.idx
], mc
.used
,
1219 atomic_add(mc
.used
, &dev
->counts
[_DRM_STAT_SECONDARY
]);
1220 atomic_inc(&dev
->counts
[_DRM_STAT_DMA
]);
1221 sarea_priv
->last_enqueue
= dev_priv
->counter
- 1;
1222 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1227 static int i810_rstatus(struct inode
*inode
, struct file
*filp
,
1228 unsigned int cmd
, unsigned long arg
)
1230 drm_file_t
*priv
= filp
->private_data
;
1231 drm_device_t
*dev
= priv
->head
->dev
;
1232 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1234 return (int)(((u32
*) (dev_priv
->hw_status_page
))[4]);
1237 static int i810_ov0_info(struct inode
*inode
, struct file
*filp
,
1238 unsigned int cmd
, unsigned long arg
)
1240 drm_file_t
*priv
= filp
->private_data
;
1241 drm_device_t
*dev
= priv
->head
->dev
;
1242 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1243 drm_i810_overlay_t data
;
1245 data
.offset
= dev_priv
->overlay_offset
;
1246 data
.physical
= dev_priv
->overlay_physical
;
1248 ((drm_i810_overlay_t __user
*) arg
, &data
, sizeof(data
)))
1253 static int i810_fstatus(struct inode
*inode
, struct file
*filp
,
1254 unsigned int cmd
, unsigned long arg
)
1256 drm_file_t
*priv
= filp
->private_data
;
1257 drm_device_t
*dev
= priv
->head
->dev
;
1258 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1260 LOCK_TEST_WITH_RETURN(dev
, filp
);
1262 return I810_READ(0x30008);
1265 static int i810_ov0_flip(struct inode
*inode
, struct file
*filp
,
1266 unsigned int cmd
, unsigned long arg
)
1268 drm_file_t
*priv
= filp
->private_data
;
1269 drm_device_t
*dev
= priv
->head
->dev
;
1270 drm_i810_private_t
*dev_priv
= (drm_i810_private_t
*) dev
->dev_private
;
1272 LOCK_TEST_WITH_RETURN(dev
, filp
);
1274 //Tell the overlay to update
1275 I810_WRITE(0x30000, dev_priv
->overlay_physical
| 0x80000000);
1280 /* Not sure why this isn't set all the time:
1282 static void i810_do_init_pageflip(drm_device_t
* dev
)
1284 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
1286 DRM_DEBUG("%s\n", __FUNCTION__
);
1287 dev_priv
->page_flipping
= 1;
1288 dev_priv
->current_page
= 0;
1289 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
1292 static int i810_do_cleanup_pageflip(drm_device_t
* dev
)
1294 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
1296 DRM_DEBUG("%s\n", __FUNCTION__
);
1297 if (dev_priv
->current_page
!= 0)
1298 i810_dma_dispatch_flip(dev
);
1300 dev_priv
->page_flipping
= 0;
1304 static int i810_flip_bufs(struct inode
*inode
, struct file
*filp
,
1305 unsigned int cmd
, unsigned long arg
)
1307 drm_file_t
*priv
= filp
->private_data
;
1308 drm_device_t
*dev
= priv
->head
->dev
;
1309 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
1311 DRM_DEBUG("%s\n", __FUNCTION__
);
1313 LOCK_TEST_WITH_RETURN(dev
, filp
);
1315 if (!dev_priv
->page_flipping
)
1316 i810_do_init_pageflip(dev
);
1318 i810_dma_dispatch_flip(dev
);
1322 void i810_driver_pretakedown(drm_device_t
* dev
)
1324 i810_dma_cleanup(dev
);
1327 void i810_driver_prerelease(drm_device_t
* dev
, DRMFILE filp
)
1329 if (dev
->dev_private
) {
1330 drm_i810_private_t
*dev_priv
= dev
->dev_private
;
1331 if (dev_priv
->page_flipping
) {
1332 i810_do_cleanup_pageflip(dev
);
1337 void i810_driver_release(drm_device_t
* dev
, struct file
*filp
)
1339 i810_reclaim_buffers(dev
, filp
);
1342 int i810_driver_dma_quiescent(drm_device_t
* dev
)
1344 i810_dma_quiescent(dev
);
1348 drm_ioctl_desc_t i810_ioctls
[] = {
1349 [DRM_IOCTL_NR(DRM_I810_INIT
)] = {i810_dma_init
, 1, 1},
1350 [DRM_IOCTL_NR(DRM_I810_VERTEX
)] = {i810_dma_vertex
, 1, 0},
1351 [DRM_IOCTL_NR(DRM_I810_CLEAR
)] = {i810_clear_bufs
, 1, 0},
1352 [DRM_IOCTL_NR(DRM_I810_FLUSH
)] = {i810_flush_ioctl
, 1, 0},
1353 [DRM_IOCTL_NR(DRM_I810_GETAGE
)] = {i810_getage
, 1, 0},
1354 [DRM_IOCTL_NR(DRM_I810_GETBUF
)] = {i810_getbuf
, 1, 0},
1355 [DRM_IOCTL_NR(DRM_I810_SWAP
)] = {i810_swap_bufs
, 1, 0},
1356 [DRM_IOCTL_NR(DRM_I810_COPY
)] = {i810_copybuf
, 1, 0},
1357 [DRM_IOCTL_NR(DRM_I810_DOCOPY
)] = {i810_docopy
, 1, 0},
1358 [DRM_IOCTL_NR(DRM_I810_OV0INFO
)] = {i810_ov0_info
, 1, 0},
1359 [DRM_IOCTL_NR(DRM_I810_FSTATUS
)] = {i810_fstatus
, 1, 0},
1360 [DRM_IOCTL_NR(DRM_I810_OV0FLIP
)] = {i810_ov0_flip
, 1, 0},
1361 [DRM_IOCTL_NR(DRM_I810_MC
)] = {i810_dma_mc
, 1, 1},
1362 [DRM_IOCTL_NR(DRM_I810_RSTATUS
)] = {i810_rstatus
, 1, 0},
1363 [DRM_IOCTL_NR(DRM_I810_FLIP
)] = {i810_flip_bufs
, 1, 0}
1366 int i810_max_ioctl
= DRM_ARRAY_SIZE(i810_ioctls
);
1369 * Determine if the device really is AGP or not.
1371 * All Intel graphics chipsets are treated as AGP, even if they are really
1374 * \param dev The device to be tested.
1377 * A value of 1 is always retured to indictate every i810 is AGP.
1379 int i810_driver_device_is_agp(drm_device_t
* dev
)