[IA64-SGI] fix bte_copy() calling smp_processor_id() while preemptible
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / ia64 / sn / kernel / bte.c
blob45854c637e9ca035f2d16dac86da2698ec300030
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
7 */
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <asm/sn/nodepda.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/arch.h>
14 #include <asm/sn/sn_cpuid.h>
15 #include <asm/sn/pda.h>
16 #include <asm/sn/shubio.h>
17 #include <asm/nodedata.h>
18 #include <asm/delay.h>
20 #include <linux/bootmem.h>
21 #include <linux/string.h>
22 #include <linux/sched.h>
24 #include <asm/sn/bte.h>
26 #ifndef L1_CACHE_MASK
27 #define L1_CACHE_MASK (L1_CACHE_BYTES - 1)
28 #endif
30 /* two interfaces on two btes */
31 #define MAX_INTERFACES_TO_TRY 4
32 #define MAX_NODES_TO_TRY 2
34 static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
36 nodepda_t *tmp_nodepda;
38 if (nasid_to_cnodeid(nasid) == -1)
39 return (struct bteinfo_s *)NULL;;
41 tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
42 return &tmp_nodepda->bte_if[interface];
46 static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
48 if (is_shub2()) {
49 BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24)));
50 } else {
51 BTE_LNSTAT_STORE(bte, len);
52 BTE_CTRL_STORE(bte, mode);
56 /************************************************************************
57 * Block Transfer Engine copy related functions.
59 ***********************************************************************/
62 * bte_copy(src, dest, len, mode, notification)
64 * Use the block transfer engine to move kernel memory from src to dest
65 * using the assigned mode.
67 * Paramaters:
68 * src - physical address of the transfer source.
69 * dest - physical address of the transfer destination.
70 * len - number of bytes to transfer from source to dest.
71 * mode - hardware defined. See reference information
72 * for IBCT0/1 in the SHUB Programmers Reference
73 * notification - kernel virtual address of the notification cache
74 * line. If NULL, the default is used and
75 * the bte_copy is synchronous.
77 * NOTE: This function requires src, dest, and len to
78 * be cacheline aligned.
80 bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
82 u64 transfer_size;
83 u64 transfer_stat;
84 u64 notif_phys_addr;
85 struct bteinfo_s *bte;
86 bte_result_t bte_status;
87 unsigned long irq_flags;
88 unsigned long itc_end = 0;
89 int nasid_to_try[MAX_NODES_TO_TRY];
90 int my_nasid = get_nasid();
91 int bte_if_index, nasid_index;
92 int bte_first, btes_per_node = BTES_PER_NODE;
94 BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
95 src, dest, len, mode, notification));
97 if (len == 0) {
98 return BTE_SUCCESS;
101 BUG_ON((len & L1_CACHE_MASK) ||
102 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK));
103 BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT)));
106 * Start with interface corresponding to cpu number
108 bte_first = raw_smp_processor_id() % btes_per_node;
110 if (mode & BTE_USE_DEST) {
111 /* try remote then local */
112 nasid_to_try[0] = NASID_GET(dest);
113 if (mode & BTE_USE_ANY) {
114 nasid_to_try[1] = my_nasid;
115 } else {
116 nasid_to_try[1] = (int)NULL;
118 } else {
119 /* try local then remote */
120 nasid_to_try[0] = my_nasid;
121 if (mode & BTE_USE_ANY) {
122 nasid_to_try[1] = NASID_GET(dest);
123 } else {
124 nasid_to_try[1] = (int)NULL;
128 retry_bteop:
129 do {
130 local_irq_save(irq_flags);
132 bte_if_index = bte_first;
133 nasid_index = 0;
135 /* Attempt to lock one of the BTE interfaces. */
136 while (nasid_index < MAX_NODES_TO_TRY) {
137 bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);
139 if (bte == NULL) {
140 continue;
143 if (spin_trylock(&bte->spinlock)) {
144 if (!(*bte->most_rcnt_na & BTE_WORD_AVAILABLE) ||
145 (BTE_LNSTAT_LOAD(bte) & BTE_ACTIVE)) {
146 /* Got the lock but BTE still busy */
147 spin_unlock(&bte->spinlock);
148 } else {
149 /* we got the lock and it's not busy */
150 break;
154 bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
155 if (bte_if_index == bte_first) {
157 * We've tried all interfaces on this node
159 nasid_index++;
162 bte = NULL;
165 if (bte != NULL) {
166 break;
169 local_irq_restore(irq_flags);
171 if (!(mode & BTE_WACQUIRE)) {
172 return BTEFAIL_NOTAVAIL;
174 } while (1);
176 if (notification == NULL) {
177 /* User does not want to be notified. */
178 bte->most_rcnt_na = &bte->notify;
179 } else {
180 bte->most_rcnt_na = notification;
183 /* Calculate the number of cache lines to transfer. */
184 transfer_size = ((len >> L1_CACHE_SHIFT) & BTE_LEN_MASK);
186 /* Initialize the notification to a known value. */
187 *bte->most_rcnt_na = BTE_WORD_BUSY;
188 notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na));
190 if (is_shub2()) {
191 src = SH2_TIO_PHYS_TO_DMA(src);
192 dest = SH2_TIO_PHYS_TO_DMA(dest);
193 notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr);
195 /* Set the source and destination registers */
196 BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
197 BTE_SRC_STORE(bte, TO_PHYS(src));
198 BTE_PRINTKV(("IBDA = 0x%lx)\n", (TO_PHYS(dest))));
199 BTE_DEST_STORE(bte, TO_PHYS(dest));
201 /* Set the notification register */
202 BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
203 BTE_NOTIF_STORE(bte, notif_phys_addr);
205 /* Initiate the transfer */
206 BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
207 bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));
209 itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
211 spin_unlock_irqrestore(&bte->spinlock, irq_flags);
213 if (notification != NULL) {
214 return BTE_SUCCESS;
217 while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
218 cpu_relax();
219 if (ia64_get_itc() > itc_end) {
220 BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
221 NASID_GET(bte->bte_base_addr), bte->bte_num,
222 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na) );
223 bte->bte_error_count++;
224 bte->bh_error = IBLS_ERROR;
225 bte_error_handler((unsigned long)NODEPDA(bte->bte_cnode));
226 *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
227 goto retry_bteop;
231 BTE_PRINTKV((" Delay Done. IBLS = 0x%lx, most_rcnt_na = 0x%lx\n",
232 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
234 if (transfer_stat & IBLS_ERROR) {
235 bte_status = transfer_stat & ~IBLS_ERROR;
236 } else {
237 bte_status = BTE_SUCCESS;
239 *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
241 BTE_PRINTK(("Returning status is 0x%lx and most_rcnt_na is 0x%lx\n",
242 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
244 return bte_status;
247 EXPORT_SYMBOL(bte_copy);
250 * bte_unaligned_copy(src, dest, len, mode)
252 * use the block transfer engine to move kernel
253 * memory from src to dest using the assigned mode.
255 * Paramaters:
256 * src - physical address of the transfer source.
257 * dest - physical address of the transfer destination.
258 * len - number of bytes to transfer from source to dest.
259 * mode - hardware defined. See reference information
260 * for IBCT0/1 in the SGI documentation.
262 * NOTE: If the source, dest, and len are all cache line aligned,
263 * then it would be _FAR_ preferrable to use bte_copy instead.
265 bte_result_t bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode)
267 int destFirstCacheOffset;
268 u64 headBteSource;
269 u64 headBteLen;
270 u64 headBcopySrcOffset;
271 u64 headBcopyDest;
272 u64 headBcopyLen;
273 u64 footBteSource;
274 u64 footBteLen;
275 u64 footBcopyDest;
276 u64 footBcopyLen;
277 bte_result_t rv;
278 char *bteBlock, *bteBlock_unaligned;
280 if (len == 0) {
281 return BTE_SUCCESS;
284 /* temporary buffer used during unaligned transfers */
285 bteBlock_unaligned = kmalloc(len + 3 * L1_CACHE_BYTES,
286 GFP_KERNEL | GFP_DMA);
287 if (bteBlock_unaligned == NULL) {
288 return BTEFAIL_NOTAVAIL;
290 bteBlock = (char *)L1_CACHE_ALIGN((u64) bteBlock_unaligned);
292 headBcopySrcOffset = src & L1_CACHE_MASK;
293 destFirstCacheOffset = dest & L1_CACHE_MASK;
296 * At this point, the transfer is broken into
297 * (up to) three sections. The first section is
298 * from the start address to the first physical
299 * cache line, the second is from the first physical
300 * cache line to the last complete cache line,
301 * and the third is from the last cache line to the
302 * end of the buffer. The first and third sections
303 * are handled by bte copying into a temporary buffer
304 * and then bcopy'ing the necessary section into the
305 * final location. The middle section is handled with
306 * a standard bte copy.
308 * One nasty exception to the above rule is when the
309 * source and destination are not symetrically
310 * mis-aligned. If the source offset from the first
311 * cache line is different from the destination offset,
312 * we make the first section be the entire transfer
313 * and the bcopy the entire block into place.
315 if (headBcopySrcOffset == destFirstCacheOffset) {
318 * Both the source and destination are the same
319 * distance from a cache line boundary so we can
320 * use the bte to transfer the bulk of the
321 * data.
323 headBteSource = src & ~L1_CACHE_MASK;
324 headBcopyDest = dest;
325 if (headBcopySrcOffset) {
326 headBcopyLen =
327 (len >
328 (L1_CACHE_BYTES -
329 headBcopySrcOffset) ? L1_CACHE_BYTES
330 - headBcopySrcOffset : len);
331 headBteLen = L1_CACHE_BYTES;
332 } else {
333 headBcopyLen = 0;
334 headBteLen = 0;
337 if (len > headBcopyLen) {
338 footBcopyLen = (len - headBcopyLen) & L1_CACHE_MASK;
339 footBteLen = L1_CACHE_BYTES;
341 footBteSource = src + len - footBcopyLen;
342 footBcopyDest = dest + len - footBcopyLen;
344 if (footBcopyDest == (headBcopyDest + headBcopyLen)) {
346 * We have two contigous bcopy
347 * blocks. Merge them.
349 headBcopyLen += footBcopyLen;
350 headBteLen += footBteLen;
351 } else if (footBcopyLen > 0) {
352 rv = bte_copy(footBteSource,
353 ia64_tpa((unsigned long)bteBlock),
354 footBteLen, mode, NULL);
355 if (rv != BTE_SUCCESS) {
356 kfree(bteBlock_unaligned);
357 return rv;
360 memcpy(__va(footBcopyDest),
361 (char *)bteBlock, footBcopyLen);
363 } else {
364 footBcopyLen = 0;
365 footBteLen = 0;
368 if (len > (headBcopyLen + footBcopyLen)) {
369 /* now transfer the middle. */
370 rv = bte_copy((src + headBcopyLen),
371 (dest +
372 headBcopyLen),
373 (len - headBcopyLen -
374 footBcopyLen), mode, NULL);
375 if (rv != BTE_SUCCESS) {
376 kfree(bteBlock_unaligned);
377 return rv;
381 } else {
384 * The transfer is not symetric, we will
385 * allocate a buffer large enough for all the
386 * data, bte_copy into that buffer and then
387 * bcopy to the destination.
390 /* Add the leader from source */
391 headBteLen = len + (src & L1_CACHE_MASK);
392 /* Add the trailing bytes from footer. */
393 headBteLen += L1_CACHE_BYTES - (headBteLen & L1_CACHE_MASK);
394 headBteSource = src & ~L1_CACHE_MASK;
395 headBcopySrcOffset = src & L1_CACHE_MASK;
396 headBcopyDest = dest;
397 headBcopyLen = len;
400 if (headBcopyLen > 0) {
401 rv = bte_copy(headBteSource,
402 ia64_tpa((unsigned long)bteBlock), headBteLen,
403 mode, NULL);
404 if (rv != BTE_SUCCESS) {
405 kfree(bteBlock_unaligned);
406 return rv;
409 memcpy(__va(headBcopyDest), ((char *)bteBlock +
410 headBcopySrcOffset), headBcopyLen);
412 kfree(bteBlock_unaligned);
413 return BTE_SUCCESS;
416 EXPORT_SYMBOL(bte_unaligned_copy);
418 /************************************************************************
419 * Block Transfer Engine initialization functions.
421 ***********************************************************************/
424 * bte_init_node(nodepda, cnode)
426 * Initialize the nodepda structure with BTE base addresses and
427 * spinlocks.
429 void bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
431 int i;
434 * Indicate that all the block transfer engines on this node
435 * are available.
439 * Allocate one bte_recover_t structure per node. It holds
440 * the recovery lock for node. All the bte interface structures
441 * will point at this one bte_recover structure to get the lock.
443 spin_lock_init(&mynodepda->bte_recovery_lock);
444 init_timer(&mynodepda->bte_recovery_timer);
445 mynodepda->bte_recovery_timer.function = bte_error_handler;
446 mynodepda->bte_recovery_timer.data = (unsigned long)mynodepda;
448 for (i = 0; i < BTES_PER_NODE; i++) {
449 u64 *base_addr;
451 /* Which link status register should we use? */
452 base_addr = (u64 *)
453 REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode), BTE_BASE_ADDR(i));
454 mynodepda->bte_if[i].bte_base_addr = base_addr;
455 mynodepda->bte_if[i].bte_source_addr = BTE_SOURCE_ADDR(base_addr);
456 mynodepda->bte_if[i].bte_destination_addr = BTE_DEST_ADDR(base_addr);
457 mynodepda->bte_if[i].bte_control_addr = BTE_CTRL_ADDR(base_addr);
458 mynodepda->bte_if[i].bte_notify_addr = BTE_NOTIF_ADDR(base_addr);
461 * Initialize the notification and spinlock
462 * so the first transfer can occur.
464 mynodepda->bte_if[i].most_rcnt_na =
465 &(mynodepda->bte_if[i].notify);
466 mynodepda->bte_if[i].notify = BTE_WORD_AVAILABLE;
467 spin_lock_init(&mynodepda->bte_if[i].spinlock);
469 mynodepda->bte_if[i].bte_cnode = cnode;
470 mynodepda->bte_if[i].bte_error_count = 0;
471 mynodepda->bte_if[i].bte_num = i;
472 mynodepda->bte_if[i].cleanup_active = 0;
473 mynodepda->bte_if[i].bh_error = 0;