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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / oss / trident.c
blob72a8a0ed36a2855cca84d0d64a1c3844a96ab344
1 /*
2 * OSS driver for Linux 2.[46].x for
3 *
4 * Trident 4D-Wave
5 * SiS 7018
6 * ALi 5451
7 * Tvia/IGST CyberPro 5050
8 *
9 * Driver: Alan Cox <alan@redhat.com>
10 *
11 * Built from:
12 * Low level code: <audio@tridentmicro.com> from ALSA
13 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
14 * Extended by: Zach Brown <zab@redhat.com>
15 *
16 * Hacked up by:
17 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
18 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
19 * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support
20 * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support
21 * Peter Wächtler <pwaechtler@loewe-komp.de> CyberPro5050 support
22 * Muli Ben-Yehuda <mulix@mulix.org>
23 *
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38 *
39 * History
40 * v0.14.10j
41 * January 3 2004 Eugene Teo <eugeneteo@eugeneteo.net>
42 * minor cleanup to use pr_debug instead of TRDBG since it is already
43 * defined in linux/kernel.h.
44 * v0.14.10i
45 * December 29 2003 Muli Ben-Yehuda <mulix@mulix.org>
46 * major cleanup for 2.6, fix a few error patch buglets
47 * with returning without properly cleaning up first,
48 * get rid of lock_kernel().
49 * v0.14.10h
50 * Sept 10 2002 Pascal Schmidt <der.eremit@email.de>
51 * added support for ALi 5451 joystick port
52 * v0.14.10g
53 * Sept 05 2002 Alan Cox <alan@redhat.com>
54 * adapt to new pci joystick attachment interface
55 * v0.14.10f
56 * July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
57 * patch from Eric Lemar (via Ian Soboroff): in suspend and resume,
58 * fix wrong cast from pci_dev* to struct trident_card*.
59 * v0.14.10e
60 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
61 * rewrite the DMA buffer allocation/deallcoation functions, to make it
62 * modular and fix a bug where we would call free_pages on memory
63 * obtained with pci_alloc_consistent. Also remove unnecessary #ifdef
64 * CONFIG_PROC_FS and various other cleanups.
65 * v0.14.10d
66 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
67 * made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming
68 * my syslog with hundreds of messages.
69 * v0.14.10c
70 * July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
71 * Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle
72 * and the coding style used in the rest of the file.
73 * v0.14.10b
74 * June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
75 * add a missing unlock_set_fmt, remove a superflous lock/unlock pair
76 * with nothing in between.
77 * v0.14.10a
78 * June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
79 * use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns
80 * per line, use 'do {} while (0)' in statement macros.
81 * v0.14.10
82 * June 6 2002 Lei Hu <Lei_hu@ali.com.tw>
83 * rewrite the part to read/write registers of audio codec for Ali5451
84 * v0.14.9e
85 * January 2 2002 Vojtech Pavlik <vojtech@ucw.cz> added gameport
86 * support to avoid resource conflict with pcigame.c
87 * v0.14.9d
88 * October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br>
89 * use set_current_state, properly release resources on failure in
90 * trident_probe, get rid of check_region
91 * v0.14.9c
92 * August 10 2001 Peter Wächtler <pwaechtler@loewe-komp.de>
93 * added support for Tvia (formerly Integraphics/IGST) CyberPro5050
94 * this chip is often found in settop boxes (combined video+audio)
95 * v0.14.9b
96 * Switch to static inline not extern inline (gcc 3)
97 * v0.14.9a
98 * Aug 6 2001 Alan Cox
99 * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified
100 * the existing logic (the BH doesn't help as ac97 is lock_irqsave)
101 * and used del_timer_sync to clean up
102 * Fixed a problem where the ALi change broke my generic card
103 * v0.14.9
104 * Jul 10 2001 Matt Wu
105 * Add H/W Volume Control
106 * v0.14.8a
107 * July 7 2001 Alan Cox
108 * Moved Matt Wu's ac97 register cache into the card structure
109 * v0.14.8
110 * Apr 30 2001 Matt Wu
111 * Set EBUF1 and EBUF2 to still mode
112 * Add dc97/ac97 reset function
113 * Fix power management: ali_restore_regs
114 * unreleased
115 * Mar 09 2001 Matt Wu
116 * Add cache for ac97 access
117 * v0.14.7
118 * Feb 06 2001 Matt Wu
119 * Fix ac97 initialization
120 * Fix bug: an extra tail will be played when playing
121 * Jan 05 2001 Matt Wu
122 * Implement multi-channels and S/PDIF in support for ALi 1535+
123 * v0.14.6
124 * Nov 1 2000 Ching-Ling Lee
125 * Fix the bug of memory leak when switching 5.1-channels to 2 channels.
126 * Add lock protection into dynamic changing format of data.
127 * Oct 18 2000 Ching-Ling Lee
128 * 5.1-channels support for ALi
129 * June 28 2000 Ching-Ling Lee
130 * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user
131 * Simple Power Management support for ALi
132 * v0.14.5 May 23 2000 Ollie Lho
133 * Misc bug fix from the Net
134 * v0.14.4 May 20 2000 Aaron Holtzman
135 * Fix kfree'd memory access in release
136 * Fix race in open while looking for a free virtual channel slot
137 * remove open_wait wq (which appears to be unused)
138 * v0.14.3 May 10 2000 Ollie Lho
139 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
140 * v0.14.2 Mar 29 2000 Ching-Ling Lee
141 * Add clear to silence advance in trident_update_ptr
142 * fix invalid data of the end of the sound
143 * v0.14.1 Mar 24 2000 Ching-Ling Lee
144 * ALi 5451 support added, playback and recording O.K.
145 * ALi 5451 originally developed and structured based on sonicvibes, and
146 * suggested to merge into this file by Alan Cox.
147 * v0.14 Mar 15 2000 Ollie Lho
148 * 5.1 channel output support with channel binding. What's the Matrix ?
149 * v0.13.1 Mar 10 2000 Ollie Lho
150 * few minor bugs on dual codec support, needs more testing
151 * v0.13 Mar 03 2000 Ollie Lho
152 * new pci_* for 2.4 kernel, back ported to 2.2
153 * v0.12 Feb 23 2000 Ollie Lho
154 * Preliminary Recording support
155 * v0.11.2 Feb 19 2000 Ollie Lho
156 * removed incomplete full-dulplex support
157 * v0.11.1 Jan 28 2000 Ollie Lho
158 * small bug in setting sample rate for 4d-nx (reported by Aaron)
159 * v0.11 Jan 27 2000 Ollie Lho
160 * DMA bug, scheduler latency, second try
161 * v0.10 Jan 24 2000 Ollie Lho
162 * DMA bug fixed, found kernel scheduling problem
163 * v0.09 Jan 20 2000 Ollie Lho
164 * Clean up of channel register access routine (prepare for channel binding)
165 * v0.08 Jan 14 2000 Ollie Lho
166 * Isolation of AC97 codec code
167 * v0.07 Jan 13 2000 Ollie Lho
168 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
169 * v0.06 Jan 11 2000 Ollie Lho
170 * Preliminary support for dual (more ?) AC97 codecs
171 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
172 * adapt to 2.3.x new __setup/__init call
173 * v0.04 Dec 31 1999 Ollie Lho
174 * Multiple Open, using Middle Loop Interrupt to smooth playback
175 * v0.03 Dec 24 1999 Ollie Lho
176 * mem leak in prog_dmabuf and dealloc_dmabuf removed
177 * v0.02 Dec 15 1999 Ollie Lho
178 * SiS 7018 support added, playback O.K.
179 * v0.01 Alan Cox et. al.
180 * Initial Release in kernel 2.3.30, does not work
181 *
182 * ToDo
183 * Clean up of low level channel register access code. (done)
184 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
185 * Dual AC97 codecs support (done)
186 * Recording support (done)
187 * Mmap support
188 * "Channel Binding" ioctl extension (done)
189 * new pci device driver interface for 2.4 kernel (done)
190 *
191 * Lock order (high->low)
192 * lock - hardware lock
193 * open_mutex - guard opens
194 * sem - guard dmabuf, write re-entry etc
195 */
196
197 #include <linux/module.h>
198 #include <linux/string.h>
199 #include <linux/ctype.h>
200 #include <linux/ioport.h>
201 #include <linux/sched.h>
202 #include <linux/delay.h>
203 #include <linux/sound.h>
204 #include <linux/slab.h>
205 #include <linux/soundcard.h>
206 #include <linux/pci.h>
207 #include <linux/init.h>
208 #include <linux/poll.h>
209 #include <linux/spinlock.h>
210 #include <linux/smp_lock.h>
211 #include <linux/ac97_codec.h>
212 #include <linux/bitops.h>
213 #include <linux/proc_fs.h>
214 #include <linux/interrupt.h>
215 #include <linux/pm.h>
216 #include <linux/gameport.h>
217 #include <linux/kernel.h>
218 #include <linux/mutex.h>
219 #include <linux/mm.h>
220
221 #include <asm/uaccess.h>
222 #include <asm/io.h>
223 #include <asm/dma.h>
224
225 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
226 #include <asm/hwrpb.h>
227 #endif
228
229 #include "trident.h"
230
231 #define DRIVER_VERSION "0.14.10j-2.6"
232
233 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
234 #define SUPPORT_JOYSTICK 1
235 #endif
236
237 /* magic numbers to protect our data structures */
238 #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
239 #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
240
241 #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
242 #define ALI_DMA_MASK 0x7fffffff /* ALI Tridents have 31-bit DMA. Wow. */
243
244 #define NR_HW_CH 32
245
246 /* maximum number of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
247 have 2 SDATA_IN lines (currently) */
248 #define NR_AC97 2
249
250 /* minor number of /dev/swmodem (temporary, experimental) */
251 #define SND_DEV_SWMODEM 7
252
253 static const unsigned ali_multi_channels_5_1[] = {
254 /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL, */
255 ALI_CENTER_CHANNEL,
256 ALI_LEF_CHANNEL,
257 ALI_SURR_LEFT_CHANNEL,
258 ALI_SURR_RIGHT_CHANNEL
259 };
260
261 static const unsigned sample_size[] = { 1, 2, 2, 4 };
262 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
263
264 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
265
266 enum {
267 TRIDENT_4D_DX = 0,
268 TRIDENT_4D_NX,
269 SIS_7018,
270 ALI_5451,
271 CYBER5050
272 };
273
274 static char *card_names[] = {
275 "Trident 4DWave DX",
276 "Trident 4DWave NX",
277 "SiS 7018 PCI Audio",
278 "ALi Audio Accelerator",
279 "Tvia/IGST CyberPro 5050"
280 };
281
282 static struct pci_device_id trident_pci_tbl[] = {
283 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX),
284 PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TRIDENT_4D_DX},
285 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX),
286 0, 0, TRIDENT_4D_NX},
287 {PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018), 0, 0, SIS_7018},
288 {PCI_DEVICE(PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451), 0, 0, ALI_5451},
289 {PCI_DEVICE(PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050),
290 0, 0, CYBER5050},
291 {0,}
292 };
293
294 MODULE_DEVICE_TABLE(pci, trident_pci_tbl);
295
296 /* "software" or virtual channel, an instance of opened /dev/dsp */
297 struct trident_state {
298 unsigned int magic;
299 struct trident_card *card; /* Card info */
300
301 /* file mode */
302 mode_t open_mode;
303
304 /* virtual channel number */
305 int virt;
306
307 struct dmabuf {
308 /* wave sample stuff */
309 unsigned int rate;
310 unsigned char fmt, enable;
311
312 /* hardware channel */
313 struct trident_channel *channel;
314
315 /* OSS buffer management stuff */
316 void *rawbuf;
317 dma_addr_t dma_handle;
318 unsigned buforder;
319 unsigned numfrag;
320 unsigned fragshift;
321
322 /* our buffer acts like a circular ring */
323 unsigned hwptr; /* where dma last started, updated by update_ptr */
324 unsigned swptr; /* where driver last clear/filled, updated by read/write */
325 int count; /* bytes to be comsumed or been generated by dma machine */
326 unsigned total_bytes; /* total bytes dmaed by hardware */
327
328 unsigned error; /* number of over/underruns */
329 /* put process on wait queue when no more space in buffer */
330 wait_queue_head_t wait;
331
332 /* redundant, but makes calculations easier */
333 unsigned fragsize;
334 unsigned dmasize;
335 unsigned fragsamples;
336
337 /* OSS stuff */
338 unsigned mapped:1;
339 unsigned ready:1;
340 unsigned endcleared:1;
341 unsigned update_flag;
342 unsigned ossfragshift;
343 int ossmaxfrags;
344 unsigned subdivision;
345
346 } dmabuf;
347
348 /* 5.1 channels */
349 struct trident_state *other_states[4];
350 int multi_channels_adjust_count;
351 unsigned chans_num;
352 unsigned long fmt_flag;
353 /* Guard against mmap/write/read races */
354 struct mutex sem;
355
356 };
357
358 /* hardware channels */
359 struct trident_channel {
360 int num; /* channel number */
361 u32 lba; /* Loop Begine Address, where dma buffer starts */
362 u32 eso; /* End Sample Offset, wehre dma buffer ends */
363 /* (in the unit of samples) */
364 u32 delta; /* delta value, sample rate / 48k for playback, */
365 /* 48k/sample rate for recording */
366 u16 attribute; /* control where PCM data go and come */
367 u16 fm_vol;
368 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
369 };
370
371 struct trident_pcm_bank_address {
372 u32 start;
373 u32 stop;
374 u32 aint;
375 u32 aint_en;
376 };
377
378 static struct trident_pcm_bank_address bank_a_addrs = {
379 T4D_START_A,
380 T4D_STOP_A,
381 T4D_AINT_A,
382 T4D_AINTEN_A
383 };
384
385 static struct trident_pcm_bank_address bank_b_addrs = {
386 T4D_START_B,
387 T4D_STOP_B,
388 T4D_AINT_B,
389 T4D_AINTEN_B
390 };
391
392 struct trident_pcm_bank {
393 /* register addresses to control bank operations */
394 struct trident_pcm_bank_address *addresses;
395 /* each bank has 32 channels */
396 u32 bitmap; /* channel allocation bitmap */
397 struct trident_channel channels[32];
398 };
399
400 struct trident_card {
401 unsigned int magic;
402
403 /* We keep trident cards in a linked list */
404 struct trident_card *next;
405
406 /* single open lock mechanism, only used for recording */
407 struct mutex open_mutex;
408
409 /* The trident has a certain amount of cross channel interaction
410 so we use a single per card lock */
411 spinlock_t lock;
412
413 /* PCI device stuff */
414 struct pci_dev *pci_dev;
415 u16 pci_id;
416 u8 revision;
417
418 /* soundcore stuff */
419 int dev_audio;
420
421 /* structures for abstraction of hardware facilities, codecs, */
422 /* banks and channels */
423 struct ac97_codec *ac97_codec[NR_AC97];
424 struct trident_pcm_bank banks[NR_BANKS];
425 struct trident_state *states[NR_HW_CH];
426
427 /* hardware resources */
428 unsigned long iobase;
429 u32 irq;
430
431 /* Function support */
432 struct trident_channel *(*alloc_pcm_channel) (struct trident_card *);
433 struct trident_channel *(*alloc_rec_pcm_channel) (struct trident_card *);
434 void (*free_pcm_channel) (struct trident_card *, unsigned int chan);
435 void (*address_interrupt) (struct trident_card *);
436
437 /* Added by Matt Wu 01-05-2001 for spdif in */
438 int multi_channel_use_count;
439 int rec_channel_use_count;
440 u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */
441 int mixer_regs_ready;
442
443 /* Added for hardware volume control */
444 int hwvolctl;
445 struct timer_list timer;
446
447 /* Game port support */
448 struct gameport *gameport;
449 };
450
451 enum dmabuf_mode {
452 DM_PLAYBACK = 0,
453 DM_RECORD
454 };
455
456 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
457 static u16 mask2attr[] = {
458 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
459 HSET, MIC, MODEM_LINE1, MODEM_LINE2,
460 I2S_LR, SPDIF_LR
461 };
462
463 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
464 static int attr2mask[] = {
465 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
466 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
467 };
468
469 /* Added by Matt Wu 01-05-2001 for spdif in */
470 static int ali_close_multi_channels(void);
471 static void ali_delay(struct trident_card *card, int interval);
472 static void ali_detect_spdif_rate(struct trident_card *card);
473
474 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val);
475 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg);
476
477 static struct trident_card *devs;
478
479 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
480 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
481
482 static int trident_open_mixdev(struct inode *inode, struct file *file);
483 static int trident_ioctl_mixdev(struct inode *inode, struct file *file,
484 unsigned int cmd, unsigned long arg);
485
486 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val);
487 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg);
488 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate);
489 static void ali_enable_special_channel(struct trident_state *stat);
490 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card);
491 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card);
492 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel);
493 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums);
494 static unsigned int ali_get_spdif_in_rate(struct trident_card *card);
495 static void ali_setup_spdif_in(struct trident_card *card);
496 static void ali_disable_spdif_in(struct trident_card *card);
497 static void ali_disable_special_channel(struct trident_card *card, int ch);
498 static void ali_setup_spdif_out(struct trident_card *card, int flag);
499 static int ali_write_5_1(struct trident_state *state,
500 const char __user *buffer,
501 int cnt_for_multi_channel, unsigned int *copy_count,
502 unsigned int *state_cnt);
503 static int ali_allocate_other_states_resources(struct trident_state *state,
504 int chan_nums);
505 static void ali_free_other_states_resources(struct trident_state *state);
506
507 #define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) do { \
508 (dma_ptr) += (offset); \
509 (buffer) += (offset); \
510 (cnt) -= (offset); \
511 (copy_count) += (offset); \
512 } while (0)
513
514 static inline int lock_set_fmt(struct trident_state* state)
515 {
516 if (test_and_set_bit(0, &state->fmt_flag))
517 return -EFAULT;
518
519 return 0;
520 }
521
522 static inline void unlock_set_fmt(struct trident_state* state)
523 {
524 clear_bit(0, &state->fmt_flag);
525 }
526
527 static int
528 trident_enable_loop_interrupts(struct trident_card *card)
529 {
530 u32 global_control;
531
532 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
533
534 switch (card->pci_id) {
535 case PCI_DEVICE_ID_SI_7018:
536 global_control |= (ENDLP_IE | MIDLP_IE | BANK_B_EN);
537 break;
538 case PCI_DEVICE_ID_ALI_5451:
539 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
540 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
541 case PCI_DEVICE_ID_INTERG_5050:
542 global_control |= (ENDLP_IE | MIDLP_IE);
543 break;
544 default:
545 return 0;
546 }
547
548 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
549
550 pr_debug("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
551 inl(TRID_REG(card, T4D_LFO_GC_CIR)));
552
553 return 1;
554 }
555
556 static int
557 trident_disable_loop_interrupts(struct trident_card *card)
558 {
559 u32 global_control;
560
561 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
562 global_control &= ~(ENDLP_IE | MIDLP_IE);
563 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
564
565 pr_debug("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
566 global_control);
567
568 return 1;
569 }
570
571 static void
572 trident_enable_voice_irq(struct trident_card *card, unsigned int channel)
573 {
574 unsigned int mask = 1 << (channel & 0x1f);
575 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
576 u32 reg, addr = bank->addresses->aint_en;
577
578 reg = inl(TRID_REG(card, addr));
579 reg |= mask;
580 outl(reg, TRID_REG(card, addr));
581
582 #ifdef DEBUG
583 reg = inl(TRID_REG(card, addr));
584 pr_debug("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
585 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
586 reg, addr);
587 #endif /* DEBUG */
588 }
589
590 static void
591 trident_disable_voice_irq(struct trident_card *card, unsigned int channel)
592 {
593 unsigned int mask = 1 << (channel & 0x1f);
594 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
595 u32 reg, addr = bank->addresses->aint_en;
596
597 reg = inl(TRID_REG(card, addr));
598 reg &= ~mask;
599 outl(reg, TRID_REG(card, addr));
600
601 /* Ack the channel in case the interrupt was set before we disable it. */
602 outl(mask, TRID_REG(card, bank->addresses->aint));
603
604 #ifdef DEBUG
605 reg = inl(TRID_REG(card, addr));
606 pr_debug("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
607 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
608 reg, addr);
609 #endif /* DEBUG */
610 }
611
612 static void
613 trident_start_voice(struct trident_card *card, unsigned int channel)
614 {
615 unsigned int mask = 1 << (channel & 0x1f);
616 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
617 u32 addr = bank->addresses->start;
618
619 #ifdef DEBUG
620 u32 reg;
621 #endif /* DEBUG */
622
623 outl(mask, TRID_REG(card, addr));
624
625 #ifdef DEBUG
626 reg = inl(TRID_REG(card, addr));
627 pr_debug("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n",
628 channel, addr == T4D_START_B ? "START_B" : "START_A",
629 reg, addr);
630 #endif /* DEBUG */
631 }
632
633 static void
634 trident_stop_voice(struct trident_card *card, unsigned int channel)
635 {
636 unsigned int mask = 1 << (channel & 0x1f);
637 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
638 u32 addr = bank->addresses->stop;
639
640 #ifdef DEBUG
641 u32 reg;
642 #endif /* DEBUG */
643
644 outl(mask, TRID_REG(card, addr));
645
646 #ifdef DEBUG
647 reg = inl(TRID_REG(card, addr));
648 pr_debug("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n",
649 channel, addr == T4D_STOP_B ? "STOP_B" : "STOP_A",
650 reg, addr);
651 #endif /* DEBUG */
652 }
653
654 static u32
655 trident_get_interrupt_mask(struct trident_card *card, unsigned int channel)
656 {
657 struct trident_pcm_bank *bank = &card->banks[channel];
658 u32 addr = bank->addresses->aint;
659 return inl(TRID_REG(card, addr));
660 }
661
662 static int
663 trident_check_channel_interrupt(struct trident_card *card, unsigned int channel)
664 {
665 unsigned int mask = 1 << (channel & 0x1f);
666 u32 reg = trident_get_interrupt_mask(card, channel >> 5);
667
668 #ifdef DEBUG
669 if (reg & mask)
670 pr_debug("trident: channel %d has interrupt, %s = 0x%08x\n",
671 channel, reg == T4D_AINT_B ? "AINT_B" : "AINT_A",
672 reg);
673 #endif /* DEBUG */
674 return (reg & mask) ? 1 : 0;
675 }
676
677 static void
678 trident_ack_channel_interrupt(struct trident_card *card, unsigned int channel)
679 {
680 unsigned int mask = 1 << (channel & 0x1f);
681 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
682 u32 reg, addr = bank->addresses->aint;
683
684 reg = inl(TRID_REG(card, addr));
685 reg &= mask;
686 outl(reg, TRID_REG(card, addr));
687
688 #ifdef DEBUG
689 reg = inl(TRID_REG(card, T4D_AINT_B));
690 pr_debug("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
691 channel, reg);
692 #endif /* DEBUG */
693 }
694
695 static struct trident_channel *
696 trident_alloc_pcm_channel(struct trident_card *card)
697 {
698 struct trident_pcm_bank *bank;
699 int idx;
700
701 bank = &card->banks[BANK_B];
702
703 for (idx = 31; idx >= 0; idx--) {
704 if (!(bank->bitmap & (1 << idx))) {
705 struct trident_channel *channel = &bank->channels[idx];
706 bank->bitmap |= 1 << idx;
707 channel->num = idx + 32;
708 return channel;
709 }
710 }
711
712 /* no more free channels available */
713 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
714 return NULL;
715 }
716
717 static void
718 trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
719 {
720 int bank;
721 unsigned char b;
722
723 if (channel < 31 || channel > 63)
724 return;
725
726 if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX ||
727 card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) {
728 b = inb(TRID_REG(card, T4D_REC_CH));
729 if ((b & ~0x80) == channel)
730 outb(0x0, TRID_REG(card, T4D_REC_CH));
731 }
732
733 bank = channel >> 5;
734 channel = channel & 0x1f;
735
736 card->banks[bank].bitmap &= ~(1 << (channel));
737 }
738
739 static struct trident_channel *
740 cyber_alloc_pcm_channel(struct trident_card *card)
741 {
742 struct trident_pcm_bank *bank;
743 int idx;
744
745 /* The cyberpro 5050 has only 32 voices and one bank */
746 /* .. at least they are not documented (if you want to call that
747 * crap documentation), perhaps broken ? */
748
749 bank = &card->banks[BANK_A];
750
751 for (idx = 31; idx >= 0; idx--) {
752 if (!(bank->bitmap & (1 << idx))) {
753 struct trident_channel *channel = &bank->channels[idx];
754 bank->bitmap |= 1 << idx;
755 channel->num = idx;
756 return channel;
757 }
758 }
759
760 /* no more free channels available */
761 printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n");
762 return NULL;
763 }
764
765 static void
766 cyber_free_pcm_channel(struct trident_card *card, unsigned int channel)
767 {
768 if (channel > 31)
769 return;
770 card->banks[BANK_A].bitmap &= ~(1 << (channel));
771 }
772
773 static inline void
774 cyber_outidx(int port, int idx, int data)
775 {
776 outb(idx, port);
777 outb(data, port + 1);
778 }
779
780 static inline int
781 cyber_inidx(int port, int idx)
782 {
783 outb(idx, port);
784 return inb(port + 1);
785 }
786
787 static int
788 cyber_init_ritual(struct trident_card *card)
789 {
790 /* some black magic, taken from SDK samples */
791 /* remove this and nothing will work */
792 int portDat;
793 int ret = 0;
794 unsigned long flags;
795
796 /*
797 * Keep interrupts off for the configure - we don't want to
798 * clash with another cyberpro config event
799 */
800
801 spin_lock_irqsave(&card->lock, flags);
802 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
803 /* enable, if it was disabled */
804 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
805 printk(KERN_INFO "cyberpro5050: enabling audio controller\n");
806 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE,
807 portDat | CYBER_BMSK_AUENZ_ENABLE);
808 /* check again if hardware is enabled now */
809 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
810 }
811 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
812 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n");
813 ret = -1;
814 } else {
815 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE,
816 CYBER_BMSK_AUDIO_INT_ENABLE);
817 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x01);
818 cyber_outidx(CYBER_PORT_AUDIO, 0xba, 0x20);
819 cyber_outidx(CYBER_PORT_AUDIO, 0xbb, 0x08);
820 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x02);
821 cyber_outidx(CYBER_PORT_AUDIO, 0xb3, 0x06);
822 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x00);
823 }
824 spin_unlock_irqrestore(&card->lock, flags);
825 return ret;
826 }
827
828 /* called with spin lock held */
829
830 static int
831 trident_load_channel_registers(struct trident_card *card, u32 * data,
832 unsigned int channel)
833 {
834 int i;
835
836 if (channel > 63)
837 return 0;
838
839 /* select hardware channel to write */
840 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
841
842 /* Output the channel registers, but don't write register
843 three to an ALI chip. */
844 for (i = 0; i < CHANNEL_REGS; i++) {
845 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
846 continue;
847 outl(data[i], TRID_REG(card, CHANNEL_START + 4 * i));
848 }
849 if (card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
850 card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
851 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1));
852 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2));
853 }
854 return 1;
855 }
856
857 /* called with spin lock held */
858 static int
859 trident_write_voice_regs(struct trident_state *state)
860 {
861 unsigned int data[CHANNEL_REGS + 1];
862 struct trident_channel *channel;
863
864 channel = state->dmabuf.channel;
865
866 data[1] = channel->lba;
867 data[4] = channel->control;
868
869 switch (state->card->pci_id) {
870 case PCI_DEVICE_ID_ALI_5451:
871 data[0] = 0; /* Current Sample Offset */
872 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
873 data[3] = 0;
874 break;
875 case PCI_DEVICE_ID_SI_7018:
876 case PCI_DEVICE_ID_INTERG_5050:
877 data[0] = 0; /* Current Sample Offset */
878 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
879 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
880 break;
881 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
882 data[0] = 0; /* Current Sample Offset */
883 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
884 data[3] = channel->fm_vol & 0xffff;
885 break;
886 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
887 data[0] = (channel->delta << 24);
888 data[2] = ((channel->delta << 16) & 0xff000000) |
889 (channel->eso & 0x00ffffff);
890 data[3] = channel->fm_vol & 0xffff;
891 break;
892 default:
893 return 0;
894 }
895
896 return trident_load_channel_registers(state->card, data, channel->num);
897 }
898
899 static int
900 compute_rate_play(u32 rate)
901 {
902 int delta;
903 /* We special case 44100 and 8000 since rounding with the equation
904 does not give us an accurate enough value. For 11025 and 22050
905 the equation gives us the best answer. All other frequencies will
906 also use the equation. JDW */
907 if (rate == 44100)
908 delta = 0xeb3;
909 else if (rate == 8000)
910 delta = 0x2ab;
911 else if (rate == 48000)
912 delta = 0x1000;
913 else
914 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
915 return delta;
916 }
917
918 static int
919 compute_rate_rec(u32 rate)
920 {
921 int delta;
922
923 if (rate == 44100)
924 delta = 0x116a;
925 else if (rate == 8000)
926 delta = 0x6000;
927 else if (rate == 48000)
928 delta = 0x1000;
929 else
930 delta = ((48000 << 12) / rate) & 0x0000ffff;
931
932 return delta;
933 }
934
935 /* set playback sample rate */
936 static unsigned int
937 trident_set_dac_rate(struct trident_state *state, unsigned int rate)
938 {
939 struct dmabuf *dmabuf = &state->dmabuf;
940
941 if (rate > 48000)
942 rate = 48000;
943 if (rate < 4000)
944 rate = 4000;
945
946 dmabuf->rate = rate;
947 dmabuf->channel->delta = compute_rate_play(rate);
948
949 trident_write_voice_regs(state);
950
951 pr_debug("trident: called trident_set_dac_rate : rate = %d\n", rate);
952
953 return rate;
954 }
955
956 /* set recording sample rate */
957 static unsigned int
958 trident_set_adc_rate(struct trident_state *state, unsigned int rate)
959 {
960 struct dmabuf *dmabuf = &state->dmabuf;
961
962 if (rate > 48000)
963 rate = 48000;
964 if (rate < 4000)
965 rate = 4000;
966
967 dmabuf->rate = rate;
968 dmabuf->channel->delta = compute_rate_rec(rate);
969
970 trident_write_voice_regs(state);
971
972 pr_debug("trident: called trident_set_adc_rate : rate = %d\n", rate);
973
974 return rate;
975 }
976
977 /* prepare channel attributes for playback */
978 static void
979 trident_play_setup(struct trident_state *state)
980 {
981 struct dmabuf *dmabuf = &state->dmabuf;
982 struct trident_channel *channel = dmabuf->channel;
983
984 channel->lba = dmabuf->dma_handle;
985 channel->delta = compute_rate_play(dmabuf->rate);
986
987 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
988 channel->eso -= 1;
989
990 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
991 channel->attribute = 0;
992 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) {
993 if ((channel->num == ALI_SPDIF_IN_CHANNEL) ||
994 (channel->num == ALI_PCM_IN_CHANNEL))
995 ali_disable_special_channel(state->card, channel->num);
996 else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL))
997 & ALI_SPDIF_OUT_CH_ENABLE)
998 && (channel->num == ALI_SPDIF_OUT_CHANNEL)) {
999 ali_set_spdif_out_rate(state->card,
1000 state->dmabuf.rate);
1001 state->dmabuf.channel->delta = 0x1000;
1002 }
1003 }
1004 }
1005
1006 channel->fm_vol = 0x0;
1007
1008 channel->control = CHANNEL_LOOP;
1009 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
1010 /* 16-bits */
1011 channel->control |= CHANNEL_16BITS;
1012 /* signed */
1013 channel->control |= CHANNEL_SIGNED;
1014 }
1015 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1016 /* stereo */
1017 channel->control |= CHANNEL_STEREO;
1018
1019 pr_debug("trident: trident_play_setup, LBA = 0x%08x, Delta = 0x%08x, "
1020 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
1021 channel->delta, channel->eso, channel->control);
1022
1023 trident_write_voice_regs(state);
1024 }
1025
1026 /* prepare channel attributes for recording */
1027 static void
1028 trident_rec_setup(struct trident_state *state)
1029 {
1030 u16 w;
1031 u8 bval;
1032
1033 struct trident_card *card = state->card;
1034 struct dmabuf *dmabuf = &state->dmabuf;
1035 struct trident_channel *channel = dmabuf->channel;
1036 unsigned int rate;
1037
1038 /* Enable AC-97 ADC (capture) */
1039 switch (card->pci_id) {
1040 case PCI_DEVICE_ID_ALI_5451:
1041 ali_enable_special_channel(state);
1042 break;
1043 case PCI_DEVICE_ID_SI_7018:
1044 /* for 7018, the ac97 is always in playback/record (duplex) mode */
1045 break;
1046 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1047 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1048 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1049 /* enable and set record channel */
1050 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1051 break;
1052 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1053 w = inw(TRID_REG(card, T4D_MISCINT));
1054 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
1055 /* enable and set record channel */
1056 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1057 break;
1058 case PCI_DEVICE_ID_INTERG_5050:
1059 /* don't know yet, using special channel 22 in GC1(0xd4)? */
1060 break;
1061 default:
1062 return;
1063 }
1064
1065 channel->lba = dmabuf->dma_handle;
1066 channel->delta = compute_rate_rec(dmabuf->rate);
1067 if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) &&
1068 (channel->num == ALI_SPDIF_IN_CHANNEL)) {
1069 rate = ali_get_spdif_in_rate(card);
1070 if (rate == 0) {
1071 printk(KERN_WARNING "trident: ALi 5451 "
1072 "S/PDIF input setup error!\n");
1073 rate = 48000;
1074 }
1075 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
1076 if (bval & 0x10) {
1077 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
1078 printk(KERN_WARNING "trident: cleared ALi "
1079 "5451 S/PDIF parity error flag.\n");
1080 }
1081
1082 if (rate != 48000)
1083 channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff;
1084 }
1085
1086 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
1087 channel->eso -= 1;
1088
1089 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
1090 channel->attribute = 0;
1091 }
1092
1093 channel->fm_vol = 0x0;
1094
1095 channel->control = CHANNEL_LOOP;
1096 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
1097 /* 16-bits */
1098 channel->control |= CHANNEL_16BITS;
1099 /* signed */
1100 channel->control |= CHANNEL_SIGNED;
1101 }
1102 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1103 /* stereo */
1104 channel->control |= CHANNEL_STEREO;
1105
1106 pr_debug("trident: trident_rec_setup, LBA = 0x%08x, Delat = 0x%08x, "
1107 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
1108 channel->delta, channel->eso, channel->control);
1109
1110 trident_write_voice_regs(state);
1111 }
1112
1113 /* get current playback/recording dma buffer pointer (byte offset from LBA),
1114 called with spinlock held! */
1115 static inline unsigned
1116 trident_get_dma_addr(struct trident_state *state)
1117 {
1118 struct dmabuf *dmabuf = &state->dmabuf;
1119 u32 cso;
1120
1121 if (!dmabuf->enable)
1122 return 0;
1123
1124 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
1125
1126 switch (state->card->pci_id) {
1127 case PCI_DEVICE_ID_ALI_5451:
1128 case PCI_DEVICE_ID_SI_7018:
1129 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1130 case PCI_DEVICE_ID_INTERG_5050:
1131 /* 16 bits ESO, CSO for 7018 and DX */
1132 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
1133 break;
1134 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1135 /* 24 bits ESO, CSO for NX */
1136 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1137 break;
1138 default:
1139 return 0;
1140 }
1141
1142 pr_debug("trident: trident_get_dma_addr: chip reported channel: %d, "
1143 "cso = 0x%04x\n", dmabuf->channel->num, cso);
1144
1145 /* ESO and CSO are in units of Samples, convert to byte offset */
1146 cso <<= sample_shift[dmabuf->fmt];
1147
1148 return (cso % dmabuf->dmasize);
1149 }
1150
1151 /* Stop recording (lock held) */
1152 static inline void
1153 __stop_adc(struct trident_state *state)
1154 {
1155 struct dmabuf *dmabuf = &state->dmabuf;
1156 unsigned int chan_num = dmabuf->channel->num;
1157 struct trident_card *card = state->card;
1158
1159 dmabuf->enable &= ~ADC_RUNNING;
1160 trident_stop_voice(card, chan_num);
1161 trident_disable_voice_irq(card, chan_num);
1162 }
1163
1164 static void
1165 stop_adc(struct trident_state *state)
1166 {
1167 struct trident_card *card = state->card;
1168 unsigned long flags;
1169
1170 spin_lock_irqsave(&card->lock, flags);
1171 __stop_adc(state);
1172 spin_unlock_irqrestore(&card->lock, flags);
1173 }
1174
1175 static void
1176 start_adc(struct trident_state *state)
1177 {
1178 struct dmabuf *dmabuf = &state->dmabuf;
1179 unsigned int chan_num = dmabuf->channel->num;
1180 struct trident_card *card = state->card;
1181 unsigned long flags;
1182
1183 spin_lock_irqsave(&card->lock, flags);
1184 if ((dmabuf->mapped ||
1185 dmabuf->count < (signed) dmabuf->dmasize) &&
1186 dmabuf->ready) {
1187 dmabuf->enable |= ADC_RUNNING;
1188 trident_enable_voice_irq(card, chan_num);
1189 trident_start_voice(card, chan_num);
1190 }
1191 spin_unlock_irqrestore(&card->lock, flags);
1192 }
1193
1194 /* stop playback (lock held) */
1195 static inline void
1196 __stop_dac(struct trident_state *state)
1197 {
1198 struct dmabuf *dmabuf = &state->dmabuf;
1199 unsigned int chan_num = dmabuf->channel->num;
1200 struct trident_card *card = state->card;
1201
1202 dmabuf->enable &= ~DAC_RUNNING;
1203 trident_stop_voice(card, chan_num);
1204 if (state->chans_num == 6) {
1205 trident_stop_voice(card, state->other_states[0]->
1206 dmabuf.channel->num);
1207 trident_stop_voice(card, state->other_states[1]->
1208 dmabuf.channel->num);
1209 trident_stop_voice(card, state->other_states[2]->
1210 dmabuf.channel->num);
1211 trident_stop_voice(card, state->other_states[3]->
1212 dmabuf.channel->num);
1213 }
1214 trident_disable_voice_irq(card, chan_num);
1215 }
1216
1217 static void
1218 stop_dac(struct trident_state *state)
1219 {
1220 struct trident_card *card = state->card;
1221 unsigned long flags;
1222
1223 spin_lock_irqsave(&card->lock, flags);
1224 __stop_dac(state);
1225 spin_unlock_irqrestore(&card->lock, flags);
1226 }
1227
1228 static void
1229 start_dac(struct trident_state *state)
1230 {
1231 struct dmabuf *dmabuf = &state->dmabuf;
1232 unsigned int chan_num = dmabuf->channel->num;
1233 struct trident_card *card = state->card;
1234 unsigned long flags;
1235
1236 spin_lock_irqsave(&card->lock, flags);
1237 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
1238 dmabuf->enable |= DAC_RUNNING;
1239 trident_enable_voice_irq(card, chan_num);
1240 trident_start_voice(card, chan_num);
1241 if (state->chans_num == 6) {
1242 trident_start_voice(card, state->other_states[0]->
1243 dmabuf.channel->num);
1244 trident_start_voice(card, state->other_states[1]->
1245 dmabuf.channel->num);
1246 trident_start_voice(card, state->other_states[2]->
1247 dmabuf.channel->num);
1248 trident_start_voice(card, state->other_states[3]->
1249 dmabuf.channel->num);
1250 }
1251 }
1252 spin_unlock_irqrestore(&card->lock, flags);
1253 }
1254
1255 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
1256 #define DMABUF_MINORDER 1
1257
1258 /* alloc a DMA buffer of with a buffer of this order */
1259 static int
1260 alloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev, int order)
1261 {
1262 void *rawbuf = NULL;
1263 struct page *page, *pend;
1264
1265 if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
1266 &dmabuf->dma_handle)))
1267 return -ENOMEM;
1268
1269 pr_debug("trident: allocated %ld (order = %d) bytes at %p\n",
1270 PAGE_SIZE << order, order, rawbuf);
1271
1272 dmabuf->ready = dmabuf->mapped = 0;
1273 dmabuf->rawbuf = rawbuf;
1274 dmabuf->buforder = order;
1275
1276 /* now mark the pages as reserved; otherwise */
1277 /* remap_pfn_range doesn't do what we want */
1278 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
1279 for (page = virt_to_page(rawbuf); page <= pend; page++)
1280 SetPageReserved(page);
1281
1282 return 0;
1283 }
1284
1285 /* allocate the main DMA buffer, playback and recording buffer should be */
1286 /* allocated separately */
1287 static int
1288 alloc_main_dmabuf(struct trident_state *state)
1289 {
1290 struct dmabuf *dmabuf = &state->dmabuf;
1291 int order;
1292 int ret = -ENOMEM;
1293
1294 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
1295 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
1296 if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order)))
1297 return 0;
1298 /* else try again */
1299 }
1300 return ret;
1301 }
1302
1303 /* deallocate a DMA buffer */
1304 static void
1305 dealloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev)
1306 {
1307 struct page *page, *pend;
1308
1309 if (dmabuf->rawbuf) {
1310 /* undo marking the pages as reserved */
1311 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
1312 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
1313 ClearPageReserved(page);
1314 pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder,
1315 dmabuf->rawbuf, dmabuf->dma_handle);
1316 dmabuf->rawbuf = NULL;
1317 }
1318 dmabuf->mapped = dmabuf->ready = 0;
1319 }
1320
1321 static int
1322 prog_dmabuf(struct trident_state *state, enum dmabuf_mode rec)
1323 {
1324 struct dmabuf *dmabuf = &state->dmabuf;
1325 unsigned bytepersec;
1326 struct trident_state *s = state;
1327 unsigned bufsize, dma_nums;
1328 unsigned long flags;
1329 int ret, i, order;
1330
1331 if ((ret = lock_set_fmt(state)) < 0)
1332 return ret;
1333
1334 if (state->chans_num == 6)
1335 dma_nums = 5;
1336 else
1337 dma_nums = 1;
1338
1339 for (i = 0; i < dma_nums; i++) {
1340 if (i > 0) {
1341 s = state->other_states[i - 1];
1342 dmabuf = &s->dmabuf;
1343 dmabuf->fmt = state->dmabuf.fmt;
1344 dmabuf->rate = state->dmabuf.rate;
1345 }
1346
1347 spin_lock_irqsave(&s->card->lock, flags);
1348 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
1349 dmabuf->count = dmabuf->error = 0;
1350 spin_unlock_irqrestore(&s->card->lock, flags);
1351
1352 /* allocate DMA buffer if not allocated yet */
1353 if (!dmabuf->rawbuf) {
1354 if (i == 0) {
1355 if ((ret = alloc_main_dmabuf(state))) {
1356 unlock_set_fmt(state);
1357 return ret;
1358 }
1359 } else {
1360 ret = -ENOMEM;
1361 order = state->dmabuf.buforder - 1;
1362 if (order >= DMABUF_MINORDER) {
1363 ret = alloc_dmabuf(dmabuf,
1364 state->card->pci_dev,
1365 order);
1366 }
1367 if (ret) {
1368 /* release the main DMA buffer */
1369 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
1370 /* release the auxiliary DMA buffers */
1371 for (i -= 2; i >= 0; i--)
1372 dealloc_dmabuf(&state->other_states[i]->dmabuf,
1373 state->card->pci_dev);
1374 unlock_set_fmt(state);
1375 return ret;
1376 }
1377 }
1378 }
1379 /* FIXME: figure out all this OSS fragment stuff */
1380 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
1381 bufsize = PAGE_SIZE << dmabuf->buforder;
1382 if (dmabuf->ossfragshift) {
1383 if ((1000 << dmabuf->ossfragshift) < bytepersec)
1384 dmabuf->fragshift = ld2(bytepersec / 1000);
1385 else
1386 dmabuf->fragshift = dmabuf->ossfragshift;
1387 } else {
1388 /* lets hand out reasonable big ass buffers by default */
1389 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT - 2);
1390 }
1391 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1392 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1393 dmabuf->fragshift--;
1394 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1395 }
1396 dmabuf->fragsize = 1 << dmabuf->fragshift;
1397 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1398 dmabuf->numfrag = dmabuf->ossmaxfrags;
1399 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1400 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1401
1402 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1403 dmabuf->dmasize);
1404
1405 spin_lock_irqsave(&s->card->lock, flags);
1406 if (rec == DM_RECORD)
1407 trident_rec_setup(s);
1408 else /* DM_PLAYBACK */
1409 trident_play_setup(s);
1410
1411 spin_unlock_irqrestore(&s->card->lock, flags);
1412
1413 /* set the ready flag for the dma buffer */
1414 dmabuf->ready = 1;
1415
1416 pr_debug("trident: prog_dmabuf(%d), sample rate = %d, "
1417 "format = %d, numfrag = %d, fragsize = %d "
1418 "dmasize = %d\n", dmabuf->channel->num,
1419 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1420 dmabuf->fragsize, dmabuf->dmasize);
1421 }
1422 unlock_set_fmt(state);
1423 return 0;
1424 }
1425
1426
1427 static inline int prog_dmabuf_record(struct trident_state* state)
1428 {
1429 return prog_dmabuf(state, DM_RECORD);
1430 }
1431
1432 static inline int prog_dmabuf_playback(struct trident_state* state)
1433 {
1434 return prog_dmabuf(state, DM_PLAYBACK);
1435 }
1436
1437 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1438 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
1439 but we almost always get this
1440 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
1441 so we have to clear the tail space to "silence"
1442 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
1443 */
1444 static void
1445 trident_clear_tail(struct trident_state *state)
1446 {
1447 struct dmabuf *dmabuf = &state->dmabuf;
1448 unsigned swptr;
1449 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1450 unsigned int len;
1451 unsigned long flags;
1452
1453 spin_lock_irqsave(&state->card->lock, flags);
1454 swptr = dmabuf->swptr;
1455 spin_unlock_irqrestore(&state->card->lock, flags);
1456
1457 if (swptr == 0 || swptr == dmabuf->dmasize / 2 ||
1458 swptr == dmabuf->dmasize)
1459 return;
1460
1461 if (swptr < dmabuf->dmasize / 2)
1462 len = dmabuf->dmasize / 2 - swptr;
1463 else
1464 len = dmabuf->dmasize - swptr;
1465
1466 memset(dmabuf->rawbuf + swptr, silence, len);
1467 if (state->card->pci_id != PCI_DEVICE_ID_ALI_5451) {
1468 spin_lock_irqsave(&state->card->lock, flags);
1469 dmabuf->swptr += len;
1470 dmabuf->count += len;
1471 spin_unlock_irqrestore(&state->card->lock, flags);
1472 }
1473
1474 /* restart the dma machine in case it is halted */
1475 start_dac(state);
1476 }
1477
1478 static int
1479 drain_dac(struct trident_state *state, int nonblock)
1480 {
1481 DECLARE_WAITQUEUE(wait, current);
1482 struct dmabuf *dmabuf = &state->dmabuf;
1483 unsigned long flags;
1484 unsigned long tmo;
1485 int count;
1486 unsigned long diff = 0;
1487
1488 if (dmabuf->mapped || !dmabuf->ready)
1489 return 0;
1490
1491 add_wait_queue(&dmabuf->wait, &wait);
1492 for (;;) {
1493 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1494 every time to make the process really go to sleep */
1495 set_current_state(TASK_INTERRUPTIBLE);
1496
1497 spin_lock_irqsave(&state->card->lock, flags);
1498 count = dmabuf->count;
1499 spin_unlock_irqrestore(&state->card->lock, flags);
1500
1501 if (count <= 0)
1502 break;
1503
1504 if (signal_pending(current))
1505 break;
1506
1507 if (nonblock) {
1508 remove_wait_queue(&dmabuf->wait, &wait);
1509 set_current_state(TASK_RUNNING);
1510 return -EBUSY;
1511 }
1512
1513 /* No matter how much data is left in the buffer, we have to wait until
1514 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1515 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
1516 state->card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
1517 diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize;
1518 diff = diff % (dmabuf->dmasize);
1519 tmo = (diff * HZ) / dmabuf->rate;
1520 } else {
1521 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1522 }
1523 tmo >>= sample_shift[dmabuf->fmt];
1524 if (!schedule_timeout(tmo ? tmo : 1) && tmo) {
1525 break;
1526 }
1527 }
1528 remove_wait_queue(&dmabuf->wait, &wait);
1529 set_current_state(TASK_RUNNING);
1530 if (signal_pending(current))
1531 return -ERESTARTSYS;
1532
1533 return 0;
1534 }
1535
1536 /* update buffer manangement pointers, especially, */
1537 /* dmabuf->count and dmabuf->hwptr */
1538 static void
1539 trident_update_ptr(struct trident_state *state)
1540 {
1541 struct dmabuf *dmabuf = &state->dmabuf;
1542 unsigned hwptr, swptr;
1543 int clear_cnt = 0;
1544 int diff;
1545 unsigned char silence;
1546 unsigned half_dmasize;
1547
1548 /* update hardware pointer */
1549 hwptr = trident_get_dma_addr(state);
1550 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1551 dmabuf->hwptr = hwptr;
1552 dmabuf->total_bytes += diff;
1553
1554 /* error handling and process wake up for ADC */
1555 if (dmabuf->enable == ADC_RUNNING) {
1556 if (dmabuf->mapped) {
1557 dmabuf->count -= diff;
1558 if (dmabuf->count >= (signed) dmabuf->fragsize)
1559 wake_up(&dmabuf->wait);
1560 } else {
1561 dmabuf->count += diff;
1562
1563 if (dmabuf->count < 0 ||
1564 dmabuf->count > dmabuf->dmasize) {
1565 /* buffer underrun or buffer overrun, */
1566 /* we have no way to recover it here, just */
1567 /* stop the machine and let the process */
1568 /* force hwptr and swptr to sync */
1569 __stop_adc(state);
1570 dmabuf->error++;
1571 }
1572 if (dmabuf->count < (signed) dmabuf->dmasize / 2)
1573 wake_up(&dmabuf->wait);
1574 }
1575 }
1576
1577 /* error handling and process wake up for DAC */
1578 if (dmabuf->enable == DAC_RUNNING) {
1579 if (dmabuf->mapped) {
1580 dmabuf->count += diff;
1581 if (dmabuf->count >= (signed) dmabuf->fragsize)
1582 wake_up(&dmabuf->wait);
1583 } else {
1584 dmabuf->count -= diff;
1585
1586 if (dmabuf->count < 0 ||
1587 dmabuf->count > dmabuf->dmasize) {
1588 /* buffer underrun or buffer overrun, we have no way to recover
1589 it here, just stop the machine and let the process force hwptr
1590 and swptr to sync */
1591 __stop_dac(state);
1592 dmabuf->error++;
1593 } else if (!dmabuf->endcleared) {
1594 swptr = dmabuf->swptr;
1595 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1596 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1597 /* We must clear end data of 1/2 dmabuf if needed.
1598 According to 1/2 algorithm of Address Engine Interrupt,
1599 check the validation of the data of half dmasize. */
1600 half_dmasize = dmabuf->dmasize / 2;
1601 if ((diff = hwptr - half_dmasize) < 0)
1602 diff = hwptr;
1603 if ((dmabuf->count + diff) < half_dmasize) {
1604 //there is invalid data in the end of half buffer
1605 if ((clear_cnt = half_dmasize - swptr) < 0)
1606 clear_cnt += half_dmasize;
1607 //clear the invalid data
1608 memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
1609 if (state->chans_num == 6) {
1610 clear_cnt = clear_cnt / 2;
1611 swptr = swptr / 2;
1612 memset(state->other_states[0]->dmabuf.rawbuf + swptr,
1613 silence, clear_cnt);
1614 memset(state->other_states[1]->dmabuf.rawbuf + swptr,
1615 silence, clear_cnt);
1616 memset(state->other_states[2]->dmabuf.rawbuf + swptr,
1617 silence, clear_cnt);
1618 memset(state->other_states[3]->dmabuf.rawbuf + swptr,
1619 silence, clear_cnt);
1620 }
1621 dmabuf->endcleared = 1;
1622 }
1623 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1624 clear_cnt = dmabuf->fragsize;
1625 if ((swptr + clear_cnt) > dmabuf->dmasize)
1626 clear_cnt = dmabuf->dmasize - swptr;
1627 memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
1628 if (state->chans_num == 6) {
1629 clear_cnt = clear_cnt / 2;
1630 swptr = swptr / 2;
1631 memset(state->other_states[0]->dmabuf.rawbuf + swptr,
1632 silence, clear_cnt);
1633 memset(state->other_states[1]->dmabuf.rawbuf + swptr,
1634 silence, clear_cnt);
1635 memset(state->other_states[2]->dmabuf.rawbuf + swptr,
1636 silence, clear_cnt);
1637 memset(state->other_states[3]->dmabuf.rawbuf + swptr,
1638 silence, clear_cnt);
1639 }
1640 dmabuf->endcleared = 1;
1641 }
1642 }
1643 /* trident_update_ptr is called by interrupt handler or by process via
1644 ioctl/poll, we only wake up the waiting process when we have more
1645 than 1/2 buffer free (always true for interrupt handler) */
1646 if (dmabuf->count < (signed) dmabuf->dmasize / 2)
1647 wake_up(&dmabuf->wait);
1648 }
1649 }
1650 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1651 }
1652
1653 static void
1654 trident_address_interrupt(struct trident_card *card)
1655 {
1656 int i;
1657 struct trident_state *state;
1658 unsigned int channel;
1659
1660 /* Update the pointers for all channels we are running. */
1661 /* FIXME: should read interrupt status only once */
1662 for (i = 0; i < NR_HW_CH; i++) {
1663 channel = 63 - i;
1664 if (trident_check_channel_interrupt(card, channel)) {
1665 trident_ack_channel_interrupt(card, channel);
1666 if ((state = card->states[i]) != NULL) {
1667 trident_update_ptr(state);
1668 } else {
1669 printk(KERN_WARNING "trident: spurious channel "
1670 "irq %d.\n", channel);
1671 trident_stop_voice(card, channel);
1672 trident_disable_voice_irq(card, channel);
1673 }
1674 }
1675 }
1676 }
1677
1678 static void
1679 ali_hwvol_control(struct trident_card *card, int opt)
1680 {
1681 u16 dwTemp, volume[2], mute, diff, *pVol[2];
1682
1683 dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02);
1684 mute = dwTemp & 0x8000;
1685 volume[0] = dwTemp & 0x001f;
1686 volume[1] = (dwTemp & 0x1f00) >> 8;
1687 if (volume[0] < volume[1]) {
1688 pVol[0] = &volume[0];
1689 pVol[1] = &volume[1];
1690 } else {
1691 pVol[1] = &volume[0];
1692 pVol[0] = &volume[1];
1693 }
1694 diff = *(pVol[1]) - *(pVol[0]);
1695
1696 if (opt == 1) { // MUTE
1697 dwTemp ^= 0x8000;
1698 ali_ac97_write(card->ac97_codec[0],
1699 0x02, dwTemp);
1700 } else if (opt == 2) { // Down
1701 if (mute)
1702 return;
1703 if (*(pVol[1]) < 0x001f) {
1704 (*pVol[1])++;
1705 *(pVol[0]) = *(pVol[1]) - diff;
1706 }
1707 dwTemp &= 0xe0e0;
1708 dwTemp |= (volume[0]) | (volume[1] << 8);
1709 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1710 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
1711 (((32 - volume[1]) * 25 / 8) << 8);
1712 } else if (opt == 4) { // Up
1713 if (mute)
1714 return;
1715 if (*(pVol[0]) > 0) {
1716 (*pVol[0])--;
1717 *(pVol[1]) = *(pVol[0]) + diff;
1718 }
1719 dwTemp &= 0xe0e0;
1720 dwTemp |= (volume[0]) | (volume[1] << 8);
1721 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1722 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
1723 (((32 - volume[1]) * 25 / 8) << 8);
1724 } else {
1725 /* Nothing needs doing */
1726 }
1727 }
1728
1729 /*
1730 * Re-enable reporting of vol change after 0.1 seconds
1731 */
1732
1733 static void
1734 ali_timeout(unsigned long ptr)
1735 {
1736 struct trident_card *card = (struct trident_card *) ptr;
1737 u16 temp = 0;
1738
1739 /* Enable GPIO IRQ (MISCINT bit 18h) */
1740 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1741 temp |= 0x0004;
1742 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1743 }
1744
1745 /*
1746 * Set up the timer to clear the vol change notification
1747 */
1748
1749 static void
1750 ali_set_timer(struct trident_card *card)
1751 {
1752 /* Add Timer Routine to Enable GPIO IRQ */
1753 del_timer(&card->timer); /* Never queue twice */
1754 card->timer.function = ali_timeout;
1755 card->timer.data = (unsigned long) card;
1756 card->timer.expires = jiffies + HZ / 10;
1757 add_timer(&card->timer);
1758 }
1759
1760 /*
1761 * Process a GPIO event
1762 */
1763
1764 static void
1765 ali_queue_task(struct trident_card *card, int opt)
1766 {
1767 u16 temp;
1768
1769 /* Disable GPIO IRQ (MISCINT bit 18h) */
1770 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1771 temp &= (u16) (~0x0004);
1772 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1773
1774 /* Adjust the volume */
1775 ali_hwvol_control(card, opt);
1776
1777 /* Set the timer for 1/10th sec */
1778 ali_set_timer(card);
1779 }
1780
1781 static void
1782 cyber_address_interrupt(struct trident_card *card)
1783 {
1784 int i, irq_status;
1785 struct trident_state *state;
1786 unsigned int channel;
1787
1788 /* Update the pointers for all channels we are running. */
1789 /* FIXED: read interrupt status only once */
1790 irq_status = inl(TRID_REG(card, T4D_AINT_A));
1791
1792 pr_debug("cyber_address_interrupt: irq_status 0x%X\n", irq_status);
1793
1794 for (i = 0; i < NR_HW_CH; i++) {
1795 channel = 31 - i;
1796 if (irq_status & (1 << channel)) {
1797 /* clear bit by writing a 1, zeroes are ignored */
1798 outl((1 << channel), TRID_REG(card, T4D_AINT_A));
1799
1800 pr_debug("cyber_interrupt: channel %d\n", channel);
1801
1802 if ((state = card->states[i]) != NULL) {
1803 trident_update_ptr(state);
1804 } else {
1805 printk(KERN_WARNING "cyber5050: spurious "
1806 "channel irq %d.\n", channel);
1807 trident_stop_voice(card, channel);
1808 trident_disable_voice_irq(card, channel);
1809 }
1810 }
1811 }
1812 }
1813
1814 static irqreturn_t
1815 trident_interrupt(int irq, void *dev_id)
1816 {
1817 struct trident_card *card = (struct trident_card *) dev_id;
1818 u32 event;
1819 u32 gpio;
1820
1821 spin_lock(&card->lock);
1822 event = inl(TRID_REG(card, T4D_MISCINT));
1823
1824 pr_debug("trident: trident_interrupt called, MISCINT = 0x%08x\n",
1825 event);
1826
1827 if (event & ADDRESS_IRQ) {
1828 card->address_interrupt(card);
1829 }
1830
1831 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
1832 /* GPIO IRQ (H/W Volume Control) */
1833 event = inl(TRID_REG(card, T4D_MISCINT));
1834 if (event & (1 << 25)) {
1835 gpio = inl(TRID_REG(card, ALI_GPIO));
1836 if (!timer_pending(&card->timer))
1837 ali_queue_task(card, gpio & 0x07);
1838 }
1839 event = inl(TRID_REG(card, T4D_MISCINT));
1840 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1841 TRID_REG(card, T4D_MISCINT));
1842 spin_unlock(&card->lock);
1843 return IRQ_HANDLED;
1844 }
1845
1846 /* manually clear interrupt status, bad hardware design, blame T^2 */
1847 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1848 TRID_REG(card, T4D_MISCINT));
1849 spin_unlock(&card->lock);
1850 return IRQ_HANDLED;
1851 }
1852
1853 /* in this loop, dmabuf.count signifies the amount of data that is waiting */
1854 /* to be copied to the user's buffer. it is filled by the dma machine and */
1855 /* drained by this loop. */
1856 static ssize_t
1857 trident_read(struct file *file, char __user *buffer, size_t count, loff_t * ppos)
1858 {
1859 struct trident_state *state = (struct trident_state *)file->private_data;
1860 struct dmabuf *dmabuf = &state->dmabuf;
1861 ssize_t ret = 0;
1862 unsigned long flags;
1863 unsigned swptr;
1864 int cnt;
1865
1866 pr_debug("trident: trident_read called, count = %zd\n", count);
1867
1868 VALIDATE_STATE(state);
1869
1870 if (dmabuf->mapped)
1871 return -ENXIO;
1872 if (!access_ok(VERIFY_WRITE, buffer, count))
1873 return -EFAULT;
1874
1875 mutex_lock(&state->sem);
1876 if (!dmabuf->ready && (ret = prog_dmabuf_record(state)))
1877 goto out;
1878
1879 while (count > 0) {
1880 spin_lock_irqsave(&state->card->lock, flags);
1881 if (dmabuf->count > (signed) dmabuf->dmasize) {
1882 /* buffer overrun, we are recovering from */
1883 /* sleep_on_timeout, resync hwptr and swptr, */
1884 /* make process flush the buffer */
1885 dmabuf->count = dmabuf->dmasize;
1886 dmabuf->swptr = dmabuf->hwptr;
1887 }
1888 swptr = dmabuf->swptr;
1889 cnt = dmabuf->dmasize - swptr;
1890 if (dmabuf->count < cnt)
1891 cnt = dmabuf->count;
1892 spin_unlock_irqrestore(&state->card->lock, flags);
1893
1894 if (cnt > count)
1895 cnt = count;
1896 if (cnt <= 0) {
1897 unsigned long tmo;
1898 /* buffer is empty, start the dma machine and */
1899 /* wait for data to be recorded */
1900 start_adc(state);
1901 if (file->f_flags & O_NONBLOCK) {
1902 if (!ret)
1903 ret = -EAGAIN;
1904 goto out;
1905 }
1906
1907 mutex_unlock(&state->sem);
1908 /* No matter how much space left in the buffer, */
1909 /* we have to wait until CSO == ESO/2 or CSO == ESO */
1910 /* when address engine interrupts */
1911 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1912 tmo >>= sample_shift[dmabuf->fmt];
1913 /* There are two situations when sleep_on_timeout returns, one is when
1914 the interrupt is serviced correctly and the process is waked up by
1915 ISR ON TIME. Another is when timeout is expired, which means that
1916 either interrupt is NOT serviced correctly (pending interrupt) or it
1917 is TOO LATE for the process to be scheduled to run (scheduler latency)
1918 which results in a (potential) buffer overrun. And worse, there is
1919 NOTHING we can do to prevent it. */
1920 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1921 pr_debug(KERN_ERR "trident: recording schedule timeout, "
1922 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1923 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1924 dmabuf->hwptr, dmabuf->swptr);
1925
1926 /* a buffer overrun, we delay the recovery until next time the
1927 while loop begin and we REALLY have space to record */
1928 }
1929 if (signal_pending(current)) {
1930 if (!ret)
1931 ret = -ERESTARTSYS;
1932 goto out;
1933 }
1934 mutex_lock(&state->sem);
1935 if (dmabuf->mapped) {
1936 if (!ret)
1937 ret = -ENXIO;
1938 goto out;
1939 }
1940 continue;
1941 }
1942
1943 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1944 if (!ret)
1945 ret = -EFAULT;
1946 goto out;
1947 }
1948
1949 swptr = (swptr + cnt) % dmabuf->dmasize;
1950
1951 spin_lock_irqsave(&state->card->lock, flags);
1952 dmabuf->swptr = swptr;
1953 dmabuf->count -= cnt;
1954 spin_unlock_irqrestore(&state->card->lock, flags);
1955
1956 count -= cnt;
1957 buffer += cnt;
1958 ret += cnt;
1959 start_adc(state);
1960 }
1961 out:
1962 mutex_unlock(&state->sem);
1963 return ret;
1964 }
1965
1966 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1967 the soundcard. it is drained by the dma machine and filled by this loop. */
1968
1969 static ssize_t
1970 trident_write(struct file *file, const char __user *buffer, size_t count, loff_t * ppos)
1971 {
1972 struct trident_state *state = (struct trident_state *)file->private_data;
1973 struct dmabuf *dmabuf = &state->dmabuf;
1974 ssize_t ret;
1975 unsigned long flags;
1976 unsigned swptr;
1977 int cnt;
1978 unsigned int state_cnt;
1979 unsigned int copy_count;
1980 int lret; /* for lock_set_fmt */
1981
1982 pr_debug("trident: trident_write called, count = %zd\n", count);
1983
1984 VALIDATE_STATE(state);
1985
1986 /*
1987 * Guard against an mmap or ioctl while writing
1988 */
1989
1990 mutex_lock(&state->sem);
1991
1992 if (dmabuf->mapped) {
1993 ret = -ENXIO;
1994 goto out;
1995 }
1996 if (!dmabuf->ready && (ret = prog_dmabuf_playback(state)))
1997 goto out;
1998
1999 if (!access_ok(VERIFY_READ, buffer, count)) {
2000 ret = -EFAULT;
2001 goto out;
2002 }
2003
2004 ret = 0;
2005
2006 while (count > 0) {
2007 spin_lock_irqsave(&state->card->lock, flags);
2008 if (dmabuf->count < 0) {
2009 /* buffer underrun, we are recovering from */
2010 /* sleep_on_timeout, resync hwptr and swptr */
2011 dmabuf->count = 0;
2012 dmabuf->swptr = dmabuf->hwptr;
2013 }
2014 swptr = dmabuf->swptr;
2015 cnt = dmabuf->dmasize - swptr;
2016 if (dmabuf->count + cnt > dmabuf->dmasize)
2017 cnt = dmabuf->dmasize - dmabuf->count;
2018 spin_unlock_irqrestore(&state->card->lock, flags);
2019
2020 if (cnt > count)
2021 cnt = count;
2022 if (cnt <= 0) {
2023 unsigned long tmo;
2024 /* buffer is full, start the dma machine and */
2025 /* wait for data to be played */
2026 start_dac(state);
2027 if (file->f_flags & O_NONBLOCK) {
2028 if (!ret)
2029 ret = -EAGAIN;
2030 goto out;
2031 }
2032 /* No matter how much data left in the buffer, */
2033 /* we have to wait until CSO == ESO/2 or CSO == ESO */
2034 /* when address engine interrupts */
2035 lock_set_fmt(state);
2036 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
2037 tmo >>= sample_shift[dmabuf->fmt];
2038 unlock_set_fmt(state);
2039 mutex_unlock(&state->sem);
2040
2041 /* There are two situations when sleep_on_timeout */
2042 /* returns, one is when the interrupt is serviced */
2043 /* correctly and the process is waked up by ISR */
2044 /* ON TIME. Another is when timeout is expired, which */
2045 /* means that either interrupt is NOT serviced */
2046 /* correctly (pending interrupt) or it is TOO LATE */
2047 /* for the process to be scheduled to run */
2048 /* (scheduler latency) which results in a (potential) */
2049 /* buffer underrun. And worse, there is NOTHING we */
2050 /* can do to prevent it. */
2051 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
2052 pr_debug(KERN_ERR "trident: playback schedule "
2053 "timeout, dmasz %u fragsz %u count %i "
2054 "hwptr %u swptr %u\n", dmabuf->dmasize,
2055 dmabuf->fragsize, dmabuf->count,
2056 dmabuf->hwptr, dmabuf->swptr);
2057
2058 /* a buffer underrun, we delay the recovery */
2059 /* until next time the while loop begin and */
2060 /* we REALLY have data to play */
2061 }
2062 if (signal_pending(current)) {
2063 if (!ret)
2064 ret = -ERESTARTSYS;
2065 goto out_nolock;
2066 }
2067 mutex_lock(&state->sem);
2068 if (dmabuf->mapped) {
2069 if (!ret)
2070 ret = -ENXIO;
2071 goto out;
2072 }
2073 continue;
2074 }
2075 if ((lret = lock_set_fmt(state)) < 0) {
2076 ret = lret;
2077 goto out;
2078 }
2079
2080 if (state->chans_num == 6) {
2081 copy_count = 0;
2082 state_cnt = 0;
2083 if (ali_write_5_1(state, buffer, cnt, &copy_count,
2084 &state_cnt) == -EFAULT) {
2085 if (state_cnt) {
2086 swptr = (swptr + state_cnt) % dmabuf->dmasize;
2087 spin_lock_irqsave(&state->card->lock, flags);
2088 dmabuf->swptr = swptr;
2089 dmabuf->count += state_cnt;
2090 dmabuf->endcleared = 0;
2091 spin_unlock_irqrestore(&state->card->lock, flags);
2092 }
2093 ret += copy_count;
2094 if (!ret)
2095 ret = -EFAULT;
2096 unlock_set_fmt(state);
2097 goto out;
2098 }
2099 } else {
2100 if (copy_from_user(dmabuf->rawbuf + swptr,
2101 buffer, cnt)) {
2102 if (!ret)
2103 ret = -EFAULT;
2104 unlock_set_fmt(state);
2105 goto out;
2106 }
2107 state_cnt = cnt;
2108 }
2109 unlock_set_fmt(state);
2110
2111 swptr = (swptr + state_cnt) % dmabuf->dmasize;
2112
2113 spin_lock_irqsave(&state->card->lock, flags);
2114 dmabuf->swptr = swptr;
2115 dmabuf->count += state_cnt;
2116 dmabuf->endcleared = 0;
2117 spin_unlock_irqrestore(&state->card->lock, flags);
2118
2119 count -= cnt;
2120 buffer += cnt;
2121 ret += cnt;
2122 start_dac(state);
2123 }
2124 out:
2125 mutex_unlock(&state->sem);
2126 out_nolock:
2127 return ret;
2128 }
2129
2130 /* No kernel lock - we have our own spinlock */
2131 static unsigned int
2132 trident_poll(struct file *file, struct poll_table_struct *wait)
2133 {
2134 struct trident_state *state = (struct trident_state *)file->private_data;
2135 struct dmabuf *dmabuf = &state->dmabuf;
2136 unsigned long flags;
2137 unsigned int mask = 0;
2138
2139 VALIDATE_STATE(state);
2140
2141 /*
2142 * Guard against a parallel poll and write causing multiple
2143 * prog_dmabuf events
2144 */
2145
2146 mutex_lock(&state->sem);
2147
2148 if (file->f_mode & FMODE_WRITE) {
2149 if (!dmabuf->ready && prog_dmabuf_playback(state)) {
2150 mutex_unlock(&state->sem);
2151 return 0;
2152 }
2153 poll_wait(file, &dmabuf->wait, wait);
2154 }
2155 if (file->f_mode & FMODE_READ) {
2156 if (!dmabuf->ready && prog_dmabuf_record(state)) {
2157 mutex_unlock(&state->sem);
2158 return 0;
2159 }
2160 poll_wait(file, &dmabuf->wait, wait);
2161 }
2162
2163 mutex_unlock(&state->sem);
2164
2165 spin_lock_irqsave(&state->card->lock, flags);
2166 trident_update_ptr(state);
2167 if (file->f_mode & FMODE_READ) {
2168 if (dmabuf->count >= (signed) dmabuf->fragsize)
2169 mask |= POLLIN | POLLRDNORM;
2170 }
2171 if (file->f_mode & FMODE_WRITE) {
2172 if (dmabuf->mapped) {
2173 if (dmabuf->count >= (signed) dmabuf->fragsize)
2174 mask |= POLLOUT | POLLWRNORM;
2175 } else {
2176 if ((signed) dmabuf->dmasize >= dmabuf->count +
2177 (signed) dmabuf->fragsize)
2178 mask |= POLLOUT | POLLWRNORM;
2179 }
2180 }
2181 spin_unlock_irqrestore(&state->card->lock, flags);
2182
2183 return mask;
2184 }
2185
2186 static int
2187 trident_mmap(struct file *file, struct vm_area_struct *vma)
2188 {
2189 struct trident_state *state = (struct trident_state *)file->private_data;
2190 struct dmabuf *dmabuf = &state->dmabuf;
2191 int ret = -EINVAL;
2192 unsigned long size;
2193
2194 VALIDATE_STATE(state);
2195
2196 /*
2197 * Lock against poll read write or mmap creating buffers. Also lock
2198 * a read or write against an mmap.
2199 */
2200
2201 mutex_lock(&state->sem);
2202
2203 if (vma->vm_flags & VM_WRITE) {
2204 if ((ret = prog_dmabuf_playback(state)) != 0)
2205 goto out;
2206 } else if (vma->vm_flags & VM_READ) {
2207 if ((ret = prog_dmabuf_record(state)) != 0)
2208 goto out;
2209 } else
2210 goto out;
2211
2212 ret = -EINVAL;
2213 if (vma->vm_pgoff != 0)
2214 goto out;
2215 size = vma->vm_end - vma->vm_start;
2216 if (size > (PAGE_SIZE << dmabuf->buforder))
2217 goto out;
2218 ret = -EAGAIN;
2219 if (remap_pfn_range(vma, vma->vm_start,
2220 virt_to_phys(dmabuf->rawbuf) >> PAGE_SHIFT,
2221 size, vma->vm_page_prot))
2222 goto out;
2223 dmabuf->mapped = 1;
2224 ret = 0;
2225 out:
2226 mutex_unlock(&state->sem);
2227 return ret;
2228 }
2229
2230 static int
2231 trident_ioctl(struct inode *inode, struct file *file,
2232 unsigned int cmd, unsigned long arg)
2233 {
2234 struct trident_state *state = (struct trident_state *)file->private_data;
2235 struct dmabuf *dmabuf = &state->dmabuf;
2236 unsigned long flags;
2237 audio_buf_info abinfo;
2238 count_info cinfo;
2239 int val, mapped, ret = 0;
2240 struct trident_card *card = state->card;
2241 void __user *argp = (void __user *)arg;
2242 int __user *p = argp;
2243
2244 VALIDATE_STATE(state);
2245
2246
2247 mapped = ((file->f_mode & (FMODE_WRITE | FMODE_READ)) && dmabuf->mapped);
2248
2249 pr_debug("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
2250 _IOC_NR(cmd), arg ? *p : 0);
2251
2252 switch (cmd) {
2253 case OSS_GETVERSION:
2254 ret = put_user(SOUND_VERSION, p);
2255 break;
2256
2257 case SNDCTL_DSP_RESET:
2258 /* FIXME: spin_lock ? */
2259 if (file->f_mode & FMODE_WRITE) {
2260 stop_dac(state);
2261 synchronize_irq(card->irq);
2262 dmabuf->ready = 0;
2263 dmabuf->swptr = dmabuf->hwptr = 0;
2264 dmabuf->count = dmabuf->total_bytes = 0;
2265 }
2266 if (file->f_mode & FMODE_READ) {
2267 stop_adc(state);
2268 synchronize_irq(card->irq);
2269 dmabuf->ready = 0;
2270 dmabuf->swptr = dmabuf->hwptr = 0;
2271 dmabuf->count = dmabuf->total_bytes = 0;
2272 }
2273 break;
2274
2275 case SNDCTL_DSP_SYNC:
2276 if (file->f_mode & FMODE_WRITE)
2277 ret = drain_dac(state, file->f_flags & O_NONBLOCK);
2278 break;
2279
2280 case SNDCTL_DSP_SPEED: /* set smaple rate */
2281 if (get_user(val, p)) {
2282 ret = -EFAULT;
2283 break;
2284 }
2285 if (val >= 0) {
2286 if (file->f_mode & FMODE_WRITE) {
2287 stop_dac(state);
2288 dmabuf->ready = 0;
2289 spin_lock_irqsave(&state->card->lock, flags);
2290 trident_set_dac_rate(state, val);
2291 spin_unlock_irqrestore(&state->card->lock, flags);
2292 }
2293 if (file->f_mode & FMODE_READ) {
2294 stop_adc(state);
2295 dmabuf->ready = 0;
2296 spin_lock_irqsave(&state->card->lock, flags);
2297 trident_set_adc_rate(state, val);
2298 spin_unlock_irqrestore(&state->card->lock, flags);
2299 }
2300 }
2301 ret = put_user(dmabuf->rate, p);
2302 break;
2303
2304 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
2305 if (get_user(val, p)) {
2306 ret = -EFAULT;
2307 break;
2308 }
2309 if ((ret = lock_set_fmt(state)) < 0)
2310 return ret;
2311
2312 if (file->f_mode & FMODE_WRITE) {
2313 stop_dac(state);
2314 dmabuf->ready = 0;
2315 if (val)
2316 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2317 else
2318 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2319 }
2320 if (file->f_mode & FMODE_READ) {
2321 stop_adc(state);
2322 dmabuf->ready = 0;
2323 if (val)
2324 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2325 else
2326 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2327 }
2328 unlock_set_fmt(state);
2329 break;
2330
2331 case SNDCTL_DSP_GETBLKSIZE:
2332 if (file->f_mode & FMODE_WRITE) {
2333 if ((val = prog_dmabuf_playback(state)))
2334 ret = val;
2335 else
2336 ret = put_user(dmabuf->fragsize, p);
2337 break;
2338 }
2339 if (file->f_mode & FMODE_READ) {
2340 if ((val = prog_dmabuf_record(state)))
2341 ret = val;
2342 else
2343 ret = put_user(dmabuf->fragsize, p);
2344 break;
2345 }
2346 /* neither READ nor WRITE? is this even possible? */
2347 ret = -EINVAL;
2348 break;
2349
2350
2351 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format */
2352 ret = put_user(AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 |
2353 AFMT_U8, p);
2354 break;
2355
2356 case SNDCTL_DSP_SETFMT: /* Select sample format */
2357 if (get_user(val, p)) {
2358 ret = -EFAULT;
2359 break;
2360 }
2361 if ((ret = lock_set_fmt(state)) < 0)
2362 return ret;
2363
2364 if (val != AFMT_QUERY) {
2365 if (file->f_mode & FMODE_WRITE) {
2366 stop_dac(state);
2367 dmabuf->ready = 0;
2368 if (val == AFMT_S16_LE)
2369 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2370 else
2371 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2372 }
2373 if (file->f_mode & FMODE_READ) {
2374 stop_adc(state);
2375 dmabuf->ready = 0;
2376 if (val == AFMT_S16_LE)
2377 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2378 else
2379 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2380 }
2381 }
2382 unlock_set_fmt(state);
2383 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
2384 AFMT_U8, p);
2385 break;
2386
2387 case SNDCTL_DSP_CHANNELS:
2388 if (get_user(val, p)) {
2389 ret = -EFAULT;
2390 break;
2391 }
2392 if (val != 0) {
2393 if ((ret = lock_set_fmt(state)) < 0)
2394 return ret;
2395
2396 if (file->f_mode & FMODE_WRITE) {
2397 stop_dac(state);
2398 dmabuf->ready = 0;
2399
2400 //prevent from memory leak
2401 if ((state->chans_num > 2) && (state->chans_num != val)) {
2402 ali_free_other_states_resources(state);
2403 state->chans_num = 1;
2404 }
2405
2406 if (val >= 2) {
2407
2408 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2409 if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) {
2410 if (card->rec_channel_use_count > 0) {
2411 printk(KERN_ERR "trident: Record is "
2412 "working on the card!\n");
2413 ret = -EBUSY;
2414 unlock_set_fmt(state);
2415 break;
2416 }
2417
2418 ret = ali_setup_multi_channels(state->card, 6);
2419 if (ret < 0) {
2420 unlock_set_fmt(state);
2421 break;
2422 }
2423 mutex_lock(&state->card->open_mutex);
2424 ret = ali_allocate_other_states_resources(state, 6);
2425 if (ret < 0) {
2426 mutex_unlock(&state->card->open_mutex);
2427 unlock_set_fmt(state);
2428 break;
2429 }
2430 state->card->multi_channel_use_count++;
2431 mutex_unlock(&state->card->open_mutex);
2432 } else
2433 val = 2; /*yield to 2-channels */
2434 } else
2435 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2436 state->chans_num = val;
2437 }
2438 if (file->f_mode & FMODE_READ) {
2439 stop_adc(state);
2440 dmabuf->ready = 0;
2441 if (val >= 2) {
2442 if (!((file->f_mode & FMODE_WRITE) &&
2443 (val == 6)))
2444 val = 2;
2445 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2446 } else
2447 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2448 state->chans_num = val;
2449 }
2450 unlock_set_fmt(state);
2451 }
2452 ret = put_user(val, p);
2453 break;
2454
2455 case SNDCTL_DSP_POST:
2456 /* Cause the working fragment to be output */
2457 break;
2458
2459 case SNDCTL_DSP_SUBDIVIDE:
2460 if (dmabuf->subdivision) {
2461 ret = -EINVAL;
2462 break;
2463 }
2464 if (get_user(val, p)) {
2465 ret = -EFAULT;
2466 break;
2467 }
2468 if (val != 1 && val != 2 && val != 4) {
2469 ret = -EINVAL;
2470 break;
2471 }
2472 dmabuf->subdivision = val;
2473 break;
2474
2475 case SNDCTL_DSP_SETFRAGMENT:
2476 if (get_user(val, p)) {
2477 ret = -EFAULT;
2478 break;
2479 }
2480
2481 dmabuf->ossfragshift = val & 0xffff;
2482 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2483 if (dmabuf->ossfragshift < 4)
2484 dmabuf->ossfragshift = 4;
2485 if (dmabuf->ossfragshift > 15)
2486 dmabuf->ossfragshift = 15;
2487 if (dmabuf->ossmaxfrags < 4)
2488 dmabuf->ossmaxfrags = 4;
2489
2490 break;
2491
2492 case SNDCTL_DSP_GETOSPACE:
2493 if (!(file->f_mode & FMODE_WRITE)) {
2494 ret = -EINVAL;
2495 break;
2496 }
2497 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
2498 ret = val;
2499 break;
2500 }
2501 spin_lock_irqsave(&state->card->lock, flags);
2502 trident_update_ptr(state);
2503 abinfo.fragsize = dmabuf->fragsize;
2504 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
2505 abinfo.fragstotal = dmabuf->numfrag;
2506 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2507 spin_unlock_irqrestore(&state->card->lock, flags);
2508 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
2509 -EFAULT : 0;
2510 break;
2511
2512 case SNDCTL_DSP_GETISPACE:
2513 if (!(file->f_mode & FMODE_READ)) {
2514 ret = -EINVAL;
2515 break;
2516 }
2517 if (!dmabuf->ready && (val = prog_dmabuf_record(state)) != 0) {
2518 ret = val;
2519 break;
2520 }
2521 spin_lock_irqsave(&state->card->lock, flags);
2522 trident_update_ptr(state);
2523 abinfo.fragsize = dmabuf->fragsize;
2524 abinfo.bytes = dmabuf->count;
2525 abinfo.fragstotal = dmabuf->numfrag;
2526 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2527 spin_unlock_irqrestore(&state->card->lock, flags);
2528 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
2529 -EFAULT : 0;
2530 break;
2531
2532 case SNDCTL_DSP_NONBLOCK:
2533 file->f_flags |= O_NONBLOCK;
2534 break;
2535
2536 case SNDCTL_DSP_GETCAPS:
2537 ret = put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER |
2538 DSP_CAP_MMAP | DSP_CAP_BIND, p);
2539 break;
2540
2541 case SNDCTL_DSP_GETTRIGGER:
2542 val = 0;
2543 if ((file->f_mode & FMODE_READ) && dmabuf->enable)
2544 val |= PCM_ENABLE_INPUT;
2545 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable)
2546 val |= PCM_ENABLE_OUTPUT;
2547 ret = put_user(val, p);
2548 break;
2549
2550 case SNDCTL_DSP_SETTRIGGER:
2551 if (get_user(val, p)) {
2552 ret = -EFAULT;
2553 break;
2554 }
2555 if (file->f_mode & FMODE_READ) {
2556 if (val & PCM_ENABLE_INPUT) {
2557 if (!dmabuf->ready &&
2558 (ret = prog_dmabuf_record(state)))
2559 break;
2560 start_adc(state);
2561 } else
2562 stop_adc(state);
2563 }
2564 if (file->f_mode & FMODE_WRITE) {
2565 if (val & PCM_ENABLE_OUTPUT) {
2566 if (!dmabuf->ready &&
2567 (ret = prog_dmabuf_playback(state)))
2568 break;
2569 start_dac(state);
2570 } else
2571 stop_dac(state);
2572 }
2573 break;
2574
2575 case SNDCTL_DSP_GETIPTR:
2576 if (!(file->f_mode & FMODE_READ)) {
2577 ret = -EINVAL;
2578 break;
2579 }
2580 if (!dmabuf->ready && (val = prog_dmabuf_record(state))
2581 != 0) {
2582 ret = val;
2583 break;
2584 }
2585 spin_lock_irqsave(&state->card->lock, flags);
2586 trident_update_ptr(state);
2587 cinfo.bytes = dmabuf->total_bytes;
2588 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2589 cinfo.ptr = dmabuf->hwptr;
2590 if (dmabuf->mapped)
2591 dmabuf->count &= dmabuf->fragsize - 1;
2592 spin_unlock_irqrestore(&state->card->lock, flags);
2593 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
2594 -EFAULT : 0;
2595 break;
2596
2597 case SNDCTL_DSP_GETOPTR:
2598 if (!(file->f_mode & FMODE_WRITE)) {
2599 ret = -EINVAL;
2600 break;
2601 }
2602 if (!dmabuf->ready && (val = prog_dmabuf_playback(state))
2603 != 0) {
2604 ret = val;
2605 break;
2606 }
2607
2608 spin_lock_irqsave(&state->card->lock, flags);
2609 trident_update_ptr(state);
2610 cinfo.bytes = dmabuf->total_bytes;
2611 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2612 cinfo.ptr = dmabuf->hwptr;
2613 if (dmabuf->mapped)
2614 dmabuf->count &= dmabuf->fragsize - 1;
2615 spin_unlock_irqrestore(&state->card->lock, flags);
2616 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
2617 -EFAULT : 0;
2618 break;
2619
2620 case SNDCTL_DSP_SETDUPLEX:
2621 ret = -EINVAL;
2622 break;
2623
2624 case SNDCTL_DSP_GETODELAY:
2625 if (!(file->f_mode & FMODE_WRITE)) {
2626 ret = -EINVAL;
2627 break;
2628 }
2629 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
2630 ret = val;
2631 break;
2632 }
2633 spin_lock_irqsave(&state->card->lock, flags);
2634 trident_update_ptr(state);
2635 val = dmabuf->count;
2636 spin_unlock_irqrestore(&state->card->lock, flags);
2637 ret = put_user(val, p);
2638 break;
2639
2640 case SOUND_PCM_READ_RATE:
2641 ret = put_user(dmabuf->rate, p);
2642 break;
2643
2644 case SOUND_PCM_READ_CHANNELS:
2645 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
2646 p);
2647 break;
2648
2649 case SOUND_PCM_READ_BITS:
2650 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
2651 AFMT_U8, p);
2652 break;
2653
2654 case SNDCTL_DSP_GETCHANNELMASK:
2655 ret = put_user(DSP_BIND_FRONT | DSP_BIND_SURR |
2656 DSP_BIND_CENTER_LFE, p);
2657 break;
2658
2659 case SNDCTL_DSP_BIND_CHANNEL:
2660 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
2661 ret = -EINVAL;
2662 break;
2663 }
2664
2665 if (get_user(val, p)) {
2666 ret = -EFAULT;
2667 break;
2668 }
2669 if (val == DSP_BIND_QUERY) {
2670 val = dmabuf->channel->attribute | 0x3c00;
2671 val = attr2mask[val >> 8];
2672 } else {
2673 dmabuf->ready = 0;
2674 if (file->f_mode & FMODE_READ)
2675 dmabuf->channel->attribute = (CHANNEL_REC |
2676 SRC_ENABLE);
2677 if (file->f_mode & FMODE_WRITE)
2678 dmabuf->channel->attribute = (CHANNEL_SPC_PB |
2679 SRC_ENABLE);
2680 dmabuf->channel->attribute |= mask2attr[ffs(val)];
2681 }
2682 ret = put_user(val, p);
2683 break;
2684
2685 case SNDCTL_DSP_MAPINBUF:
2686 case SNDCTL_DSP_MAPOUTBUF:
2687 case SNDCTL_DSP_SETSYNCRO:
2688 case SOUND_PCM_WRITE_FILTER:
2689 case SOUND_PCM_READ_FILTER:
2690 default:
2691 ret = -EINVAL;
2692 break;
2693
2694 }
2695 return ret;
2696 }
2697
2698 static int
2699 trident_open(struct inode *inode, struct file *file)
2700 {
2701 int i = 0;
2702 int minor = iminor(inode);
2703 struct trident_card *card = devs;
2704 struct trident_state *state = NULL;
2705 struct dmabuf *dmabuf = NULL;
2706
2707 /* Added by Matt Wu 01-05-2001 */
2708 /* TODO: there's some redundacy here wrt the check below */
2709 /* for multi_use_count > 0. Should we return -EBUSY or find */
2710 /* a different card? for now, don't break current behaviour */
2711 /* -- mulix */
2712 if (file->f_mode & FMODE_READ) {
2713 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2714 if (card->multi_channel_use_count > 0)
2715 return -EBUSY;
2716 }
2717 }
2718
2719 /* find an available virtual channel (instance of /dev/dsp) */
2720 while (card != NULL) {
2721 mutex_lock(&card->open_mutex);
2722 if (file->f_mode & FMODE_READ) {
2723 /* Skip opens on cards that are in 6 channel mode */
2724 if (card->multi_channel_use_count > 0) {
2725 mutex_unlock(&card->open_mutex);
2726 card = card->next;
2727 continue;
2728 }
2729 }
2730 for (i = 0; i < NR_HW_CH; i++) {
2731 if (card->states[i] == NULL) {
2732 state = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL);
2733 if (state == NULL) {
2734 mutex_unlock(&card->open_mutex);
2735 return -ENOMEM;
2736 }
2737 mutex_init(&state->sem);
2738 dmabuf = &state->dmabuf;
2739 goto found_virt;
2740 }
2741 }
2742 mutex_unlock(&card->open_mutex);
2743 card = card->next;
2744 }
2745 /* no more virtual channel avaiable */
2746 if (!state) {
2747 return -ENODEV;
2748 }
2749 found_virt:
2750 /* found a free virtual channel, allocate hardware channels */
2751 if (file->f_mode & FMODE_READ)
2752 dmabuf->channel = card->alloc_rec_pcm_channel(card);
2753 else
2754 dmabuf->channel = card->alloc_pcm_channel(card);
2755
2756 if (dmabuf->channel == NULL) {
2757 kfree(card->states[i]);
2758 card->states[i] = NULL;
2759 return -ENODEV;
2760 }
2761
2762 /* initialize the virtual channel */
2763 state->virt = i;
2764 state->card = card;
2765 state->magic = TRIDENT_STATE_MAGIC;
2766 init_waitqueue_head(&dmabuf->wait);
2767 file->private_data = state;
2768
2769 /* set default sample format. According to OSS Programmer's */
2770 /* Guide /dev/dsp should be default to unsigned 8-bits, mono, */
2771 /* with sample rate 8kHz and /dev/dspW will accept 16-bits sample */
2772 if (file->f_mode & FMODE_WRITE) {
2773 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2774 if ((minor & 0x0f) == SND_DEV_DSP16)
2775 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2776 dmabuf->ossfragshift = 0;
2777 dmabuf->ossmaxfrags = 0;
2778 dmabuf->subdivision = 0;
2779 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2780 /* set default channel attribute to normal playback */
2781 dmabuf->channel->attribute = CHANNEL_PB;
2782 }
2783 trident_set_dac_rate(state, 8000);
2784 }
2785
2786 if (file->f_mode & FMODE_READ) {
2787 /* FIXME: Trident 4d can only record in signed 16-bits stereo, */
2788 /* 48kHz sample, to be dealed with in trident_set_adc_rate() ?? */
2789 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2790 if ((minor & 0x0f) == SND_DEV_DSP16)
2791 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2792 dmabuf->ossfragshift = 0;
2793 dmabuf->ossmaxfrags = 0;
2794 dmabuf->subdivision = 0;
2795 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2796 /* set default channel attribute to 0x8a80, record from
2797 PCM L/R FIFO and mono = (left + right + 1)/2 */
2798 dmabuf->channel->attribute = (CHANNEL_REC | PCM_LR |
2799 MONO_MIX);
2800 }
2801 trident_set_adc_rate(state, 8000);
2802
2803 /* Added by Matt Wu 01-05-2001 */
2804 if (card->pci_id == PCI_DEVICE_ID_ALI_5451)
2805 card->rec_channel_use_count++;
2806 }
2807
2808 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2809 mutex_unlock(&card->open_mutex);
2810
2811 pr_debug("trident: open virtual channel %d, hard channel %d\n",
2812 state->virt, dmabuf->channel->num);
2813
2814 return nonseekable_open(inode, file);
2815 }
2816
2817 static int
2818 trident_release(struct inode *inode, struct file *file)
2819 {
2820 struct trident_state *state = (struct trident_state *)file->private_data;
2821 struct trident_card *card;
2822 struct dmabuf *dmabuf;
2823
2824 VALIDATE_STATE(state);
2825
2826 card = state->card;
2827 dmabuf = &state->dmabuf;
2828
2829 if (file->f_mode & FMODE_WRITE) {
2830 trident_clear_tail(state);
2831 drain_dac(state, file->f_flags & O_NONBLOCK);
2832 }
2833
2834 pr_debug("trident: closing virtual channel %d, hard channel %d\n",
2835 state->virt, dmabuf->channel->num);
2836
2837 /* stop DMA state machine and free DMA buffers/channels */
2838 mutex_lock(&card->open_mutex);
2839
2840 if (file->f_mode & FMODE_WRITE) {
2841 stop_dac(state);
2842 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2843 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2844
2845 /* Added by Matt Wu */
2846 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2847 if (state->chans_num > 2) {
2848 if (card->multi_channel_use_count-- < 0)
2849 card->multi_channel_use_count = 0;
2850 if (card->multi_channel_use_count == 0)
2851 ali_close_multi_channels();
2852 ali_free_other_states_resources(state);
2853 }
2854 }
2855 }
2856 if (file->f_mode & FMODE_READ) {
2857 stop_adc(state);
2858 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2859 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2860
2861 /* Added by Matt Wu */
2862 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2863 if (card->rec_channel_use_count-- < 0)
2864 card->rec_channel_use_count = 0;
2865 }
2866 }
2867
2868 card->states[state->virt] = NULL;
2869 kfree(state);
2870
2871 /* we're covered by the open_mutex */
2872 mutex_unlock(&card->open_mutex);
2873
2874 return 0;
2875 }
2876
2877 static /*const */ struct file_operations trident_audio_fops = {
2878 .owner = THIS_MODULE,
2879 .llseek = no_llseek,
2880 .read = trident_read,
2881 .write = trident_write,
2882 .poll = trident_poll,
2883 .ioctl = trident_ioctl,
2884 .mmap = trident_mmap,
2885 .open = trident_open,
2886 .release = trident_release,
2887 };
2888
2889 /* trident specific AC97 functions */
2890 /* Write AC97 codec registers */
2891 static void
2892 trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2893 {
2894 struct trident_card *card = (struct trident_card *)codec->private_data;
2895 unsigned int address, mask, busy;
2896 unsigned short count = 0xffff;
2897 unsigned long flags;
2898 u32 data;
2899
2900 data = ((u32) val) << 16;
2901
2902 switch (card->pci_id) {
2903 default:
2904 case PCI_DEVICE_ID_SI_7018:
2905 address = SI_AC97_WRITE;
2906 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2907 if (codec->id)
2908 mask |= SI_AC97_SECONDARY;
2909 busy = SI_AC97_BUSY_WRITE;
2910 break;
2911 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2912 address = DX_ACR0_AC97_W;
2913 mask = busy = DX_AC97_BUSY_WRITE;
2914 break;
2915 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2916 address = NX_ACR1_AC97_W;
2917 mask = NX_AC97_BUSY_WRITE;
2918 if (codec->id)
2919 mask |= NX_AC97_WRITE_SECONDARY;
2920 busy = NX_AC97_BUSY_WRITE;
2921 break;
2922 case PCI_DEVICE_ID_INTERG_5050:
2923 address = SI_AC97_WRITE;
2924 mask = busy = SI_AC97_BUSY_WRITE;
2925 if (codec->id)
2926 mask |= SI_AC97_SECONDARY;
2927 break;
2928 }
2929
2930 spin_lock_irqsave(&card->lock, flags);
2931 do {
2932 if ((inw(TRID_REG(card, address)) & busy) == 0)
2933 break;
2934 } while (count--);
2935
2936 data |= (mask | (reg & AC97_REG_ADDR));
2937
2938 if (count == 0) {
2939 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2940 spin_unlock_irqrestore(&card->lock, flags);
2941 return;
2942 }
2943
2944 outl(data, TRID_REG(card, address));
2945 spin_unlock_irqrestore(&card->lock, flags);
2946 }
2947
2948 /* Read AC97 codec registers */
2949 static u16
2950 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2951 {
2952 struct trident_card *card = (struct trident_card *)codec->private_data;
2953 unsigned int address, mask, busy;
2954 unsigned short count = 0xffff;
2955 unsigned long flags;
2956 u32 data;
2957
2958 switch (card->pci_id) {
2959 default:
2960 case PCI_DEVICE_ID_SI_7018:
2961 address = SI_AC97_READ;
2962 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2963 if (codec->id)
2964 mask |= SI_AC97_SECONDARY;
2965 busy = SI_AC97_BUSY_READ;
2966 break;
2967 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2968 address = DX_ACR1_AC97_R;
2969 mask = busy = DX_AC97_BUSY_READ;
2970 break;
2971 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2972 if (codec->id)
2973 address = NX_ACR3_AC97_R_SECONDARY;
2974 else
2975 address = NX_ACR2_AC97_R_PRIMARY;
2976 mask = NX_AC97_BUSY_READ;
2977 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2978 break;
2979 case PCI_DEVICE_ID_INTERG_5050:
2980 address = SI_AC97_READ;
2981 mask = busy = SI_AC97_BUSY_READ;
2982 if (codec->id)
2983 mask |= SI_AC97_SECONDARY;
2984 break;
2985 }
2986
2987 data = (mask | (reg & AC97_REG_ADDR));
2988
2989 spin_lock_irqsave(&card->lock, flags);
2990 outl(data, TRID_REG(card, address));
2991 do {
2992 data = inl(TRID_REG(card, address));
2993 if ((data & busy) == 0)
2994 break;
2995 } while (count--);
2996 spin_unlock_irqrestore(&card->lock, flags);
2997
2998 if (count == 0) {
2999 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
3000 data = 0;
3001 }
3002 return ((u16) (data >> 16));
3003 }
3004
3005 /* rewrite ac97 read and write mixer register by hulei for ALI*/
3006 static int
3007 acquirecodecaccess(struct trident_card *card)
3008 {
3009 u16 wsemamask = 0x6000; /* bit 14..13 */
3010 u16 wsemabits;
3011 u16 wcontrol;
3012 int block = 0;
3013 int ncount = 25;
3014 while (1) {
3015 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3016 wsemabits = wcontrol & wsemamask;
3017
3018 if (wsemabits == 0x4000)
3019 return 1; /* 0x4000 is audio ,then success */
3020 if (ncount-- < 0)
3021 break;
3022 if (wsemabits == 0) {
3023 unlock:
3024 outl(((u32) (wcontrol & 0x1eff) | 0x00004000),
3025 TRID_REG(card, ALI_AC97_WRITE));
3026 continue;
3027 }
3028 udelay(20);
3029 }
3030 if (!block) {
3031 pr_debug("accesscodecsemaphore: try unlock\n");
3032 block = 1;
3033 goto unlock;
3034 }
3035 return 0;
3036 }
3037
3038 static void
3039 releasecodecaccess(struct trident_card *card)
3040 {
3041 unsigned long wcontrol;
3042 wcontrol = inl(TRID_REG(card, ALI_AC97_WRITE));
3043 outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE));
3044 }
3045
3046 static int
3047 waitforstimertick(struct trident_card *card)
3048 {
3049 unsigned long chk1, chk2;
3050 unsigned int wcount = 0xffff;
3051 chk1 = inl(TRID_REG(card, ALI_STIMER));
3052
3053 while (1) {
3054 chk2 = inl(TRID_REG(card, ALI_STIMER));
3055 if ((wcount > 0) && chk1 != chk2)
3056 return 1;
3057 if (wcount <= 0)
3058 break;
3059 udelay(50);
3060 }
3061 return 0;
3062 }
3063
3064 /* Read AC97 codec registers for ALi*/
3065 static u16
3066 ali_ac97_get(struct trident_card *card, int secondary, u8 reg)
3067 {
3068 unsigned int address, mask;
3069 unsigned int ncount;
3070 unsigned long aud_reg;
3071 u32 data;
3072 u16 wcontrol;
3073 unsigned long flags;
3074
3075 if (!card)
3076 BUG();
3077
3078 address = ALI_AC97_READ;
3079 if (card->revision == ALI_5451_V02) {
3080 address = ALI_AC97_WRITE;
3081 }
3082 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
3083 if (secondary)
3084 mask |= ALI_AC97_SECONDARY;
3085
3086 spin_lock_irqsave(&card->lock, flags);
3087
3088 if (!acquirecodecaccess(card))
3089 printk(KERN_ERR "access codec fail\n");
3090
3091 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3092 wcontrol &= 0xfe00;
3093 wcontrol |= (0x8000 | reg);
3094 outw(wcontrol, TRID_REG(card, ALI_AC97_WRITE));
3095
3096 data = (mask | (reg & AC97_REG_ADDR));
3097
3098 if (!waitforstimertick(card)) {
3099 printk(KERN_ERR "ali_ac97_read: BIT_CLOCK is dead\n");
3100 goto releasecodec;
3101 }
3102
3103 udelay(20);
3104
3105 ncount = 10;
3106
3107 while (1) {
3108 if ((inw(TRID_REG(card, ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ)
3109 != 0)
3110 break;
3111 if (ncount <= 0)
3112 break;
3113 if (ncount-- == 1) {
3114 pr_debug("ali_ac97_read :try clear busy flag\n");
3115 aud_reg = inl(TRID_REG(card, ALI_AC97_WRITE));
3116 outl((aud_reg & 0xffff7fff),
3117 TRID_REG(card, ALI_AC97_WRITE));
3118 }
3119 udelay(10);
3120 }
3121
3122 data = inl(TRID_REG(card, address));
3123
3124 spin_unlock_irqrestore(&card->lock, flags);
3125
3126 return ((u16) (data >> 16));
3127
3128 releasecodec:
3129 releasecodecaccess(card);
3130 spin_unlock_irqrestore(&card->lock, flags);
3131 printk(KERN_ERR "ali_ac97_read: AC97 CODEC read timed out.\n");
3132 return 0;
3133 }
3134
3135 /* Write AC97 codec registers for hulei*/
3136 static void
3137 ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val)
3138 {
3139 unsigned int address, mask;
3140 unsigned int ncount;
3141 u32 data;
3142 u16 wcontrol;
3143 unsigned long flags;
3144
3145 data = ((u32) val) << 16;
3146
3147 if (!card)
3148 BUG();
3149
3150 address = ALI_AC97_WRITE;
3151 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
3152 if (secondary)
3153 mask |= ALI_AC97_SECONDARY;
3154 if (card->revision == ALI_5451_V02)
3155 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
3156
3157 spin_lock_irqsave(&card->lock, flags);
3158 if (!acquirecodecaccess(card))
3159 printk(KERN_ERR "ali_ac97_write: access codec fail\n");
3160
3161 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3162 wcontrol &= 0xff00;
3163 wcontrol |= (0x8100 | reg); /* bit 8=1: (ali1535 )reserved/ */
3164 /* ali1535+ write */
3165 outl((data | wcontrol), TRID_REG(card, ALI_AC97_WRITE));
3166
3167 if (!waitforstimertick(card)) {
3168 printk(KERN_ERR "BIT_CLOCK is dead\n");
3169 goto releasecodec;
3170 }
3171
3172 ncount = 10;
3173 while (1) {
3174 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3175 if (!(wcontrol & 0x8000))
3176 break;
3177 if (ncount <= 0)
3178 break;
3179 if (ncount-- == 1) {
3180 pr_debug("ali_ac97_set :try clear busy flag!!\n");
3181 outw(wcontrol & 0x7fff,
3182 TRID_REG(card, ALI_AC97_WRITE));
3183 }
3184 udelay(10);
3185 }
3186
3187 releasecodec:
3188 releasecodecaccess(card);
3189 spin_unlock_irqrestore(&card->lock, flags);
3190 return;
3191 }
3192
3193 static void
3194 ali_enable_special_channel(struct trident_state *stat)
3195 {
3196 struct trident_card *card = stat->card;
3197 unsigned long s_channels;
3198
3199 s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3200 s_channels |= (1 << stat->dmabuf.channel->num);
3201 outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL));
3202 }
3203
3204 static u16
3205 ali_ac97_read(struct ac97_codec *codec, u8 reg)
3206 {
3207 int id;
3208 u16 data;
3209 struct trident_card *card = NULL;
3210
3211 /* Added by Matt Wu */
3212 if (!codec)
3213 BUG();
3214
3215 card = (struct trident_card *) codec->private_data;
3216
3217 if (!card->mixer_regs_ready)
3218 return ali_ac97_get(card, codec->id, reg);
3219
3220 /*
3221 * FIXME: need to stop this caching some registers
3222 */
3223 if (codec->id)
3224 id = 1;
3225 else
3226 id = 0;
3227
3228 data = card->mixer_regs[reg / 2][id];
3229 return data;
3230 }
3231
3232 static void
3233 ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
3234 {
3235 int id;
3236 struct trident_card *card;
3237
3238 /* Added by Matt Wu */
3239 if (!codec)
3240 BUG();
3241
3242 card = (struct trident_card *) codec->private_data;
3243
3244 if (!card->mixer_regs_ready) {
3245 ali_ac97_set(card, codec->id, reg, val);
3246 return;
3247 }
3248
3249 if (codec->id)
3250 id = 1;
3251 else
3252 id = 0;
3253
3254 card->mixer_regs[reg / 2][id] = val;
3255 ali_ac97_set(card, codec->id, reg, val);
3256 }
3257
3258 /*
3259 flag: ALI_SPDIF_OUT_TO_SPDIF_OUT
3260 ALI_PCM_TO_SPDIF_OUT
3261 */
3262
3263 static void
3264 ali_setup_spdif_out(struct trident_card *card, int flag)
3265 {
3266 unsigned long spdif;
3267 unsigned char ch;
3268
3269 char temp;
3270 struct pci_dev *pci_dev = NULL;
3271
3272 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3273 pci_dev);
3274 if (pci_dev == NULL)
3275 return;
3276 pci_read_config_byte(pci_dev, 0x61, &temp);
3277 temp |= 0x40;
3278 pci_write_config_byte(pci_dev, 0x61, temp);
3279 pci_read_config_byte(pci_dev, 0x7d, &temp);
3280 temp |= 0x01;
3281 pci_write_config_byte(pci_dev, 0x7d, temp);
3282 pci_read_config_byte(pci_dev, 0x7e, &temp);
3283 temp &= (~0x20);
3284 temp |= 0x10;
3285 pci_write_config_byte(pci_dev, 0x7e, temp);
3286
3287 pci_dev_put(pci_dev);
3288
3289 ch = inb(TRID_REG(card, ALI_SCTRL));
3290 outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL));
3291 ch = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3292 outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL));
3293
3294 if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) {
3295 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3296 spdif |= ALI_SPDIF_OUT_CH_ENABLE;
3297 spdif &= ALI_SPDIF_OUT_SEL_SPDIF;
3298 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3299 spdif = inw(TRID_REG(card, ALI_SPDIF_CS));
3300 if (flag & ALI_SPDIF_OUT_NON_PCM)
3301 spdif |= 0x0002;
3302 else
3303 spdif &= (~0x0002);
3304 outw(spdif, TRID_REG(card, ALI_SPDIF_CS));
3305 } else {
3306 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3307 spdif |= ALI_SPDIF_OUT_SEL_PCM;
3308 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3309 }
3310 }
3311
3312 static void
3313 ali_disable_special_channel(struct trident_card *card, int ch)
3314 {
3315 unsigned long sc;
3316
3317 sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3318 sc &= ~(1 << ch);
3319 outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL));
3320 }
3321
3322 static void
3323 ali_disable_spdif_in(struct trident_card *card)
3324 {
3325 unsigned long spdif;
3326
3327 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3328 spdif &= (~ALI_SPDIF_IN_SUPPORT);
3329 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3330
3331 ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL);
3332 }
3333
3334 static void
3335 ali_setup_spdif_in(struct trident_card *card)
3336 {
3337 unsigned long spdif;
3338
3339 //Set SPDIF IN Supported
3340 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3341 spdif |= ALI_SPDIF_IN_SUPPORT;
3342 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3343
3344 //Set SPDIF IN Rec
3345 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3346 spdif |= ALI_SPDIF_IN_CH_ENABLE;
3347 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3348
3349 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3350 spdif |= ALI_SPDIF_IN_CH_STATUS;
3351 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3352 /*
3353 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3354 spdif |= ALI_SPDIF_IN_FUNC_ENABLE;
3355 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3356 */
3357 }
3358
3359 static void
3360 ali_delay(struct trident_card *card, int interval)
3361 {
3362 unsigned long begintimer, currenttimer;
3363
3364 begintimer = inl(TRID_REG(card, ALI_STIMER));
3365 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3366
3367 while (currenttimer < begintimer + interval)
3368 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3369 }
3370
3371 static void
3372 ali_detect_spdif_rate(struct trident_card *card)
3373 {
3374 u16 wval = 0;
3375 u16 count = 0;
3376 u8 bval = 0, R1 = 0, R2 = 0;
3377
3378 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3379 bval |= 0x02;
3380 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
3381
3382 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3383 bval |= 0x1F;
3384 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL + 1));
3385
3386 while (((R1 < 0x0B) || (R1 > 0x0E)) && (R1 != 0x12) &&
3387 count <= 50000) {
3388 count++;
3389
3390 ali_delay(card, 6);
3391
3392 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3393 R1 = bval & 0x1F;
3394 }
3395
3396 if (count > 50000) {
3397 printk(KERN_WARNING "trident: Error in "
3398 "ali_detect_spdif_rate!\n");
3399 return;
3400 }
3401
3402 count = 0;
3403
3404 while (count <= 50000) {
3405 count++;
3406
3407 ali_delay(card, 6);
3408
3409 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3410 R2 = bval & 0x1F;
3411
3412 if (R2 != R1)
3413 R1 = R2;
3414 else
3415 break;
3416 }
3417
3418 if (count > 50000) {
3419 printk(KERN_WARNING "trident: Error in "
3420 "ali_detect_spdif_rate!\n");
3421 return;
3422 }
3423
3424 switch (R2) {
3425 case 0x0b:
3426 case 0x0c:
3427 case 0x0d:
3428 case 0x0e:
3429 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
3430 wval &= 0xE0F0;
3431 wval |= (u16) 0x09 << 8 | (u16) 0x05;
3432 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
3433
3434 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
3435 outb(bval | 0x02, TRID_REG(card, ALI_SPDIF_CS + 3));
3436 break;
3437
3438 case 0x12:
3439 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
3440 wval &= 0xE0F0;
3441 wval |= (u16) 0x0E << 8 | (u16) 0x08;
3442 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
3443
3444 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
3445 outb(bval | 0x03, TRID_REG(card, ALI_SPDIF_CS + 3));
3446 break;
3447
3448 default:
3449 break;
3450 }
3451
3452 }
3453
3454 static unsigned int
3455 ali_get_spdif_in_rate(struct trident_card *card)
3456 {
3457 u32 dwRate = 0;
3458 u8 bval = 0;
3459
3460 ali_detect_spdif_rate(card);
3461
3462 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3463 bval &= 0x7F;
3464 bval |= 0x40;
3465 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
3466
3467 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3));
3468 bval &= 0x0F;
3469
3470 switch (bval) {
3471 case 0:
3472 dwRate = 44100;
3473 break;
3474 case 1:
3475 dwRate = 48000;
3476 break;
3477 case 2:
3478 dwRate = 32000;
3479 break;
3480 default:
3481 // Error occurs
3482 break;
3483 }
3484
3485 return dwRate;
3486
3487 }
3488
3489 static int
3490 ali_close_multi_channels(void)
3491 {
3492 char temp = 0;
3493 struct pci_dev *pci_dev = NULL;
3494
3495 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3496 pci_dev);
3497 if (pci_dev == NULL)
3498 return -1;
3499
3500 pci_read_config_byte(pci_dev, 0x59, &temp);
3501 temp &= ~0x80;
3502 pci_write_config_byte(pci_dev, 0x59, temp);
3503
3504 pci_dev_put(pci_dev);
3505
3506 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
3507 NULL);
3508 if (pci_dev == NULL)
3509 return -1;
3510
3511 pci_read_config_byte(pci_dev, 0xB8, &temp);
3512 temp &= ~0x20;
3513 pci_write_config_byte(pci_dev, 0xB8, temp);
3514
3515 pci_dev_put(pci_dev);
3516
3517 return 0;
3518 }
3519
3520 static int
3521 ali_setup_multi_channels(struct trident_card *card, int chan_nums)
3522 {
3523 unsigned long dwValue;
3524 char temp = 0;
3525 struct pci_dev *pci_dev = NULL;
3526
3527 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3528 pci_dev);
3529 if (pci_dev == NULL)
3530 return -1;
3531 pci_read_config_byte(pci_dev, 0x59, &temp);
3532 temp |= 0x80;
3533 pci_write_config_byte(pci_dev, 0x59, temp);
3534
3535 pci_dev_put(pci_dev);
3536
3537 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
3538 NULL);
3539 if (pci_dev == NULL)
3540 return -1;
3541 pci_read_config_byte(pci_dev, (int) 0xB8, &temp);
3542 temp |= 0x20;
3543 pci_write_config_byte(pci_dev, (int) 0xB8, (u8) temp);
3544
3545 pci_dev_put(pci_dev);
3546
3547 if (chan_nums == 6) {
3548 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000;
3549 outl(dwValue, TRID_REG(card, ALI_SCTRL));
3550 mdelay(4);
3551 dwValue = inl(TRID_REG(card, ALI_SCTRL));
3552 if (dwValue & 0x2000000) {
3553 ali_ac97_write(card->ac97_codec[0], 0x02, 8080);
3554 ali_ac97_write(card->ac97_codec[0], 0x36, 0);
3555 ali_ac97_write(card->ac97_codec[0], 0x38, 0);
3556 /*
3557 * On a board with a single codec you won't get the
3558 * surround. On other boards configure it.
3559 */
3560 if (card->ac97_codec[1] != NULL) {
3561 ali_ac97_write(card->ac97_codec[1], 0x36, 0);
3562 ali_ac97_write(card->ac97_codec[1], 0x38, 0);
3563 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606);
3564 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303);
3565 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3);
3566 }
3567 return 1;
3568 }
3569 }
3570 return -EINVAL;
3571 }
3572
3573 static void
3574 ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
3575 {
3576 int bank;
3577
3578 if (channel > 31)
3579 return;
3580
3581 bank = channel >> 5;
3582 channel = channel & 0x1f;
3583
3584 card->banks[bank].bitmap &= ~(1 << (channel));
3585 }
3586
3587 static int
3588 ali_allocate_other_states_resources(struct trident_state *state, int chan_nums)
3589 {
3590 struct trident_card *card = state->card;
3591 struct trident_state *s;
3592 int i, state_count = 0;
3593 struct trident_pcm_bank *bank;
3594 struct trident_channel *channel;
3595 unsigned long num;
3596
3597 bank = &card->banks[BANK_A];
3598
3599 if (chan_nums != 6)
3600 return 0;
3601
3602 for (i = 0; (i < ALI_CHANNELS) && (state_count != 4); i++) {
3603 if (card->states[i])
3604 continue;
3605
3606 num = ali_multi_channels_5_1[state_count];
3607 if (!(bank->bitmap & (1 << num))) {
3608 bank->bitmap |= 1 << num;
3609 channel = &bank->channels[num];
3610 channel->num = num;
3611 } else {
3612 state_count--;
3613 for (; state_count >= 0; state_count--) {
3614 kfree(state->other_states[state_count]);
3615 num = ali_multi_channels_5_1[state_count];
3616 ali_free_pcm_channel(card, num);
3617 }
3618 return -EBUSY;
3619 }
3620 s = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL);
3621 if (!s) {
3622 num = ali_multi_channels_5_1[state_count];
3623 ali_free_pcm_channel(card, num);
3624 state_count--;
3625 for (; state_count >= 0; state_count--) {
3626 num = ali_multi_channels_5_1[state_count];
3627 ali_free_pcm_channel(card, num);
3628 kfree(state->other_states[state_count]);
3629 }
3630 return -ENOMEM;
3631 }
3632
3633 s->dmabuf.channel = channel;
3634 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags =
3635 s->dmabuf.subdivision = 0;
3636 init_waitqueue_head(&s->dmabuf.wait);
3637 s->magic = card->magic;
3638 s->card = card;
3639 s->virt = i;
3640 ali_enable_special_channel(s);
3641 state->other_states[state_count++] = s;
3642 }
3643
3644 if (state_count != 4) {
3645 state_count--;
3646 for (; state_count >= 0; state_count--) {
3647 kfree(state->other_states[state_count]);
3648 num = ali_multi_channels_5_1[state_count];
3649 ali_free_pcm_channel(card, num);
3650 }
3651 return -EBUSY;
3652 }
3653 return 0;
3654 }
3655
3656 #ifdef CONFIG_PM
3657 /* save registers for ALi Power Management */
3658 static struct ali_saved_registers {
3659 unsigned long global_regs[ALI_GLOBAL_REGS];
3660 unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
3661 unsigned mixer_regs[ALI_MIXER_REGS];
3662 } ali_registers;
3663
3664 static void
3665 ali_save_regs(struct trident_card *card)
3666 {
3667 unsigned long flags;
3668 int i, j;
3669
3670 spin_lock_irqsave(&card->lock, flags);
3671
3672 ali_registers.global_regs[0x2c] = inl(TRID_REG(card, T4D_MISCINT));
3673 //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A));
3674 ali_registers.global_regs[0x21] = inl(TRID_REG(card, T4D_STOP_A));
3675
3676 //disable all IRQ bits
3677 outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT));
3678
3679 for (i = 1; i < ALI_MIXER_REGS; i++)
3680 ali_registers.mixer_regs[i] = ali_ac97_read(card->ac97_codec[0],
3681 i * 2);
3682
3683 for (i = 0; i < ALI_GLOBAL_REGS; i++) {
3684 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A))
3685 continue;
3686 ali_registers.global_regs[i] = inl(TRID_REG(card, i * 4));
3687 }
3688
3689 for (i = 0; i < ALI_CHANNELS; i++) {
3690 outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
3691 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3692 ali_registers.channel_regs[i][j] = inl(TRID_REG(card,
3693 j * 4 + 0xe0));
3694 }
3695
3696 //Stop all HW channel
3697 outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A));
3698
3699 spin_unlock_irqrestore(&card->lock, flags);
3700 }
3701
3702 static void
3703 ali_restore_regs(struct trident_card *card)
3704 {
3705 unsigned long flags;
3706 int i, j;
3707
3708 spin_lock_irqsave(&card->lock, flags);
3709
3710 for (i = 1; i < ALI_MIXER_REGS; i++)
3711 ali_ac97_write(card->ac97_codec[0], i * 2,
3712 ali_registers.mixer_regs[i]);
3713
3714 for (i = 0; i < ALI_CHANNELS; i++) {
3715 outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
3716 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3717 outl(ali_registers.channel_regs[i][j],
3718 TRID_REG(card, j * 4 + 0xe0));
3719 }
3720
3721 for (i = 0; i < ALI_GLOBAL_REGS; i++) {
3722 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A) ||
3723 (i * 4 == T4D_START_A))
3724 continue;
3725 outl(ali_registers.global_regs[i], TRID_REG(card, i * 4));
3726 }
3727
3728 //start HW channel
3729 outl(ali_registers.global_regs[0x20], TRID_REG(card, T4D_START_A));
3730 //restore IRQ enable bits
3731 outl(ali_registers.global_regs[0x2c], TRID_REG(card, T4D_MISCINT));
3732
3733 spin_unlock_irqrestore(&card->lock, flags);
3734 }
3735
3736 static int
3737 trident_suspend(struct pci_dev *dev, pm_message_t unused)
3738 {
3739 struct trident_card *card = pci_get_drvdata(dev);
3740
3741 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3742 ali_save_regs(card);
3743 }
3744 return 0;
3745 }
3746
3747 static int
3748 trident_resume(struct pci_dev *dev)
3749 {
3750 struct trident_card *card = pci_get_drvdata(dev);
3751
3752 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3753 ali_restore_regs(card);
3754 }
3755 return 0;
3756 }
3757 #endif
3758
3759 static struct trident_channel *
3760 ali_alloc_pcm_channel(struct trident_card *card)
3761 {
3762 struct trident_pcm_bank *bank;
3763 int idx;
3764
3765 bank = &card->banks[BANK_A];
3766
3767 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) &
3768 (ALI_SPDIF_OUT_CH_ENABLE)) {
3769 idx = ALI_SPDIF_OUT_CHANNEL;
3770 if (!(bank->bitmap & (1 << idx))) {
3771 struct trident_channel *channel = &bank->channels[idx];
3772 bank->bitmap |= 1 << idx;
3773 channel->num = idx;
3774 return channel;
3775 }
3776 }
3777
3778 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST;
3779 idx++) {
3780 if (!(bank->bitmap & (1 << idx))) {
3781 struct trident_channel *channel = &bank->channels[idx];
3782 bank->bitmap |= 1 << idx;
3783 channel->num = idx;
3784 return channel;
3785 }
3786 }
3787
3788 /* no more free channels avaliable */
3789 #if 0
3790 printk(KERN_ERR "ali: no more channels available on Bank A.\n");
3791 #endif /* 0 */
3792 return NULL;
3793 }
3794
3795 static struct trident_channel *
3796 ali_alloc_rec_pcm_channel(struct trident_card *card)
3797 {
3798 struct trident_pcm_bank *bank;
3799 int idx;
3800
3801 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT)
3802 idx = ALI_SPDIF_IN_CHANNEL;
3803 else
3804 idx = ALI_PCM_IN_CHANNEL;
3805
3806 bank = &card->banks[BANK_A];
3807
3808 if (!(bank->bitmap & (1 << idx))) {
3809 struct trident_channel *channel = &bank->channels[idx];
3810 bank->bitmap |= 1 << idx;
3811 channel->num = idx;
3812 return channel;
3813 }
3814
3815 /* no free recordable channels avaliable */
3816 #if 0
3817 printk(KERN_ERR "ali: no recordable channels available on Bank A.\n");
3818 #endif /* 0 */
3819 return NULL;
3820 }
3821
3822 static void
3823 ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate)
3824 {
3825 unsigned char ch_st_sel;
3826 unsigned short status_rate;
3827
3828 switch (rate) {
3829 case 44100:
3830 status_rate = 0;
3831 break;
3832 case 32000:
3833 status_rate = 0x300;
3834 break;
3835 case 48000:
3836 default:
3837 status_rate = 0x200;
3838 break;
3839 }
3840
3841 /* select spdif_out */
3842 ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS;
3843
3844 ch_st_sel |= 0x80; /* select right */
3845 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3846 outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2));
3847
3848 ch_st_sel &= (~0x80); /* select left */
3849 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3850 outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2));
3851 }
3852
3853 static void
3854 ali_address_interrupt(struct trident_card *card)
3855 {
3856 int i, channel;
3857 struct trident_state *state;
3858 u32 mask, channel_mask;
3859
3860 mask = trident_get_interrupt_mask(card, 0);
3861 for (i = 0; i < NR_HW_CH; i++) {
3862 if ((state = card->states[i]) == NULL)
3863 continue;
3864 channel = state->dmabuf.channel->num;
3865 if ((channel_mask = 1 << channel) & mask) {
3866 mask &= ~channel_mask;
3867 trident_ack_channel_interrupt(card, channel);
3868 udelay(100);
3869 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
3870 trident_update_ptr(state);
3871 }
3872 }
3873 if (mask) {
3874 for (i = 0; i < NR_HW_CH; i++) {
3875 if (mask & (1 << i)) {
3876 printk("ali: spurious channel irq %d.\n", i);
3877 trident_ack_channel_interrupt(card, i);
3878 trident_stop_voice(card, i);
3879 trident_disable_voice_irq(card, i);
3880 }
3881 }
3882 }
3883 }
3884
3885 /* Updating the values of counters of other_states' DMAs without lock
3886 protection is no harm because all DMAs of multi-channels and interrupt
3887 depend on a master state's DMA, and changing the counters of the master
3888 state DMA is protected by a spinlock.
3889 */
3890 static int
3891 ali_write_5_1(struct trident_state *state, const char __user *buf,
3892 int cnt_for_multi_channel, unsigned int *copy_count,
3893 unsigned int *state_cnt)
3894 {
3895
3896 struct dmabuf *dmabuf = &state->dmabuf;
3897 struct dmabuf *dmabuf_temp;
3898 const char __user *buffer = buf;
3899 unsigned swptr, other_dma_nums, sample_s;
3900 unsigned int i, loop;
3901
3902 other_dma_nums = 4;
3903 sample_s = sample_size[dmabuf->fmt] >> 1;
3904 swptr = dmabuf->swptr;
3905
3906 if ((i = state->multi_channels_adjust_count) > 0) {
3907 if (i == 1) {
3908 if (copy_from_user(dmabuf->rawbuf + swptr,
3909 buffer, sample_s))
3910 return -EFAULT;
3911 seek_offset(swptr, buffer, cnt_for_multi_channel,
3912 sample_s, *copy_count);
3913 i--;
3914 (*state_cnt) += sample_s;
3915 state->multi_channels_adjust_count++;
3916 } else
3917 i = i - (state->chans_num - other_dma_nums);
3918 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) {
3919 dmabuf_temp = &state->other_states[i]->dmabuf;
3920 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3921 buffer, sample_s))
3922 return -EFAULT;
3923 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3924 sample_s, *copy_count);
3925 }
3926 if (cnt_for_multi_channel == 0)
3927 state->multi_channels_adjust_count += i;
3928 }
3929 if (cnt_for_multi_channel > 0) {
3930 loop = cnt_for_multi_channel / (state->chans_num * sample_s);
3931 for (i = 0; i < loop; i++) {
3932 if (copy_from_user(dmabuf->rawbuf + swptr, buffer,
3933 sample_s * 2))
3934 return -EFAULT;
3935 seek_offset(swptr, buffer, cnt_for_multi_channel,
3936 sample_s * 2, *copy_count);
3937 (*state_cnt) += (sample_s * 2);
3938
3939 dmabuf_temp = &state->other_states[0]->dmabuf;
3940 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3941 buffer, sample_s))
3942 return -EFAULT;
3943 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3944 sample_s, *copy_count);
3945
3946 dmabuf_temp = &state->other_states[1]->dmabuf;
3947 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3948 buffer, sample_s))
3949 return -EFAULT;
3950 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3951 sample_s, *copy_count);
3952
3953 dmabuf_temp = &state->other_states[2]->dmabuf;
3954 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3955 buffer, sample_s))
3956 return -EFAULT;
3957 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3958 sample_s, *copy_count);
3959
3960 dmabuf_temp = &state->other_states[3]->dmabuf;
3961 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3962 buffer, sample_s))
3963 return -EFAULT;
3964 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3965 sample_s, *copy_count);
3966 }
3967
3968 if (cnt_for_multi_channel > 0) {
3969 state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s;
3970
3971 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3972 return -EFAULT;
3973 seek_offset(swptr, buffer, cnt_for_multi_channel,
3974 sample_s, *copy_count);
3975 (*state_cnt) += sample_s;
3976
3977 if (cnt_for_multi_channel > 0) {
3978 if (copy_from_user(dmabuf->rawbuf + swptr,
3979 buffer, sample_s))
3980 return -EFAULT;
3981 seek_offset(swptr, buffer, cnt_for_multi_channel,
3982 sample_s, *copy_count);
3983 (*state_cnt) += sample_s;
3984
3985 if (cnt_for_multi_channel > 0) {
3986 int diff = state->chans_num - other_dma_nums;
3987 loop = state->multi_channels_adjust_count - diff;
3988 for (i = 0; i < loop; i++) {
3989 dmabuf_temp = &state->other_states[i]->dmabuf;
3990 if (copy_from_user(dmabuf_temp->rawbuf +
3991 dmabuf_temp->swptr,
3992 buffer, sample_s))
3993 return -EFAULT;
3994 seek_offset(dmabuf_temp->swptr, buffer,
3995 cnt_for_multi_channel,
3996 sample_s, *copy_count);
3997 }
3998 }
3999 }
4000 } else
4001 state->multi_channels_adjust_count = 0;
4002 }
4003 for (i = 0; i < other_dma_nums; i++) {
4004 dmabuf_temp = &state->other_states[i]->dmabuf;
4005 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize;
4006 }
4007 return *state_cnt;
4008 }
4009
4010 static void
4011 ali_free_other_states_resources(struct trident_state *state)
4012 {
4013 int i;
4014 struct trident_card *card = state->card;
4015 struct trident_state *s;
4016 unsigned other_states_count;
4017
4018 other_states_count = state->chans_num - 2; /* except PCM L/R channels */
4019 for (i = 0; i < other_states_count; i++) {
4020 s = state->other_states[i];
4021 dealloc_dmabuf(&s->dmabuf, card->pci_dev);
4022 ali_disable_special_channel(s->card, s->dmabuf.channel->num);
4023 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num);
4024 card->states[s->virt] = NULL;
4025 kfree(s);
4026 }
4027 }
4028
4029 static struct proc_dir_entry *res;
4030
4031 static int
4032 ali_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data)
4033 {
4034 struct trident_card *card = (struct trident_card *) data;
4035 unsigned long flags;
4036 char c;
4037
4038 if (count < 0)
4039 return -EINVAL;
4040 if (count == 0)
4041 return 0;
4042 if (get_user(c, buffer))
4043 return -EFAULT;
4044
4045 spin_lock_irqsave(&card->lock, flags);
4046 switch (c) {
4047 case '0':
4048 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4049 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4050 break;
4051 case '1':
4052 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
4053 ALI_SPDIF_OUT_PCM);
4054 break;
4055 case '2':
4056 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
4057 ALI_SPDIF_OUT_NON_PCM);
4058 break;
4059 case '3':
4060 ali_disable_spdif_in(card); //default
4061 break;
4062 case '4':
4063 ali_setup_spdif_in(card);
4064 break;
4065 }
4066 spin_unlock_irqrestore(&card->lock, flags);
4067
4068 return count;
4069 }
4070
4071 /* OSS /dev/mixer file operation methods */
4072 static int
4073 trident_open_mixdev(struct inode *inode, struct file *file)
4074 {
4075 int i = 0;
4076 int minor = iminor(inode);
4077 struct trident_card *card = devs;
4078
4079 for (card = devs; card != NULL; card = card->next)
4080 for (i = 0; i < NR_AC97; i++)
4081 if (card->ac97_codec[i] != NULL &&
4082 card->ac97_codec[i]->dev_mixer == minor)
4083 goto match;
4084
4085 if (!card) {
4086 return -ENODEV;
4087 }
4088 match:
4089 file->private_data = card->ac97_codec[i];
4090
4091 return nonseekable_open(inode, file);
4092 }
4093
4094 static int
4095 trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
4096 unsigned long arg)
4097 {
4098 struct ac97_codec *codec = (struct ac97_codec *) file->private_data;
4099
4100 return codec->mixer_ioctl(codec, cmd, arg);
4101 }
4102
4103 static /*const */ struct file_operations trident_mixer_fops = {
4104 .owner = THIS_MODULE,
4105 .llseek = no_llseek,
4106 .ioctl = trident_ioctl_mixdev,
4107 .open = trident_open_mixdev,
4108 };
4109
4110 static int
4111 ali_reset_5451(struct trident_card *card)
4112 {
4113 struct pci_dev *pci_dev = NULL;
4114 unsigned int dwVal;
4115 unsigned short wCount, wReg;
4116
4117 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
4118 pci_dev);
4119 if (pci_dev == NULL)
4120 return -1;
4121
4122 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
4123 pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
4124 udelay(5000);
4125 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
4126 pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
4127 udelay(5000);
4128 pci_dev_put(pci_dev);
4129
4130 pci_dev = card->pci_dev;
4131 if (pci_dev == NULL)
4132 return -1;
4133
4134 pci_read_config_dword(pci_dev, 0x44, &dwVal);
4135 pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
4136 udelay(500);
4137 pci_read_config_dword(pci_dev, 0x44, &dwVal);
4138 pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
4139 udelay(5000);
4140
4141 /* TODO: recognize if we have a PM capable codec and only do this */
4142 /* if the codec is PM capable */
4143 wCount = 2000;
4144 while (wCount--) {
4145 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4146 if ((wReg & 0x000f) == 0x000f)
4147 return 0;
4148 udelay(5000);
4149 }
4150 /* This is non fatal if you have a non PM capable codec.. */
4151 return 0;
4152 }
4153
4154 /* AC97 codec initialisation. */
4155 static int __devinit
4156 trident_ac97_init(struct trident_card *card)
4157 {
4158 int num_ac97 = 0;
4159 unsigned long ready_2nd = 0;
4160 struct ac97_codec *codec;
4161 int i = 0;
4162
4163 /* initialize controller side of AC link, and find out if secondary codes
4164 really exist */
4165 switch (card->pci_id) {
4166 case PCI_DEVICE_ID_ALI_5451:
4167 if (ali_reset_5451(card)) {
4168 printk(KERN_ERR "trident_ac97_init: error "
4169 "resetting 5451.\n");
4170 return -1;
4171 }
4172 outl(0x80000001, TRID_REG(card, ALI_GLOBAL_CONTROL));
4173 outl(0x00000000, TRID_REG(card, T4D_AINTEN_A));
4174 outl(0xffffffff, TRID_REG(card, T4D_AINT_A));
4175 outl(0x00000000, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4176 outb(0x10, TRID_REG(card, ALI_MPUR2));
4177 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
4178 ready_2nd &= 0x3fff;
4179 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL));
4180 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
4181 ready_2nd &= SI_AC97_SECONDARY_READY;
4182 if (card->revision < ALI_5451_V02)
4183 ready_2nd = 0;
4184 break;
4185 case PCI_DEVICE_ID_SI_7018:
4186 /* disable AC97 GPIO interrupt */
4187 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
4188 /* when power up the AC link is in cold reset mode so stop it */
4189 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT | SECONDARY_ID,
4190 TRID_REG(card, SI_SERIAL_INTF_CTRL));
4191 /* it take a long time to recover from a cold reset */
4192 /* (especially when you have more than one codec) */
4193 udelay(2000);
4194 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
4195 ready_2nd &= SI_AC97_SECONDARY_READY;
4196 break;
4197 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
4198 /* playback on */
4199 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
4200 break;
4201 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
4202 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
4203 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4204 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4205 ready_2nd &= NX_AC97_SECONDARY_READY;
4206 break;
4207 case PCI_DEVICE_ID_INTERG_5050:
4208 /* disable AC97 GPIO interrupt */
4209 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
4210 /* when power up, the AC link is in cold reset mode, so stop it */
4211 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT,
4212 TRID_REG(card, SI_SERIAL_INTF_CTRL));
4213 /* it take a long time to recover from a cold reset (especially */
4214 /* when you have more than one codec) */
4215 udelay(2000);
4216 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
4217 ready_2nd &= SI_AC97_SECONDARY_READY;
4218 break;
4219 }
4220
4221 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4222 if ((codec = ac97_alloc_codec()) == NULL)
4223 return -ENOMEM;
4224
4225 /* initialize some basic codec information, other fields */
4226 /* will be filled in ac97_probe_codec */
4227 codec->private_data = card;
4228 codec->id = num_ac97;
4229
4230 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4231 codec->codec_read = ali_ac97_read;
4232 codec->codec_write = ali_ac97_write;
4233 } else {
4234 codec->codec_read = trident_ac97_get;
4235 codec->codec_write = trident_ac97_set;
4236 }
4237
4238 if (ac97_probe_codec(codec) == 0)
4239 break;
4240
4241 codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1);
4242 if (codec->dev_mixer < 0) {
4243 printk(KERN_ERR "trident: couldn't register mixer!\n");
4244 ac97_release_codec(codec);
4245 break;
4246 }
4247
4248 card->ac97_codec[num_ac97] = codec;
4249
4250 /* if there is no secondary codec at all, don't probe any more */
4251 if (!ready_2nd)
4252 break;
4253 }
4254
4255 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4256 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4257 if (card->ac97_codec[num_ac97] == NULL)
4258 break;
4259 for (i = 0; i < 64; i++) {
4260 u16 reg = ali_ac97_get(card, num_ac97, i * 2);
4261 card->mixer_regs[i][num_ac97] = reg;
4262 }
4263 }
4264 }
4265 return num_ac97 + 1;
4266 }
4267
4268 #ifdef SUPPORT_JOYSTICK
4269 /* Gameport functions for the cards ADC gameport */
4270
4271 static unsigned char trident_game_read(struct gameport *gameport)
4272 {
4273 struct trident_card *card = gameport->port_data;
4274
4275 return inb(TRID_REG(card, T4D_GAME_LEG));
4276 }
4277
4278 static void trident_game_trigger(struct gameport *gameport)
4279 {
4280 struct trident_card *card = gameport->port_data;
4281
4282 outb(0xff, TRID_REG(card, T4D_GAME_LEG));
4283 }
4284
4285 static int trident_game_cooked_read(struct gameport *gameport,
4286 int *axes, int *buttons)
4287 {
4288 struct trident_card *card = gameport->port_data;
4289 int i;
4290
4291 *buttons = (~inb(TRID_REG(card, T4D_GAME_LEG)) >> 4) & 0xf;
4292
4293 for (i = 0; i < 4; i++) {
4294 axes[i] = inw(TRID_REG(card, T4D_GAME_AXD) + i * sizeof (u16));
4295 if (axes[i] == 0xffff)
4296 axes[i] = -1;
4297 }
4298
4299 return 0;
4300 }
4301
4302 static int trident_game_open(struct gameport *gameport, int mode)
4303 {
4304 struct trident_card *card = gameport->port_data;
4305
4306 switch (mode) {
4307 case GAMEPORT_MODE_COOKED:
4308 outb(0x80, TRID_REG(card, T4D_GAME_CR));
4309 msleep(20);
4310 return 0;
4311 case GAMEPORT_MODE_RAW:
4312 outb(0x00, TRID_REG(card, T4D_GAME_CR));
4313 return 0;
4314 default:
4315 return -1;
4316 }
4317
4318 return 0;
4319 }
4320
4321 static int __devinit trident_register_gameport(struct trident_card *card)
4322 {
4323 struct gameport *gp;
4324
4325 card->gameport = gp = gameport_allocate_port();
4326 if (!gp) {
4327 printk(KERN_ERR "trident: can not allocate memory for gameport\n");
4328 return -ENOMEM;
4329 }
4330
4331 gameport_set_name(gp, "Trident 4DWave");
4332 gameport_set_phys(gp, "pci%s/gameport0", pci_name(card->pci_dev));
4333 gp->read = trident_game_read;
4334 gp->trigger = trident_game_trigger;
4335 gp->cooked_read = trident_game_cooked_read;
4336 gp->open = trident_game_open;
4337 gp->fuzz = 64;
4338 gp->port_data = card;
4339
4340 gameport_register_port(gp);
4341
4342 return 0;
4343 }
4344
4345 static inline void trident_unregister_gameport(struct trident_card *card)
4346 {
4347 if (card->gameport)
4348 gameport_unregister_port(card->gameport);
4349 }
4350
4351 #else
4352 static inline int trident_register_gameport(struct trident_card *card) { return -ENOSYS; }
4353 static inline void trident_unregister_gameport(struct trident_card *card) { }
4354 #endif /* SUPPORT_JOYSTICK */
4355
4356 /* install the driver, we do not allocate hardware channel nor DMA buffer */
4357 /* now, they are defered until "ACCESS" time (in prog_dmabuf called by */
4358 /* open/read/write/ioctl/mmap) */
4359 static int __devinit
4360 trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
4361 {
4362 unsigned long iobase;
4363 struct trident_card *card;
4364 u8 bits;
4365 u8 revision;
4366 int i = 0;
4367 u16 temp;
4368 struct pci_dev *pci_dev_m1533 = NULL;
4369 int rc = -ENODEV;
4370 u64 dma_mask;
4371
4372 if (pci_enable_device(pci_dev))
4373 goto out;
4374
4375 if (pci_dev->device == PCI_DEVICE_ID_ALI_5451)
4376 dma_mask = ALI_DMA_MASK;
4377 else
4378 dma_mask = TRIDENT_DMA_MASK;
4379 if (pci_set_dma_mask(pci_dev, dma_mask)) {
4380 printk(KERN_ERR "trident: architecture does not support"
4381 " %s PCI busmaster DMA\n",
4382 pci_dev->device == PCI_DEVICE_ID_ALI_5451 ?
4383 "32-bit" : "30-bit");
4384 goto out;
4385 }
4386 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
4387
4388 if (pci_id->device == PCI_DEVICE_ID_INTERG_5050)
4389 iobase = pci_resource_start(pci_dev, 1);
4390 else
4391 iobase = pci_resource_start(pci_dev, 0);
4392
4393 if (!request_region(iobase, 256, card_names[pci_id->driver_data])) {
4394 printk(KERN_ERR "trident: can't allocate I/O space at "
4395 "0x%4.4lx\n", iobase);
4396 goto out;
4397 }
4398
4399 rc = -ENOMEM;
4400 if ((card = kzalloc(sizeof(*card), GFP_KERNEL)) == NULL) {
4401 printk(KERN_ERR "trident: out of memory\n");
4402 goto out_release_region;
4403 }
4404
4405 init_timer(&card->timer);
4406 card->iobase = iobase;
4407 card->pci_dev = pci_dev_get(pci_dev);
4408 card->pci_id = pci_id->device;
4409 card->revision = revision;
4410 card->irq = pci_dev->irq;
4411 card->next = devs;
4412 card->magic = TRIDENT_CARD_MAGIC;
4413 card->banks[BANK_A].addresses = &bank_a_addrs;
4414 card->banks[BANK_A].bitmap = 0UL;
4415 card->banks[BANK_B].addresses = &bank_b_addrs;
4416 card->banks[BANK_B].bitmap = 0UL;
4417
4418 mutex_init(&card->open_mutex);
4419 spin_lock_init(&card->lock);
4420 init_timer(&card->timer);
4421
4422 devs = card;
4423
4424 pci_set_master(pci_dev);
4425
4426 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
4427 card_names[pci_id->driver_data], card->iobase, card->irq);
4428
4429 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4430 /* ALi channel Management */
4431 card->alloc_pcm_channel = ali_alloc_pcm_channel;
4432 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
4433 card->free_pcm_channel = ali_free_pcm_channel;
4434
4435 card->address_interrupt = ali_address_interrupt;
4436
4437 /* Added by Matt Wu 01-05-2001 for spdif in */
4438 card->multi_channel_use_count = 0;
4439 card->rec_channel_use_count = 0;
4440
4441 /* ALi SPDIF OUT function */
4442 if (card->revision == ALI_5451_V02) {
4443 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4444 res = create_proc_entry("ALi5451", 0, NULL);
4445 if (res) {
4446 res->write_proc = ali_write_proc;
4447 res->data = card;
4448 }
4449 }
4450
4451 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4452 card->hwvolctl = 0;
4453 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,
4454 PCI_DEVICE_ID_AL_M1533,
4455 pci_dev_m1533);
4456 rc = -ENODEV;
4457 if (pci_dev_m1533 == NULL)
4458 goto out_proc_fs;
4459 pci_read_config_byte(pci_dev_m1533, 0x63, &bits);
4460 if (bits & (1 << 5))
4461 card->hwvolctl = 1;
4462 if (card->hwvolctl) {
4463 /* Clear m1533 pci cfg 78h bit 30 to zero, which makes
4464 GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */
4465 pci_read_config_byte(pci_dev_m1533, 0x7b, &bits);
4466 bits &= 0xbf; /*clear bit 6 */
4467 pci_write_config_byte(pci_dev_m1533, 0x7b, bits);
4468 }
4469 } else if (card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
4470 card->alloc_pcm_channel = cyber_alloc_pcm_channel;
4471 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel;
4472 card->free_pcm_channel = cyber_free_pcm_channel;
4473 card->address_interrupt = cyber_address_interrupt;
4474 cyber_init_ritual(card);
4475 } else {
4476 card->alloc_pcm_channel = trident_alloc_pcm_channel;
4477 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
4478 card->free_pcm_channel = trident_free_pcm_channel;
4479 card->address_interrupt = trident_address_interrupt;
4480 }
4481
4482 /* claim our irq */
4483 rc = -ENODEV;
4484 if (request_irq(card->irq, &trident_interrupt, IRQF_SHARED,
4485 card_names[pci_id->driver_data], card)) {
4486 printk(KERN_ERR "trident: unable to allocate irq %d\n",
4487 card->irq);
4488 goto out_proc_fs;
4489 }
4490 /* register /dev/dsp */
4491 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
4492 printk(KERN_ERR "trident: couldn't register DSP device!\n");
4493 goto out_free_irq;
4494 }
4495 card->mixer_regs_ready = 0;
4496 /* initialize AC97 codec and register /dev/mixer */
4497 if (trident_ac97_init(card) <= 0) {
4498 /* unregister audio devices */
4499 for (i = 0; i < NR_AC97; i++) {
4500 if (card->ac97_codec[i] != NULL) {
4501 struct ac97_codec* codec = card->ac97_codec[i];
4502 unregister_sound_mixer(codec->dev_mixer);
4503 ac97_release_codec(codec);
4504 }
4505 }
4506 goto out_unregister_sound_dsp;
4507 }
4508 card->mixer_regs_ready = 1;
4509 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4510
4511 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4512 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4513 if (card->hwvolctl) {
4514 /* Enable GPIO IRQ (MISCINT bit 18h) */
4515 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
4516 temp |= 0x0004;
4517 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
4518
4519 /* Enable H/W Volume Control GLOVAL CONTROL bit 0 */
4520 temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
4521 temp |= 0x0001;
4522 outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL));
4523
4524 }
4525 if (card->revision == ALI_5451_V02)
4526 ali_close_multi_channels();
4527 /* edited by HMSEO for GT sound */
4528 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
4529 {
4530 u16 ac97_data;
4531 extern struct hwrpb_struct *hwrpb;
4532
4533 if ((hwrpb->sys_type) == 201) {
4534 printk(KERN_INFO "trident: Running on Alpha system "
4535 "type Nautilus\n");
4536 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4537 ali_ac97_set(card, 0, AC97_POWER_CONTROL,
4538 ac97_data | ALI_EAPD_POWER_DOWN);
4539 }
4540 }
4541 #endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */
4542 /* edited by HMSEO for GT sound */
4543 }
4544 rc = 0;
4545 pci_set_drvdata(pci_dev, card);
4546
4547 /* Enable Address Engine Interrupts */
4548 trident_enable_loop_interrupts(card);
4549
4550 /* Register gameport */
4551 trident_register_gameport(card);
4552
4553 out:
4554 return rc;
4555
4556 out_unregister_sound_dsp:
4557 unregister_sound_dsp(card->dev_audio);
4558 out_free_irq:
4559 free_irq(card->irq, card);
4560 out_proc_fs:
4561 pci_dev_put(card->pci_dev);
4562 if (res) {
4563 remove_proc_entry("ALi5451", NULL);
4564 res = NULL;
4565 }
4566 kfree(card);
4567 devs = NULL;
4568 out_release_region:
4569 release_region(iobase, 256);
4570 return rc;
4571 }
4572
4573 static void __devexit
4574 trident_remove(struct pci_dev *pci_dev)
4575 {
4576 int i;
4577 struct trident_card *card = pci_get_drvdata(pci_dev);
4578
4579 /*
4580 * Kill running timers before unload. We can't have them
4581 * going off after rmmod!
4582 */
4583 if (card->hwvolctl)
4584 del_timer_sync(&card->timer);
4585
4586 /* ALi S/PDIF and Power Management */
4587 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4588 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4589 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4590 ali_disable_spdif_in(card);
4591 remove_proc_entry("ALi5451", NULL);
4592 }
4593
4594 /* Unregister gameport */
4595 trident_unregister_gameport(card);
4596
4597 /* Kill interrupts, and SP/DIF */
4598 trident_disable_loop_interrupts(card);
4599
4600 /* free hardware resources */
4601 free_irq(card->irq, card);
4602 release_region(card->iobase, 256);
4603
4604 /* unregister audio devices */
4605 for (i = 0; i < NR_AC97; i++)
4606 if (card->ac97_codec[i] != NULL) {
4607 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4608 ac97_release_codec(card->ac97_codec[i]);
4609 }
4610 unregister_sound_dsp(card->dev_audio);
4611
4612 pci_set_drvdata(pci_dev, NULL);
4613 pci_dev_put(card->pci_dev);
4614 kfree(card);
4615 }
4616
4617 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee, Muli Ben-Yehuda");
4618 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI "
4619 "Audio Driver");
4620 MODULE_LICENSE("GPL");
4621
4622 #define TRIDENT_MODULE_NAME "trident"
4623
4624 static struct pci_driver trident_pci_driver = {
4625 .name = TRIDENT_MODULE_NAME,
4626 .id_table = trident_pci_tbl,
4627 .probe = trident_probe,
4628 .remove = __devexit_p(trident_remove),
4629 #ifdef CONFIG_PM
4630 .suspend = trident_suspend,
4631 .resume = trident_resume
4632 #endif
4633 };
4634
4635 static int __init
4636 trident_init_module(void)
4637 {
4638 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro "
4639 "5050 PCI Audio, version " DRIVER_VERSION ", " __TIME__ " "
4640 __DATE__ "\n");
4641
4642 return pci_register_driver(&trident_pci_driver);
4643 }
4644
4645 static void __exit
4646 trident_cleanup_module(void)
4647 {
4648 pci_unregister_driver(&trident_pci_driver);
4649 }
4650
4651 module_init(trident_init_module);
4652 module_exit(trident_cleanup_module);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree