2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <linux/list.h>
34 #include "radeon_drm.h"
38 int radeon_ttm_init(struct radeon_device
*rdev
);
39 void radeon_ttm_fini(struct radeon_device
*rdev
);
40 static void radeon_bo_clear_surface_reg(struct radeon_bo
*bo
);
43 * To exclude mutual BO access we rely on bo_reserve exclusion, as all
44 * function are calling it.
47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object
*tbo
)
51 bo
= container_of(tbo
, struct radeon_bo
, tbo
);
52 mutex_lock(&bo
->rdev
->gem
.mutex
);
53 list_del_init(&bo
->list
);
54 mutex_unlock(&bo
->rdev
->gem
.mutex
);
55 radeon_bo_clear_surface_reg(bo
);
59 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object
*bo
)
61 if (bo
->destroy
== &radeon_ttm_bo_destroy
)
66 void radeon_ttm_placement_from_domain(struct radeon_bo
*rbo
, u32 domain
)
70 rbo
->placement
.fpfn
= 0;
71 rbo
->placement
.lpfn
= 0;
72 rbo
->placement
.placement
= rbo
->placements
;
73 rbo
->placement
.busy_placement
= rbo
->placements
;
74 if (domain
& RADEON_GEM_DOMAIN_VRAM
)
75 rbo
->placements
[c
++] = TTM_PL_FLAG_WC
| TTM_PL_FLAG_UNCACHED
|
77 if (domain
& RADEON_GEM_DOMAIN_GTT
)
78 rbo
->placements
[c
++] = TTM_PL_MASK_CACHING
| TTM_PL_FLAG_TT
;
79 if (domain
& RADEON_GEM_DOMAIN_CPU
)
80 rbo
->placements
[c
++] = TTM_PL_MASK_CACHING
| TTM_PL_FLAG_SYSTEM
;
82 rbo
->placements
[c
++] = TTM_PL_MASK_CACHING
| TTM_PL_FLAG_SYSTEM
;
83 rbo
->placement
.num_placement
= c
;
84 rbo
->placement
.num_busy_placement
= c
;
87 int radeon_bo_create(struct radeon_device
*rdev
, struct drm_gem_object
*gobj
,
88 unsigned long size
, bool kernel
, u32 domain
,
89 struct radeon_bo
**bo_ptr
)
92 enum ttm_bo_type type
;
95 if (unlikely(rdev
->mman
.bdev
.dev_mapping
== NULL
)) {
96 rdev
->mman
.bdev
.dev_mapping
= rdev
->ddev
->dev_mapping
;
99 type
= ttm_bo_type_kernel
;
101 type
= ttm_bo_type_device
;
104 bo
= kzalloc(sizeof(struct radeon_bo
), GFP_KERNEL
);
109 bo
->surface_reg
= -1;
110 INIT_LIST_HEAD(&bo
->list
);
112 radeon_ttm_placement_from_domain(bo
, domain
);
113 /* Kernel allocation are uninterruptible */
114 r
= ttm_bo_init(&rdev
->mman
.bdev
, &bo
->tbo
, size
, type
,
115 &bo
->placement
, 0, 0, !kernel
, NULL
, size
,
116 &radeon_ttm_bo_destroy
);
117 if (unlikely(r
!= 0)) {
118 if (r
!= -ERESTARTSYS
)
120 "object_init failed for (%lu, 0x%08X)\n",
126 mutex_lock(&bo
->rdev
->gem
.mutex
);
127 list_add_tail(&bo
->list
, &rdev
->gem
.objects
);
128 mutex_unlock(&bo
->rdev
->gem
.mutex
);
133 int radeon_bo_kmap(struct radeon_bo
*bo
, void **ptr
)
144 r
= ttm_bo_kmap(&bo
->tbo
, 0, bo
->tbo
.num_pages
, &bo
->kmap
);
148 bo
->kptr
= ttm_kmap_obj_virtual(&bo
->kmap
, &is_iomem
);
152 radeon_bo_check_tiling(bo
, 0, 0);
156 void radeon_bo_kunmap(struct radeon_bo
*bo
)
158 if (bo
->kptr
== NULL
)
161 radeon_bo_check_tiling(bo
, 0, 0);
162 ttm_bo_kunmap(&bo
->kmap
);
165 void radeon_bo_unref(struct radeon_bo
**bo
)
167 struct ttm_buffer_object
*tbo
;
177 int radeon_bo_pin(struct radeon_bo
*bo
, u32 domain
, u64
*gpu_addr
)
181 radeon_ttm_placement_from_domain(bo
, domain
);
185 *gpu_addr
= radeon_bo_gpu_offset(bo
);
188 radeon_ttm_placement_from_domain(bo
, domain
);
189 for (i
= 0; i
< bo
->placement
.num_placement
; i
++)
190 bo
->placements
[i
] |= TTM_PL_FLAG_NO_EVICT
;
191 r
= ttm_bo_validate(&bo
->tbo
, &bo
->placement
, false, false);
192 if (likely(r
== 0)) {
194 if (gpu_addr
!= NULL
)
195 *gpu_addr
= radeon_bo_gpu_offset(bo
);
197 if (unlikely(r
!= 0))
198 dev_err(bo
->rdev
->dev
, "%p pin failed\n", bo
);
202 int radeon_bo_unpin(struct radeon_bo
*bo
)
206 if (!bo
->pin_count
) {
207 dev_warn(bo
->rdev
->dev
, "%p unpin not necessary\n", bo
);
213 for (i
= 0; i
< bo
->placement
.num_placement
; i
++)
214 bo
->placements
[i
] &= ~TTM_PL_FLAG_NO_EVICT
;
215 r
= ttm_bo_validate(&bo
->tbo
, &bo
->placement
, false, false);
216 if (unlikely(r
!= 0))
217 dev_err(bo
->rdev
->dev
, "%p validate failed for unpin\n", bo
);
221 int radeon_bo_evict_vram(struct radeon_device
*rdev
)
223 if (rdev
->flags
& RADEON_IS_IGP
) {
224 /* Useless to evict on IGP chips */
227 return ttm_bo_evict_mm(&rdev
->mman
.bdev
, TTM_PL_VRAM
);
230 void radeon_bo_force_delete(struct radeon_device
*rdev
)
232 struct radeon_bo
*bo
, *n
;
233 struct drm_gem_object
*gobj
;
235 if (list_empty(&rdev
->gem
.objects
)) {
238 dev_err(rdev
->dev
, "Userspace still has active objects !\n");
239 list_for_each_entry_safe(bo
, n
, &rdev
->gem
.objects
, list
) {
240 mutex_lock(&rdev
->ddev
->struct_mutex
);
242 dev_err(rdev
->dev
, "%p %p %lu %lu force free\n",
243 gobj
, bo
, (unsigned long)gobj
->size
,
244 *((unsigned long *)&gobj
->refcount
));
245 mutex_lock(&bo
->rdev
->gem
.mutex
);
246 list_del_init(&bo
->list
);
247 mutex_unlock(&bo
->rdev
->gem
.mutex
);
248 radeon_bo_unref(&bo
);
249 gobj
->driver_private
= NULL
;
250 drm_gem_object_unreference(gobj
);
251 mutex_unlock(&rdev
->ddev
->struct_mutex
);
255 int radeon_bo_init(struct radeon_device
*rdev
)
257 /* Add an MTRR for the VRAM */
258 rdev
->mc
.vram_mtrr
= mtrr_add(rdev
->mc
.aper_base
, rdev
->mc
.aper_size
,
259 MTRR_TYPE_WRCOMB
, 1);
260 DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
261 rdev
->mc
.mc_vram_size
>> 20,
262 (unsigned long long)rdev
->mc
.aper_size
>> 20);
263 DRM_INFO("RAM width %dbits %cDR\n",
264 rdev
->mc
.vram_width
, rdev
->mc
.vram_is_ddr
? 'D' : 'S');
265 return radeon_ttm_init(rdev
);
268 void radeon_bo_fini(struct radeon_device
*rdev
)
270 radeon_ttm_fini(rdev
);
273 void radeon_bo_list_add_object(struct radeon_bo_list
*lobj
,
274 struct list_head
*head
)
277 list_add(&lobj
->list
, head
);
279 list_add_tail(&lobj
->list
, head
);
283 int radeon_bo_list_reserve(struct list_head
*head
)
285 struct radeon_bo_list
*lobj
;
288 list_for_each_entry(lobj
, head
, list
){
289 r
= radeon_bo_reserve(lobj
->bo
, false);
290 if (unlikely(r
!= 0))
296 void radeon_bo_list_unreserve(struct list_head
*head
)
298 struct radeon_bo_list
*lobj
;
300 list_for_each_entry(lobj
, head
, list
) {
301 /* only unreserve object we successfully reserved */
302 if (radeon_bo_is_reserved(lobj
->bo
))
303 radeon_bo_unreserve(lobj
->bo
);
307 int radeon_bo_list_validate(struct list_head
*head
, void *fence
)
309 struct radeon_bo_list
*lobj
;
310 struct radeon_bo
*bo
;
311 struct radeon_fence
*old_fence
= NULL
;
314 r
= radeon_bo_list_reserve(head
);
315 if (unlikely(r
!= 0)) {
318 list_for_each_entry(lobj
, head
, list
) {
320 if (!bo
->pin_count
) {
322 radeon_ttm_placement_from_domain(bo
,
325 radeon_ttm_placement_from_domain(bo
,
328 r
= ttm_bo_validate(&bo
->tbo
, &bo
->placement
,
333 lobj
->gpu_offset
= radeon_bo_gpu_offset(bo
);
334 lobj
->tiling_flags
= bo
->tiling_flags
;
336 old_fence
= (struct radeon_fence
*)bo
->tbo
.sync_obj
;
337 bo
->tbo
.sync_obj
= radeon_fence_ref(fence
);
338 bo
->tbo
.sync_obj_arg
= NULL
;
341 radeon_fence_unref(&old_fence
);
347 void radeon_bo_list_unvalidate(struct list_head
*head
, void *fence
)
349 struct radeon_bo_list
*lobj
;
350 struct radeon_fence
*old_fence
;
353 list_for_each_entry(lobj
, head
, list
) {
354 old_fence
= to_radeon_fence(lobj
->bo
->tbo
.sync_obj
);
355 if (old_fence
== fence
) {
356 lobj
->bo
->tbo
.sync_obj
= NULL
;
357 radeon_fence_unref(&old_fence
);
360 radeon_bo_list_unreserve(head
);
363 int radeon_bo_fbdev_mmap(struct radeon_bo
*bo
,
364 struct vm_area_struct
*vma
)
366 return ttm_fbdev_mmap(vma
, &bo
->tbo
);
369 int radeon_bo_get_surface_reg(struct radeon_bo
*bo
)
371 struct radeon_device
*rdev
= bo
->rdev
;
372 struct radeon_surface_reg
*reg
;
373 struct radeon_bo
*old_object
;
377 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
379 if (!bo
->tiling_flags
)
382 if (bo
->surface_reg
>= 0) {
383 reg
= &rdev
->surface_regs
[bo
->surface_reg
];
389 for (i
= 0; i
< RADEON_GEM_MAX_SURFACES
; i
++) {
391 reg
= &rdev
->surface_regs
[i
];
395 old_object
= reg
->bo
;
396 if (old_object
->pin_count
== 0)
400 /* if we are all out */
401 if (i
== RADEON_GEM_MAX_SURFACES
) {
404 /* find someone with a surface reg and nuke their BO */
405 reg
= &rdev
->surface_regs
[steal
];
406 old_object
= reg
->bo
;
407 /* blow away the mapping */
408 DRM_DEBUG("stealing surface reg %d from %p\n", steal
, old_object
);
409 ttm_bo_unmap_virtual(&old_object
->tbo
);
410 old_object
->surface_reg
= -1;
418 radeon_set_surface_reg(rdev
, i
, bo
->tiling_flags
, bo
->pitch
,
419 bo
->tbo
.mem
.mm_node
->start
<< PAGE_SHIFT
,
420 bo
->tbo
.num_pages
<< PAGE_SHIFT
);
424 static void radeon_bo_clear_surface_reg(struct radeon_bo
*bo
)
426 struct radeon_device
*rdev
= bo
->rdev
;
427 struct radeon_surface_reg
*reg
;
429 if (bo
->surface_reg
== -1)
432 reg
= &rdev
->surface_regs
[bo
->surface_reg
];
433 radeon_clear_surface_reg(rdev
, bo
->surface_reg
);
436 bo
->surface_reg
= -1;
439 int radeon_bo_set_tiling_flags(struct radeon_bo
*bo
,
440 uint32_t tiling_flags
, uint32_t pitch
)
444 r
= radeon_bo_reserve(bo
, false);
445 if (unlikely(r
!= 0))
447 bo
->tiling_flags
= tiling_flags
;
449 radeon_bo_unreserve(bo
);
453 void radeon_bo_get_tiling_flags(struct radeon_bo
*bo
,
454 uint32_t *tiling_flags
,
457 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
459 *tiling_flags
= bo
->tiling_flags
;
464 int radeon_bo_check_tiling(struct radeon_bo
*bo
, bool has_moved
,
467 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
469 if (!(bo
->tiling_flags
& RADEON_TILING_SURFACE
))
473 radeon_bo_clear_surface_reg(bo
);
477 if (bo
->tbo
.mem
.mem_type
!= TTM_PL_VRAM
) {
481 if (bo
->surface_reg
>= 0)
482 radeon_bo_clear_surface_reg(bo
);
486 if ((bo
->surface_reg
>= 0) && !has_moved
)
489 return radeon_bo_get_surface_reg(bo
);
492 void radeon_bo_move_notify(struct ttm_buffer_object
*bo
,
493 struct ttm_mem_reg
*mem
)
495 struct radeon_bo
*rbo
;
496 if (!radeon_ttm_bo_is_radeon_bo(bo
))
498 rbo
= container_of(bo
, struct radeon_bo
, tbo
);
499 radeon_bo_check_tiling(rbo
, 0, 1);
502 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object
*bo
)
504 struct radeon_bo
*rbo
;
505 if (!radeon_ttm_bo_is_radeon_bo(bo
))
507 rbo
= container_of(bo
, struct radeon_bo
, tbo
);
508 radeon_bo_check_tiling(rbo
, 0, 0);