1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
22 #include <linux/mmc/host.h>
24 #include <asm/scatterlist.h>
33 #define PCI_SDHCI_IFPIO 0x00
34 #define PCI_SDHCI_IFDMA 0x01
35 #define PCI_SDHCI_IFVENDOR 0x02
37 #define PCI_SLOT_INFO 0x40 /* 8 bits */
38 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
39 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
43 struct sdhci_pci_chip
;
44 struct sdhci_pci_slot
;
46 struct sdhci_pci_fixes
{
49 int (*probe
)(struct sdhci_pci_chip
*);
51 int (*probe_slot
)(struct sdhci_pci_slot
*);
52 void (*remove_slot
)(struct sdhci_pci_slot
*, int);
54 int (*suspend
)(struct sdhci_pci_chip
*,
56 int (*resume
)(struct sdhci_pci_chip
*);
59 struct sdhci_pci_slot
{
60 struct sdhci_pci_chip
*chip
;
61 struct sdhci_host
*host
;
66 struct sdhci_pci_chip
{
70 const struct sdhci_pci_fixes
*fixes
;
72 int num_slots
; /* Slots on controller */
73 struct sdhci_pci_slot
*slots
[MAX_SLOTS
]; /* Pointers to host slots */
77 /*****************************************************************************\
79 * Hardware specific quirk handling *
81 \*****************************************************************************/
83 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
85 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
86 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
87 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
91 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
94 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT
)
95 & SDHCI_TIMEOUT_CLK_MASK
) |
97 ((0x21 << SDHCI_CLOCK_BASE_SHIFT
)
98 & SDHCI_CLOCK_BASE_MASK
) |
100 SDHCI_TIMEOUT_CLK_UNIT
|
106 static int ricoh_mmc_resume(struct sdhci_pci_chip
*chip
)
108 /* Apply a delay to allow controller to settle */
109 /* Otherwise it becomes confused if card state changed
115 static const struct sdhci_pci_fixes sdhci_ricoh
= {
116 .probe
= ricoh_probe
,
117 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
118 SDHCI_QUIRK_FORCE_DMA
|
119 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
122 static const struct sdhci_pci_fixes sdhci_ricoh_mmc
= {
123 .probe_slot
= ricoh_mmc_probe_slot
,
124 .resume
= ricoh_mmc_resume
,
125 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
126 SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
127 SDHCI_QUIRK_NO_CARD_NO_RESET
|
128 SDHCI_QUIRK_MISSING_CAPS
131 static const struct sdhci_pci_fixes sdhci_ene_712
= {
132 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
133 SDHCI_QUIRK_BROKEN_DMA
,
136 static const struct sdhci_pci_fixes sdhci_ene_714
= {
137 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
138 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
139 SDHCI_QUIRK_BROKEN_DMA
,
142 static const struct sdhci_pci_fixes sdhci_cafe
= {
143 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
144 SDHCI_QUIRK_NO_BUSY_IRQ
|
145 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
149 * ADMA operation is disabled for Moorestown platform due to
152 static int mrst_hc_probe(struct sdhci_pci_chip
*chip
)
155 * slots number is fixed here for MRST as SDIO3/5 are never used and
156 * have hardware bugs.
162 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0
= {
163 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
166 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2
= {
167 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
168 .probe
= mrst_hc_probe
,
171 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd
= {
172 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
175 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio
= {
176 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
179 /* O2Micro extra registers */
180 #define O2_SD_LOCK_WP 0xD3
181 #define O2_SD_MULTI_VCC3V 0xEE
182 #define O2_SD_CLKREQ 0xEC
183 #define O2_SD_CAPS 0xE0
184 #define O2_SD_ADMA1 0xE2
185 #define O2_SD_ADMA2 0xE7
186 #define O2_SD_INF_MOD 0xF1
188 static int o2_probe(struct sdhci_pci_chip
*chip
)
193 switch (chip
->pdev
->device
) {
194 case PCI_DEVICE_ID_O2_8220
:
195 case PCI_DEVICE_ID_O2_8221
:
196 case PCI_DEVICE_ID_O2_8320
:
197 case PCI_DEVICE_ID_O2_8321
:
198 /* This extra setup is required due to broken ADMA. */
199 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
203 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
205 /* Set Multi 3 to VCC3V# */
206 pci_write_config_byte(chip
->pdev
, O2_SD_MULTI_VCC3V
, 0x08);
208 /* Disable CLK_REQ# support after media DET */
209 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CLKREQ
, &scratch
);
213 pci_write_config_byte(chip
->pdev
, O2_SD_CLKREQ
, scratch
);
215 /* Choose capabilities, enable SDMA. We have to write 0x01
216 * to the capabilities register first to unlock it.
218 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CAPS
, &scratch
);
222 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, scratch
);
223 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, 0x73);
225 /* Disable ADMA1/2 */
226 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA1
, 0x39);
227 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA2
, 0x08);
229 /* Disable the infinite transfer mode */
230 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_INF_MOD
, &scratch
);
234 pci_write_config_byte(chip
->pdev
, O2_SD_INF_MOD
, scratch
);
237 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
241 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
247 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
252 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
257 * Turn PMOS on [bit 0], set over current detection to 2.4 V
258 * [bit 1:2] and enable over current debouncing [bit 6].
265 ret
= pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
272 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
277 if (chip
->pdev
->revision
== 0) {
278 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
279 SDHCI_QUIRK_32BIT_DMA_SIZE
|
280 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
281 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
282 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
286 * JMicron chips can have two interfaces to the same hardware
287 * in order to work around limitations in Microsoft's driver.
288 * We need to make sure we only bind to one of them.
290 * This code assumes two things:
292 * 1. The PCI code adds subfunctions in order.
294 * 2. The MMC interface has a lower subfunction number
295 * than the SD interface.
297 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
)
298 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
;
299 else if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
)
300 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
;
303 struct pci_dev
*sd_dev
;
306 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
307 mmcdev
, sd_dev
)) != NULL
) {
308 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
309 PCI_SLOT(sd_dev
->devfn
)) &&
310 (chip
->pdev
->bus
== sd_dev
->bus
))
316 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
317 "secondary interface.\n");
323 * JMicron chips need a bit of a nudge to enable the power
326 ret
= jmicron_pmos(chip
, 1);
328 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
335 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
339 scratch
= readb(host
->ioaddr
+ 0xC0);
346 writeb(scratch
, host
->ioaddr
+ 0xC0);
349 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
351 if (slot
->chip
->pdev
->revision
== 0) {
354 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
355 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
356 SDHCI_VENDOR_VER_SHIFT
;
359 * Older versions of the chip have lots of nasty glitches
360 * in the ADMA engine. It's best just to avoid it
364 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
367 /* JM388 MMC doesn't support 1.8V while SD supports it */
368 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
369 slot
->host
->ocr_avail_sd
= MMC_VDD_32_33
| MMC_VDD_33_34
|
370 MMC_VDD_29_30
| MMC_VDD_30_31
|
371 MMC_VDD_165_195
; /* allow 1.8V */
372 slot
->host
->ocr_avail_mmc
= MMC_VDD_32_33
| MMC_VDD_33_34
|
373 MMC_VDD_29_30
| MMC_VDD_30_31
; /* no 1.8V for MMC */
377 * The secondary interface requires a bit set to get the
380 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
381 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
382 jmicron_enable_mmc(slot
->host
, 1);
384 slot
->host
->mmc
->caps
|= MMC_CAP_BUS_WIDTH_TEST
;
389 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
394 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
395 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
396 jmicron_enable_mmc(slot
->host
, 0);
399 static int jmicron_suspend(struct sdhci_pci_chip
*chip
, pm_message_t state
)
403 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
404 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
405 for (i
= 0;i
< chip
->num_slots
;i
++)
406 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
412 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
416 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
417 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
418 for (i
= 0;i
< chip
->num_slots
;i
++)
419 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
422 ret
= jmicron_pmos(chip
, 1);
424 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
431 static const struct sdhci_pci_fixes sdhci_o2
= {
435 static const struct sdhci_pci_fixes sdhci_jmicron
= {
436 .probe
= jmicron_probe
,
438 .probe_slot
= jmicron_probe_slot
,
439 .remove_slot
= jmicron_remove_slot
,
441 .suspend
= jmicron_suspend
,
442 .resume
= jmicron_resume
,
445 /* SysKonnect CardBus2SDIO extra registers */
446 #define SYSKT_CTRL 0x200
447 #define SYSKT_RDFIFO_STAT 0x204
448 #define SYSKT_WRFIFO_STAT 0x208
449 #define SYSKT_POWER_DATA 0x20c
450 #define SYSKT_POWER_330 0xef
451 #define SYSKT_POWER_300 0xf8
452 #define SYSKT_POWER_184 0xcc
453 #define SYSKT_POWER_CMD 0x20d
454 #define SYSKT_POWER_START (1 << 7)
455 #define SYSKT_POWER_STATUS 0x20e
456 #define SYSKT_POWER_STATUS_OK (1 << 0)
457 #define SYSKT_BOARD_REV 0x210
458 #define SYSKT_CHIP_REV 0x211
459 #define SYSKT_CONF_DATA 0x212
460 #define SYSKT_CONF_DATA_1V8 (1 << 2)
461 #define SYSKT_CONF_DATA_2V5 (1 << 1)
462 #define SYSKT_CONF_DATA_3V3 (1 << 0)
464 static int syskt_probe(struct sdhci_pci_chip
*chip
)
466 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
467 chip
->pdev
->class &= ~0x0000FF;
468 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
473 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
477 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
478 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
479 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
480 "board rev %d.%d, chip rev %d.%d\n",
481 board_rev
>> 4, board_rev
& 0xf,
482 chip_rev
>> 4, chip_rev
& 0xf);
483 if (chip_rev
>= 0x20)
484 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
486 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
487 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
489 tm
= 10; /* Wait max 1 ms */
491 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
492 if (ps
& SYSKT_POWER_STATUS_OK
)
497 dev_err(&slot
->chip
->pdev
->dev
,
498 "power regulator never stabilized");
499 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
506 static const struct sdhci_pci_fixes sdhci_syskt
= {
507 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
508 .probe
= syskt_probe
,
509 .probe_slot
= syskt_probe_slot
,
512 static int via_probe(struct sdhci_pci_chip
*chip
)
514 if (chip
->pdev
->revision
== 0x10)
515 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
520 static const struct sdhci_pci_fixes sdhci_via
= {
524 static const struct pci_device_id pci_ids
[] __devinitdata
= {
526 .vendor
= PCI_VENDOR_ID_RICOH
,
527 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
528 .subvendor
= PCI_ANY_ID
,
529 .subdevice
= PCI_ANY_ID
,
530 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
534 .vendor
= PCI_VENDOR_ID_RICOH
,
536 .subvendor
= PCI_ANY_ID
,
537 .subdevice
= PCI_ANY_ID
,
538 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
542 .vendor
= PCI_VENDOR_ID_RICOH
,
544 .subvendor
= PCI_ANY_ID
,
545 .subdevice
= PCI_ANY_ID
,
546 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
550 .vendor
= PCI_VENDOR_ID_RICOH
,
552 .subvendor
= PCI_ANY_ID
,
553 .subdevice
= PCI_ANY_ID
,
554 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
558 .vendor
= PCI_VENDOR_ID_ENE
,
559 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
560 .subvendor
= PCI_ANY_ID
,
561 .subdevice
= PCI_ANY_ID
,
562 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
566 .vendor
= PCI_VENDOR_ID_ENE
,
567 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
568 .subvendor
= PCI_ANY_ID
,
569 .subdevice
= PCI_ANY_ID
,
570 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
574 .vendor
= PCI_VENDOR_ID_ENE
,
575 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
576 .subvendor
= PCI_ANY_ID
,
577 .subdevice
= PCI_ANY_ID
,
578 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
582 .vendor
= PCI_VENDOR_ID_ENE
,
583 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
584 .subvendor
= PCI_ANY_ID
,
585 .subdevice
= PCI_ANY_ID
,
586 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
590 .vendor
= PCI_VENDOR_ID_MARVELL
,
591 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
592 .subvendor
= PCI_ANY_ID
,
593 .subdevice
= PCI_ANY_ID
,
594 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
598 .vendor
= PCI_VENDOR_ID_JMICRON
,
599 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
600 .subvendor
= PCI_ANY_ID
,
601 .subdevice
= PCI_ANY_ID
,
602 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
606 .vendor
= PCI_VENDOR_ID_JMICRON
,
607 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
608 .subvendor
= PCI_ANY_ID
,
609 .subdevice
= PCI_ANY_ID
,
610 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
614 .vendor
= PCI_VENDOR_ID_JMICRON
,
615 .device
= PCI_DEVICE_ID_JMICRON_JMB388_SD
,
616 .subvendor
= PCI_ANY_ID
,
617 .subdevice
= PCI_ANY_ID
,
618 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
622 .vendor
= PCI_VENDOR_ID_JMICRON
,
623 .device
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
,
624 .subvendor
= PCI_ANY_ID
,
625 .subdevice
= PCI_ANY_ID
,
626 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
630 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
632 .subvendor
= PCI_ANY_ID
,
633 .subdevice
= PCI_ANY_ID
,
634 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
638 .vendor
= PCI_VENDOR_ID_VIA
,
640 .subvendor
= PCI_ANY_ID
,
641 .subdevice
= PCI_ANY_ID
,
642 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
646 .vendor
= PCI_VENDOR_ID_INTEL
,
647 .device
= PCI_DEVICE_ID_INTEL_MRST_SD0
,
648 .subvendor
= PCI_ANY_ID
,
649 .subdevice
= PCI_ANY_ID
,
650 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc0
,
654 .vendor
= PCI_VENDOR_ID_INTEL
,
655 .device
= PCI_DEVICE_ID_INTEL_MRST_SD1
,
656 .subvendor
= PCI_ANY_ID
,
657 .subdevice
= PCI_ANY_ID
,
658 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
662 .vendor
= PCI_VENDOR_ID_INTEL
,
663 .device
= PCI_DEVICE_ID_INTEL_MRST_SD2
,
664 .subvendor
= PCI_ANY_ID
,
665 .subdevice
= PCI_ANY_ID
,
666 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
670 .vendor
= PCI_VENDOR_ID_INTEL
,
671 .device
= PCI_DEVICE_ID_INTEL_MFD_SD
,
672 .subvendor
= PCI_ANY_ID
,
673 .subdevice
= PCI_ANY_ID
,
674 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
678 .vendor
= PCI_VENDOR_ID_INTEL
,
679 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO1
,
680 .subvendor
= PCI_ANY_ID
,
681 .subdevice
= PCI_ANY_ID
,
682 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc_sdio
,
686 .vendor
= PCI_VENDOR_ID_INTEL
,
687 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO2
,
688 .subvendor
= PCI_ANY_ID
,
689 .subdevice
= PCI_ANY_ID
,
690 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc_sdio
,
694 .vendor
= PCI_VENDOR_ID_INTEL
,
695 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC0
,
696 .subvendor
= PCI_ANY_ID
,
697 .subdevice
= PCI_ANY_ID
,
698 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc_sdio
,
702 .vendor
= PCI_VENDOR_ID_INTEL
,
703 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC1
,
704 .subvendor
= PCI_ANY_ID
,
705 .subdevice
= PCI_ANY_ID
,
706 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc_sdio
,
710 .vendor
= PCI_VENDOR_ID_O2
,
711 .device
= PCI_DEVICE_ID_O2_8120
,
712 .subvendor
= PCI_ANY_ID
,
713 .subdevice
= PCI_ANY_ID
,
714 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
718 .vendor
= PCI_VENDOR_ID_O2
,
719 .device
= PCI_DEVICE_ID_O2_8220
,
720 .subvendor
= PCI_ANY_ID
,
721 .subdevice
= PCI_ANY_ID
,
722 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
726 .vendor
= PCI_VENDOR_ID_O2
,
727 .device
= PCI_DEVICE_ID_O2_8221
,
728 .subvendor
= PCI_ANY_ID
,
729 .subdevice
= PCI_ANY_ID
,
730 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
734 .vendor
= PCI_VENDOR_ID_O2
,
735 .device
= PCI_DEVICE_ID_O2_8320
,
736 .subvendor
= PCI_ANY_ID
,
737 .subdevice
= PCI_ANY_ID
,
738 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
742 .vendor
= PCI_VENDOR_ID_O2
,
743 .device
= PCI_DEVICE_ID_O2_8321
,
744 .subvendor
= PCI_ANY_ID
,
745 .subdevice
= PCI_ANY_ID
,
746 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
749 { /* Generic SD host controller */
750 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
753 { /* end: all zeroes */ },
756 MODULE_DEVICE_TABLE(pci
, pci_ids
);
758 /*****************************************************************************\
760 * SDHCI core callbacks *
762 \*****************************************************************************/
764 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
766 struct sdhci_pci_slot
*slot
;
767 struct pci_dev
*pdev
;
770 slot
= sdhci_priv(host
);
771 pdev
= slot
->chip
->pdev
;
773 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
774 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
775 (host
->flags
& SDHCI_USE_SDMA
)) {
776 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
777 "doesn't fully claim to support it.\n");
780 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
784 pci_set_master(pdev
);
789 static struct sdhci_ops sdhci_pci_ops
= {
790 .enable_dma
= sdhci_pci_enable_dma
,
793 /*****************************************************************************\
797 \*****************************************************************************/
801 static int sdhci_pci_suspend (struct pci_dev
*pdev
, pm_message_t state
)
803 struct sdhci_pci_chip
*chip
;
804 struct sdhci_pci_slot
*slot
;
805 mmc_pm_flag_t slot_pm_flags
;
806 mmc_pm_flag_t pm_flags
= 0;
809 chip
= pci_get_drvdata(pdev
);
813 for (i
= 0;i
< chip
->num_slots
;i
++) {
814 slot
= chip
->slots
[i
];
818 ret
= sdhci_suspend_host(slot
->host
, state
);
822 sdhci_resume_host(chip
->slots
[i
]->host
);
826 slot_pm_flags
= slot
->host
->mmc
->pm_flags
;
827 if (slot_pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
828 sdhci_enable_irq_wakeups(slot
->host
);
830 pm_flags
|= slot_pm_flags
;
833 if (chip
->fixes
&& chip
->fixes
->suspend
) {
834 ret
= chip
->fixes
->suspend(chip
, state
);
836 for (i
= chip
->num_slots
- 1;i
>= 0;i
--)
837 sdhci_resume_host(chip
->slots
[i
]->host
);
842 pci_save_state(pdev
);
843 if (pm_flags
& MMC_PM_KEEP_POWER
) {
844 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
) {
845 pci_pme_active(pdev
, true);
846 pci_enable_wake(pdev
, PCI_D3hot
, 1);
848 pci_set_power_state(pdev
, PCI_D3hot
);
850 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
851 pci_disable_device(pdev
);
852 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
858 static int sdhci_pci_resume (struct pci_dev
*pdev
)
860 struct sdhci_pci_chip
*chip
;
861 struct sdhci_pci_slot
*slot
;
864 chip
= pci_get_drvdata(pdev
);
868 pci_set_power_state(pdev
, PCI_D0
);
869 pci_restore_state(pdev
);
870 ret
= pci_enable_device(pdev
);
874 if (chip
->fixes
&& chip
->fixes
->resume
) {
875 ret
= chip
->fixes
->resume(chip
);
880 for (i
= 0;i
< chip
->num_slots
;i
++) {
881 slot
= chip
->slots
[i
];
885 ret
= sdhci_resume_host(slot
->host
);
893 #else /* CONFIG_PM */
895 #define sdhci_pci_suspend NULL
896 #define sdhci_pci_resume NULL
898 #endif /* CONFIG_PM */
900 /*****************************************************************************\
902 * Device probing/removal *
904 \*****************************************************************************/
906 static struct sdhci_pci_slot
* __devinit
sdhci_pci_probe_slot(
907 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int bar
)
909 struct sdhci_pci_slot
*slot
;
910 struct sdhci_host
*host
;
913 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
914 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
915 return ERR_PTR(-ENODEV
);
918 if (pci_resource_len(pdev
, bar
) != 0x100) {
919 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
920 "experience problems.\n");
923 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
924 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
925 return ERR_PTR(-ENODEV
);
928 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
929 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
930 return ERR_PTR(-ENODEV
);
933 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
935 dev_err(&pdev
->dev
, "cannot allocate host\n");
936 return ERR_CAST(host
);
939 slot
= sdhci_priv(host
);
945 host
->hw_name
= "PCI";
946 host
->ops
= &sdhci_pci_ops
;
947 host
->quirks
= chip
->quirks
;
949 host
->irq
= pdev
->irq
;
951 ret
= pci_request_region(pdev
, bar
, mmc_hostname(host
->mmc
));
953 dev_err(&pdev
->dev
, "cannot request region\n");
957 host
->ioaddr
= pci_ioremap_bar(pdev
, bar
);
959 dev_err(&pdev
->dev
, "failed to remap registers\n");
963 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
964 ret
= chip
->fixes
->probe_slot(slot
);
969 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
971 ret
= sdhci_add_host(host
);
978 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
979 chip
->fixes
->remove_slot(slot
, 0);
982 iounmap(host
->ioaddr
);
985 pci_release_region(pdev
, bar
);
988 sdhci_free_host(host
);
993 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
999 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
1000 if (scratch
== (u32
)-1)
1003 sdhci_remove_host(slot
->host
, dead
);
1005 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
1006 slot
->chip
->fixes
->remove_slot(slot
, dead
);
1008 pci_release_region(slot
->chip
->pdev
, slot
->pci_bar
);
1010 sdhci_free_host(slot
->host
);
1013 static int __devinit
sdhci_pci_probe(struct pci_dev
*pdev
,
1014 const struct pci_device_id
*ent
)
1016 struct sdhci_pci_chip
*chip
;
1017 struct sdhci_pci_slot
*slot
;
1019 u8 slots
, first_bar
;
1022 BUG_ON(pdev
== NULL
);
1023 BUG_ON(ent
== NULL
);
1025 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1026 (int)pdev
->vendor
, (int)pdev
->device
, (int)pdev
->revision
);
1028 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1032 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1033 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
1037 BUG_ON(slots
> MAX_SLOTS
);
1039 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1043 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1045 if (first_bar
> 5) {
1046 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
1050 ret
= pci_enable_device(pdev
);
1054 chip
= kzalloc(sizeof(struct sdhci_pci_chip
), GFP_KERNEL
);
1061 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
1063 chip
->quirks
= chip
->fixes
->quirks
;
1064 chip
->num_slots
= slots
;
1066 pci_set_drvdata(pdev
, chip
);
1068 if (chip
->fixes
&& chip
->fixes
->probe
) {
1069 ret
= chip
->fixes
->probe(chip
);
1074 slots
= chip
->num_slots
; /* Quirk may have changed this */
1076 for (i
= 0;i
< slots
;i
++) {
1077 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
+ i
);
1079 for (i
--;i
>= 0;i
--)
1080 sdhci_pci_remove_slot(chip
->slots
[i
]);
1081 ret
= PTR_ERR(slot
);
1085 chip
->slots
[i
] = slot
;
1091 pci_set_drvdata(pdev
, NULL
);
1095 pci_disable_device(pdev
);
1099 static void __devexit
sdhci_pci_remove(struct pci_dev
*pdev
)
1102 struct sdhci_pci_chip
*chip
;
1104 chip
= pci_get_drvdata(pdev
);
1107 for (i
= 0;i
< chip
->num_slots
; i
++)
1108 sdhci_pci_remove_slot(chip
->slots
[i
]);
1110 pci_set_drvdata(pdev
, NULL
);
1114 pci_disable_device(pdev
);
1117 static struct pci_driver sdhci_driver
= {
1118 .name
= "sdhci-pci",
1119 .id_table
= pci_ids
,
1120 .probe
= sdhci_pci_probe
,
1121 .remove
= __devexit_p(sdhci_pci_remove
),
1122 .suspend
= sdhci_pci_suspend
,
1123 .resume
= sdhci_pci_resume
,
1126 /*****************************************************************************\
1128 * Driver init/exit *
1130 \*****************************************************************************/
1132 static int __init
sdhci_drv_init(void)
1134 return pci_register_driver(&sdhci_driver
);
1137 static void __exit
sdhci_drv_exit(void)
1139 pci_unregister_driver(&sdhci_driver
);
1142 module_init(sdhci_drv_init
);
1143 module_exit(sdhci_drv_exit
);
1145 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1146 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1147 MODULE_LICENSE("GPL");