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ath9k: Add debugfs support for mac/baseband samples
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blob7b7864dfab751d3d36083026be3f827ebfbcdd57
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 unsigned long flags;
115
116 spin_lock_irqsave(&sc->sc_pm_lock, flags);
117 if (--sc->ps_usecount != 0)
118 goto unlock;
119
120 spin_lock(&common->cc_lock);
121 ath_hw_cycle_counters_update(common);
122 spin_unlock(&common->cc_lock);
123
124 if (sc->ps_idle)
125 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
126 else if (sc->ps_enabled &&
127 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128 PS_WAIT_FOR_CAB |
129 PS_WAIT_FOR_PSPOLL_DATA |
130 PS_WAIT_FOR_TX_ACK)))
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
132
133 unlock:
134 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
135 }
136
137 void ath_start_ani(struct ath_common *common)
138 {
139 struct ath_hw *ah = common->ah;
140 unsigned long timestamp = jiffies_to_msecs(jiffies);
141 struct ath_softc *sc = (struct ath_softc *) common->priv;
142
143 if (!(sc->sc_flags & SC_OP_ANI_RUN))
144 return;
145
146 if (sc->sc_flags & SC_OP_OFFCHANNEL)
147 return;
148
149 common->ani.longcal_timer = timestamp;
150 common->ani.shortcal_timer = timestamp;
151 common->ani.checkani_timer = timestamp;
152
153 mod_timer(&common->ani.timer,
154 jiffies +
155 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
156 }
157
158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
159 {
160 struct ath_hw *ah = sc->sc_ah;
161 struct ath9k_channel *chan = &ah->channels[channel];
162 struct survey_info *survey = &sc->survey[channel];
163
164 if (chan->noisefloor) {
165 survey->filled |= SURVEY_INFO_NOISE_DBM;
166 survey->noise = ath9k_hw_getchan_noise(ah, chan);
167 }
168 }
169
170 /*
171 * Updates the survey statistics and returns the busy time since last
172 * update in %, if the measurement duration was long enough for the
173 * result to be useful, -1 otherwise.
174 */
175 static int ath_update_survey_stats(struct ath_softc *sc)
176 {
177 struct ath_hw *ah = sc->sc_ah;
178 struct ath_common *common = ath9k_hw_common(ah);
179 int pos = ah->curchan - &ah->channels[0];
180 struct survey_info *survey = &sc->survey[pos];
181 struct ath_cycle_counters *cc = &common->cc_survey;
182 unsigned int div = common->clockrate * 1000;
183 int ret = 0;
184
185 if (!ah->curchan)
186 return -1;
187
188 if (ah->power_mode == ATH9K_PM_AWAKE)
189 ath_hw_cycle_counters_update(common);
190
191 if (cc->cycles > 0) {
192 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193 SURVEY_INFO_CHANNEL_TIME_BUSY |
194 SURVEY_INFO_CHANNEL_TIME_RX |
195 SURVEY_INFO_CHANNEL_TIME_TX;
196 survey->channel_time += cc->cycles / div;
197 survey->channel_time_busy += cc->rx_busy / div;
198 survey->channel_time_rx += cc->rx_frame / div;
199 survey->channel_time_tx += cc->tx_frame / div;
200 }
201
202 if (cc->cycles < div)
203 return -1;
204
205 if (cc->cycles > 0)
206 ret = cc->rx_busy * 100 / cc->cycles;
207
208 memset(cc, 0, sizeof(*cc));
209
210 ath_update_survey_nf(sc, pos);
211
212 return ret;
213 }
214
215 /*
216 * Set/change channels. If the channel is really being changed, it's done
217 * by reseting the chip. To accomplish this we must first cleanup any pending
218 * DMA, then restart stuff.
219 */
220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
221 struct ath9k_channel *hchan)
222 {
223 struct ath_hw *ah = sc->sc_ah;
224 struct ath_common *common = ath9k_hw_common(ah);
225 struct ieee80211_conf *conf = &common->hw->conf;
226 bool fastcc = true, stopped;
227 struct ieee80211_channel *channel = hw->conf.channel;
228 struct ath9k_hw_cal_data *caldata = NULL;
229 int r;
230
231 if (sc->sc_flags & SC_OP_INVALID)
232 return -EIO;
233
234 sc->hw_busy_count = 0;
235
236 del_timer_sync(&common->ani.timer);
237 cancel_work_sync(&sc->paprd_work);
238 cancel_work_sync(&sc->hw_check_work);
239 cancel_delayed_work_sync(&sc->tx_complete_work);
240 cancel_delayed_work_sync(&sc->hw_pll_work);
241
242 ath9k_ps_wakeup(sc);
243
244 spin_lock_bh(&sc->sc_pcu_lock);
245
246 /*
247 * This is only performed if the channel settings have
248 * actually changed.
249 *
250 * To switch channels clear any pending DMA operations;
251 * wait long enough for the RX fifo to drain, reset the
252 * hardware at the new frequency, and then re-enable
253 * the relevant bits of the h/w.
254 */
255 ath9k_hw_disable_interrupts(ah);
256 stopped = ath_drain_all_txq(sc, false);
257
258 if (!ath_stoprecv(sc))
259 stopped = false;
260
261 if (!ath9k_hw_check_alive(ah))
262 stopped = false;
263
264 /* XXX: do not flush receive queue here. We don't want
265 * to flush data frames already in queue because of
266 * changing channel. */
267
268 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
269 fastcc = false;
270
271 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
272 caldata = &sc->caldata;
273
274 ath_dbg(common, ATH_DBG_CONFIG,
275 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
276 sc->sc_ah->curchan->channel,
277 channel->center_freq, conf_is_ht40(conf),
278 fastcc);
279
280 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
281 if (r) {
282 ath_err(common,
283 "Unable to reset channel (%u MHz), reset status %d\n",
284 channel->center_freq, r);
285 goto ps_restore;
286 }
287
288 if (ath_startrecv(sc) != 0) {
289 ath_err(common, "Unable to restart recv logic\n");
290 r = -EIO;
291 goto ps_restore;
292 }
293
294 ath9k_cmn_update_txpow(ah, sc->curtxpow,
295 sc->config.txpowlimit, &sc->curtxpow);
296 ath9k_hw_set_interrupts(ah, ah->imask);
297 ath9k_hw_enable_interrupts(ah);
298
299 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
300 if (sc->sc_flags & SC_OP_BEACONS)
301 ath_set_beacon(sc);
302 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
303 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
304 if (!common->disable_ani)
305 ath_start_ani(common);
306 }
307
308 ps_restore:
309 ieee80211_wake_queues(hw);
310
311 spin_unlock_bh(&sc->sc_pcu_lock);
312
313 ath9k_ps_restore(sc);
314 return r;
315 }
316
317 static void ath_paprd_activate(struct ath_softc *sc)
318 {
319 struct ath_hw *ah = sc->sc_ah;
320 struct ath9k_hw_cal_data *caldata = ah->caldata;
321 struct ath_common *common = ath9k_hw_common(ah);
322 int chain;
323
324 if (!caldata || !caldata->paprd_done)
325 return;
326
327 ath9k_ps_wakeup(sc);
328 ar9003_paprd_enable(ah, false);
329 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330 if (!(common->tx_chainmask & BIT(chain)))
331 continue;
332
333 ar9003_paprd_populate_single_table(ah, caldata, chain);
334 }
335
336 ar9003_paprd_enable(ah, true);
337 ath9k_ps_restore(sc);
338 }
339
340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
341 {
342 struct ieee80211_hw *hw = sc->hw;
343 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
344 struct ath_hw *ah = sc->sc_ah;
345 struct ath_common *common = ath9k_hw_common(ah);
346 struct ath_tx_control txctl;
347 int time_left;
348
349 memset(&txctl, 0, sizeof(txctl));
350 txctl.txq = sc->tx.txq_map[WME_AC_BE];
351
352 memset(tx_info, 0, sizeof(*tx_info));
353 tx_info->band = hw->conf.channel->band;
354 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
355 tx_info->control.rates[0].idx = 0;
356 tx_info->control.rates[0].count = 1;
357 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
358 tx_info->control.rates[1].idx = -1;
359
360 init_completion(&sc->paprd_complete);
361 txctl.paprd = BIT(chain);
362
363 if (ath_tx_start(hw, skb, &txctl) != 0) {
364 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
365 dev_kfree_skb_any(skb);
366 return false;
367 }
368
369 time_left = wait_for_completion_timeout(&sc->paprd_complete,
370 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
371
372 if (!time_left)
373 ath_dbg(common, ATH_DBG_CALIBRATE,
374 "Timeout waiting for paprd training on TX chain %d\n",
375 chain);
376
377 return !!time_left;
378 }
379
380 void ath_paprd_calibrate(struct work_struct *work)
381 {
382 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
383 struct ieee80211_hw *hw = sc->hw;
384 struct ath_hw *ah = sc->sc_ah;
385 struct ieee80211_hdr *hdr;
386 struct sk_buff *skb = NULL;
387 struct ath9k_hw_cal_data *caldata = ah->caldata;
388 struct ath_common *common = ath9k_hw_common(ah);
389 int ftype;
390 int chain_ok = 0;
391 int chain;
392 int len = 1800;
393
394 if (!caldata)
395 return;
396
397 ath9k_ps_wakeup(sc);
398
399 if (ar9003_paprd_init_table(ah) < 0)
400 goto fail_paprd;
401
402 skb = alloc_skb(len, GFP_KERNEL);
403 if (!skb)
404 goto fail_paprd;
405
406 skb_put(skb, len);
407 memset(skb->data, 0, len);
408 hdr = (struct ieee80211_hdr *)skb->data;
409 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
410 hdr->frame_control = cpu_to_le16(ftype);
411 hdr->duration_id = cpu_to_le16(10);
412 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
413 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
414 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
415
416 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
417 if (!(common->tx_chainmask & BIT(chain)))
418 continue;
419
420 chain_ok = 0;
421
422 ath_dbg(common, ATH_DBG_CALIBRATE,
423 "Sending PAPRD frame for thermal measurement "
424 "on chain %d\n", chain);
425 if (!ath_paprd_send_frame(sc, skb, chain))
426 goto fail_paprd;
427
428 ar9003_paprd_setup_gain_table(ah, chain);
429
430 ath_dbg(common, ATH_DBG_CALIBRATE,
431 "Sending PAPRD training frame on chain %d\n", chain);
432 if (!ath_paprd_send_frame(sc, skb, chain))
433 goto fail_paprd;
434
435 if (!ar9003_paprd_is_done(ah)) {
436 ath_dbg(common, ATH_DBG_CALIBRATE,
437 "PAPRD not yet done on chain %d\n", chain);
438 break;
439 }
440
441 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
442 ath_dbg(common, ATH_DBG_CALIBRATE,
443 "PAPRD create curve failed on chain %d\n",
444 chain);
445 break;
446 }
447
448 chain_ok = 1;
449 }
450 kfree_skb(skb);
451
452 if (chain_ok) {
453 caldata->paprd_done = true;
454 ath_paprd_activate(sc);
455 }
456
457 fail_paprd:
458 ath9k_ps_restore(sc);
459 }
460
461 /*
462 * This routine performs the periodic noise floor calibration function
463 * that is used to adjust and optimize the chip performance. This
464 * takes environmental changes (location, temperature) into account.
465 * When the task is complete, it reschedules itself depending on the
466 * appropriate interval that was calculated.
467 */
468 void ath_ani_calibrate(unsigned long data)
469 {
470 struct ath_softc *sc = (struct ath_softc *)data;
471 struct ath_hw *ah = sc->sc_ah;
472 struct ath_common *common = ath9k_hw_common(ah);
473 bool longcal = false;
474 bool shortcal = false;
475 bool aniflag = false;
476 unsigned int timestamp = jiffies_to_msecs(jiffies);
477 u32 cal_interval, short_cal_interval, long_cal_interval;
478 unsigned long flags;
479
480 if (ah->caldata && ah->caldata->nfcal_interference)
481 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
482 else
483 long_cal_interval = ATH_LONG_CALINTERVAL;
484
485 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
486 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
487
488 /* Only calibrate if awake */
489 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
490 goto set_timer;
491
492 ath9k_ps_wakeup(sc);
493
494 /* Long calibration runs independently of short calibration. */
495 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
496 longcal = true;
497 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
498 common->ani.longcal_timer = timestamp;
499 }
500
501 /* Short calibration applies only while caldone is false */
502 if (!common->ani.caldone) {
503 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
504 shortcal = true;
505 ath_dbg(common, ATH_DBG_ANI,
506 "shortcal @%lu\n", jiffies);
507 common->ani.shortcal_timer = timestamp;
508 common->ani.resetcal_timer = timestamp;
509 }
510 } else {
511 if ((timestamp - common->ani.resetcal_timer) >=
512 ATH_RESTART_CALINTERVAL) {
513 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
514 if (common->ani.caldone)
515 common->ani.resetcal_timer = timestamp;
516 }
517 }
518
519 /* Verify whether we must check ANI */
520 if ((timestamp - common->ani.checkani_timer) >=
521 ah->config.ani_poll_interval) {
522 aniflag = true;
523 common->ani.checkani_timer = timestamp;
524 }
525
526 /* Call ANI routine if necessary */
527 if (aniflag) {
528 spin_lock_irqsave(&common->cc_lock, flags);
529 ath9k_hw_ani_monitor(ah, ah->curchan);
530 ath_update_survey_stats(sc);
531 spin_unlock_irqrestore(&common->cc_lock, flags);
532 }
533
534 /* Perform calibration if necessary */
535 if (longcal || shortcal) {
536 common->ani.caldone =
537 ath9k_hw_calibrate(ah, ah->curchan,
538 common->rx_chainmask, longcal);
539 }
540
541 ath9k_ps_restore(sc);
542
543 set_timer:
544 /*
545 * Set timer interval based on previous results.
546 * The interval must be the shortest necessary to satisfy ANI,
547 * short calibration and long calibration.
548 */
549 ath9k_debug_samp_bb_mac(sc);
550 cal_interval = ATH_LONG_CALINTERVAL;
551 if (sc->sc_ah->config.enable_ani)
552 cal_interval = min(cal_interval,
553 (u32)ah->config.ani_poll_interval);
554 if (!common->ani.caldone)
555 cal_interval = min(cal_interval, (u32)short_cal_interval);
556
557 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
558 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
559 if (!ah->caldata->paprd_done)
560 ieee80211_queue_work(sc->hw, &sc->paprd_work);
561 else if (!ah->paprd_table_write_done)
562 ath_paprd_activate(sc);
563 }
564 }
565
566 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
567 {
568 struct ath_node *an;
569 an = (struct ath_node *)sta->drv_priv;
570
571 #ifdef CONFIG_ATH9K_DEBUGFS
572 spin_lock(&sc->nodes_lock);
573 list_add(&an->list, &sc->nodes);
574 spin_unlock(&sc->nodes_lock);
575 an->sta = sta;
576 #endif
577 if (sc->sc_flags & SC_OP_TXAGGR) {
578 ath_tx_node_init(sc, an);
579 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
580 sta->ht_cap.ampdu_factor);
581 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
582 }
583 }
584
585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
586 {
587 struct ath_node *an = (struct ath_node *)sta->drv_priv;
588
589 #ifdef CONFIG_ATH9K_DEBUGFS
590 spin_lock(&sc->nodes_lock);
591 list_del(&an->list);
592 spin_unlock(&sc->nodes_lock);
593 an->sta = NULL;
594 #endif
595
596 if (sc->sc_flags & SC_OP_TXAGGR)
597 ath_tx_node_cleanup(sc, an);
598 }
599
600 void ath_hw_check(struct work_struct *work)
601 {
602 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
604 unsigned long flags;
605 int busy;
606
607 ath9k_ps_wakeup(sc);
608 if (ath9k_hw_check_alive(sc->sc_ah))
609 goto out;
610
611 spin_lock_irqsave(&common->cc_lock, flags);
612 busy = ath_update_survey_stats(sc);
613 spin_unlock_irqrestore(&common->cc_lock, flags);
614
615 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
616 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
617 if (busy >= 99) {
618 if (++sc->hw_busy_count >= 3) {
619 spin_lock_bh(&sc->sc_pcu_lock);
620 ath_reset(sc, true);
621 spin_unlock_bh(&sc->sc_pcu_lock);
622 }
623 } else if (busy >= 0)
624 sc->hw_busy_count = 0;
625
626 out:
627 ath9k_ps_restore(sc);
628 }
629
630 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
631 {
632 static int count;
633 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
634
635 if (pll_sqsum >= 0x40000) {
636 count++;
637 if (count == 3) {
638 /* Rx is hung for more than 500ms. Reset it */
639 ath_dbg(common, ATH_DBG_RESET,
640 "Possible RX hang, resetting");
641 spin_lock_bh(&sc->sc_pcu_lock);
642 ath_reset(sc, true);
643 spin_unlock_bh(&sc->sc_pcu_lock);
644 count = 0;
645 }
646 } else
647 count = 0;
648 }
649
650 void ath_hw_pll_work(struct work_struct *work)
651 {
652 struct ath_softc *sc = container_of(work, struct ath_softc,
653 hw_pll_work.work);
654 u32 pll_sqsum;
655
656 if (AR_SREV_9485(sc->sc_ah)) {
657
658 ath9k_ps_wakeup(sc);
659 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
660 ath9k_ps_restore(sc);
661
662 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
663
664 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
665 }
666 }
667
668
669 void ath9k_tasklet(unsigned long data)
670 {
671 struct ath_softc *sc = (struct ath_softc *)data;
672 struct ath_hw *ah = sc->sc_ah;
673 struct ath_common *common = ath9k_hw_common(ah);
674
675 u32 status = sc->intrstatus;
676 u32 rxmask;
677
678 if ((status & ATH9K_INT_FATAL) ||
679 (status & ATH9K_INT_BB_WATCHDOG)) {
680 spin_lock(&sc->sc_pcu_lock);
681 ath_reset(sc, true);
682 spin_unlock(&sc->sc_pcu_lock);
683 return;
684 }
685
686 ath9k_ps_wakeup(sc);
687 spin_lock(&sc->sc_pcu_lock);
688
689 /*
690 * Only run the baseband hang check if beacons stop working in AP or
691 * IBSS mode, because it has a high false positive rate. For station
692 * mode it should not be necessary, since the upper layers will detect
693 * this through a beacon miss automatically and the following channel
694 * change will trigger a hardware reset anyway
695 */
696 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
697 !ath9k_hw_check_alive(ah))
698 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
699
700 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
701 /*
702 * TSF sync does not look correct; remain awake to sync with
703 * the next Beacon.
704 */
705 ath_dbg(common, ATH_DBG_PS,
706 "TSFOOR - Sync with next Beacon\n");
707 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
708 }
709
710 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
711 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
712 ATH9K_INT_RXORN);
713 else
714 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
715
716 if (status & rxmask) {
717 /* Check for high priority Rx first */
718 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719 (status & ATH9K_INT_RXHP))
720 ath_rx_tasklet(sc, 0, true);
721
722 ath_rx_tasklet(sc, 0, false);
723 }
724
725 if (status & ATH9K_INT_TX) {
726 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
727 ath_tx_edma_tasklet(sc);
728 else
729 ath_tx_tasklet(sc);
730 }
731
732 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
733 if (status & ATH9K_INT_GENTIMER)
734 ath_gen_timer_isr(sc->sc_ah);
735
736 /* re-enable hardware interrupt */
737 ath9k_hw_enable_interrupts(ah);
738
739 spin_unlock(&sc->sc_pcu_lock);
740 ath9k_ps_restore(sc);
741 }
742
743 irqreturn_t ath_isr(int irq, void *dev)
744 {
745 #define SCHED_INTR ( \
746 ATH9K_INT_FATAL | \
747 ATH9K_INT_BB_WATCHDOG | \
748 ATH9K_INT_RXORN | \
749 ATH9K_INT_RXEOL | \
750 ATH9K_INT_RX | \
751 ATH9K_INT_RXLP | \
752 ATH9K_INT_RXHP | \
753 ATH9K_INT_TX | \
754 ATH9K_INT_BMISS | \
755 ATH9K_INT_CST | \
756 ATH9K_INT_TSFOOR | \
757 ATH9K_INT_GENTIMER)
758
759 struct ath_softc *sc = dev;
760 struct ath_hw *ah = sc->sc_ah;
761 struct ath_common *common = ath9k_hw_common(ah);
762 enum ath9k_int status;
763 bool sched = false;
764
765 /*
766 * The hardware is not ready/present, don't
767 * touch anything. Note this can happen early
768 * on if the IRQ is shared.
769 */
770 if (sc->sc_flags & SC_OP_INVALID)
771 return IRQ_NONE;
772
773
774 /* shared irq, not for us */
775
776 if (!ath9k_hw_intrpend(ah))
777 return IRQ_NONE;
778
779 /*
780 * Figure out the reason(s) for the interrupt. Note
781 * that the hal returns a pseudo-ISR that may include
782 * bits we haven't explicitly enabled so we mask the
783 * value to insure we only process bits we requested.
784 */
785 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
786 status &= ah->imask; /* discard unasked-for bits */
787
788 /*
789 * If there are no status bits set, then this interrupt was not
790 * for me (should have been caught above).
791 */
792 if (!status)
793 return IRQ_NONE;
794
795 /* Cache the status */
796 sc->intrstatus = status;
797
798 if (status & SCHED_INTR)
799 sched = true;
800
801 /*
802 * If a FATAL or RXORN interrupt is received, we have to reset the
803 * chip immediately.
804 */
805 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
806 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
807 goto chip_reset;
808
809 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
810 (status & ATH9K_INT_BB_WATCHDOG)) {
811
812 spin_lock(&common->cc_lock);
813 ath_hw_cycle_counters_update(common);
814 ar9003_hw_bb_watchdog_dbg_info(ah);
815 spin_unlock(&common->cc_lock);
816
817 goto chip_reset;
818 }
819
820 if (status & ATH9K_INT_SWBA)
821 tasklet_schedule(&sc->bcon_tasklet);
822
823 if (status & ATH9K_INT_TXURN)
824 ath9k_hw_updatetxtriglevel(ah, true);
825
826 if (status & ATH9K_INT_RXEOL) {
827 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
828 ath9k_hw_set_interrupts(ah, ah->imask);
829 }
830
831 if (status & ATH9K_INT_MIB) {
832 /*
833 * Disable interrupts until we service the MIB
834 * interrupt; otherwise it will continue to
835 * fire.
836 */
837 ath9k_hw_disable_interrupts(ah);
838 /*
839 * Let the hal handle the event. We assume
840 * it will clear whatever condition caused
841 * the interrupt.
842 */
843 spin_lock(&common->cc_lock);
844 ath9k_hw_proc_mib_event(ah);
845 spin_unlock(&common->cc_lock);
846 ath9k_hw_enable_interrupts(ah);
847 }
848
849 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
850 if (status & ATH9K_INT_TIM_TIMER) {
851 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
852 goto chip_reset;
853 /* Clear RxAbort bit so that we can
854 * receive frames */
855 ath9k_setpower(sc, ATH9K_PM_AWAKE);
856 ath9k_hw_setrxabort(sc->sc_ah, 0);
857 sc->ps_flags |= PS_WAIT_FOR_BEACON;
858 }
859
860 chip_reset:
861
862 ath_debug_stat_interrupt(sc, status);
863
864 if (sched) {
865 /* turn off every interrupt */
866 ath9k_hw_disable_interrupts(ah);
867 tasklet_schedule(&sc->intr_tq);
868 }
869
870 return IRQ_HANDLED;
871
872 #undef SCHED_INTR
873 }
874
875 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
876 {
877 struct ath_hw *ah = sc->sc_ah;
878 struct ath_common *common = ath9k_hw_common(ah);
879 struct ieee80211_channel *channel = hw->conf.channel;
880 int r;
881
882 ath9k_ps_wakeup(sc);
883 spin_lock_bh(&sc->sc_pcu_lock);
884 atomic_set(&ah->intr_ref_cnt, -1);
885
886 ath9k_hw_configpcipowersave(ah, false);
887
888 if (!ah->curchan)
889 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
890
891 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
892 if (r) {
893 ath_err(common,
894 "Unable to reset channel (%u MHz), reset status %d\n",
895 channel->center_freq, r);
896 }
897
898 ath9k_cmn_update_txpow(ah, sc->curtxpow,
899 sc->config.txpowlimit, &sc->curtxpow);
900 if (ath_startrecv(sc) != 0) {
901 ath_err(common, "Unable to restart recv logic\n");
902 goto out;
903 }
904 if (sc->sc_flags & SC_OP_BEACONS)
905 ath_set_beacon(sc); /* restart beacons */
906
907 /* Re-Enable interrupts */
908 ath9k_hw_set_interrupts(ah, ah->imask);
909 ath9k_hw_enable_interrupts(ah);
910
911 /* Enable LED */
912 ath9k_hw_cfg_output(ah, ah->led_pin,
913 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
914 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
915
916 ieee80211_wake_queues(hw);
917 ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
918
919 out:
920 spin_unlock_bh(&sc->sc_pcu_lock);
921
922 ath9k_ps_restore(sc);
923 }
924
925 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
926 {
927 struct ath_hw *ah = sc->sc_ah;
928 struct ieee80211_channel *channel = hw->conf.channel;
929 int r;
930
931 ath9k_ps_wakeup(sc);
932 cancel_delayed_work_sync(&sc->hw_pll_work);
933
934 spin_lock_bh(&sc->sc_pcu_lock);
935
936 ieee80211_stop_queues(hw);
937
938 /*
939 * Keep the LED on when the radio is disabled
940 * during idle unassociated state.
941 */
942 if (!sc->ps_idle) {
943 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
944 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
945 }
946
947 /* Disable interrupts */
948 ath9k_hw_disable_interrupts(ah);
949
950 ath_drain_all_txq(sc, false); /* clear pending tx frames */
951
952 ath_stoprecv(sc); /* turn off frame recv */
953 ath_flushrecv(sc); /* flush recv queue */
954
955 if (!ah->curchan)
956 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
957
958 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
959 if (r) {
960 ath_err(ath9k_hw_common(sc->sc_ah),
961 "Unable to reset channel (%u MHz), reset status %d\n",
962 channel->center_freq, r);
963 }
964
965 ath9k_hw_phy_disable(ah);
966
967 ath9k_hw_configpcipowersave(ah, true);
968
969 spin_unlock_bh(&sc->sc_pcu_lock);
970 ath9k_ps_restore(sc);
971 }
972
973 int ath_reset(struct ath_softc *sc, bool retry_tx)
974 {
975 struct ath_hw *ah = sc->sc_ah;
976 struct ath_common *common = ath9k_hw_common(ah);
977 struct ieee80211_hw *hw = sc->hw;
978 int r;
979
980 sc->hw_busy_count = 0;
981
982 ath9k_debug_samp_bb_mac(sc);
983 /* Stop ANI */
984
985 del_timer_sync(&common->ani.timer);
986
987 ath9k_ps_wakeup(sc);
988
989 ieee80211_stop_queues(hw);
990
991 ath9k_hw_disable_interrupts(ah);
992 ath_drain_all_txq(sc, retry_tx);
993
994 ath_stoprecv(sc);
995 ath_flushrecv(sc);
996
997 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
998 if (r)
999 ath_err(common,
1000 "Unable to reset hardware; reset status %d\n", r);
1001
1002 if (ath_startrecv(sc) != 0)
1003 ath_err(common, "Unable to start recv logic\n");
1004
1005 /*
1006 * We may be doing a reset in response to a request
1007 * that changes the channel so update any state that
1008 * might change as a result.
1009 */
1010 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1011 sc->config.txpowlimit, &sc->curtxpow);
1012
1013 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1014 ath_set_beacon(sc); /* restart beacons */
1015
1016 ath9k_hw_set_interrupts(ah, ah->imask);
1017 ath9k_hw_enable_interrupts(ah);
1018
1019 if (retry_tx) {
1020 int i;
1021 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1022 if (ATH_TXQ_SETUP(sc, i)) {
1023 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1024 ath_txq_schedule(sc, &sc->tx.txq[i]);
1025 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1026 }
1027 }
1028 }
1029
1030 ieee80211_wake_queues(hw);
1031
1032 /* Start ANI */
1033 if (!common->disable_ani)
1034 ath_start_ani(common);
1035
1036 ath9k_ps_restore(sc);
1037
1038 return r;
1039 }
1040
1041 /**********************/
1042 /* mac80211 callbacks */
1043 /**********************/
1044
1045 static int ath9k_start(struct ieee80211_hw *hw)
1046 {
1047 struct ath_softc *sc = hw->priv;
1048 struct ath_hw *ah = sc->sc_ah;
1049 struct ath_common *common = ath9k_hw_common(ah);
1050 struct ieee80211_channel *curchan = hw->conf.channel;
1051 struct ath9k_channel *init_channel;
1052 int r;
1053
1054 ath_dbg(common, ATH_DBG_CONFIG,
1055 "Starting driver with initial channel: %d MHz\n",
1056 curchan->center_freq);
1057
1058 ath9k_ps_wakeup(sc);
1059
1060 mutex_lock(&sc->mutex);
1061
1062 /* setup initial channel */
1063 sc->chan_idx = curchan->hw_value;
1064
1065 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1066
1067 /* Reset SERDES registers */
1068 ath9k_hw_configpcipowersave(ah, false);
1069
1070 /*
1071 * The basic interface to setting the hardware in a good
1072 * state is ``reset''. On return the hardware is known to
1073 * be powered up and with interrupts disabled. This must
1074 * be followed by initialization of the appropriate bits
1075 * and then setup of the interrupt mask.
1076 */
1077 spin_lock_bh(&sc->sc_pcu_lock);
1078 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1079 if (r) {
1080 ath_err(common,
1081 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1082 r, curchan->center_freq);
1083 spin_unlock_bh(&sc->sc_pcu_lock);
1084 goto mutex_unlock;
1085 }
1086
1087 /*
1088 * This is needed only to setup initial state
1089 * but it's best done after a reset.
1090 */
1091 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1092 sc->config.txpowlimit, &sc->curtxpow);
1093
1094 /*
1095 * Setup the hardware after reset:
1096 * The receive engine is set going.
1097 * Frame transmit is handled entirely
1098 * in the frame output path; there's nothing to do
1099 * here except setup the interrupt mask.
1100 */
1101 if (ath_startrecv(sc) != 0) {
1102 ath_err(common, "Unable to start recv logic\n");
1103 r = -EIO;
1104 spin_unlock_bh(&sc->sc_pcu_lock);
1105 goto mutex_unlock;
1106 }
1107 spin_unlock_bh(&sc->sc_pcu_lock);
1108
1109 /* Setup our intr mask. */
1110 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1111 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1112 ATH9K_INT_GLOBAL;
1113
1114 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1115 ah->imask |= ATH9K_INT_RXHP |
1116 ATH9K_INT_RXLP |
1117 ATH9K_INT_BB_WATCHDOG;
1118 else
1119 ah->imask |= ATH9K_INT_RX;
1120
1121 ah->imask |= ATH9K_INT_GTT;
1122
1123 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1124 ah->imask |= ATH9K_INT_CST;
1125
1126 sc->sc_flags &= ~SC_OP_INVALID;
1127 sc->sc_ah->is_monitoring = false;
1128
1129 /* Disable BMISS interrupt when we're not associated */
1130 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1131 ath9k_hw_set_interrupts(ah, ah->imask);
1132 ath9k_hw_enable_interrupts(ah);
1133
1134 ieee80211_wake_queues(hw);
1135
1136 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1137
1138 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1139 !ah->btcoex_hw.enabled) {
1140 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1141 AR_STOMP_LOW_WLAN_WGHT);
1142 ath9k_hw_btcoex_enable(ah);
1143
1144 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1145 ath9k_btcoex_timer_resume(sc);
1146 }
1147
1148 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1149 common->bus_ops->extn_synch_en(common);
1150
1151 mutex_unlock:
1152 mutex_unlock(&sc->mutex);
1153
1154 ath9k_ps_restore(sc);
1155
1156 return r;
1157 }
1158
1159 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1160 {
1161 struct ath_softc *sc = hw->priv;
1162 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1163 struct ath_tx_control txctl;
1164 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1165
1166 if (sc->ps_enabled) {
1167 /*
1168 * mac80211 does not set PM field for normal data frames, so we
1169 * need to update that based on the current PS mode.
1170 */
1171 if (ieee80211_is_data(hdr->frame_control) &&
1172 !ieee80211_is_nullfunc(hdr->frame_control) &&
1173 !ieee80211_has_pm(hdr->frame_control)) {
1174 ath_dbg(common, ATH_DBG_PS,
1175 "Add PM=1 for a TX frame while in PS mode\n");
1176 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1177 }
1178 }
1179
1180 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1181 /*
1182 * We are using PS-Poll and mac80211 can request TX while in
1183 * power save mode. Need to wake up hardware for the TX to be
1184 * completed and if needed, also for RX of buffered frames.
1185 */
1186 ath9k_ps_wakeup(sc);
1187 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1188 ath9k_hw_setrxabort(sc->sc_ah, 0);
1189 if (ieee80211_is_pspoll(hdr->frame_control)) {
1190 ath_dbg(common, ATH_DBG_PS,
1191 "Sending PS-Poll to pick a buffered frame\n");
1192 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1193 } else {
1194 ath_dbg(common, ATH_DBG_PS,
1195 "Wake up to complete TX\n");
1196 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1197 }
1198 /*
1199 * The actual restore operation will happen only after
1200 * the sc_flags bit is cleared. We are just dropping
1201 * the ps_usecount here.
1202 */
1203 ath9k_ps_restore(sc);
1204 }
1205
1206 memset(&txctl, 0, sizeof(struct ath_tx_control));
1207 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1208
1209 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1210
1211 if (ath_tx_start(hw, skb, &txctl) != 0) {
1212 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1213 goto exit;
1214 }
1215
1216 return;
1217 exit:
1218 dev_kfree_skb_any(skb);
1219 }
1220
1221 static void ath9k_stop(struct ieee80211_hw *hw)
1222 {
1223 struct ath_softc *sc = hw->priv;
1224 struct ath_hw *ah = sc->sc_ah;
1225 struct ath_common *common = ath9k_hw_common(ah);
1226
1227 mutex_lock(&sc->mutex);
1228
1229 cancel_delayed_work_sync(&sc->tx_complete_work);
1230 cancel_delayed_work_sync(&sc->hw_pll_work);
1231 cancel_work_sync(&sc->paprd_work);
1232 cancel_work_sync(&sc->hw_check_work);
1233
1234 if (sc->sc_flags & SC_OP_INVALID) {
1235 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1236 mutex_unlock(&sc->mutex);
1237 return;
1238 }
1239
1240 /* Ensure HW is awake when we try to shut it down. */
1241 ath9k_ps_wakeup(sc);
1242
1243 if (ah->btcoex_hw.enabled) {
1244 ath9k_hw_btcoex_disable(ah);
1245 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1246 ath9k_btcoex_timer_pause(sc);
1247 }
1248
1249 spin_lock_bh(&sc->sc_pcu_lock);
1250
1251 /* prevent tasklets to enable interrupts once we disable them */
1252 ah->imask &= ~ATH9K_INT_GLOBAL;
1253
1254 /* make sure h/w will not generate any interrupt
1255 * before setting the invalid flag. */
1256 ath9k_hw_disable_interrupts(ah);
1257
1258 if (!(sc->sc_flags & SC_OP_INVALID)) {
1259 ath_drain_all_txq(sc, false);
1260 ath_stoprecv(sc);
1261 ath9k_hw_phy_disable(ah);
1262 } else
1263 sc->rx.rxlink = NULL;
1264
1265 if (sc->rx.frag) {
1266 dev_kfree_skb_any(sc->rx.frag);
1267 sc->rx.frag = NULL;
1268 }
1269
1270 /* disable HAL and put h/w to sleep */
1271 ath9k_hw_disable(ah);
1272
1273 spin_unlock_bh(&sc->sc_pcu_lock);
1274
1275 /* we can now sync irq and kill any running tasklets, since we already
1276 * disabled interrupts and not holding a spin lock */
1277 synchronize_irq(sc->irq);
1278 tasklet_kill(&sc->intr_tq);
1279 tasklet_kill(&sc->bcon_tasklet);
1280
1281 ath9k_ps_restore(sc);
1282
1283 sc->ps_idle = true;
1284 ath_radio_disable(sc, hw);
1285
1286 sc->sc_flags |= SC_OP_INVALID;
1287
1288 mutex_unlock(&sc->mutex);
1289
1290 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1291 }
1292
1293 bool ath9k_uses_beacons(int type)
1294 {
1295 switch (type) {
1296 case NL80211_IFTYPE_AP:
1297 case NL80211_IFTYPE_ADHOC:
1298 case NL80211_IFTYPE_MESH_POINT:
1299 return true;
1300 default:
1301 return false;
1302 }
1303 }
1304
1305 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1306 struct ieee80211_vif *vif)
1307 {
1308 struct ath_vif *avp = (void *)vif->drv_priv;
1309
1310 ath9k_set_beaconing_status(sc, false);
1311 ath_beacon_return(sc, avp);
1312 ath9k_set_beaconing_status(sc, true);
1313 sc->sc_flags &= ~SC_OP_BEACONS;
1314 }
1315
1316 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1317 {
1318 struct ath9k_vif_iter_data *iter_data = data;
1319 int i;
1320
1321 if (iter_data->hw_macaddr)
1322 for (i = 0; i < ETH_ALEN; i++)
1323 iter_data->mask[i] &=
1324 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1325
1326 switch (vif->type) {
1327 case NL80211_IFTYPE_AP:
1328 iter_data->naps++;
1329 break;
1330 case NL80211_IFTYPE_STATION:
1331 iter_data->nstations++;
1332 break;
1333 case NL80211_IFTYPE_ADHOC:
1334 iter_data->nadhocs++;
1335 break;
1336 case NL80211_IFTYPE_MESH_POINT:
1337 iter_data->nmeshes++;
1338 break;
1339 case NL80211_IFTYPE_WDS:
1340 iter_data->nwds++;
1341 break;
1342 default:
1343 iter_data->nothers++;
1344 break;
1345 }
1346 }
1347
1348 /* Called with sc->mutex held. */
1349 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1350 struct ieee80211_vif *vif,
1351 struct ath9k_vif_iter_data *iter_data)
1352 {
1353 struct ath_softc *sc = hw->priv;
1354 struct ath_hw *ah = sc->sc_ah;
1355 struct ath_common *common = ath9k_hw_common(ah);
1356
1357 /*
1358 * Use the hardware MAC address as reference, the hardware uses it
1359 * together with the BSSID mask when matching addresses.
1360 */
1361 memset(iter_data, 0, sizeof(*iter_data));
1362 iter_data->hw_macaddr = common->macaddr;
1363 memset(&iter_data->mask, 0xff, ETH_ALEN);
1364
1365 if (vif)
1366 ath9k_vif_iter(iter_data, vif->addr, vif);
1367
1368 /* Get list of all active MAC addresses */
1369 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1370 iter_data);
1371 }
1372
1373 /* Called with sc->mutex held. */
1374 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1375 struct ieee80211_vif *vif)
1376 {
1377 struct ath_softc *sc = hw->priv;
1378 struct ath_hw *ah = sc->sc_ah;
1379 struct ath_common *common = ath9k_hw_common(ah);
1380 struct ath9k_vif_iter_data iter_data;
1381
1382 ath9k_calculate_iter_data(hw, vif, &iter_data);
1383
1384 /* Set BSSID mask. */
1385 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1386 ath_hw_setbssidmask(common);
1387
1388 /* Set op-mode & TSF */
1389 if (iter_data.naps > 0) {
1390 ath9k_hw_set_tsfadjust(ah, 1);
1391 sc->sc_flags |= SC_OP_TSF_RESET;
1392 ah->opmode = NL80211_IFTYPE_AP;
1393 } else {
1394 ath9k_hw_set_tsfadjust(ah, 0);
1395 sc->sc_flags &= ~SC_OP_TSF_RESET;
1396
1397 if (iter_data.nmeshes)
1398 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1399 else if (iter_data.nwds)
1400 ah->opmode = NL80211_IFTYPE_AP;
1401 else if (iter_data.nadhocs)
1402 ah->opmode = NL80211_IFTYPE_ADHOC;
1403 else
1404 ah->opmode = NL80211_IFTYPE_STATION;
1405 }
1406
1407 /*
1408 * Enable MIB interrupts when there are hardware phy counters.
1409 */
1410 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1411 if (ah->config.enable_ani)
1412 ah->imask |= ATH9K_INT_MIB;
1413 ah->imask |= ATH9K_INT_TSFOOR;
1414 } else {
1415 ah->imask &= ~ATH9K_INT_MIB;
1416 ah->imask &= ~ATH9K_INT_TSFOOR;
1417 }
1418
1419 ath9k_hw_set_interrupts(ah, ah->imask);
1420
1421 /* Set up ANI */
1422 if (iter_data.naps > 0) {
1423 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1424
1425 if (!common->disable_ani) {
1426 sc->sc_flags |= SC_OP_ANI_RUN;
1427 ath_start_ani(common);
1428 }
1429
1430 } else {
1431 sc->sc_flags &= ~SC_OP_ANI_RUN;
1432 del_timer_sync(&common->ani.timer);
1433 }
1434 }
1435
1436 /* Called with sc->mutex held, vif counts set up properly. */
1437 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1438 struct ieee80211_vif *vif)
1439 {
1440 struct ath_softc *sc = hw->priv;
1441
1442 ath9k_calculate_summary_state(hw, vif);
1443
1444 if (ath9k_uses_beacons(vif->type)) {
1445 int error;
1446 /* This may fail because upper levels do not have beacons
1447 * properly configured yet. That's OK, we assume it
1448 * will be properly configured and then we will be notified
1449 * in the info_changed method and set up beacons properly
1450 * there.
1451 */
1452 ath9k_set_beaconing_status(sc, false);
1453 error = ath_beacon_alloc(sc, vif);
1454 if (!error)
1455 ath_beacon_config(sc, vif);
1456 ath9k_set_beaconing_status(sc, true);
1457 }
1458 }
1459
1460
1461 static int ath9k_add_interface(struct ieee80211_hw *hw,
1462 struct ieee80211_vif *vif)
1463 {
1464 struct ath_softc *sc = hw->priv;
1465 struct ath_hw *ah = sc->sc_ah;
1466 struct ath_common *common = ath9k_hw_common(ah);
1467 int ret = 0;
1468
1469 ath9k_ps_wakeup(sc);
1470 mutex_lock(&sc->mutex);
1471
1472 switch (vif->type) {
1473 case NL80211_IFTYPE_STATION:
1474 case NL80211_IFTYPE_WDS:
1475 case NL80211_IFTYPE_ADHOC:
1476 case NL80211_IFTYPE_AP:
1477 case NL80211_IFTYPE_MESH_POINT:
1478 break;
1479 default:
1480 ath_err(common, "Interface type %d not yet supported\n",
1481 vif->type);
1482 ret = -EOPNOTSUPP;
1483 goto out;
1484 }
1485
1486 if (ath9k_uses_beacons(vif->type)) {
1487 if (sc->nbcnvifs >= ATH_BCBUF) {
1488 ath_err(common, "Not enough beacon buffers when adding"
1489 " new interface of type: %i\n",
1490 vif->type);
1491 ret = -ENOBUFS;
1492 goto out;
1493 }
1494 }
1495
1496 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1497 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1498 sc->nvifs > 0)) {
1499 ath_err(common, "Cannot create ADHOC interface when other"
1500 " interfaces already exist.\n");
1501 ret = -EINVAL;
1502 goto out;
1503 }
1504
1505 ath_dbg(common, ATH_DBG_CONFIG,
1506 "Attach a VIF of type: %d\n", vif->type);
1507
1508 sc->nvifs++;
1509
1510 ath9k_do_vif_add_setup(hw, vif);
1511 out:
1512 mutex_unlock(&sc->mutex);
1513 ath9k_ps_restore(sc);
1514 return ret;
1515 }
1516
1517 static int ath9k_change_interface(struct ieee80211_hw *hw,
1518 struct ieee80211_vif *vif,
1519 enum nl80211_iftype new_type,
1520 bool p2p)
1521 {
1522 struct ath_softc *sc = hw->priv;
1523 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1524 int ret = 0;
1525
1526 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1527 mutex_lock(&sc->mutex);
1528 ath9k_ps_wakeup(sc);
1529
1530 /* See if new interface type is valid. */
1531 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1532 (sc->nvifs > 1)) {
1533 ath_err(common, "When using ADHOC, it must be the only"
1534 " interface.\n");
1535 ret = -EINVAL;
1536 goto out;
1537 }
1538
1539 if (ath9k_uses_beacons(new_type) &&
1540 !ath9k_uses_beacons(vif->type)) {
1541 if (sc->nbcnvifs >= ATH_BCBUF) {
1542 ath_err(common, "No beacon slot available\n");
1543 ret = -ENOBUFS;
1544 goto out;
1545 }
1546 }
1547
1548 /* Clean up old vif stuff */
1549 if (ath9k_uses_beacons(vif->type))
1550 ath9k_reclaim_beacon(sc, vif);
1551
1552 /* Add new settings */
1553 vif->type = new_type;
1554 vif->p2p = p2p;
1555
1556 ath9k_do_vif_add_setup(hw, vif);
1557 out:
1558 ath9k_ps_restore(sc);
1559 mutex_unlock(&sc->mutex);
1560 return ret;
1561 }
1562
1563 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1564 struct ieee80211_vif *vif)
1565 {
1566 struct ath_softc *sc = hw->priv;
1567 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1568
1569 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1570
1571 ath9k_ps_wakeup(sc);
1572 mutex_lock(&sc->mutex);
1573
1574 sc->nvifs--;
1575
1576 /* Reclaim beacon resources */
1577 if (ath9k_uses_beacons(vif->type))
1578 ath9k_reclaim_beacon(sc, vif);
1579
1580 ath9k_calculate_summary_state(hw, NULL);
1581
1582 mutex_unlock(&sc->mutex);
1583 ath9k_ps_restore(sc);
1584 }
1585
1586 static void ath9k_enable_ps(struct ath_softc *sc)
1587 {
1588 struct ath_hw *ah = sc->sc_ah;
1589
1590 sc->ps_enabled = true;
1591 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1592 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1593 ah->imask |= ATH9K_INT_TIM_TIMER;
1594 ath9k_hw_set_interrupts(ah, ah->imask);
1595 }
1596 ath9k_hw_setrxabort(ah, 1);
1597 }
1598 }
1599
1600 static void ath9k_disable_ps(struct ath_softc *sc)
1601 {
1602 struct ath_hw *ah = sc->sc_ah;
1603
1604 sc->ps_enabled = false;
1605 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1606 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1607 ath9k_hw_setrxabort(ah, 0);
1608 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1609 PS_WAIT_FOR_CAB |
1610 PS_WAIT_FOR_PSPOLL_DATA |
1611 PS_WAIT_FOR_TX_ACK);
1612 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1613 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1614 ath9k_hw_set_interrupts(ah, ah->imask);
1615 }
1616 }
1617
1618 }
1619
1620 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1621 {
1622 struct ath_softc *sc = hw->priv;
1623 struct ath_hw *ah = sc->sc_ah;
1624 struct ath_common *common = ath9k_hw_common(ah);
1625 struct ieee80211_conf *conf = &hw->conf;
1626 bool disable_radio = false;
1627
1628 mutex_lock(&sc->mutex);
1629
1630 /*
1631 * Leave this as the first check because we need to turn on the
1632 * radio if it was disabled before prior to processing the rest
1633 * of the changes. Likewise we must only disable the radio towards
1634 * the end.
1635 */
1636 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1637 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1638 if (!sc->ps_idle) {
1639 ath_radio_enable(sc, hw);
1640 ath_dbg(common, ATH_DBG_CONFIG,
1641 "not-idle: enabling radio\n");
1642 } else {
1643 disable_radio = true;
1644 }
1645 }
1646
1647 /*
1648 * We just prepare to enable PS. We have to wait until our AP has
1649 * ACK'd our null data frame to disable RX otherwise we'll ignore
1650 * those ACKs and end up retransmitting the same null data frames.
1651 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1652 */
1653 if (changed & IEEE80211_CONF_CHANGE_PS) {
1654 unsigned long flags;
1655 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1656 if (conf->flags & IEEE80211_CONF_PS)
1657 ath9k_enable_ps(sc);
1658 else
1659 ath9k_disable_ps(sc);
1660 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1661 }
1662
1663 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1664 if (conf->flags & IEEE80211_CONF_MONITOR) {
1665 ath_dbg(common, ATH_DBG_CONFIG,
1666 "Monitor mode is enabled\n");
1667 sc->sc_ah->is_monitoring = true;
1668 } else {
1669 ath_dbg(common, ATH_DBG_CONFIG,
1670 "Monitor mode is disabled\n");
1671 sc->sc_ah->is_monitoring = false;
1672 }
1673 }
1674
1675 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1676 struct ieee80211_channel *curchan = hw->conf.channel;
1677 struct ath9k_channel old_chan;
1678 int pos = curchan->hw_value;
1679 int old_pos = -1;
1680 unsigned long flags;
1681
1682 if (ah->curchan)
1683 old_pos = ah->curchan - &ah->channels[0];
1684
1685 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1686 sc->sc_flags |= SC_OP_OFFCHANNEL;
1687 else
1688 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1689
1690 ath_dbg(common, ATH_DBG_CONFIG,
1691 "Set channel: %d MHz type: %d\n",
1692 curchan->center_freq, conf->channel_type);
1693
1694 /* update survey stats for the old channel before switching */
1695 spin_lock_irqsave(&common->cc_lock, flags);
1696 ath_update_survey_stats(sc);
1697 spin_unlock_irqrestore(&common->cc_lock, flags);
1698
1699 /*
1700 * Preserve the current channel values, before updating
1701 * the same channel
1702 */
1703 if (old_pos == pos) {
1704 memcpy(&old_chan, &sc->sc_ah->channels[pos],
1705 sizeof(struct ath9k_channel));
1706 ah->curchan = &old_chan;
1707 }
1708
1709 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1710 curchan, conf->channel_type);
1711
1712 /*
1713 * If the operating channel changes, change the survey in-use flags
1714 * along with it.
1715 * Reset the survey data for the new channel, unless we're switching
1716 * back to the operating channel from an off-channel operation.
1717 */
1718 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1719 sc->cur_survey != &sc->survey[pos]) {
1720
1721 if (sc->cur_survey)
1722 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1723
1724 sc->cur_survey = &sc->survey[pos];
1725
1726 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1727 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1728 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1729 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1730 }
1731
1732 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1733 ath_err(common, "Unable to set channel\n");
1734 mutex_unlock(&sc->mutex);
1735 return -EINVAL;
1736 }
1737
1738 /*
1739 * The most recent snapshot of channel->noisefloor for the old
1740 * channel is only available after the hardware reset. Copy it to
1741 * the survey stats now.
1742 */
1743 if (old_pos >= 0)
1744 ath_update_survey_nf(sc, old_pos);
1745 }
1746
1747 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1748 ath_dbg(common, ATH_DBG_CONFIG,
1749 "Set power: %d\n", conf->power_level);
1750 sc->config.txpowlimit = 2 * conf->power_level;
1751 ath9k_ps_wakeup(sc);
1752 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1753 sc->config.txpowlimit, &sc->curtxpow);
1754 ath9k_ps_restore(sc);
1755 }
1756
1757 if (disable_radio) {
1758 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1759 ath_radio_disable(sc, hw);
1760 }
1761
1762 mutex_unlock(&sc->mutex);
1763
1764 return 0;
1765 }
1766
1767 #define SUPPORTED_FILTERS \
1768 (FIF_PROMISC_IN_BSS | \
1769 FIF_ALLMULTI | \
1770 FIF_CONTROL | \
1771 FIF_PSPOLL | \
1772 FIF_OTHER_BSS | \
1773 FIF_BCN_PRBRESP_PROMISC | \
1774 FIF_PROBE_REQ | \
1775 FIF_FCSFAIL)
1776
1777 /* FIXME: sc->sc_full_reset ? */
1778 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1779 unsigned int changed_flags,
1780 unsigned int *total_flags,
1781 u64 multicast)
1782 {
1783 struct ath_softc *sc = hw->priv;
1784 u32 rfilt;
1785
1786 changed_flags &= SUPPORTED_FILTERS;
1787 *total_flags &= SUPPORTED_FILTERS;
1788
1789 sc->rx.rxfilter = *total_flags;
1790 ath9k_ps_wakeup(sc);
1791 rfilt = ath_calcrxfilter(sc);
1792 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1793 ath9k_ps_restore(sc);
1794
1795 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1796 "Set HW RX filter: 0x%x\n", rfilt);
1797 }
1798
1799 static int ath9k_sta_add(struct ieee80211_hw *hw,
1800 struct ieee80211_vif *vif,
1801 struct ieee80211_sta *sta)
1802 {
1803 struct ath_softc *sc = hw->priv;
1804 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1805 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1806 struct ieee80211_key_conf ps_key = { };
1807
1808 ath_node_attach(sc, sta);
1809
1810 if (vif->type != NL80211_IFTYPE_AP &&
1811 vif->type != NL80211_IFTYPE_AP_VLAN)
1812 return 0;
1813
1814 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1815
1816 return 0;
1817 }
1818
1819 static void ath9k_del_ps_key(struct ath_softc *sc,
1820 struct ieee80211_vif *vif,
1821 struct ieee80211_sta *sta)
1822 {
1823 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1824 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1825 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1826
1827 if (!an->ps_key)
1828 return;
1829
1830 ath_key_delete(common, &ps_key);
1831 }
1832
1833 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1834 struct ieee80211_vif *vif,
1835 struct ieee80211_sta *sta)
1836 {
1837 struct ath_softc *sc = hw->priv;
1838
1839 ath9k_del_ps_key(sc, vif, sta);
1840 ath_node_detach(sc, sta);
1841
1842 return 0;
1843 }
1844
1845 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1846 struct ieee80211_vif *vif,
1847 enum sta_notify_cmd cmd,
1848 struct ieee80211_sta *sta)
1849 {
1850 struct ath_softc *sc = hw->priv;
1851 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1852
1853 switch (cmd) {
1854 case STA_NOTIFY_SLEEP:
1855 an->sleeping = true;
1856 if (ath_tx_aggr_sleep(sc, an))
1857 ieee80211_sta_set_tim(sta);
1858 break;
1859 case STA_NOTIFY_AWAKE:
1860 an->sleeping = false;
1861 ath_tx_aggr_wakeup(sc, an);
1862 break;
1863 }
1864 }
1865
1866 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1867 const struct ieee80211_tx_queue_params *params)
1868 {
1869 struct ath_softc *sc = hw->priv;
1870 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1871 struct ath_txq *txq;
1872 struct ath9k_tx_queue_info qi;
1873 int ret = 0;
1874
1875 if (queue >= WME_NUM_AC)
1876 return 0;
1877
1878 txq = sc->tx.txq_map[queue];
1879
1880 ath9k_ps_wakeup(sc);
1881 mutex_lock(&sc->mutex);
1882
1883 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1884
1885 qi.tqi_aifs = params->aifs;
1886 qi.tqi_cwmin = params->cw_min;
1887 qi.tqi_cwmax = params->cw_max;
1888 qi.tqi_burstTime = params->txop;
1889
1890 ath_dbg(common, ATH_DBG_CONFIG,
1891 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1892 queue, txq->axq_qnum, params->aifs, params->cw_min,
1893 params->cw_max, params->txop);
1894
1895 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1896 if (ret)
1897 ath_err(common, "TXQ Update failed\n");
1898
1899 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1900 if (queue == WME_AC_BE && !ret)
1901 ath_beaconq_config(sc);
1902
1903 mutex_unlock(&sc->mutex);
1904 ath9k_ps_restore(sc);
1905
1906 return ret;
1907 }
1908
1909 static int ath9k_set_key(struct ieee80211_hw *hw,
1910 enum set_key_cmd cmd,
1911 struct ieee80211_vif *vif,
1912 struct ieee80211_sta *sta,
1913 struct ieee80211_key_conf *key)
1914 {
1915 struct ath_softc *sc = hw->priv;
1916 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1917 int ret = 0;
1918
1919 if (ath9k_modparam_nohwcrypt)
1920 return -ENOSPC;
1921
1922 if (vif->type == NL80211_IFTYPE_ADHOC &&
1923 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1924 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1925 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1926 /*
1927 * For now, disable hw crypto for the RSN IBSS group keys. This
1928 * could be optimized in the future to use a modified key cache
1929 * design to support per-STA RX GTK, but until that gets
1930 * implemented, use of software crypto for group addressed
1931 * frames is a acceptable to allow RSN IBSS to be used.
1932 */
1933 return -EOPNOTSUPP;
1934 }
1935
1936 mutex_lock(&sc->mutex);
1937 ath9k_ps_wakeup(sc);
1938 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1939
1940 switch (cmd) {
1941 case SET_KEY:
1942 if (sta)
1943 ath9k_del_ps_key(sc, vif, sta);
1944
1945 ret = ath_key_config(common, vif, sta, key);
1946 if (ret >= 0) {
1947 key->hw_key_idx = ret;
1948 /* push IV and Michael MIC generation to stack */
1949 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1950 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1951 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1952 if (sc->sc_ah->sw_mgmt_crypto &&
1953 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1954 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1955 ret = 0;
1956 }
1957 break;
1958 case DISABLE_KEY:
1959 ath_key_delete(common, key);
1960 break;
1961 default:
1962 ret = -EINVAL;
1963 }
1964
1965 ath9k_ps_restore(sc);
1966 mutex_unlock(&sc->mutex);
1967
1968 return ret;
1969 }
1970 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1971 {
1972 struct ath_softc *sc = data;
1973 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1974 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1975 struct ath_vif *avp = (void *)vif->drv_priv;
1976
1977 /*
1978 * Skip iteration if primary station vif's bss info
1979 * was not changed
1980 */
1981 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1982 return;
1983
1984 if (bss_conf->assoc) {
1985 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1986 avp->primary_sta_vif = true;
1987 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1988 common->curaid = bss_conf->aid;
1989 ath9k_hw_write_associd(sc->sc_ah);
1990 ath_dbg(common, ATH_DBG_CONFIG,
1991 "Bss Info ASSOC %d, bssid: %pM\n",
1992 bss_conf->aid, common->curbssid);
1993 ath_beacon_config(sc, vif);
1994 /*
1995 * Request a re-configuration of Beacon related timers
1996 * on the receipt of the first Beacon frame (i.e.,
1997 * after time sync with the AP).
1998 */
1999 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
2000 /* Reset rssi stats */
2001 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
2002 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2003
2004 if (!common->disable_ani) {
2005 sc->sc_flags |= SC_OP_ANI_RUN;
2006 ath_start_ani(common);
2007 }
2008
2009 }
2010 }
2011
2012 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2013 {
2014 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2015 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2016 struct ath_vif *avp = (void *)vif->drv_priv;
2017
2018 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2019 return;
2020
2021 /* Reconfigure bss info */
2022 if (avp->primary_sta_vif && !bss_conf->assoc) {
2023 ath_dbg(common, ATH_DBG_CONFIG,
2024 "Bss Info DISASSOC %d, bssid %pM\n",
2025 common->curaid, common->curbssid);
2026 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2027 avp->primary_sta_vif = false;
2028 memset(common->curbssid, 0, ETH_ALEN);
2029 common->curaid = 0;
2030 }
2031
2032 ieee80211_iterate_active_interfaces_atomic(
2033 sc->hw, ath9k_bss_iter, sc);
2034
2035 /*
2036 * None of station vifs are associated.
2037 * Clear bssid & aid
2038 */
2039 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2040 ath9k_hw_write_associd(sc->sc_ah);
2041 /* Stop ANI */
2042 sc->sc_flags &= ~SC_OP_ANI_RUN;
2043 del_timer_sync(&common->ani.timer);
2044 }
2045 }
2046
2047 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2048 struct ieee80211_vif *vif,
2049 struct ieee80211_bss_conf *bss_conf,
2050 u32 changed)
2051 {
2052 struct ath_softc *sc = hw->priv;
2053 struct ath_hw *ah = sc->sc_ah;
2054 struct ath_common *common = ath9k_hw_common(ah);
2055 struct ath_vif *avp = (void *)vif->drv_priv;
2056 int slottime;
2057 int error;
2058
2059 ath9k_ps_wakeup(sc);
2060 mutex_lock(&sc->mutex);
2061
2062 if (changed & BSS_CHANGED_BSSID) {
2063 ath9k_config_bss(sc, vif);
2064
2065 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2066 common->curbssid, common->curaid);
2067 }
2068
2069 if (changed & BSS_CHANGED_IBSS) {
2070 /* There can be only one vif available */
2071 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2072 common->curaid = bss_conf->aid;
2073 ath9k_hw_write_associd(sc->sc_ah);
2074
2075 if (bss_conf->ibss_joined) {
2076 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2077
2078 if (!common->disable_ani) {
2079 sc->sc_flags |= SC_OP_ANI_RUN;
2080 ath_start_ani(common);
2081 }
2082
2083 } else {
2084 sc->sc_flags &= ~SC_OP_ANI_RUN;
2085 del_timer_sync(&common->ani.timer);
2086 }
2087 }
2088
2089 /* Enable transmission of beacons (AP, IBSS, MESH) */
2090 if ((changed & BSS_CHANGED_BEACON) ||
2091 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2092 ath9k_set_beaconing_status(sc, false);
2093 error = ath_beacon_alloc(sc, vif);
2094 if (!error)
2095 ath_beacon_config(sc, vif);
2096 ath9k_set_beaconing_status(sc, true);
2097 }
2098
2099 if (changed & BSS_CHANGED_ERP_SLOT) {
2100 if (bss_conf->use_short_slot)
2101 slottime = 9;
2102 else
2103 slottime = 20;
2104 if (vif->type == NL80211_IFTYPE_AP) {
2105 /*
2106 * Defer update, so that connected stations can adjust
2107 * their settings at the same time.
2108 * See beacon.c for more details
2109 */
2110 sc->beacon.slottime = slottime;
2111 sc->beacon.updateslot = UPDATE;
2112 } else {
2113 ah->slottime = slottime;
2114 ath9k_hw_init_global_settings(ah);
2115 }
2116 }
2117
2118 /* Disable transmission of beacons */
2119 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2120 !bss_conf->enable_beacon) {
2121 ath9k_set_beaconing_status(sc, false);
2122 avp->is_bslot_active = false;
2123 ath9k_set_beaconing_status(sc, true);
2124 }
2125
2126 if (changed & BSS_CHANGED_BEACON_INT) {
2127 /*
2128 * In case of AP mode, the HW TSF has to be reset
2129 * when the beacon interval changes.
2130 */
2131 if (vif->type == NL80211_IFTYPE_AP) {
2132 sc->sc_flags |= SC_OP_TSF_RESET;
2133 ath9k_set_beaconing_status(sc, false);
2134 error = ath_beacon_alloc(sc, vif);
2135 if (!error)
2136 ath_beacon_config(sc, vif);
2137 ath9k_set_beaconing_status(sc, true);
2138 } else
2139 ath_beacon_config(sc, vif);
2140 }
2141
2142 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2143 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2144 bss_conf->use_short_preamble);
2145 if (bss_conf->use_short_preamble)
2146 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2147 else
2148 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2149 }
2150
2151 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2152 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2153 bss_conf->use_cts_prot);
2154 if (bss_conf->use_cts_prot &&
2155 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2156 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2157 else
2158 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2159 }
2160
2161 mutex_unlock(&sc->mutex);
2162 ath9k_ps_restore(sc);
2163 }
2164
2165 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2166 {
2167 struct ath_softc *sc = hw->priv;
2168 u64 tsf;
2169
2170 mutex_lock(&sc->mutex);
2171 ath9k_ps_wakeup(sc);
2172 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2173 ath9k_ps_restore(sc);
2174 mutex_unlock(&sc->mutex);
2175
2176 return tsf;
2177 }
2178
2179 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2180 {
2181 struct ath_softc *sc = hw->priv;
2182
2183 mutex_lock(&sc->mutex);
2184 ath9k_ps_wakeup(sc);
2185 ath9k_hw_settsf64(sc->sc_ah, tsf);
2186 ath9k_ps_restore(sc);
2187 mutex_unlock(&sc->mutex);
2188 }
2189
2190 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2191 {
2192 struct ath_softc *sc = hw->priv;
2193
2194 mutex_lock(&sc->mutex);
2195
2196 ath9k_ps_wakeup(sc);
2197 ath9k_hw_reset_tsf(sc->sc_ah);
2198 ath9k_ps_restore(sc);
2199
2200 mutex_unlock(&sc->mutex);
2201 }
2202
2203 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2204 struct ieee80211_vif *vif,
2205 enum ieee80211_ampdu_mlme_action action,
2206 struct ieee80211_sta *sta,
2207 u16 tid, u16 *ssn, u8 buf_size)
2208 {
2209 struct ath_softc *sc = hw->priv;
2210 int ret = 0;
2211
2212 local_bh_disable();
2213
2214 switch (action) {
2215 case IEEE80211_AMPDU_RX_START:
2216 if (!(sc->sc_flags & SC_OP_RXAGGR))
2217 ret = -ENOTSUPP;
2218 break;
2219 case IEEE80211_AMPDU_RX_STOP:
2220 break;
2221 case IEEE80211_AMPDU_TX_START:
2222 if (!(sc->sc_flags & SC_OP_TXAGGR))
2223 return -EOPNOTSUPP;
2224
2225 ath9k_ps_wakeup(sc);
2226 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2227 if (!ret)
2228 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2229 ath9k_ps_restore(sc);
2230 break;
2231 case IEEE80211_AMPDU_TX_STOP:
2232 ath9k_ps_wakeup(sc);
2233 ath_tx_aggr_stop(sc, sta, tid);
2234 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2235 ath9k_ps_restore(sc);
2236 break;
2237 case IEEE80211_AMPDU_TX_OPERATIONAL:
2238 ath9k_ps_wakeup(sc);
2239 ath_tx_aggr_resume(sc, sta, tid);
2240 ath9k_ps_restore(sc);
2241 break;
2242 default:
2243 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2244 }
2245
2246 local_bh_enable();
2247
2248 return ret;
2249 }
2250
2251 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2252 struct survey_info *survey)
2253 {
2254 struct ath_softc *sc = hw->priv;
2255 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2256 struct ieee80211_supported_band *sband;
2257 struct ieee80211_channel *chan;
2258 unsigned long flags;
2259 int pos;
2260
2261 spin_lock_irqsave(&common->cc_lock, flags);
2262 if (idx == 0)
2263 ath_update_survey_stats(sc);
2264
2265 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2266 if (sband && idx >= sband->n_channels) {
2267 idx -= sband->n_channels;
2268 sband = NULL;
2269 }
2270
2271 if (!sband)
2272 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2273
2274 if (!sband || idx >= sband->n_channels) {
2275 spin_unlock_irqrestore(&common->cc_lock, flags);
2276 return -ENOENT;
2277 }
2278
2279 chan = &sband->channels[idx];
2280 pos = chan->hw_value;
2281 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2282 survey->channel = chan;
2283 spin_unlock_irqrestore(&common->cc_lock, flags);
2284
2285 return 0;
2286 }
2287
2288 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2289 {
2290 struct ath_softc *sc = hw->priv;
2291 struct ath_hw *ah = sc->sc_ah;
2292
2293 mutex_lock(&sc->mutex);
2294 ah->coverage_class = coverage_class;
2295 ath9k_hw_init_global_settings(ah);
2296 mutex_unlock(&sc->mutex);
2297 }
2298
2299 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2300 {
2301 struct ath_softc *sc = hw->priv;
2302 struct ath_hw *ah = sc->sc_ah;
2303 struct ath_common *common = ath9k_hw_common(ah);
2304 int timeout = 200; /* ms */
2305 int i, j;
2306 bool drain_txq;
2307
2308 mutex_lock(&sc->mutex);
2309 cancel_delayed_work_sync(&sc->tx_complete_work);
2310
2311 if (sc->sc_flags & SC_OP_INVALID) {
2312 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2313 mutex_unlock(&sc->mutex);
2314 return;
2315 }
2316
2317 if (drop)
2318 timeout = 1;
2319
2320 for (j = 0; j < timeout; j++) {
2321 bool npend = false;
2322
2323 if (j)
2324 usleep_range(1000, 2000);
2325
2326 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2327 if (!ATH_TXQ_SETUP(sc, i))
2328 continue;
2329
2330 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2331
2332 if (npend)
2333 break;
2334 }
2335
2336 if (!npend)
2337 goto out;
2338 }
2339
2340 ath9k_ps_wakeup(sc);
2341 spin_lock_bh(&sc->sc_pcu_lock);
2342 drain_txq = ath_drain_all_txq(sc, false);
2343 if (!drain_txq)
2344 ath_reset(sc, false);
2345 spin_unlock_bh(&sc->sc_pcu_lock);
2346 ath9k_ps_restore(sc);
2347 ieee80211_wake_queues(hw);
2348
2349 out:
2350 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2351 mutex_unlock(&sc->mutex);
2352 }
2353
2354 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2355 {
2356 struct ath_softc *sc = hw->priv;
2357 int i;
2358
2359 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2360 if (!ATH_TXQ_SETUP(sc, i))
2361 continue;
2362
2363 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2364 return true;
2365 }
2366 return false;
2367 }
2368
2369 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2370 {
2371 struct ath_softc *sc = hw->priv;
2372 struct ath_hw *ah = sc->sc_ah;
2373 struct ieee80211_vif *vif;
2374 struct ath_vif *avp;
2375 struct ath_buf *bf;
2376 struct ath_tx_status ts;
2377 int status;
2378
2379 vif = sc->beacon.bslot[0];
2380 if (!vif)
2381 return 0;
2382
2383 avp = (void *)vif->drv_priv;
2384 if (!avp->is_bslot_active)
2385 return 0;
2386
2387 if (!sc->beacon.tx_processed) {
2388 tasklet_disable(&sc->bcon_tasklet);
2389
2390 bf = avp->av_bcbuf;
2391 if (!bf || !bf->bf_mpdu)
2392 goto skip;
2393
2394 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2395 if (status == -EINPROGRESS)
2396 goto skip;
2397
2398 sc->beacon.tx_processed = true;
2399 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2400
2401 skip:
2402 tasklet_enable(&sc->bcon_tasklet);
2403 }
2404
2405 return sc->beacon.tx_last;
2406 }
2407
2408 static int ath9k_get_stats(struct ieee80211_hw *hw,
2409 struct ieee80211_low_level_stats *stats)
2410 {
2411 struct ath_softc *sc = hw->priv;
2412 struct ath_hw *ah = sc->sc_ah;
2413 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2414
2415 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2416 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2417 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2418 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2419 return 0;
2420 }
2421
2422 struct ieee80211_ops ath9k_ops = {
2423 .tx = ath9k_tx,
2424 .start = ath9k_start,
2425 .stop = ath9k_stop,
2426 .add_interface = ath9k_add_interface,
2427 .change_interface = ath9k_change_interface,
2428 .remove_interface = ath9k_remove_interface,
2429 .config = ath9k_config,
2430 .configure_filter = ath9k_configure_filter,
2431 .sta_add = ath9k_sta_add,
2432 .sta_remove = ath9k_sta_remove,
2433 .sta_notify = ath9k_sta_notify,
2434 .conf_tx = ath9k_conf_tx,
2435 .bss_info_changed = ath9k_bss_info_changed,
2436 .set_key = ath9k_set_key,
2437 .get_tsf = ath9k_get_tsf,
2438 .set_tsf = ath9k_set_tsf,
2439 .reset_tsf = ath9k_reset_tsf,
2440 .ampdu_action = ath9k_ampdu_action,
2441 .get_survey = ath9k_get_survey,
2442 .rfkill_poll = ath9k_rfkill_poll_state,
2443 .set_coverage_class = ath9k_set_coverage_class,
2444 .flush = ath9k_flush,
2445 .tx_frames_pending = ath9k_tx_frames_pending,
2446 .tx_last_beacon = ath9k_tx_last_beacon,
2447 .get_stats = ath9k_get_stats,
2448 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree