[PATCH] SCTP: Always linearise packet on input
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-pnx4008 / core.c
blob3d73c1e937529f03878ca6803dbc4872891458e9
1 /*
2 * arch/arm/mach-pnx4008/core.c
4 * PNX4008 core startup code
6 * Authors: Vitaly Wool, Dmitry Chigirev,
7 * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
9 * Based on reference code received from Philips:
10 * Copyright (C) 2003 Philips Semiconductors
12 * 2005 (c) MontaVista Software, Inc. This file is licensed under
13 * the terms of the GNU General Public License version 2. This program
14 * is licensed "as is" without any warranty of any kind, whether express
15 * or implied.
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/mm.h>
21 #include <linux/interrupt.h>
22 #include <linux/list.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/serial_8250.h>
26 #include <linux/device.h>
27 #include <linux/spi/spi.h>
29 #include <asm/hardware.h>
30 #include <asm/io.h>
31 #include <asm/setup.h>
32 #include <asm/mach-types.h>
33 #include <asm/pgtable.h>
34 #include <asm/page.h>
35 #include <asm/system.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/time.h>
41 #include <asm/arch/irq.h>
42 #include <asm/arch/clock.h>
43 #include <asm/arch/dma.h>
45 struct resource spipnx_0_resources[] = {
47 .start = PNX4008_SPI1_BASE,
48 .end = PNX4008_SPI1_BASE + SZ_4K,
49 .flags = IORESOURCE_MEM,
50 }, {
51 .start = PER_SPI1_REC_XMIT,
52 .flags = IORESOURCE_DMA,
53 }, {
54 .start = SPI1_INT,
55 .flags = IORESOURCE_IRQ,
56 }, {
57 .flags = 0,
61 struct resource spipnx_1_resources[] = {
63 .start = PNX4008_SPI2_BASE,
64 .end = PNX4008_SPI2_BASE + SZ_4K,
65 .flags = IORESOURCE_MEM,
66 }, {
67 .start = PER_SPI2_REC_XMIT,
68 .flags = IORESOURCE_DMA,
69 }, {
70 .start = SPI2_INT,
71 .flags = IORESOURCE_IRQ,
72 }, {
73 .flags = 0,
77 static struct spi_board_info spi_board_info[] __initdata = {
79 .modalias = "m25p80",
80 .max_speed_hz = 1000000,
81 .bus_num = 1,
82 .chip_select = 0,
86 static struct platform_device spipnx_1 = {
87 .name = "spipnx",
88 .id = 1,
89 .num_resources = ARRAY_SIZE(spipnx_0_resources),
90 .resource = spipnx_0_resources,
91 .dev = {
92 .coherent_dma_mask = 0xFFFFFFFF,
96 static struct platform_device spipnx_2 = {
97 .name = "spipnx",
98 .id = 2,
99 .num_resources = ARRAY_SIZE(spipnx_1_resources),
100 .resource = spipnx_1_resources,
101 .dev = {
102 .coherent_dma_mask = 0xFFFFFFFF,
106 static struct plat_serial8250_port platform_serial_ports[] = {
108 .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)),
109 .mapbase = (unsigned long)PNX4008_UART5_BASE,
110 .irq = IIR5_INT,
111 .uartclk = PNX4008_UART_CLK,
112 .regshift = 2,
113 .iotype = UPIO_MEM,
114 .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
117 .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)),
118 .mapbase = (unsigned long)PNX4008_UART3_BASE,
119 .irq = IIR3_INT,
120 .uartclk = PNX4008_UART_CLK,
121 .regshift = 2,
122 .iotype = UPIO_MEM,
123 .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
128 static struct platform_device serial_device = {
129 .name = "serial8250",
130 .id = PLAT8250_DEV_PLATFORM,
131 .dev = {
132 .platform_data = &platform_serial_ports,
136 static struct platform_device *devices[] __initdata = {
137 &spipnx_1,
138 &spipnx_2,
139 &serial_device,
143 extern void pnx4008_uart_init(void);
145 static void __init pnx4008_init(void)
147 /*disable all START interrupt sources,
148 and clear all START interrupt flags */
149 __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT));
150 __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT));
151 __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
152 __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
154 platform_add_devices(devices, ARRAY_SIZE(devices));
155 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
156 /* Switch on the UART clocks */
157 pnx4008_uart_init();
160 static struct map_desc pnx4008_io_desc[] __initdata = {
162 .virtual = IO_ADDRESS(PNX4008_IRAM_BASE),
163 .pfn = __phys_to_pfn(PNX4008_IRAM_BASE),
164 .length = SZ_64K,
165 .type = MT_DEVICE,
166 }, {
167 .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE),
168 .pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE),
169 .length = SZ_1M - SZ_128K,
170 .type = MT_DEVICE,
171 }, {
172 .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE),
173 .pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE),
174 .length = SZ_128K * 3,
175 .type = MT_DEVICE,
176 }, {
177 .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE),
178 .pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE),
179 .length = SZ_1M,
180 .type = MT_DEVICE,
181 }, {
182 .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
183 .pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE),
184 .length = SZ_1M,
185 .type = MT_DEVICE,
189 void __init pnx4008_map_io(void)
191 iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
194 extern struct sys_timer pnx4008_timer;
196 MACHINE_START(PNX4008, "Philips PNX4008")
197 /* Maintainer: MontaVista Software Inc. */
198 .phys_io = 0x40090000,
199 .io_pg_offst = (0xf4090000 >> 18) & 0xfffc,
200 .boot_params = 0x80000100,
201 .map_io = pnx4008_map_io,
202 .init_irq = pnx4008_init_irq,
203 .init_machine = pnx4008_init,
204 .timer = &pnx4008_timer,
205 MACHINE_END