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qeth: Cleanup for cast-type determination.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / s390 / net / qeth_core_main.c
blob1560bb621a3b384583084bad4e1dae98b1a2cd7f
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26
27 #include "qeth_core.h"
28
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
31 /* N P A M L V H */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
46 };
47 EXPORT_SYMBOL_GPL(qeth_dbf);
48
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
53
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
57
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
65
66
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
70 {
71 struct skb_frag_struct *frag;
72 int fragno;
73 unsigned long addr;
74 int element, cnt, dlen;
75
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
78 dlen = 0;
79
80 if (is_tso)
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
83 else
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
87 if (dlen) {
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
90 element++;
91 }
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
95 frag->page_offset;
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
101 else
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
104 element++;
105 }
106 *next_element_to_fill = element;
107 }
108
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
110 {
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
117 default:
118 return " unknown";
119 }
120 } else {
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
127 return " OSN QDIO";
128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133 }
134
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
137 {
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
144 default:
145 return "unknown";
146 }
147 } else {
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
152 return "OSD_100";
153 case QETH_LINK_TYPE_HSTR:
154 return "HSTR";
155 case QETH_LINK_TYPE_GBIT_ETH:
156 return "OSD_1000";
157 case QETH_LINK_TYPE_10GBIT_ETH:
158 return "OSD_10GIG";
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
167 default:
168 return "OSD_Express";
169 }
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
173 return "OSN";
174 default:
175 return "unknown";
176 }
177 }
178 return "n/a";
179 }
180
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
183 {
184 unsigned long flags;
185
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
192 }
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
194
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
196 {
197 unsigned long flags;
198 int rc = 0;
199
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 return rc;
204 }
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
206
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
208 {
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
211 }
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
213
214 void qeth_clear_working_pool_list(struct qeth_card *card)
215 {
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
217
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
222 }
223 }
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
225
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
227 {
228 struct qeth_buffer_pool_entry *pool_entry;
229 void *ptr;
230 int i, j;
231
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
235 if (!pool_entry) {
236 qeth_free_buffer_pool(card);
237 return -ENOMEM;
238 }
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
241 if (!ptr) {
242 while (j > 0)
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
245 kfree(pool_entry);
246 qeth_free_buffer_pool(card);
247 return -ENOMEM;
248 }
249 pool_entry->elements[j] = ptr;
250 }
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
253 }
254 return 0;
255 }
256
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
258 {
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
260
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
263 return -EPERM;
264
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
271 }
272
273 int qeth_set_large_send(struct qeth_card *card,
274 enum qeth_large_send_types type)
275 {
276 int rc = 0;
277
278 if (card->dev == NULL) {
279 card->options.large_send = type;
280 return 0;
281 }
282 if (card->state == CARD_STATE_UP)
283 netif_tx_disable(card->dev);
284 card->options.large_send = type;
285 switch (card->options.large_send) {
286 case QETH_LARGE_SEND_TSO:
287 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
288 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
289 NETIF_F_HW_CSUM;
290 } else {
291 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
292 NETIF_F_HW_CSUM);
293 card->options.large_send = QETH_LARGE_SEND_NO;
294 rc = -EOPNOTSUPP;
295 }
296 break;
297 default: /* includes QETH_LARGE_SEND_NO */
298 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
299 NETIF_F_HW_CSUM);
300 break;
301 }
302 if (card->state == CARD_STATE_UP)
303 netif_wake_queue(card->dev);
304 return rc;
305 }
306 EXPORT_SYMBOL_GPL(qeth_set_large_send);
307
308 static int qeth_issue_next_read(struct qeth_card *card)
309 {
310 int rc;
311 struct qeth_cmd_buffer *iob;
312
313 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
314 if (card->read.state != CH_STATE_UP)
315 return -EIO;
316 iob = qeth_get_buffer(&card->read);
317 if (!iob) {
318 dev_warn(&card->gdev->dev, "The qeth device driver "
319 "failed to recover an error on the device\n");
320 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
321 "available\n", dev_name(&card->gdev->dev));
322 return -ENOMEM;
323 }
324 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
325 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
326 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
327 (addr_t) iob, 0, 0);
328 if (rc) {
329 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
330 "rc=%i\n", dev_name(&card->gdev->dev), rc);
331 atomic_set(&card->read.irq_pending, 0);
332 qeth_schedule_recovery(card);
333 wake_up(&card->wait_q);
334 }
335 return rc;
336 }
337
338 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
339 {
340 struct qeth_reply *reply;
341
342 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
343 if (reply) {
344 atomic_set(&reply->refcnt, 1);
345 atomic_set(&reply->received, 0);
346 reply->card = card;
347 };
348 return reply;
349 }
350
351 static void qeth_get_reply(struct qeth_reply *reply)
352 {
353 WARN_ON(atomic_read(&reply->refcnt) <= 0);
354 atomic_inc(&reply->refcnt);
355 }
356
357 static void qeth_put_reply(struct qeth_reply *reply)
358 {
359 WARN_ON(atomic_read(&reply->refcnt) <= 0);
360 if (atomic_dec_and_test(&reply->refcnt))
361 kfree(reply);
362 }
363
364 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
365 struct qeth_card *card)
366 {
367 char *ipa_name;
368 int com = cmd->hdr.command;
369 ipa_name = qeth_get_ipa_cmd_name(com);
370 if (rc)
371 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
372 ipa_name, com, QETH_CARD_IFNAME(card),
373 rc, qeth_get_ipa_msg(rc));
374 else
375 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
376 ipa_name, com, QETH_CARD_IFNAME(card));
377 }
378
379 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
380 struct qeth_cmd_buffer *iob)
381 {
382 struct qeth_ipa_cmd *cmd = NULL;
383
384 QETH_DBF_TEXT(TRACE, 5, "chkipad");
385 if (IS_IPA(iob->data)) {
386 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
387 if (IS_IPA_REPLY(cmd)) {
388 if (cmd->hdr.command < IPA_CMD_SETCCID ||
389 cmd->hdr.command > IPA_CMD_MODCCID)
390 qeth_issue_ipa_msg(cmd,
391 cmd->hdr.return_code, card);
392 return cmd;
393 } else {
394 switch (cmd->hdr.command) {
395 case IPA_CMD_STOPLAN:
396 dev_warn(&card->gdev->dev,
397 "The link for interface %s on CHPID"
398 " 0x%X failed\n",
399 QETH_CARD_IFNAME(card),
400 card->info.chpid);
401 card->lan_online = 0;
402 if (card->dev && netif_carrier_ok(card->dev))
403 netif_carrier_off(card->dev);
404 return NULL;
405 case IPA_CMD_STARTLAN:
406 dev_info(&card->gdev->dev,
407 "The link for %s on CHPID 0x%X has"
408 " been restored\n",
409 QETH_CARD_IFNAME(card),
410 card->info.chpid);
411 netif_carrier_on(card->dev);
412 card->lan_online = 1;
413 qeth_schedule_recovery(card);
414 return NULL;
415 case IPA_CMD_MODCCID:
416 return cmd;
417 case IPA_CMD_REGISTER_LOCAL_ADDR:
418 QETH_DBF_TEXT(TRACE, 3, "irla");
419 break;
420 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
421 QETH_DBF_TEXT(TRACE, 3, "urla");
422 break;
423 default:
424 QETH_DBF_MESSAGE(2, "Received data is IPA "
425 "but not a reply!\n");
426 break;
427 }
428 }
429 }
430 return cmd;
431 }
432
433 void qeth_clear_ipacmd_list(struct qeth_card *card)
434 {
435 struct qeth_reply *reply, *r;
436 unsigned long flags;
437
438 QETH_DBF_TEXT(TRACE, 4, "clipalst");
439
440 spin_lock_irqsave(&card->lock, flags);
441 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
442 qeth_get_reply(reply);
443 reply->rc = -EIO;
444 atomic_inc(&reply->received);
445 list_del_init(&reply->list);
446 wake_up(&reply->wait_q);
447 qeth_put_reply(reply);
448 }
449 spin_unlock_irqrestore(&card->lock, flags);
450 }
451 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
452
453 static int qeth_check_idx_response(unsigned char *buffer)
454 {
455 if (!buffer)
456 return 0;
457
458 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
459 if ((buffer[2] & 0xc0) == 0xc0) {
460 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
461 "with cause code 0x%02x%s\n",
462 buffer[4],
463 ((buffer[4] == 0x22) ?
464 " -- try another portname" : ""));
465 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
466 QETH_DBF_TEXT(TRACE, 2, " idxterm");
467 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
468 return -EIO;
469 }
470 return 0;
471 }
472
473 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
474 __u32 len)
475 {
476 struct qeth_card *card;
477
478 QETH_DBF_TEXT(TRACE, 4, "setupccw");
479 card = CARD_FROM_CDEV(channel->ccwdev);
480 if (channel == &card->read)
481 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
482 else
483 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
484 channel->ccw.count = len;
485 channel->ccw.cda = (__u32) __pa(iob);
486 }
487
488 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
489 {
490 __u8 index;
491
492 QETH_DBF_TEXT(TRACE, 6, "getbuff");
493 index = channel->io_buf_no;
494 do {
495 if (channel->iob[index].state == BUF_STATE_FREE) {
496 channel->iob[index].state = BUF_STATE_LOCKED;
497 channel->io_buf_no = (channel->io_buf_no + 1) %
498 QETH_CMD_BUFFER_NO;
499 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
500 return channel->iob + index;
501 }
502 index = (index + 1) % QETH_CMD_BUFFER_NO;
503 } while (index != channel->io_buf_no);
504
505 return NULL;
506 }
507
508 void qeth_release_buffer(struct qeth_channel *channel,
509 struct qeth_cmd_buffer *iob)
510 {
511 unsigned long flags;
512
513 QETH_DBF_TEXT(TRACE, 6, "relbuff");
514 spin_lock_irqsave(&channel->iob_lock, flags);
515 memset(iob->data, 0, QETH_BUFSIZE);
516 iob->state = BUF_STATE_FREE;
517 iob->callback = qeth_send_control_data_cb;
518 iob->rc = 0;
519 spin_unlock_irqrestore(&channel->iob_lock, flags);
520 }
521 EXPORT_SYMBOL_GPL(qeth_release_buffer);
522
523 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
524 {
525 struct qeth_cmd_buffer *buffer = NULL;
526 unsigned long flags;
527
528 spin_lock_irqsave(&channel->iob_lock, flags);
529 buffer = __qeth_get_buffer(channel);
530 spin_unlock_irqrestore(&channel->iob_lock, flags);
531 return buffer;
532 }
533
534 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
535 {
536 struct qeth_cmd_buffer *buffer;
537 wait_event(channel->wait_q,
538 ((buffer = qeth_get_buffer(channel)) != NULL));
539 return buffer;
540 }
541 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
542
543 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
544 {
545 int cnt;
546
547 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
548 qeth_release_buffer(channel, &channel->iob[cnt]);
549 channel->buf_no = 0;
550 channel->io_buf_no = 0;
551 }
552 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
553
554 static void qeth_send_control_data_cb(struct qeth_channel *channel,
555 struct qeth_cmd_buffer *iob)
556 {
557 struct qeth_card *card;
558 struct qeth_reply *reply, *r;
559 struct qeth_ipa_cmd *cmd;
560 unsigned long flags;
561 int keep_reply;
562
563 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
564
565 card = CARD_FROM_CDEV(channel->ccwdev);
566 if (qeth_check_idx_response(iob->data)) {
567 qeth_clear_ipacmd_list(card);
568 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
569 dev_err(&card->gdev->dev,
570 "The qeth device is not configured "
571 "for the OSI layer required by z/VM\n");
572 qeth_schedule_recovery(card);
573 goto out;
574 }
575
576 cmd = qeth_check_ipa_data(card, iob);
577 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
578 goto out;
579 /*in case of OSN : check if cmd is set */
580 if (card->info.type == QETH_CARD_TYPE_OSN &&
581 cmd &&
582 cmd->hdr.command != IPA_CMD_STARTLAN &&
583 card->osn_info.assist_cb != NULL) {
584 card->osn_info.assist_cb(card->dev, cmd);
585 goto out;
586 }
587
588 spin_lock_irqsave(&card->lock, flags);
589 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
590 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
591 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
592 qeth_get_reply(reply);
593 list_del_init(&reply->list);
594 spin_unlock_irqrestore(&card->lock, flags);
595 keep_reply = 0;
596 if (reply->callback != NULL) {
597 if (cmd) {
598 reply->offset = (__u16)((char *)cmd -
599 (char *)iob->data);
600 keep_reply = reply->callback(card,
601 reply,
602 (unsigned long)cmd);
603 } else
604 keep_reply = reply->callback(card,
605 reply,
606 (unsigned long)iob);
607 }
608 if (cmd)
609 reply->rc = (u16) cmd->hdr.return_code;
610 else if (iob->rc)
611 reply->rc = iob->rc;
612 if (keep_reply) {
613 spin_lock_irqsave(&card->lock, flags);
614 list_add_tail(&reply->list,
615 &card->cmd_waiter_list);
616 spin_unlock_irqrestore(&card->lock, flags);
617 } else {
618 atomic_inc(&reply->received);
619 wake_up(&reply->wait_q);
620 }
621 qeth_put_reply(reply);
622 goto out;
623 }
624 }
625 spin_unlock_irqrestore(&card->lock, flags);
626 out:
627 memcpy(&card->seqno.pdu_hdr_ack,
628 QETH_PDU_HEADER_SEQ_NO(iob->data),
629 QETH_SEQ_NO_LENGTH);
630 qeth_release_buffer(channel, iob);
631 }
632
633 static int qeth_setup_channel(struct qeth_channel *channel)
634 {
635 int cnt;
636
637 QETH_DBF_TEXT(SETUP, 2, "setupch");
638 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
639 channel->iob[cnt].data = (char *)
640 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
641 if (channel->iob[cnt].data == NULL)
642 break;
643 channel->iob[cnt].state = BUF_STATE_FREE;
644 channel->iob[cnt].channel = channel;
645 channel->iob[cnt].callback = qeth_send_control_data_cb;
646 channel->iob[cnt].rc = 0;
647 }
648 if (cnt < QETH_CMD_BUFFER_NO) {
649 while (cnt-- > 0)
650 kfree(channel->iob[cnt].data);
651 return -ENOMEM;
652 }
653 channel->buf_no = 0;
654 channel->io_buf_no = 0;
655 atomic_set(&channel->irq_pending, 0);
656 spin_lock_init(&channel->iob_lock);
657
658 init_waitqueue_head(&channel->wait_q);
659 return 0;
660 }
661
662 static int qeth_set_thread_start_bit(struct qeth_card *card,
663 unsigned long thread)
664 {
665 unsigned long flags;
666
667 spin_lock_irqsave(&card->thread_mask_lock, flags);
668 if (!(card->thread_allowed_mask & thread) ||
669 (card->thread_start_mask & thread)) {
670 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
671 return -EPERM;
672 }
673 card->thread_start_mask |= thread;
674 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
675 return 0;
676 }
677
678 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
679 {
680 unsigned long flags;
681
682 spin_lock_irqsave(&card->thread_mask_lock, flags);
683 card->thread_start_mask &= ~thread;
684 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
685 wake_up(&card->wait_q);
686 }
687 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
688
689 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
690 {
691 unsigned long flags;
692
693 spin_lock_irqsave(&card->thread_mask_lock, flags);
694 card->thread_running_mask &= ~thread;
695 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
696 wake_up(&card->wait_q);
697 }
698 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
699
700 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
701 {
702 unsigned long flags;
703 int rc = 0;
704
705 spin_lock_irqsave(&card->thread_mask_lock, flags);
706 if (card->thread_start_mask & thread) {
707 if ((card->thread_allowed_mask & thread) &&
708 !(card->thread_running_mask & thread)) {
709 rc = 1;
710 card->thread_start_mask &= ~thread;
711 card->thread_running_mask |= thread;
712 } else
713 rc = -EPERM;
714 }
715 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
716 return rc;
717 }
718
719 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
720 {
721 int rc = 0;
722
723 wait_event(card->wait_q,
724 (rc = __qeth_do_run_thread(card, thread)) >= 0);
725 return rc;
726 }
727 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
728
729 void qeth_schedule_recovery(struct qeth_card *card)
730 {
731 QETH_DBF_TEXT(TRACE, 2, "startrec");
732 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
733 schedule_work(&card->kernel_thread_starter);
734 }
735 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
736
737 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
738 {
739 int dstat, cstat;
740 char *sense;
741
742 sense = (char *) irb->ecw;
743 cstat = irb->scsw.cmd.cstat;
744 dstat = irb->scsw.cmd.dstat;
745
746 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
747 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
748 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
749 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
750 dev_warn(&cdev->dev, "The qeth device driver "
751 "failed to recover an error on the device\n");
752 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
753 dev_name(&cdev->dev), dstat, cstat);
754 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
755 16, 1, irb, 64, 1);
756 return 1;
757 }
758
759 if (dstat & DEV_STAT_UNIT_CHECK) {
760 if (sense[SENSE_RESETTING_EVENT_BYTE] &
761 SENSE_RESETTING_EVENT_FLAG) {
762 QETH_DBF_TEXT(TRACE, 2, "REVIND");
763 return 1;
764 }
765 if (sense[SENSE_COMMAND_REJECT_BYTE] &
766 SENSE_COMMAND_REJECT_FLAG) {
767 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
768 return 1;
769 }
770 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
771 QETH_DBF_TEXT(TRACE, 2, "AFFE");
772 return 1;
773 }
774 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
775 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
776 return 0;
777 }
778 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
779 return 1;
780 }
781 return 0;
782 }
783
784 static long __qeth_check_irb_error(struct ccw_device *cdev,
785 unsigned long intparm, struct irb *irb)
786 {
787 if (!IS_ERR(irb))
788 return 0;
789
790 switch (PTR_ERR(irb)) {
791 case -EIO:
792 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
793 dev_name(&cdev->dev));
794 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
795 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
796 break;
797 case -ETIMEDOUT:
798 dev_warn(&cdev->dev, "A hardware operation timed out"
799 " on the device\n");
800 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
801 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
802 if (intparm == QETH_RCD_PARM) {
803 struct qeth_card *card = CARD_FROM_CDEV(cdev);
804
805 if (card && (card->data.ccwdev == cdev)) {
806 card->data.state = CH_STATE_DOWN;
807 wake_up(&card->wait_q);
808 }
809 }
810 break;
811 default:
812 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
813 dev_name(&cdev->dev), PTR_ERR(irb));
814 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
815 QETH_DBF_TEXT(TRACE, 2, " rc???");
816 }
817 return PTR_ERR(irb);
818 }
819
820 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
821 struct irb *irb)
822 {
823 int rc;
824 int cstat, dstat;
825 struct qeth_cmd_buffer *buffer;
826 struct qeth_channel *channel;
827 struct qeth_card *card;
828 struct qeth_cmd_buffer *iob;
829 __u8 index;
830
831 QETH_DBF_TEXT(TRACE, 5, "irq");
832
833 if (__qeth_check_irb_error(cdev, intparm, irb))
834 return;
835 cstat = irb->scsw.cmd.cstat;
836 dstat = irb->scsw.cmd.dstat;
837
838 card = CARD_FROM_CDEV(cdev);
839 if (!card)
840 return;
841
842 if (card->read.ccwdev == cdev) {
843 channel = &card->read;
844 QETH_DBF_TEXT(TRACE, 5, "read");
845 } else if (card->write.ccwdev == cdev) {
846 channel = &card->write;
847 QETH_DBF_TEXT(TRACE, 5, "write");
848 } else {
849 channel = &card->data;
850 QETH_DBF_TEXT(TRACE, 5, "data");
851 }
852 atomic_set(&channel->irq_pending, 0);
853
854 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
855 channel->state = CH_STATE_STOPPED;
856
857 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
858 channel->state = CH_STATE_HALTED;
859
860 /*let's wake up immediately on data channel*/
861 if ((channel == &card->data) && (intparm != 0) &&
862 (intparm != QETH_RCD_PARM))
863 goto out;
864
865 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
866 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
867 /* we don't have to handle this further */
868 intparm = 0;
869 }
870 if (intparm == QETH_HALT_CHANNEL_PARM) {
871 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
872 /* we don't have to handle this further */
873 intparm = 0;
874 }
875 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
876 (dstat & DEV_STAT_UNIT_CHECK) ||
877 (cstat)) {
878 if (irb->esw.esw0.erw.cons) {
879 dev_warn(&channel->ccwdev->dev,
880 "The qeth device driver failed to recover "
881 "an error on the device\n");
882 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
883 "0x%X dstat 0x%X\n",
884 dev_name(&channel->ccwdev->dev), cstat, dstat);
885 print_hex_dump(KERN_WARNING, "qeth: irb ",
886 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
887 print_hex_dump(KERN_WARNING, "qeth: sense data ",
888 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
889 }
890 if (intparm == QETH_RCD_PARM) {
891 channel->state = CH_STATE_DOWN;
892 goto out;
893 }
894 rc = qeth_get_problem(cdev, irb);
895 if (rc) {
896 qeth_clear_ipacmd_list(card);
897 qeth_schedule_recovery(card);
898 goto out;
899 }
900 }
901
902 if (intparm == QETH_RCD_PARM) {
903 channel->state = CH_STATE_RCD_DONE;
904 goto out;
905 }
906 if (intparm) {
907 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
908 buffer->state = BUF_STATE_PROCESSED;
909 }
910 if (channel == &card->data)
911 return;
912 if (channel == &card->read &&
913 channel->state == CH_STATE_UP)
914 qeth_issue_next_read(card);
915
916 iob = channel->iob;
917 index = channel->buf_no;
918 while (iob[index].state == BUF_STATE_PROCESSED) {
919 if (iob[index].callback != NULL)
920 iob[index].callback(channel, iob + index);
921
922 index = (index + 1) % QETH_CMD_BUFFER_NO;
923 }
924 channel->buf_no = index;
925 out:
926 wake_up(&card->wait_q);
927 return;
928 }
929
930 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
931 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
932 {
933 int i;
934 struct sk_buff *skb;
935
936 /* is PCI flag set on buffer? */
937 if (buf->buffer->element[0].flags & 0x40)
938 atomic_dec(&queue->set_pci_flags_count);
939
940 if (!qeth_skip_skb) {
941 skb = skb_dequeue(&buf->skb_list);
942 while (skb) {
943 atomic_dec(&skb->users);
944 dev_kfree_skb_any(skb);
945 skb = skb_dequeue(&buf->skb_list);
946 }
947 }
948 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
949 if (buf->buffer->element[i].addr && buf->is_header[i])
950 kmem_cache_free(qeth_core_header_cache,
951 buf->buffer->element[i].addr);
952 buf->is_header[i] = 0;
953 buf->buffer->element[i].length = 0;
954 buf->buffer->element[i].addr = NULL;
955 buf->buffer->element[i].flags = 0;
956 }
957 buf->buffer->element[15].flags = 0;
958 buf->next_element_to_fill = 0;
959 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
960 }
961
962 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
963 struct qeth_qdio_out_buffer *buf)
964 {
965 __qeth_clear_output_buffer(queue, buf, 0);
966 }
967
968 void qeth_clear_qdio_buffers(struct qeth_card *card)
969 {
970 int i, j;
971
972 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
973 /* clear outbound buffers to free skbs */
974 for (i = 0; i < card->qdio.no_out_queues; ++i)
975 if (card->qdio.out_qs[i]) {
976 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
977 qeth_clear_output_buffer(card->qdio.out_qs[i],
978 &card->qdio.out_qs[i]->bufs[j]);
979 }
980 }
981 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
982
983 static void qeth_free_buffer_pool(struct qeth_card *card)
984 {
985 struct qeth_buffer_pool_entry *pool_entry, *tmp;
986 int i = 0;
987 QETH_DBF_TEXT(TRACE, 5, "freepool");
988 list_for_each_entry_safe(pool_entry, tmp,
989 &card->qdio.init_pool.entry_list, init_list){
990 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
991 free_page((unsigned long)pool_entry->elements[i]);
992 list_del(&pool_entry->init_list);
993 kfree(pool_entry);
994 }
995 }
996
997 static void qeth_free_qdio_buffers(struct qeth_card *card)
998 {
999 int i, j;
1000
1001 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
1002 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1003 QETH_QDIO_UNINITIALIZED)
1004 return;
1005 kfree(card->qdio.in_q);
1006 card->qdio.in_q = NULL;
1007 /* inbound buffer pool */
1008 qeth_free_buffer_pool(card);
1009 /* free outbound qdio_qs */
1010 if (card->qdio.out_qs) {
1011 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1012 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1013 qeth_clear_output_buffer(card->qdio.out_qs[i],
1014 &card->qdio.out_qs[i]->bufs[j]);
1015 kfree(card->qdio.out_qs[i]);
1016 }
1017 kfree(card->qdio.out_qs);
1018 card->qdio.out_qs = NULL;
1019 }
1020 }
1021
1022 static void qeth_clean_channel(struct qeth_channel *channel)
1023 {
1024 int cnt;
1025
1026 QETH_DBF_TEXT(SETUP, 2, "freech");
1027 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1028 kfree(channel->iob[cnt].data);
1029 }
1030
1031 static int qeth_is_1920_device(struct qeth_card *card)
1032 {
1033 int single_queue = 0;
1034 struct ccw_device *ccwdev;
1035 struct channelPath_dsc {
1036 u8 flags;
1037 u8 lsn;
1038 u8 desc;
1039 u8 chpid;
1040 u8 swla;
1041 u8 zeroes;
1042 u8 chla;
1043 u8 chpp;
1044 } *chp_dsc;
1045
1046 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1047
1048 ccwdev = card->data.ccwdev;
1049 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1050 if (chp_dsc != NULL) {
1051 /* CHPP field bit 6 == 1 -> single queue */
1052 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1053 kfree(chp_dsc);
1054 }
1055 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1056 return single_queue;
1057 }
1058
1059 static void qeth_init_qdio_info(struct qeth_card *card)
1060 {
1061 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1062 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1063 /* inbound */
1064 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1065 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1066 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1067 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1068 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1069 }
1070
1071 static void qeth_set_intial_options(struct qeth_card *card)
1072 {
1073 card->options.route4.type = NO_ROUTER;
1074 card->options.route6.type = NO_ROUTER;
1075 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1076 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1077 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1078 card->options.fake_broadcast = 0;
1079 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1080 card->options.performance_stats = 0;
1081 card->options.rx_sg_cb = QETH_RX_SG_CB;
1082 }
1083
1084 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1085 {
1086 unsigned long flags;
1087 int rc = 0;
1088
1089 spin_lock_irqsave(&card->thread_mask_lock, flags);
1090 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1091 (u8) card->thread_start_mask,
1092 (u8) card->thread_allowed_mask,
1093 (u8) card->thread_running_mask);
1094 rc = (card->thread_start_mask & thread);
1095 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1096 return rc;
1097 }
1098
1099 static void qeth_start_kernel_thread(struct work_struct *work)
1100 {
1101 struct qeth_card *card = container_of(work, struct qeth_card,
1102 kernel_thread_starter);
1103 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1104
1105 if (card->read.state != CH_STATE_UP &&
1106 card->write.state != CH_STATE_UP)
1107 return;
1108 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1109 kthread_run(card->discipline.recover, (void *) card,
1110 "qeth_recover");
1111 }
1112
1113 static int qeth_setup_card(struct qeth_card *card)
1114 {
1115
1116 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1117 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1118
1119 card->read.state = CH_STATE_DOWN;
1120 card->write.state = CH_STATE_DOWN;
1121 card->data.state = CH_STATE_DOWN;
1122 card->state = CARD_STATE_DOWN;
1123 card->lan_online = 0;
1124 card->use_hard_stop = 0;
1125 card->dev = NULL;
1126 spin_lock_init(&card->vlanlock);
1127 spin_lock_init(&card->mclock);
1128 card->vlangrp = NULL;
1129 spin_lock_init(&card->lock);
1130 spin_lock_init(&card->ip_lock);
1131 spin_lock_init(&card->thread_mask_lock);
1132 card->thread_start_mask = 0;
1133 card->thread_allowed_mask = 0;
1134 card->thread_running_mask = 0;
1135 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1136 INIT_LIST_HEAD(&card->ip_list);
1137 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1138 if (!card->ip_tbd_list) {
1139 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1140 return -ENOMEM;
1141 }
1142 INIT_LIST_HEAD(card->ip_tbd_list);
1143 INIT_LIST_HEAD(&card->cmd_waiter_list);
1144 init_waitqueue_head(&card->wait_q);
1145 /* intial options */
1146 qeth_set_intial_options(card);
1147 /* IP address takeover */
1148 INIT_LIST_HEAD(&card->ipato.entries);
1149 card->ipato.enabled = 0;
1150 card->ipato.invert4 = 0;
1151 card->ipato.invert6 = 0;
1152 if (card->info.type == QETH_CARD_TYPE_IQD)
1153 card->options.checksum_type = NO_CHECKSUMMING;
1154 /* init QDIO stuff */
1155 qeth_init_qdio_info(card);
1156 return 0;
1157 }
1158
1159 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1160 {
1161 struct qeth_card *card = container_of(slr, struct qeth_card,
1162 qeth_service_level);
1163 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1164 card->info.mcl_level);
1165 }
1166
1167 static struct qeth_card *qeth_alloc_card(void)
1168 {
1169 struct qeth_card *card;
1170
1171 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1172 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1173 if (!card)
1174 return NULL;
1175 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1176 if (qeth_setup_channel(&card->read)) {
1177 kfree(card);
1178 return NULL;
1179 }
1180 if (qeth_setup_channel(&card->write)) {
1181 qeth_clean_channel(&card->read);
1182 kfree(card);
1183 return NULL;
1184 }
1185 card->options.layer2 = -1;
1186 card->qeth_service_level.seq_print = qeth_core_sl_print;
1187 register_service_level(&card->qeth_service_level);
1188 return card;
1189 }
1190
1191 static int qeth_determine_card_type(struct qeth_card *card)
1192 {
1193 int i = 0;
1194
1195 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1196
1197 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1198 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1199 while (known_devices[i][4]) {
1200 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1201 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1202 card->info.type = known_devices[i][4];
1203 card->qdio.no_out_queues = known_devices[i][8];
1204 card->info.is_multicast_different = known_devices[i][9];
1205 if (qeth_is_1920_device(card)) {
1206 dev_info(&card->gdev->dev,
1207 "Priority Queueing not supported\n");
1208 card->qdio.no_out_queues = 1;
1209 card->qdio.default_out_queue = 0;
1210 }
1211 return 0;
1212 }
1213 i++;
1214 }
1215 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1216 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1217 "unknown type\n");
1218 return -ENOENT;
1219 }
1220
1221 static int qeth_clear_channel(struct qeth_channel *channel)
1222 {
1223 unsigned long flags;
1224 struct qeth_card *card;
1225 int rc;
1226
1227 QETH_DBF_TEXT(TRACE, 3, "clearch");
1228 card = CARD_FROM_CDEV(channel->ccwdev);
1229 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1230 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1231 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1232
1233 if (rc)
1234 return rc;
1235 rc = wait_event_interruptible_timeout(card->wait_q,
1236 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1237 if (rc == -ERESTARTSYS)
1238 return rc;
1239 if (channel->state != CH_STATE_STOPPED)
1240 return -ETIME;
1241 channel->state = CH_STATE_DOWN;
1242 return 0;
1243 }
1244
1245 static int qeth_halt_channel(struct qeth_channel *channel)
1246 {
1247 unsigned long flags;
1248 struct qeth_card *card;
1249 int rc;
1250
1251 QETH_DBF_TEXT(TRACE, 3, "haltch");
1252 card = CARD_FROM_CDEV(channel->ccwdev);
1253 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1254 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1255 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1256
1257 if (rc)
1258 return rc;
1259 rc = wait_event_interruptible_timeout(card->wait_q,
1260 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1261 if (rc == -ERESTARTSYS)
1262 return rc;
1263 if (channel->state != CH_STATE_HALTED)
1264 return -ETIME;
1265 return 0;
1266 }
1267
1268 static int qeth_halt_channels(struct qeth_card *card)
1269 {
1270 int rc1 = 0, rc2 = 0, rc3 = 0;
1271
1272 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1273 rc1 = qeth_halt_channel(&card->read);
1274 rc2 = qeth_halt_channel(&card->write);
1275 rc3 = qeth_halt_channel(&card->data);
1276 if (rc1)
1277 return rc1;
1278 if (rc2)
1279 return rc2;
1280 return rc3;
1281 }
1282
1283 static int qeth_clear_channels(struct qeth_card *card)
1284 {
1285 int rc1 = 0, rc2 = 0, rc3 = 0;
1286
1287 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1288 rc1 = qeth_clear_channel(&card->read);
1289 rc2 = qeth_clear_channel(&card->write);
1290 rc3 = qeth_clear_channel(&card->data);
1291 if (rc1)
1292 return rc1;
1293 if (rc2)
1294 return rc2;
1295 return rc3;
1296 }
1297
1298 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1299 {
1300 int rc = 0;
1301
1302 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1303 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1304
1305 if (halt)
1306 rc = qeth_halt_channels(card);
1307 if (rc)
1308 return rc;
1309 return qeth_clear_channels(card);
1310 }
1311
1312 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1313 {
1314 int rc = 0;
1315
1316 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1317 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1318 QETH_QDIO_CLEANING)) {
1319 case QETH_QDIO_ESTABLISHED:
1320 if (card->info.type == QETH_CARD_TYPE_IQD)
1321 rc = qdio_cleanup(CARD_DDEV(card),
1322 QDIO_FLAG_CLEANUP_USING_HALT);
1323 else
1324 rc = qdio_cleanup(CARD_DDEV(card),
1325 QDIO_FLAG_CLEANUP_USING_CLEAR);
1326 if (rc)
1327 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1328 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1329 break;
1330 case QETH_QDIO_CLEANING:
1331 return rc;
1332 default:
1333 break;
1334 }
1335 rc = qeth_clear_halt_card(card, use_halt);
1336 if (rc)
1337 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1338 card->state = CARD_STATE_DOWN;
1339 return rc;
1340 }
1341 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1342
1343 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1344 int *length)
1345 {
1346 struct ciw *ciw;
1347 char *rcd_buf;
1348 int ret;
1349 struct qeth_channel *channel = &card->data;
1350 unsigned long flags;
1351
1352 /*
1353 * scan for RCD command in extended SenseID data
1354 */
1355 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1356 if (!ciw || ciw->cmd == 0)
1357 return -EOPNOTSUPP;
1358 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1359 if (!rcd_buf)
1360 return -ENOMEM;
1361
1362 channel->ccw.cmd_code = ciw->cmd;
1363 channel->ccw.cda = (__u32) __pa(rcd_buf);
1364 channel->ccw.count = ciw->count;
1365 channel->ccw.flags = CCW_FLAG_SLI;
1366 channel->state = CH_STATE_RCD;
1367 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1368 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1369 QETH_RCD_PARM, LPM_ANYPATH, 0,
1370 QETH_RCD_TIMEOUT);
1371 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1372 if (!ret)
1373 wait_event(card->wait_q,
1374 (channel->state == CH_STATE_RCD_DONE ||
1375 channel->state == CH_STATE_DOWN));
1376 if (channel->state == CH_STATE_DOWN)
1377 ret = -EIO;
1378 else
1379 channel->state = CH_STATE_DOWN;
1380 if (ret) {
1381 kfree(rcd_buf);
1382 *buffer = NULL;
1383 *length = 0;
1384 } else {
1385 *length = ciw->count;
1386 *buffer = rcd_buf;
1387 }
1388 return ret;
1389 }
1390
1391 static int qeth_get_unitaddr(struct qeth_card *card)
1392 {
1393 int length;
1394 char *prcd;
1395 int rc;
1396
1397 QETH_DBF_TEXT(SETUP, 2, "getunit");
1398 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1399 if (rc) {
1400 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1401 dev_name(&card->gdev->dev), rc);
1402 return rc;
1403 }
1404 card->info.chpid = prcd[30];
1405 card->info.unit_addr2 = prcd[31];
1406 card->info.cula = prcd[63];
1407 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1408 (prcd[0x11] == _ascebc['M']));
1409 kfree(prcd);
1410 return 0;
1411 }
1412
1413 static void qeth_init_tokens(struct qeth_card *card)
1414 {
1415 card->token.issuer_rm_w = 0x00010103UL;
1416 card->token.cm_filter_w = 0x00010108UL;
1417 card->token.cm_connection_w = 0x0001010aUL;
1418 card->token.ulp_filter_w = 0x0001010bUL;
1419 card->token.ulp_connection_w = 0x0001010dUL;
1420 }
1421
1422 static void qeth_init_func_level(struct qeth_card *card)
1423 {
1424 if (card->ipato.enabled) {
1425 if (card->info.type == QETH_CARD_TYPE_IQD)
1426 card->info.func_level =
1427 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1428 else
1429 card->info.func_level =
1430 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1431 } else {
1432 if (card->info.type == QETH_CARD_TYPE_IQD)
1433 /*FIXME:why do we have same values for dis and ena for
1434 osae??? */
1435 card->info.func_level =
1436 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1437 else
1438 card->info.func_level =
1439 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1440 }
1441 }
1442
1443 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1444 void (*idx_reply_cb)(struct qeth_channel *,
1445 struct qeth_cmd_buffer *))
1446 {
1447 struct qeth_cmd_buffer *iob;
1448 unsigned long flags;
1449 int rc;
1450 struct qeth_card *card;
1451
1452 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1453 card = CARD_FROM_CDEV(channel->ccwdev);
1454 iob = qeth_get_buffer(channel);
1455 iob->callback = idx_reply_cb;
1456 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1457 channel->ccw.count = QETH_BUFSIZE;
1458 channel->ccw.cda = (__u32) __pa(iob->data);
1459
1460 wait_event(card->wait_q,
1461 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1462 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1463 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1464 rc = ccw_device_start(channel->ccwdev,
1465 &channel->ccw, (addr_t) iob, 0, 0);
1466 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1467
1468 if (rc) {
1469 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1470 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1471 atomic_set(&channel->irq_pending, 0);
1472 wake_up(&card->wait_q);
1473 return rc;
1474 }
1475 rc = wait_event_interruptible_timeout(card->wait_q,
1476 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1477 if (rc == -ERESTARTSYS)
1478 return rc;
1479 if (channel->state != CH_STATE_UP) {
1480 rc = -ETIME;
1481 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1482 qeth_clear_cmd_buffers(channel);
1483 } else
1484 rc = 0;
1485 return rc;
1486 }
1487
1488 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1489 void (*idx_reply_cb)(struct qeth_channel *,
1490 struct qeth_cmd_buffer *))
1491 {
1492 struct qeth_card *card;
1493 struct qeth_cmd_buffer *iob;
1494 unsigned long flags;
1495 __u16 temp;
1496 __u8 tmp;
1497 int rc;
1498 struct ccw_dev_id temp_devid;
1499
1500 card = CARD_FROM_CDEV(channel->ccwdev);
1501
1502 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1503
1504 iob = qeth_get_buffer(channel);
1505 iob->callback = idx_reply_cb;
1506 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1507 channel->ccw.count = IDX_ACTIVATE_SIZE;
1508 channel->ccw.cda = (__u32) __pa(iob->data);
1509 if (channel == &card->write) {
1510 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1511 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1512 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1513 card->seqno.trans_hdr++;
1514 } else {
1515 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1516 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1517 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1518 }
1519 tmp = ((__u8)card->info.portno) | 0x80;
1520 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1521 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1522 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1523 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1524 &card->info.func_level, sizeof(__u16));
1525 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1526 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1527 temp = (card->info.cula << 8) + card->info.unit_addr2;
1528 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1529
1530 wait_event(card->wait_q,
1531 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1532 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1533 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1534 rc = ccw_device_start(channel->ccwdev,
1535 &channel->ccw, (addr_t) iob, 0, 0);
1536 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1537
1538 if (rc) {
1539 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1540 rc);
1541 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1542 atomic_set(&channel->irq_pending, 0);
1543 wake_up(&card->wait_q);
1544 return rc;
1545 }
1546 rc = wait_event_interruptible_timeout(card->wait_q,
1547 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1548 if (rc == -ERESTARTSYS)
1549 return rc;
1550 if (channel->state != CH_STATE_ACTIVATING) {
1551 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1552 " failed to recover an error on the device\n");
1553 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1554 dev_name(&channel->ccwdev->dev));
1555 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1556 qeth_clear_cmd_buffers(channel);
1557 return -ETIME;
1558 }
1559 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1560 }
1561
1562 static int qeth_peer_func_level(int level)
1563 {
1564 if ((level & 0xff) == 8)
1565 return (level & 0xff) + 0x400;
1566 if (((level >> 8) & 3) == 1)
1567 return (level & 0xff) + 0x200;
1568 return level;
1569 }
1570
1571 static void qeth_idx_write_cb(struct qeth_channel *channel,
1572 struct qeth_cmd_buffer *iob)
1573 {
1574 struct qeth_card *card;
1575 __u16 temp;
1576
1577 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1578
1579 if (channel->state == CH_STATE_DOWN) {
1580 channel->state = CH_STATE_ACTIVATING;
1581 goto out;
1582 }
1583 card = CARD_FROM_CDEV(channel->ccwdev);
1584
1585 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1586 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1587 dev_err(&card->write.ccwdev->dev,
1588 "The adapter is used exclusively by another "
1589 "host\n");
1590 else
1591 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1592 " negative reply\n",
1593 dev_name(&card->write.ccwdev->dev));
1594 goto out;
1595 }
1596 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1597 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1598 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1599 "function level mismatch (sent: 0x%x, received: "
1600 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1601 card->info.func_level, temp);
1602 goto out;
1603 }
1604 channel->state = CH_STATE_UP;
1605 out:
1606 qeth_release_buffer(channel, iob);
1607 }
1608
1609 static void qeth_idx_read_cb(struct qeth_channel *channel,
1610 struct qeth_cmd_buffer *iob)
1611 {
1612 struct qeth_card *card;
1613 __u16 temp;
1614
1615 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1616 if (channel->state == CH_STATE_DOWN) {
1617 channel->state = CH_STATE_ACTIVATING;
1618 goto out;
1619 }
1620
1621 card = CARD_FROM_CDEV(channel->ccwdev);
1622 if (qeth_check_idx_response(iob->data))
1623 goto out;
1624
1625 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1626 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1627 dev_err(&card->write.ccwdev->dev,
1628 "The adapter is used exclusively by another "
1629 "host\n");
1630 else
1631 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1632 " negative reply\n",
1633 dev_name(&card->read.ccwdev->dev));
1634 goto out;
1635 }
1636
1637 /**
1638 * temporary fix for microcode bug
1639 * to revert it,replace OR by AND
1640 */
1641 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1642 (card->info.type == QETH_CARD_TYPE_OSAE))
1643 card->info.portname_required = 1;
1644
1645 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1646 if (temp != qeth_peer_func_level(card->info.func_level)) {
1647 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1648 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1649 dev_name(&card->read.ccwdev->dev),
1650 card->info.func_level, temp);
1651 goto out;
1652 }
1653 memcpy(&card->token.issuer_rm_r,
1654 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1655 QETH_MPC_TOKEN_LENGTH);
1656 memcpy(&card->info.mcl_level[0],
1657 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1658 channel->state = CH_STATE_UP;
1659 out:
1660 qeth_release_buffer(channel, iob);
1661 }
1662
1663 void qeth_prepare_control_data(struct qeth_card *card, int len,
1664 struct qeth_cmd_buffer *iob)
1665 {
1666 qeth_setup_ccw(&card->write, iob->data, len);
1667 iob->callback = qeth_release_buffer;
1668
1669 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1670 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1671 card->seqno.trans_hdr++;
1672 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1673 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1674 card->seqno.pdu_hdr++;
1675 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1676 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1677 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1678 }
1679 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1680
1681 int qeth_send_control_data(struct qeth_card *card, int len,
1682 struct qeth_cmd_buffer *iob,
1683 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1684 unsigned long),
1685 void *reply_param)
1686 {
1687 int rc;
1688 unsigned long flags;
1689 struct qeth_reply *reply = NULL;
1690 unsigned long timeout, event_timeout;
1691 struct qeth_ipa_cmd *cmd;
1692
1693 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1694
1695 reply = qeth_alloc_reply(card);
1696 if (!reply) {
1697 return -ENOMEM;
1698 }
1699 reply->callback = reply_cb;
1700 reply->param = reply_param;
1701 if (card->state == CARD_STATE_DOWN)
1702 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1703 else
1704 reply->seqno = card->seqno.ipa++;
1705 init_waitqueue_head(&reply->wait_q);
1706 spin_lock_irqsave(&card->lock, flags);
1707 list_add_tail(&reply->list, &card->cmd_waiter_list);
1708 spin_unlock_irqrestore(&card->lock, flags);
1709 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1710
1711 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1712 qeth_prepare_control_data(card, len, iob);
1713
1714 if (IS_IPA(iob->data))
1715 event_timeout = QETH_IPA_TIMEOUT;
1716 else
1717 event_timeout = QETH_TIMEOUT;
1718 timeout = jiffies + event_timeout;
1719
1720 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1721 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1722 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1723 (addr_t) iob, 0, 0);
1724 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1725 if (rc) {
1726 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1727 "ccw_device_start rc = %i\n",
1728 dev_name(&card->write.ccwdev->dev), rc);
1729 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1730 spin_lock_irqsave(&card->lock, flags);
1731 list_del_init(&reply->list);
1732 qeth_put_reply(reply);
1733 spin_unlock_irqrestore(&card->lock, flags);
1734 qeth_release_buffer(iob->channel, iob);
1735 atomic_set(&card->write.irq_pending, 0);
1736 wake_up(&card->wait_q);
1737 return rc;
1738 }
1739
1740 /* we have only one long running ipassist, since we can ensure
1741 process context of this command we can sleep */
1742 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1743 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1744 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1745 if (!wait_event_timeout(reply->wait_q,
1746 atomic_read(&reply->received), event_timeout))
1747 goto time_err;
1748 } else {
1749 while (!atomic_read(&reply->received)) {
1750 if (time_after(jiffies, timeout))
1751 goto time_err;
1752 cpu_relax();
1753 };
1754 }
1755
1756 rc = reply->rc;
1757 qeth_put_reply(reply);
1758 return rc;
1759
1760 time_err:
1761 spin_lock_irqsave(&reply->card->lock, flags);
1762 list_del_init(&reply->list);
1763 spin_unlock_irqrestore(&reply->card->lock, flags);
1764 reply->rc = -ETIME;
1765 atomic_inc(&reply->received);
1766 wake_up(&reply->wait_q);
1767 rc = reply->rc;
1768 qeth_put_reply(reply);
1769 return rc;
1770 }
1771 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1772
1773 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1774 unsigned long data)
1775 {
1776 struct qeth_cmd_buffer *iob;
1777
1778 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1779
1780 iob = (struct qeth_cmd_buffer *) data;
1781 memcpy(&card->token.cm_filter_r,
1782 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1783 QETH_MPC_TOKEN_LENGTH);
1784 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1785 return 0;
1786 }
1787
1788 static int qeth_cm_enable(struct qeth_card *card)
1789 {
1790 int rc;
1791 struct qeth_cmd_buffer *iob;
1792
1793 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1794
1795 iob = qeth_wait_for_buffer(&card->write);
1796 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1797 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1798 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1799 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1800 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1801
1802 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1803 qeth_cm_enable_cb, NULL);
1804 return rc;
1805 }
1806
1807 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1808 unsigned long data)
1809 {
1810
1811 struct qeth_cmd_buffer *iob;
1812
1813 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1814
1815 iob = (struct qeth_cmd_buffer *) data;
1816 memcpy(&card->token.cm_connection_r,
1817 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1818 QETH_MPC_TOKEN_LENGTH);
1819 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1820 return 0;
1821 }
1822
1823 static int qeth_cm_setup(struct qeth_card *card)
1824 {
1825 int rc;
1826 struct qeth_cmd_buffer *iob;
1827
1828 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1829
1830 iob = qeth_wait_for_buffer(&card->write);
1831 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1832 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1833 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1834 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1835 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1836 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1837 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1838 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1839 qeth_cm_setup_cb, NULL);
1840 return rc;
1841
1842 }
1843
1844 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1845 {
1846 switch (card->info.type) {
1847 case QETH_CARD_TYPE_UNKNOWN:
1848 return 1500;
1849 case QETH_CARD_TYPE_IQD:
1850 return card->info.max_mtu;
1851 case QETH_CARD_TYPE_OSAE:
1852 switch (card->info.link_type) {
1853 case QETH_LINK_TYPE_HSTR:
1854 case QETH_LINK_TYPE_LANE_TR:
1855 return 2000;
1856 default:
1857 return 1492;
1858 }
1859 default:
1860 return 1500;
1861 }
1862 }
1863
1864 static inline int qeth_get_max_mtu_for_card(int cardtype)
1865 {
1866 switch (cardtype) {
1867
1868 case QETH_CARD_TYPE_UNKNOWN:
1869 case QETH_CARD_TYPE_OSAE:
1870 case QETH_CARD_TYPE_OSN:
1871 return 61440;
1872 case QETH_CARD_TYPE_IQD:
1873 return 57344;
1874 default:
1875 return 1500;
1876 }
1877 }
1878
1879 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1880 {
1881 switch (cardtype) {
1882 case QETH_CARD_TYPE_IQD:
1883 return 1;
1884 default:
1885 return 0;
1886 }
1887 }
1888
1889 static inline int qeth_get_mtu_outof_framesize(int framesize)
1890 {
1891 switch (framesize) {
1892 case 0x4000:
1893 return 8192;
1894 case 0x6000:
1895 return 16384;
1896 case 0xa000:
1897 return 32768;
1898 case 0xffff:
1899 return 57344;
1900 default:
1901 return 0;
1902 }
1903 }
1904
1905 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1906 {
1907 switch (card->info.type) {
1908 case QETH_CARD_TYPE_OSAE:
1909 return ((mtu >= 576) && (mtu <= 61440));
1910 case QETH_CARD_TYPE_IQD:
1911 return ((mtu >= 576) &&
1912 (mtu <= card->info.max_mtu + 4096 - 32));
1913 case QETH_CARD_TYPE_OSN:
1914 case QETH_CARD_TYPE_UNKNOWN:
1915 default:
1916 return 1;
1917 }
1918 }
1919
1920 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1921 unsigned long data)
1922 {
1923
1924 __u16 mtu, framesize;
1925 __u16 len;
1926 __u8 link_type;
1927 struct qeth_cmd_buffer *iob;
1928
1929 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1930
1931 iob = (struct qeth_cmd_buffer *) data;
1932 memcpy(&card->token.ulp_filter_r,
1933 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1934 QETH_MPC_TOKEN_LENGTH);
1935 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1936 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1937 mtu = qeth_get_mtu_outof_framesize(framesize);
1938 if (!mtu) {
1939 iob->rc = -EINVAL;
1940 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1941 return 0;
1942 }
1943 card->info.max_mtu = mtu;
1944 card->info.initial_mtu = mtu;
1945 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1946 } else {
1947 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1948 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1949 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1950 }
1951
1952 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1953 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1954 memcpy(&link_type,
1955 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1956 card->info.link_type = link_type;
1957 } else
1958 card->info.link_type = 0;
1959 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1960 return 0;
1961 }
1962
1963 static int qeth_ulp_enable(struct qeth_card *card)
1964 {
1965 int rc;
1966 char prot_type;
1967 struct qeth_cmd_buffer *iob;
1968
1969 /*FIXME: trace view callbacks*/
1970 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1971
1972 iob = qeth_wait_for_buffer(&card->write);
1973 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1974
1975 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1976 (__u8) card->info.portno;
1977 if (card->options.layer2)
1978 if (card->info.type == QETH_CARD_TYPE_OSN)
1979 prot_type = QETH_PROT_OSN2;
1980 else
1981 prot_type = QETH_PROT_LAYER2;
1982 else
1983 prot_type = QETH_PROT_TCPIP;
1984
1985 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1986 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1987 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1988 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1989 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1990 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1991 card->info.portname, 9);
1992 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1993 qeth_ulp_enable_cb, NULL);
1994 return rc;
1995
1996 }
1997
1998 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1999 unsigned long data)
2000 {
2001 struct qeth_cmd_buffer *iob;
2002
2003 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2004
2005 iob = (struct qeth_cmd_buffer *) data;
2006 memcpy(&card->token.ulp_connection_r,
2007 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2008 QETH_MPC_TOKEN_LENGTH);
2009 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2010 return 0;
2011 }
2012
2013 static int qeth_ulp_setup(struct qeth_card *card)
2014 {
2015 int rc;
2016 __u16 temp;
2017 struct qeth_cmd_buffer *iob;
2018 struct ccw_dev_id dev_id;
2019
2020 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2021
2022 iob = qeth_wait_for_buffer(&card->write);
2023 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2024
2025 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2026 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2027 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2028 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2029 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2030 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2031
2032 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2033 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2034 temp = (card->info.cula << 8) + card->info.unit_addr2;
2035 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2036 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2037 qeth_ulp_setup_cb, NULL);
2038 return rc;
2039 }
2040
2041 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2042 {
2043 int i, j;
2044
2045 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2046
2047 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2048 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2049 return 0;
2050
2051 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2052 GFP_KERNEL);
2053 if (!card->qdio.in_q)
2054 goto out_nomem;
2055 QETH_DBF_TEXT(SETUP, 2, "inq");
2056 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2057 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2058 /* give inbound qeth_qdio_buffers their qdio_buffers */
2059 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2060 card->qdio.in_q->bufs[i].buffer =
2061 &card->qdio.in_q->qdio_bufs[i];
2062 /* inbound buffer pool */
2063 if (qeth_alloc_buffer_pool(card))
2064 goto out_freeinq;
2065 /* outbound */
2066 card->qdio.out_qs =
2067 kmalloc(card->qdio.no_out_queues *
2068 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2069 if (!card->qdio.out_qs)
2070 goto out_freepool;
2071 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2072 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2073 GFP_KERNEL);
2074 if (!card->qdio.out_qs[i])
2075 goto out_freeoutq;
2076 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2077 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2078 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2079 card->qdio.out_qs[i]->queue_no = i;
2080 /* give outbound qeth_qdio_buffers their qdio_buffers */
2081 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2082 card->qdio.out_qs[i]->bufs[j].buffer =
2083 &card->qdio.out_qs[i]->qdio_bufs[j];
2084 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2085 skb_list);
2086 lockdep_set_class(
2087 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2088 &qdio_out_skb_queue_key);
2089 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2090 }
2091 }
2092 return 0;
2093
2094 out_freeoutq:
2095 while (i > 0)
2096 kfree(card->qdio.out_qs[--i]);
2097 kfree(card->qdio.out_qs);
2098 card->qdio.out_qs = NULL;
2099 out_freepool:
2100 qeth_free_buffer_pool(card);
2101 out_freeinq:
2102 kfree(card->qdio.in_q);
2103 card->qdio.in_q = NULL;
2104 out_nomem:
2105 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2106 return -ENOMEM;
2107 }
2108
2109 static void qeth_create_qib_param_field(struct qeth_card *card,
2110 char *param_field)
2111 {
2112
2113 param_field[0] = _ascebc['P'];
2114 param_field[1] = _ascebc['C'];
2115 param_field[2] = _ascebc['I'];
2116 param_field[3] = _ascebc['T'];
2117 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2118 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2119 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2120 }
2121
2122 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2123 char *param_field)
2124 {
2125 param_field[16] = _ascebc['B'];
2126 param_field[17] = _ascebc['L'];
2127 param_field[18] = _ascebc['K'];
2128 param_field[19] = _ascebc['T'];
2129 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2130 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2131 *((unsigned int *) (&param_field[28])) =
2132 card->info.blkt.inter_packet_jumbo;
2133 }
2134
2135 static int qeth_qdio_activate(struct qeth_card *card)
2136 {
2137 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2138 return qdio_activate(CARD_DDEV(card));
2139 }
2140
2141 static int qeth_dm_act(struct qeth_card *card)
2142 {
2143 int rc;
2144 struct qeth_cmd_buffer *iob;
2145
2146 QETH_DBF_TEXT(SETUP, 2, "dmact");
2147
2148 iob = qeth_wait_for_buffer(&card->write);
2149 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2150
2151 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2152 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2153 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2154 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2155 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2156 return rc;
2157 }
2158
2159 static int qeth_mpc_initialize(struct qeth_card *card)
2160 {
2161 int rc;
2162
2163 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2164
2165 rc = qeth_issue_next_read(card);
2166 if (rc) {
2167 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2168 return rc;
2169 }
2170 rc = qeth_cm_enable(card);
2171 if (rc) {
2172 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2173 goto out_qdio;
2174 }
2175 rc = qeth_cm_setup(card);
2176 if (rc) {
2177 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2178 goto out_qdio;
2179 }
2180 rc = qeth_ulp_enable(card);
2181 if (rc) {
2182 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2183 goto out_qdio;
2184 }
2185 rc = qeth_ulp_setup(card);
2186 if (rc) {
2187 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2188 goto out_qdio;
2189 }
2190 rc = qeth_alloc_qdio_buffers(card);
2191 if (rc) {
2192 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2193 goto out_qdio;
2194 }
2195 rc = qeth_qdio_establish(card);
2196 if (rc) {
2197 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2198 qeth_free_qdio_buffers(card);
2199 goto out_qdio;
2200 }
2201 rc = qeth_qdio_activate(card);
2202 if (rc) {
2203 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2204 goto out_qdio;
2205 }
2206 rc = qeth_dm_act(card);
2207 if (rc) {
2208 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2209 goto out_qdio;
2210 }
2211
2212 return 0;
2213 out_qdio:
2214 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2215 return rc;
2216 }
2217
2218 static void qeth_print_status_with_portname(struct qeth_card *card)
2219 {
2220 char dbf_text[15];
2221 int i;
2222
2223 sprintf(dbf_text, "%s", card->info.portname + 1);
2224 for (i = 0; i < 8; i++)
2225 dbf_text[i] =
2226 (char) _ebcasc[(__u8) dbf_text[i]];
2227 dbf_text[8] = 0;
2228 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2229 "with link type %s (portname: %s)\n",
2230 qeth_get_cardname(card),
2231 (card->info.mcl_level[0]) ? " (level: " : "",
2232 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2233 (card->info.mcl_level[0]) ? ")" : "",
2234 qeth_get_cardname_short(card),
2235 dbf_text);
2236
2237 }
2238
2239 static void qeth_print_status_no_portname(struct qeth_card *card)
2240 {
2241 if (card->info.portname[0])
2242 dev_info(&card->gdev->dev, "Device is a%s "
2243 "card%s%s%s\nwith link type %s "
2244 "(no portname needed by interface).\n",
2245 qeth_get_cardname(card),
2246 (card->info.mcl_level[0]) ? " (level: " : "",
2247 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2248 (card->info.mcl_level[0]) ? ")" : "",
2249 qeth_get_cardname_short(card));
2250 else
2251 dev_info(&card->gdev->dev, "Device is a%s "
2252 "card%s%s%s\nwith link type %s.\n",
2253 qeth_get_cardname(card),
2254 (card->info.mcl_level[0]) ? " (level: " : "",
2255 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2256 (card->info.mcl_level[0]) ? ")" : "",
2257 qeth_get_cardname_short(card));
2258 }
2259
2260 void qeth_print_status_message(struct qeth_card *card)
2261 {
2262 switch (card->info.type) {
2263 case QETH_CARD_TYPE_OSAE:
2264 /* VM will use a non-zero first character
2265 * to indicate a HiperSockets like reporting
2266 * of the level OSA sets the first character to zero
2267 * */
2268 if (!card->info.mcl_level[0]) {
2269 sprintf(card->info.mcl_level, "%02x%02x",
2270 card->info.mcl_level[2],
2271 card->info.mcl_level[3]);
2272
2273 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2274 break;
2275 }
2276 /* fallthrough */
2277 case QETH_CARD_TYPE_IQD:
2278 if ((card->info.guestlan) ||
2279 (card->info.mcl_level[0] & 0x80)) {
2280 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2281 card->info.mcl_level[0]];
2282 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2283 card->info.mcl_level[1]];
2284 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2285 card->info.mcl_level[2]];
2286 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2287 card->info.mcl_level[3]];
2288 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2289 }
2290 break;
2291 default:
2292 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2293 }
2294 if (card->info.portname_required)
2295 qeth_print_status_with_portname(card);
2296 else
2297 qeth_print_status_no_portname(card);
2298 }
2299 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2300
2301 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2302 {
2303 struct qeth_buffer_pool_entry *entry;
2304
2305 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2306
2307 list_for_each_entry(entry,
2308 &card->qdio.init_pool.entry_list, init_list) {
2309 qeth_put_buffer_pool_entry(card, entry);
2310 }
2311 }
2312
2313 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2314 struct qeth_card *card)
2315 {
2316 struct list_head *plh;
2317 struct qeth_buffer_pool_entry *entry;
2318 int i, free;
2319 struct page *page;
2320
2321 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2322 return NULL;
2323
2324 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2325 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2326 free = 1;
2327 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2328 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2329 free = 0;
2330 break;
2331 }
2332 }
2333 if (free) {
2334 list_del_init(&entry->list);
2335 return entry;
2336 }
2337 }
2338
2339 /* no free buffer in pool so take first one and swap pages */
2340 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2341 struct qeth_buffer_pool_entry, list);
2342 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2343 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2344 page = alloc_page(GFP_ATOMIC);
2345 if (!page) {
2346 return NULL;
2347 } else {
2348 free_page((unsigned long)entry->elements[i]);
2349 entry->elements[i] = page_address(page);
2350 if (card->options.performance_stats)
2351 card->perf_stats.sg_alloc_page_rx++;
2352 }
2353 }
2354 }
2355 list_del_init(&entry->list);
2356 return entry;
2357 }
2358
2359 static int qeth_init_input_buffer(struct qeth_card *card,
2360 struct qeth_qdio_buffer *buf)
2361 {
2362 struct qeth_buffer_pool_entry *pool_entry;
2363 int i;
2364
2365 pool_entry = qeth_find_free_buffer_pool_entry(card);
2366 if (!pool_entry)
2367 return 1;
2368
2369 /*
2370 * since the buffer is accessed only from the input_tasklet
2371 * there shouldn't be a need to synchronize; also, since we use
2372 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2373 * buffers
2374 */
2375
2376 buf->pool_entry = pool_entry;
2377 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2378 buf->buffer->element[i].length = PAGE_SIZE;
2379 buf->buffer->element[i].addr = pool_entry->elements[i];
2380 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2381 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2382 else
2383 buf->buffer->element[i].flags = 0;
2384 }
2385 return 0;
2386 }
2387
2388 int qeth_init_qdio_queues(struct qeth_card *card)
2389 {
2390 int i, j;
2391 int rc;
2392
2393 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2394
2395 /* inbound queue */
2396 memset(card->qdio.in_q->qdio_bufs, 0,
2397 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2398 qeth_initialize_working_pool_list(card);
2399 /*give only as many buffers to hardware as we have buffer pool entries*/
2400 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2401 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2402 card->qdio.in_q->next_buf_to_init =
2403 card->qdio.in_buf_pool.buf_count - 1;
2404 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2405 card->qdio.in_buf_pool.buf_count - 1);
2406 if (rc) {
2407 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2408 return rc;
2409 }
2410 /* outbound queue */
2411 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2412 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2413 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2414 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2415 qeth_clear_output_buffer(card->qdio.out_qs[i],
2416 &card->qdio.out_qs[i]->bufs[j]);
2417 }
2418 card->qdio.out_qs[i]->card = card;
2419 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2420 card->qdio.out_qs[i]->do_pack = 0;
2421 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2422 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2423 atomic_set(&card->qdio.out_qs[i]->state,
2424 QETH_OUT_Q_UNLOCKED);
2425 }
2426 return 0;
2427 }
2428 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2429
2430 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2431 {
2432 switch (link_type) {
2433 case QETH_LINK_TYPE_HSTR:
2434 return 2;
2435 default:
2436 return 1;
2437 }
2438 }
2439
2440 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2441 struct qeth_ipa_cmd *cmd, __u8 command,
2442 enum qeth_prot_versions prot)
2443 {
2444 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2445 cmd->hdr.command = command;
2446 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2447 cmd->hdr.seqno = card->seqno.ipa;
2448 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2449 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2450 if (card->options.layer2)
2451 cmd->hdr.prim_version_no = 2;
2452 else
2453 cmd->hdr.prim_version_no = 1;
2454 cmd->hdr.param_count = 1;
2455 cmd->hdr.prot_version = prot;
2456 cmd->hdr.ipa_supported = 0;
2457 cmd->hdr.ipa_enabled = 0;
2458 }
2459
2460 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2461 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2462 {
2463 struct qeth_cmd_buffer *iob;
2464 struct qeth_ipa_cmd *cmd;
2465
2466 iob = qeth_wait_for_buffer(&card->write);
2467 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2468 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2469
2470 return iob;
2471 }
2472 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2473
2474 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2475 char prot_type)
2476 {
2477 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2478 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2479 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2480 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2481 }
2482 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2483
2484 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2485 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2486 unsigned long),
2487 void *reply_param)
2488 {
2489 int rc;
2490 char prot_type;
2491
2492 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2493
2494 if (card->options.layer2)
2495 if (card->info.type == QETH_CARD_TYPE_OSN)
2496 prot_type = QETH_PROT_OSN2;
2497 else
2498 prot_type = QETH_PROT_LAYER2;
2499 else
2500 prot_type = QETH_PROT_TCPIP;
2501 qeth_prepare_ipa_cmd(card, iob, prot_type);
2502 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2503 iob, reply_cb, reply_param);
2504 return rc;
2505 }
2506 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2507
2508 static int qeth_send_startstoplan(struct qeth_card *card,
2509 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2510 {
2511 int rc;
2512 struct qeth_cmd_buffer *iob;
2513
2514 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2515 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2516
2517 return rc;
2518 }
2519
2520 int qeth_send_startlan(struct qeth_card *card)
2521 {
2522 int rc;
2523
2524 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2525
2526 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2527 return rc;
2528 }
2529 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2530
2531 int qeth_send_stoplan(struct qeth_card *card)
2532 {
2533 int rc = 0;
2534
2535 /*
2536 * TODO: according to the IPA format document page 14,
2537 * TCP/IP (we!) never issue a STOPLAN
2538 * is this right ?!?
2539 */
2540 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2541
2542 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2543 return rc;
2544 }
2545 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2546
2547 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2548 struct qeth_reply *reply, unsigned long data)
2549 {
2550 struct qeth_ipa_cmd *cmd;
2551
2552 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2553
2554 cmd = (struct qeth_ipa_cmd *) data;
2555 if (cmd->hdr.return_code == 0)
2556 cmd->hdr.return_code =
2557 cmd->data.setadapterparms.hdr.return_code;
2558 return 0;
2559 }
2560 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2561
2562 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2563 struct qeth_reply *reply, unsigned long data)
2564 {
2565 struct qeth_ipa_cmd *cmd;
2566
2567 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2568
2569 cmd = (struct qeth_ipa_cmd *) data;
2570 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2571 card->info.link_type =
2572 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2573 card->options.adp.supported_funcs =
2574 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2575 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2576 }
2577
2578 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2579 __u32 command, __u32 cmdlen)
2580 {
2581 struct qeth_cmd_buffer *iob;
2582 struct qeth_ipa_cmd *cmd;
2583
2584 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2585 QETH_PROT_IPV4);
2586 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2587 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2588 cmd->data.setadapterparms.hdr.command_code = command;
2589 cmd->data.setadapterparms.hdr.used_total = 1;
2590 cmd->data.setadapterparms.hdr.seq_no = 1;
2591
2592 return iob;
2593 }
2594 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2595
2596 int qeth_query_setadapterparms(struct qeth_card *card)
2597 {
2598 int rc;
2599 struct qeth_cmd_buffer *iob;
2600
2601 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2602 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2603 sizeof(struct qeth_ipacmd_setadpparms));
2604 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2605 return rc;
2606 }
2607 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2608
2609 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2610 const char *dbftext)
2611 {
2612 if (qdio_error) {
2613 QETH_DBF_TEXT(TRACE, 2, dbftext);
2614 QETH_DBF_TEXT(QERR, 2, dbftext);
2615 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2616 buf->element[15].flags & 0xff);
2617 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2618 buf->element[14].flags & 0xff);
2619 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2620 return 1;
2621 }
2622 return 0;
2623 }
2624 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2625
2626 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2627 {
2628 struct qeth_qdio_q *queue = card->qdio.in_q;
2629 int count;
2630 int i;
2631 int rc;
2632 int newcount = 0;
2633
2634 count = (index < queue->next_buf_to_init)?
2635 card->qdio.in_buf_pool.buf_count -
2636 (queue->next_buf_to_init - index) :
2637 card->qdio.in_buf_pool.buf_count -
2638 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2639 /* only requeue at a certain threshold to avoid SIGAs */
2640 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2641 for (i = queue->next_buf_to_init;
2642 i < queue->next_buf_to_init + count; ++i) {
2643 if (qeth_init_input_buffer(card,
2644 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2645 break;
2646 } else {
2647 newcount++;
2648 }
2649 }
2650
2651 if (newcount < count) {
2652 /* we are in memory shortage so we switch back to
2653 traditional skb allocation and drop packages */
2654 atomic_set(&card->force_alloc_skb, 3);
2655 count = newcount;
2656 } else {
2657 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2658 }
2659
2660 /*
2661 * according to old code it should be avoided to requeue all
2662 * 128 buffers in order to benefit from PCI avoidance.
2663 * this function keeps at least one buffer (the buffer at
2664 * 'index') un-requeued -> this buffer is the first buffer that
2665 * will be requeued the next time
2666 */
2667 if (card->options.performance_stats) {
2668 card->perf_stats.inbound_do_qdio_cnt++;
2669 card->perf_stats.inbound_do_qdio_start_time =
2670 qeth_get_micros();
2671 }
2672 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2673 queue->next_buf_to_init, count);
2674 if (card->options.performance_stats)
2675 card->perf_stats.inbound_do_qdio_time +=
2676 qeth_get_micros() -
2677 card->perf_stats.inbound_do_qdio_start_time;
2678 if (rc) {
2679 dev_warn(&card->gdev->dev,
2680 "QDIO reported an error, rc=%i\n", rc);
2681 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2682 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2683 }
2684 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2685 QDIO_MAX_BUFFERS_PER_Q;
2686 }
2687 }
2688 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2689
2690 static int qeth_handle_send_error(struct qeth_card *card,
2691 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2692 {
2693 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2694
2695 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2696 if (card->info.type == QETH_CARD_TYPE_IQD) {
2697 if (sbalf15 == 0) {
2698 qdio_err = 0;
2699 } else {
2700 qdio_err = 1;
2701 }
2702 }
2703 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2704
2705 if (!qdio_err)
2706 return QETH_SEND_ERROR_NONE;
2707
2708 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2709 return QETH_SEND_ERROR_RETRY;
2710
2711 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2712 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2713 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2714 (u16)qdio_err, (u8)sbalf15);
2715 return QETH_SEND_ERROR_LINK_FAILURE;
2716 }
2717
2718 /*
2719 * Switched to packing state if the number of used buffers on a queue
2720 * reaches a certain limit.
2721 */
2722 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2723 {
2724 if (!queue->do_pack) {
2725 if (atomic_read(&queue->used_buffers)
2726 >= QETH_HIGH_WATERMARK_PACK){
2727 /* switch non-PACKING -> PACKING */
2728 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2729 if (queue->card->options.performance_stats)
2730 queue->card->perf_stats.sc_dp_p++;
2731 queue->do_pack = 1;
2732 }
2733 }
2734 }
2735
2736 /*
2737 * Switches from packing to non-packing mode. If there is a packing
2738 * buffer on the queue this buffer will be prepared to be flushed.
2739 * In that case 1 is returned to inform the caller. If no buffer
2740 * has to be flushed, zero is returned.
2741 */
2742 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2743 {
2744 struct qeth_qdio_out_buffer *buffer;
2745 int flush_count = 0;
2746
2747 if (queue->do_pack) {
2748 if (atomic_read(&queue->used_buffers)
2749 <= QETH_LOW_WATERMARK_PACK) {
2750 /* switch PACKING -> non-PACKING */
2751 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2752 if (queue->card->options.performance_stats)
2753 queue->card->perf_stats.sc_p_dp++;
2754 queue->do_pack = 0;
2755 /* flush packing buffers */
2756 buffer = &queue->bufs[queue->next_buf_to_fill];
2757 if ((atomic_read(&buffer->state) ==
2758 QETH_QDIO_BUF_EMPTY) &&
2759 (buffer->next_element_to_fill > 0)) {
2760 atomic_set(&buffer->state,
2761 QETH_QDIO_BUF_PRIMED);
2762 flush_count++;
2763 queue->next_buf_to_fill =
2764 (queue->next_buf_to_fill + 1) %
2765 QDIO_MAX_BUFFERS_PER_Q;
2766 }
2767 }
2768 }
2769 return flush_count;
2770 }
2771
2772 /*
2773 * Called to flush a packing buffer if no more pci flags are on the queue.
2774 * Checks if there is a packing buffer and prepares it to be flushed.
2775 * In that case returns 1, otherwise zero.
2776 */
2777 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2778 {
2779 struct qeth_qdio_out_buffer *buffer;
2780
2781 buffer = &queue->bufs[queue->next_buf_to_fill];
2782 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2783 (buffer->next_element_to_fill > 0)) {
2784 /* it's a packing buffer */
2785 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2786 queue->next_buf_to_fill =
2787 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2788 return 1;
2789 }
2790 return 0;
2791 }
2792
2793 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2794 int count)
2795 {
2796 struct qeth_qdio_out_buffer *buf;
2797 int rc;
2798 int i;
2799 unsigned int qdio_flags;
2800
2801 for (i = index; i < index + count; ++i) {
2802 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2803 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2804 SBAL_FLAGS_LAST_ENTRY;
2805
2806 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2807 continue;
2808
2809 if (!queue->do_pack) {
2810 if ((atomic_read(&queue->used_buffers) >=
2811 (QETH_HIGH_WATERMARK_PACK -
2812 QETH_WATERMARK_PACK_FUZZ)) &&
2813 !atomic_read(&queue->set_pci_flags_count)) {
2814 /* it's likely that we'll go to packing
2815 * mode soon */
2816 atomic_inc(&queue->set_pci_flags_count);
2817 buf->buffer->element[0].flags |= 0x40;
2818 }
2819 } else {
2820 if (!atomic_read(&queue->set_pci_flags_count)) {
2821 /*
2822 * there's no outstanding PCI any more, so we
2823 * have to request a PCI to be sure the the PCI
2824 * will wake at some time in the future then we
2825 * can flush packed buffers that might still be
2826 * hanging around, which can happen if no
2827 * further send was requested by the stack
2828 */
2829 atomic_inc(&queue->set_pci_flags_count);
2830 buf->buffer->element[0].flags |= 0x40;
2831 }
2832 }
2833 }
2834
2835 queue->sync_iqdio_error = 0;
2836 queue->card->dev->trans_start = jiffies;
2837 if (queue->card->options.performance_stats) {
2838 queue->card->perf_stats.outbound_do_qdio_cnt++;
2839 queue->card->perf_stats.outbound_do_qdio_start_time =
2840 qeth_get_micros();
2841 }
2842 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2843 if (atomic_read(&queue->set_pci_flags_count))
2844 qdio_flags |= QDIO_FLAG_PCI_OUT;
2845 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2846 queue->queue_no, index, count);
2847 if (queue->card->options.performance_stats)
2848 queue->card->perf_stats.outbound_do_qdio_time +=
2849 qeth_get_micros() -
2850 queue->card->perf_stats.outbound_do_qdio_start_time;
2851 if (rc > 0) {
2852 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2853 queue->sync_iqdio_error = rc & 3;
2854 }
2855 if (rc) {
2856 queue->card->stats.tx_errors += count;
2857 /* ignore temporary SIGA errors without busy condition */
2858 if (rc == QDIO_ERROR_SIGA_TARGET)
2859 return;
2860 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2861 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2862 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2863
2864 /* this must not happen under normal circumstances. if it
2865 * happens something is really wrong -> recover */
2866 qeth_schedule_recovery(queue->card);
2867 return;
2868 }
2869 atomic_add(count, &queue->used_buffers);
2870 if (queue->card->options.performance_stats)
2871 queue->card->perf_stats.bufs_sent += count;
2872 }
2873
2874 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2875 {
2876 int index;
2877 int flush_cnt = 0;
2878 int q_was_packing = 0;
2879
2880 /*
2881 * check if weed have to switch to non-packing mode or if
2882 * we have to get a pci flag out on the queue
2883 */
2884 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2885 !atomic_read(&queue->set_pci_flags_count)) {
2886 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2887 QETH_OUT_Q_UNLOCKED) {
2888 /*
2889 * If we get in here, there was no action in
2890 * do_send_packet. So, we check if there is a
2891 * packing buffer to be flushed here.
2892 */
2893 netif_stop_queue(queue->card->dev);
2894 index = queue->next_buf_to_fill;
2895 q_was_packing = queue->do_pack;
2896 /* queue->do_pack may change */
2897 barrier();
2898 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2899 if (!flush_cnt &&
2900 !atomic_read(&queue->set_pci_flags_count))
2901 flush_cnt +=
2902 qeth_flush_buffers_on_no_pci(queue);
2903 if (queue->card->options.performance_stats &&
2904 q_was_packing)
2905 queue->card->perf_stats.bufs_sent_pack +=
2906 flush_cnt;
2907 if (flush_cnt)
2908 qeth_flush_buffers(queue, index, flush_cnt);
2909 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2910 }
2911 }
2912 }
2913
2914 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2915 unsigned int qdio_error, int __queue, int first_element,
2916 int count, unsigned long card_ptr)
2917 {
2918 struct qeth_card *card = (struct qeth_card *) card_ptr;
2919 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2920 struct qeth_qdio_out_buffer *buffer;
2921 int i;
2922 unsigned qeth_send_err;
2923
2924 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2925 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2926 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2927 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2928 netif_stop_queue(card->dev);
2929 qeth_schedule_recovery(card);
2930 return;
2931 }
2932 if (card->options.performance_stats) {
2933 card->perf_stats.outbound_handler_cnt++;
2934 card->perf_stats.outbound_handler_start_time =
2935 qeth_get_micros();
2936 }
2937 for (i = first_element; i < (first_element + count); ++i) {
2938 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2939 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2940 __qeth_clear_output_buffer(queue, buffer,
2941 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2942 }
2943 atomic_sub(count, &queue->used_buffers);
2944 /* check if we need to do something on this outbound queue */
2945 if (card->info.type != QETH_CARD_TYPE_IQD)
2946 qeth_check_outbound_queue(queue);
2947
2948 netif_wake_queue(queue->card->dev);
2949 if (card->options.performance_stats)
2950 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2951 card->perf_stats.outbound_handler_start_time;
2952 }
2953 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2954
2955 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2956 int ipv, int cast_type)
2957 {
2958 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2959 return card->qdio.default_out_queue;
2960 switch (card->qdio.no_out_queues) {
2961 case 4:
2962 if (cast_type && card->info.is_multicast_different)
2963 return card->info.is_multicast_different &
2964 (card->qdio.no_out_queues - 1);
2965 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2966 const u8 tos = ip_hdr(skb)->tos;
2967
2968 if (card->qdio.do_prio_queueing ==
2969 QETH_PRIO_Q_ING_TOS) {
2970 if (tos & IP_TOS_NOTIMPORTANT)
2971 return 3;
2972 if (tos & IP_TOS_HIGHRELIABILITY)
2973 return 2;
2974 if (tos & IP_TOS_HIGHTHROUGHPUT)
2975 return 1;
2976 if (tos & IP_TOS_LOWDELAY)
2977 return 0;
2978 }
2979 if (card->qdio.do_prio_queueing ==
2980 QETH_PRIO_Q_ING_PREC)
2981 return 3 - (tos >> 6);
2982 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2983 /* TODO: IPv6!!! */
2984 }
2985 return card->qdio.default_out_queue;
2986 case 1: /* fallthrough for single-out-queue 1920-device */
2987 default:
2988 return card->qdio.default_out_queue;
2989 }
2990 }
2991 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2992
2993 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2994 struct sk_buff *skb, int elems)
2995 {
2996 int elements_needed = 0;
2997
2998 if (skb_shinfo(skb)->nr_frags > 0)
2999 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3000 if (elements_needed == 0)
3001 elements_needed = 1 + (((((unsigned long) skb->data) %
3002 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
3003 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3004 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3005 "(Number=%d / Length=%d). Discarded.\n",
3006 (elements_needed+elems), skb->len);
3007 return 0;
3008 }
3009 return elements_needed;
3010 }
3011 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3012
3013 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3014 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3015 int offset)
3016 {
3017 int length = skb->len;
3018 int length_here;
3019 int element;
3020 char *data;
3021 int first_lap ;
3022
3023 element = *next_element_to_fill;
3024 data = skb->data;
3025 first_lap = (is_tso == 0 ? 1 : 0);
3026
3027 if (offset >= 0) {
3028 data = skb->data + offset;
3029 length -= offset;
3030 first_lap = 0;
3031 }
3032
3033 while (length > 0) {
3034 /* length_here is the remaining amount of data in this page */
3035 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3036 if (length < length_here)
3037 length_here = length;
3038
3039 buffer->element[element].addr = data;
3040 buffer->element[element].length = length_here;
3041 length -= length_here;
3042 if (!length) {
3043 if (first_lap)
3044 buffer->element[element].flags = 0;
3045 else
3046 buffer->element[element].flags =
3047 SBAL_FLAGS_LAST_FRAG;
3048 } else {
3049 if (first_lap)
3050 buffer->element[element].flags =
3051 SBAL_FLAGS_FIRST_FRAG;
3052 else
3053 buffer->element[element].flags =
3054 SBAL_FLAGS_MIDDLE_FRAG;
3055 }
3056 data += length_here;
3057 element++;
3058 first_lap = 0;
3059 }
3060 *next_element_to_fill = element;
3061 }
3062
3063 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3064 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3065 struct qeth_hdr *hdr, int offset, int hd_len)
3066 {
3067 struct qdio_buffer *buffer;
3068 int flush_cnt = 0, hdr_len, large_send = 0;
3069
3070 buffer = buf->buffer;
3071 atomic_inc(&skb->users);
3072 skb_queue_tail(&buf->skb_list, skb);
3073
3074 /*check first on TSO ....*/
3075 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3076 int element = buf->next_element_to_fill;
3077
3078 hdr_len = sizeof(struct qeth_hdr_tso) +
3079 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3080 /*fill first buffer entry only with header information */
3081 buffer->element[element].addr = skb->data;
3082 buffer->element[element].length = hdr_len;
3083 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3084 buf->next_element_to_fill++;
3085 skb->data += hdr_len;
3086 skb->len -= hdr_len;
3087 large_send = 1;
3088 }
3089
3090 if (offset >= 0) {
3091 int element = buf->next_element_to_fill;
3092 buffer->element[element].addr = hdr;
3093 buffer->element[element].length = sizeof(struct qeth_hdr) +
3094 hd_len;
3095 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3096 buf->is_header[element] = 1;
3097 buf->next_element_to_fill++;
3098 }
3099
3100 if (skb_shinfo(skb)->nr_frags == 0)
3101 __qeth_fill_buffer(skb, buffer, large_send,
3102 (int *)&buf->next_element_to_fill, offset);
3103 else
3104 __qeth_fill_buffer_frag(skb, buffer, large_send,
3105 (int *)&buf->next_element_to_fill);
3106
3107 if (!queue->do_pack) {
3108 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3109 /* set state to PRIMED -> will be flushed */
3110 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3111 flush_cnt = 1;
3112 } else {
3113 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3114 if (queue->card->options.performance_stats)
3115 queue->card->perf_stats.skbs_sent_pack++;
3116 if (buf->next_element_to_fill >=
3117 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3118 /*
3119 * packed buffer if full -> set state PRIMED
3120 * -> will be flushed
3121 */
3122 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3123 flush_cnt = 1;
3124 }
3125 }
3126 return flush_cnt;
3127 }
3128
3129 int qeth_do_send_packet_fast(struct qeth_card *card,
3130 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3131 struct qeth_hdr *hdr, int elements_needed,
3132 int offset, int hd_len)
3133 {
3134 struct qeth_qdio_out_buffer *buffer;
3135 struct sk_buff *skb1;
3136 struct qeth_skb_data *retry_ctrl;
3137 int index;
3138 int rc;
3139
3140 /* spin until we get the queue ... */
3141 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3142 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3143 /* ... now we've got the queue */
3144 index = queue->next_buf_to_fill;
3145 buffer = &queue->bufs[queue->next_buf_to_fill];
3146 /*
3147 * check if buffer is empty to make sure that we do not 'overtake'
3148 * ourselves and try to fill a buffer that is already primed
3149 */
3150 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3151 goto out;
3152 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3153 QDIO_MAX_BUFFERS_PER_Q;
3154 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3155 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3156 qeth_flush_buffers(queue, index, 1);
3157 if (queue->sync_iqdio_error == 2) {
3158 skb1 = skb_dequeue(&buffer->skb_list);
3159 while (skb1) {
3160 atomic_dec(&skb1->users);
3161 skb1 = skb_dequeue(&buffer->skb_list);
3162 }
3163 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3164 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3165 retry_ctrl->magic = QETH_SKB_MAGIC;
3166 retry_ctrl->count = 0;
3167 }
3168 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3169 retry_ctrl->count++;
3170 rc = dev_queue_xmit(skb);
3171 } else {
3172 dev_kfree_skb_any(skb);
3173 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3174 }
3175 }
3176 return 0;
3177 out:
3178 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3179 return -EBUSY;
3180 }
3181 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3182
3183 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3184 struct sk_buff *skb, struct qeth_hdr *hdr,
3185 int elements_needed)
3186 {
3187 struct qeth_qdio_out_buffer *buffer;
3188 int start_index;
3189 int flush_count = 0;
3190 int do_pack = 0;
3191 int tmp;
3192 int rc = 0;
3193
3194 /* spin until we get the queue ... */
3195 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3196 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3197 start_index = queue->next_buf_to_fill;
3198 buffer = &queue->bufs[queue->next_buf_to_fill];
3199 /*
3200 * check if buffer is empty to make sure that we do not 'overtake'
3201 * ourselves and try to fill a buffer that is already primed
3202 */
3203 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3204 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3205 return -EBUSY;
3206 }
3207 /* check if we need to switch packing state of this queue */
3208 qeth_switch_to_packing_if_needed(queue);
3209 if (queue->do_pack) {
3210 do_pack = 1;
3211 /* does packet fit in current buffer? */
3212 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3213 buffer->next_element_to_fill) < elements_needed) {
3214 /* ... no -> set state PRIMED */
3215 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3216 flush_count++;
3217 queue->next_buf_to_fill =
3218 (queue->next_buf_to_fill + 1) %
3219 QDIO_MAX_BUFFERS_PER_Q;
3220 buffer = &queue->bufs[queue->next_buf_to_fill];
3221 /* we did a step forward, so check buffer state
3222 * again */
3223 if (atomic_read(&buffer->state) !=
3224 QETH_QDIO_BUF_EMPTY) {
3225 qeth_flush_buffers(queue, start_index,
3226 flush_count);
3227 atomic_set(&queue->state,
3228 QETH_OUT_Q_UNLOCKED);
3229 return -EBUSY;
3230 }
3231 }
3232 }
3233 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3234 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3235 QDIO_MAX_BUFFERS_PER_Q;
3236 flush_count += tmp;
3237 if (flush_count)
3238 qeth_flush_buffers(queue, start_index, flush_count);
3239 else if (!atomic_read(&queue->set_pci_flags_count))
3240 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3241 /*
3242 * queue->state will go from LOCKED -> UNLOCKED or from
3243 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3244 * (switch packing state or flush buffer to get another pci flag out).
3245 * In that case we will enter this loop
3246 */
3247 while (atomic_dec_return(&queue->state)) {
3248 flush_count = 0;
3249 start_index = queue->next_buf_to_fill;
3250 /* check if we can go back to non-packing state */
3251 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3252 /*
3253 * check if we need to flush a packing buffer to get a pci
3254 * flag out on the queue
3255 */
3256 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3257 flush_count += qeth_flush_buffers_on_no_pci(queue);
3258 if (flush_count)
3259 qeth_flush_buffers(queue, start_index, flush_count);
3260 }
3261 /* at this point the queue is UNLOCKED again */
3262 if (queue->card->options.performance_stats && do_pack)
3263 queue->card->perf_stats.bufs_sent_pack += flush_count;
3264
3265 return rc;
3266 }
3267 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3268
3269 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3270 struct qeth_reply *reply, unsigned long data)
3271 {
3272 struct qeth_ipa_cmd *cmd;
3273 struct qeth_ipacmd_setadpparms *setparms;
3274
3275 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3276
3277 cmd = (struct qeth_ipa_cmd *) data;
3278 setparms = &(cmd->data.setadapterparms);
3279
3280 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3281 if (cmd->hdr.return_code) {
3282 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3283 setparms->data.mode = SET_PROMISC_MODE_OFF;
3284 }
3285 card->info.promisc_mode = setparms->data.mode;
3286 return 0;
3287 }
3288
3289 void qeth_setadp_promisc_mode(struct qeth_card *card)
3290 {
3291 enum qeth_ipa_promisc_modes mode;
3292 struct net_device *dev = card->dev;
3293 struct qeth_cmd_buffer *iob;
3294 struct qeth_ipa_cmd *cmd;
3295
3296 QETH_DBF_TEXT(TRACE, 4, "setprom");
3297
3298 if (((dev->flags & IFF_PROMISC) &&
3299 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3300 (!(dev->flags & IFF_PROMISC) &&
3301 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3302 return;
3303 mode = SET_PROMISC_MODE_OFF;
3304 if (dev->flags & IFF_PROMISC)
3305 mode = SET_PROMISC_MODE_ON;
3306 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3307
3308 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3309 sizeof(struct qeth_ipacmd_setadpparms));
3310 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3311 cmd->data.setadapterparms.data.mode = mode;
3312 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3313 }
3314 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3315
3316 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3317 {
3318 struct qeth_card *card;
3319 char dbf_text[15];
3320
3321 card = dev->ml_priv;
3322
3323 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3324 sprintf(dbf_text, "%8x", new_mtu);
3325 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3326
3327 if (new_mtu < 64)
3328 return -EINVAL;
3329 if (new_mtu > 65535)
3330 return -EINVAL;
3331 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3332 (!qeth_mtu_is_valid(card, new_mtu)))
3333 return -EINVAL;
3334 dev->mtu = new_mtu;
3335 return 0;
3336 }
3337 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3338
3339 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3340 {
3341 struct qeth_card *card;
3342
3343 card = dev->ml_priv;
3344
3345 QETH_DBF_TEXT(TRACE, 5, "getstat");
3346
3347 return &card->stats;
3348 }
3349 EXPORT_SYMBOL_GPL(qeth_get_stats);
3350
3351 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3352 struct qeth_reply *reply, unsigned long data)
3353 {
3354 struct qeth_ipa_cmd *cmd;
3355
3356 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3357
3358 cmd = (struct qeth_ipa_cmd *) data;
3359 if (!card->options.layer2 ||
3360 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3361 memcpy(card->dev->dev_addr,
3362 &cmd->data.setadapterparms.data.change_addr.addr,
3363 OSA_ADDR_LEN);
3364 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3365 }
3366 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3367 return 0;
3368 }
3369
3370 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3371 {
3372 int rc;
3373 struct qeth_cmd_buffer *iob;
3374 struct qeth_ipa_cmd *cmd;
3375
3376 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3377
3378 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3379 sizeof(struct qeth_ipacmd_setadpparms));
3380 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3381 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3382 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3383 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3384 card->dev->dev_addr, OSA_ADDR_LEN);
3385 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3386 NULL);
3387 return rc;
3388 }
3389 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3390
3391 void qeth_tx_timeout(struct net_device *dev)
3392 {
3393 struct qeth_card *card;
3394
3395 card = dev->ml_priv;
3396 card->stats.tx_errors++;
3397 qeth_schedule_recovery(card);
3398 }
3399 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3400
3401 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3402 {
3403 struct qeth_card *card = dev->ml_priv;
3404 int rc = 0;
3405
3406 switch (regnum) {
3407 case MII_BMCR: /* Basic mode control register */
3408 rc = BMCR_FULLDPLX;
3409 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3410 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3411 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3412 rc |= BMCR_SPEED100;
3413 break;
3414 case MII_BMSR: /* Basic mode status register */
3415 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3416 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3417 BMSR_100BASE4;
3418 break;
3419 case MII_PHYSID1: /* PHYS ID 1 */
3420 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3421 dev->dev_addr[2];
3422 rc = (rc >> 5) & 0xFFFF;
3423 break;
3424 case MII_PHYSID2: /* PHYS ID 2 */
3425 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3426 break;
3427 case MII_ADVERTISE: /* Advertisement control reg */
3428 rc = ADVERTISE_ALL;
3429 break;
3430 case MII_LPA: /* Link partner ability reg */
3431 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3432 LPA_100BASE4 | LPA_LPACK;
3433 break;
3434 case MII_EXPANSION: /* Expansion register */
3435 break;
3436 case MII_DCOUNTER: /* disconnect counter */
3437 break;
3438 case MII_FCSCOUNTER: /* false carrier counter */
3439 break;
3440 case MII_NWAYTEST: /* N-way auto-neg test register */
3441 break;
3442 case MII_RERRCOUNTER: /* rx error counter */
3443 rc = card->stats.rx_errors;
3444 break;
3445 case MII_SREVISION: /* silicon revision */
3446 break;
3447 case MII_RESV1: /* reserved 1 */
3448 break;
3449 case MII_LBRERROR: /* loopback, rx, bypass error */
3450 break;
3451 case MII_PHYADDR: /* physical address */
3452 break;
3453 case MII_RESV2: /* reserved 2 */
3454 break;
3455 case MII_TPISTATUS: /* TPI status for 10mbps */
3456 break;
3457 case MII_NCONFIG: /* network interface config */
3458 break;
3459 default:
3460 break;
3461 }
3462 return rc;
3463 }
3464 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3465
3466 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3467 struct qeth_cmd_buffer *iob, int len,
3468 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3469 unsigned long),
3470 void *reply_param)
3471 {
3472 u16 s1, s2;
3473
3474 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3475
3476 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3477 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3478 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3479 /* adjust PDU length fields in IPA_PDU_HEADER */
3480 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3481 s2 = (u32) len;
3482 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3483 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3484 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3485 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3486 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3487 reply_cb, reply_param);
3488 }
3489
3490 static int qeth_snmp_command_cb(struct qeth_card *card,
3491 struct qeth_reply *reply, unsigned long sdata)
3492 {
3493 struct qeth_ipa_cmd *cmd;
3494 struct qeth_arp_query_info *qinfo;
3495 struct qeth_snmp_cmd *snmp;
3496 unsigned char *data;
3497 __u16 data_len;
3498
3499 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3500
3501 cmd = (struct qeth_ipa_cmd *) sdata;
3502 data = (unsigned char *)((char *)cmd - reply->offset);
3503 qinfo = (struct qeth_arp_query_info *) reply->param;
3504 snmp = &cmd->data.setadapterparms.data.snmp;
3505
3506 if (cmd->hdr.return_code) {
3507 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3508 return 0;
3509 }
3510 if (cmd->data.setadapterparms.hdr.return_code) {
3511 cmd->hdr.return_code =
3512 cmd->data.setadapterparms.hdr.return_code;
3513 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3514 return 0;
3515 }
3516 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3517 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3518 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3519 else
3520 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3521
3522 /* check if there is enough room in userspace */
3523 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3524 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3525 cmd->hdr.return_code = -ENOMEM;
3526 return 0;
3527 }
3528 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3529 cmd->data.setadapterparms.hdr.used_total);
3530 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3531 cmd->data.setadapterparms.hdr.seq_no);
3532 /*copy entries to user buffer*/
3533 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3534 memcpy(qinfo->udata + qinfo->udata_offset,
3535 (char *)snmp,
3536 data_len + offsetof(struct qeth_snmp_cmd, data));
3537 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3538 } else {
3539 memcpy(qinfo->udata + qinfo->udata_offset,
3540 (char *)&snmp->request, data_len);
3541 }
3542 qinfo->udata_offset += data_len;
3543 /* check if all replies received ... */
3544 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3545 cmd->data.setadapterparms.hdr.used_total);
3546 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3547 cmd->data.setadapterparms.hdr.seq_no);
3548 if (cmd->data.setadapterparms.hdr.seq_no <
3549 cmd->data.setadapterparms.hdr.used_total)
3550 return 1;
3551 return 0;
3552 }
3553
3554 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3555 {
3556 struct qeth_cmd_buffer *iob;
3557 struct qeth_ipa_cmd *cmd;
3558 struct qeth_snmp_ureq *ureq;
3559 int req_len;
3560 struct qeth_arp_query_info qinfo = {0, };
3561 int rc = 0;
3562
3563 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3564
3565 if (card->info.guestlan)
3566 return -EOPNOTSUPP;
3567
3568 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3569 (!card->options.layer2)) {
3570 return -EOPNOTSUPP;
3571 }
3572 /* skip 4 bytes (data_len struct member) to get req_len */
3573 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3574 return -EFAULT;
3575 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3576 if (!ureq) {
3577 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3578 return -ENOMEM;
3579 }
3580 if (copy_from_user(ureq, udata,
3581 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3582 kfree(ureq);
3583 return -EFAULT;
3584 }
3585 qinfo.udata_len = ureq->hdr.data_len;
3586 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3587 if (!qinfo.udata) {
3588 kfree(ureq);
3589 return -ENOMEM;
3590 }
3591 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3592
3593 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3594 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3595 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3596 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3597 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3598 qeth_snmp_command_cb, (void *)&qinfo);
3599 if (rc)
3600 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3601 QETH_CARD_IFNAME(card), rc);
3602 else {
3603 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3604 rc = -EFAULT;
3605 }
3606
3607 kfree(ureq);
3608 kfree(qinfo.udata);
3609 return rc;
3610 }
3611 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3612
3613 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3614 {
3615 switch (card->info.type) {
3616 case QETH_CARD_TYPE_IQD:
3617 return 2;
3618 default:
3619 return 0;
3620 }
3621 }
3622
3623 static int qeth_qdio_establish(struct qeth_card *card)
3624 {
3625 struct qdio_initialize init_data;
3626 char *qib_param_field;
3627 struct qdio_buffer **in_sbal_ptrs;
3628 struct qdio_buffer **out_sbal_ptrs;
3629 int i, j, k;
3630 int rc = 0;
3631
3632 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3633
3634 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3635 GFP_KERNEL);
3636 if (!qib_param_field)
3637 return -ENOMEM;
3638
3639 qeth_create_qib_param_field(card, qib_param_field);
3640 qeth_create_qib_param_field_blkt(card, qib_param_field);
3641
3642 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3643 GFP_KERNEL);
3644 if (!in_sbal_ptrs) {
3645 kfree(qib_param_field);
3646 return -ENOMEM;
3647 }
3648 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3649 in_sbal_ptrs[i] = (struct qdio_buffer *)
3650 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3651
3652 out_sbal_ptrs =
3653 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3654 sizeof(void *), GFP_KERNEL);
3655 if (!out_sbal_ptrs) {
3656 kfree(in_sbal_ptrs);
3657 kfree(qib_param_field);
3658 return -ENOMEM;
3659 }
3660 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3661 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3662 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3663 card->qdio.out_qs[i]->bufs[j].buffer);
3664 }
3665
3666 memset(&init_data, 0, sizeof(struct qdio_initialize));
3667 init_data.cdev = CARD_DDEV(card);
3668 init_data.q_format = qeth_get_qdio_q_format(card);
3669 init_data.qib_param_field_format = 0;
3670 init_data.qib_param_field = qib_param_field;
3671 init_data.no_input_qs = 1;
3672 init_data.no_output_qs = card->qdio.no_out_queues;
3673 init_data.input_handler = card->discipline.input_handler;
3674 init_data.output_handler = card->discipline.output_handler;
3675 init_data.int_parm = (unsigned long) card;
3676 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3677 QDIO_OUTBOUND_0COPY_SBALS |
3678 QDIO_USE_OUTBOUND_PCIS;
3679 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3680 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3681
3682 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3683 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3684 rc = qdio_initialize(&init_data);
3685 if (rc)
3686 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3687 }
3688 kfree(out_sbal_ptrs);
3689 kfree(in_sbal_ptrs);
3690 kfree(qib_param_field);
3691 return rc;
3692 }
3693
3694 static void qeth_core_free_card(struct qeth_card *card)
3695 {
3696
3697 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3698 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3699 qeth_clean_channel(&card->read);
3700 qeth_clean_channel(&card->write);
3701 if (card->dev)
3702 free_netdev(card->dev);
3703 kfree(card->ip_tbd_list);
3704 qeth_free_qdio_buffers(card);
3705 unregister_service_level(&card->qeth_service_level);
3706 kfree(card);
3707 }
3708
3709 static struct ccw_device_id qeth_ids[] = {
3710 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3711 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3712 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3713 {},
3714 };
3715 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3716
3717 static struct ccw_driver qeth_ccw_driver = {
3718 .name = "qeth",
3719 .ids = qeth_ids,
3720 .probe = ccwgroup_probe_ccwdev,
3721 .remove = ccwgroup_remove_ccwdev,
3722 };
3723
3724 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3725 unsigned long driver_id)
3726 {
3727 return ccwgroup_create_from_string(root_dev, driver_id,
3728 &qeth_ccw_driver, 3, buf);
3729 }
3730
3731 int qeth_core_hardsetup_card(struct qeth_card *card)
3732 {
3733 struct qdio_ssqd_desc *ssqd;
3734 int retries = 3;
3735 int mpno = 0;
3736 int rc;
3737
3738 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3739 atomic_set(&card->force_alloc_skb, 0);
3740 retry:
3741 if (retries < 3) {
3742 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3743 dev_name(&card->gdev->dev));
3744 ccw_device_set_offline(CARD_DDEV(card));
3745 ccw_device_set_offline(CARD_WDEV(card));
3746 ccw_device_set_offline(CARD_RDEV(card));
3747 ccw_device_set_online(CARD_RDEV(card));
3748 ccw_device_set_online(CARD_WDEV(card));
3749 ccw_device_set_online(CARD_DDEV(card));
3750 }
3751 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3752 if (rc == -ERESTARTSYS) {
3753 QETH_DBF_TEXT(SETUP, 2, "break1");
3754 return rc;
3755 } else if (rc) {
3756 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3757 if (--retries < 0)
3758 goto out;
3759 else
3760 goto retry;
3761 }
3762
3763 rc = qeth_get_unitaddr(card);
3764 if (rc) {
3765 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3766 return rc;
3767 }
3768
3769 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3770 if (!ssqd) {
3771 rc = -ENOMEM;
3772 goto out;
3773 }
3774 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3775 if (rc == 0)
3776 mpno = ssqd->pcnt;
3777 kfree(ssqd);
3778
3779 if (mpno)
3780 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3781 if (card->info.portno > mpno) {
3782 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3783 "\n.", CARD_BUS_ID(card), card->info.portno);
3784 rc = -ENODEV;
3785 goto out;
3786 }
3787 qeth_init_tokens(card);
3788 qeth_init_func_level(card);
3789 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3790 if (rc == -ERESTARTSYS) {
3791 QETH_DBF_TEXT(SETUP, 2, "break2");
3792 return rc;
3793 } else if (rc) {
3794 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3795 if (--retries < 0)
3796 goto out;
3797 else
3798 goto retry;
3799 }
3800 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3801 if (rc == -ERESTARTSYS) {
3802 QETH_DBF_TEXT(SETUP, 2, "break3");
3803 return rc;
3804 } else if (rc) {
3805 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3806 if (--retries < 0)
3807 goto out;
3808 else
3809 goto retry;
3810 }
3811 rc = qeth_mpc_initialize(card);
3812 if (rc) {
3813 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3814 goto out;
3815 }
3816 return 0;
3817 out:
3818 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3819 "an error on the device\n");
3820 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3821 dev_name(&card->gdev->dev), rc);
3822 return rc;
3823 }
3824 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3825
3826 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3827 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3828 {
3829 struct page *page = virt_to_page(element->addr);
3830 if (*pskb == NULL) {
3831 /* the upper protocol layers assume that there is data in the
3832 * skb itself. Copy a small amount (64 bytes) to make them
3833 * happy. */
3834 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3835 if (!(*pskb))
3836 return -ENOMEM;
3837 skb_reserve(*pskb, ETH_HLEN);
3838 if (data_len <= 64) {
3839 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3840 data_len);
3841 } else {
3842 get_page(page);
3843 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3844 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3845 data_len - 64);
3846 (*pskb)->data_len += data_len - 64;
3847 (*pskb)->len += data_len - 64;
3848 (*pskb)->truesize += data_len - 64;
3849 (*pfrag)++;
3850 }
3851 } else {
3852 get_page(page);
3853 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3854 (*pskb)->data_len += data_len;
3855 (*pskb)->len += data_len;
3856 (*pskb)->truesize += data_len;
3857 (*pfrag)++;
3858 }
3859 return 0;
3860 }
3861
3862 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3863 struct qdio_buffer *buffer,
3864 struct qdio_buffer_element **__element, int *__offset,
3865 struct qeth_hdr **hdr)
3866 {
3867 struct qdio_buffer_element *element = *__element;
3868 int offset = *__offset;
3869 struct sk_buff *skb = NULL;
3870 int skb_len;
3871 void *data_ptr;
3872 int data_len;
3873 int headroom = 0;
3874 int use_rx_sg = 0;
3875 int frag = 0;
3876
3877 /* qeth_hdr must not cross element boundaries */
3878 if (element->length < offset + sizeof(struct qeth_hdr)) {
3879 if (qeth_is_last_sbale(element))
3880 return NULL;
3881 element++;
3882 offset = 0;
3883 if (element->length < sizeof(struct qeth_hdr))
3884 return NULL;
3885 }
3886 *hdr = element->addr + offset;
3887
3888 offset += sizeof(struct qeth_hdr);
3889 if (card->options.layer2) {
3890 if (card->info.type == QETH_CARD_TYPE_OSN) {
3891 skb_len = (*hdr)->hdr.osn.pdu_length;
3892 headroom = sizeof(struct qeth_hdr);
3893 } else {
3894 skb_len = (*hdr)->hdr.l2.pkt_length;
3895 }
3896 } else {
3897 skb_len = (*hdr)->hdr.l3.length;
3898 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3899 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3900 headroom = TR_HLEN;
3901 else
3902 headroom = ETH_HLEN;
3903 }
3904
3905 if (!skb_len)
3906 return NULL;
3907
3908 if ((skb_len >= card->options.rx_sg_cb) &&
3909 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3910 (!atomic_read(&card->force_alloc_skb))) {
3911 use_rx_sg = 1;
3912 } else {
3913 skb = dev_alloc_skb(skb_len + headroom);
3914 if (!skb)
3915 goto no_mem;
3916 if (headroom)
3917 skb_reserve(skb, headroom);
3918 }
3919
3920 data_ptr = element->addr + offset;
3921 while (skb_len) {
3922 data_len = min(skb_len, (int)(element->length - offset));
3923 if (data_len) {
3924 if (use_rx_sg) {
3925 if (qeth_create_skb_frag(element, &skb, offset,
3926 &frag, data_len))
3927 goto no_mem;
3928 } else {
3929 memcpy(skb_put(skb, data_len), data_ptr,
3930 data_len);
3931 }
3932 }
3933 skb_len -= data_len;
3934 if (skb_len) {
3935 if (qeth_is_last_sbale(element)) {
3936 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3937 QETH_DBF_TEXT_(TRACE, 4, "%s",
3938 CARD_BUS_ID(card));
3939 QETH_DBF_TEXT(QERR, 2, "unexeob");
3940 QETH_DBF_TEXT_(QERR, 2, "%s",
3941 CARD_BUS_ID(card));
3942 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3943 dev_kfree_skb_any(skb);
3944 card->stats.rx_errors++;
3945 return NULL;
3946 }
3947 element++;
3948 offset = 0;
3949 data_ptr = element->addr;
3950 } else {
3951 offset += data_len;
3952 }
3953 }
3954 *__element = element;
3955 *__offset = offset;
3956 if (use_rx_sg && card->options.performance_stats) {
3957 card->perf_stats.sg_skbs_rx++;
3958 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3959 }
3960 return skb;
3961 no_mem:
3962 if (net_ratelimit()) {
3963 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3964 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
3965 }
3966 card->stats.rx_dropped++;
3967 return NULL;
3968 }
3969 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
3970
3971 static void qeth_unregister_dbf_views(void)
3972 {
3973 int x;
3974 for (x = 0; x < QETH_DBF_INFOS; x++) {
3975 debug_unregister(qeth_dbf[x].id);
3976 qeth_dbf[x].id = NULL;
3977 }
3978 }
3979
3980 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
3981 {
3982 char dbf_txt_buf[32];
3983 va_list args;
3984
3985 if (level > (qeth_dbf[dbf_nix].id)->level)
3986 return;
3987 va_start(args, fmt);
3988 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
3989 va_end(args);
3990 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
3991 }
3992 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
3993
3994 static int qeth_register_dbf_views(void)
3995 {
3996 int ret;
3997 int x;
3998
3999 for (x = 0; x < QETH_DBF_INFOS; x++) {
4000 /* register the areas */
4001 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4002 qeth_dbf[x].pages,
4003 qeth_dbf[x].areas,
4004 qeth_dbf[x].len);
4005 if (qeth_dbf[x].id == NULL) {
4006 qeth_unregister_dbf_views();
4007 return -ENOMEM;
4008 }
4009
4010 /* register a view */
4011 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4012 if (ret) {
4013 qeth_unregister_dbf_views();
4014 return ret;
4015 }
4016
4017 /* set a passing level */
4018 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4019 }
4020
4021 return 0;
4022 }
4023
4024 int qeth_core_load_discipline(struct qeth_card *card,
4025 enum qeth_discipline_id discipline)
4026 {
4027 int rc = 0;
4028 switch (discipline) {
4029 case QETH_DISCIPLINE_LAYER3:
4030 card->discipline.ccwgdriver = try_then_request_module(
4031 symbol_get(qeth_l3_ccwgroup_driver),
4032 "qeth_l3");
4033 break;
4034 case QETH_DISCIPLINE_LAYER2:
4035 card->discipline.ccwgdriver = try_then_request_module(
4036 symbol_get(qeth_l2_ccwgroup_driver),
4037 "qeth_l2");
4038 break;
4039 }
4040 if (!card->discipline.ccwgdriver) {
4041 dev_err(&card->gdev->dev, "There is no kernel module to "
4042 "support discipline %d\n", discipline);
4043 rc = -EINVAL;
4044 }
4045 return rc;
4046 }
4047
4048 void qeth_core_free_discipline(struct qeth_card *card)
4049 {
4050 if (card->options.layer2)
4051 symbol_put(qeth_l2_ccwgroup_driver);
4052 else
4053 symbol_put(qeth_l3_ccwgroup_driver);
4054 card->discipline.ccwgdriver = NULL;
4055 }
4056
4057 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4058 {
4059 struct qeth_card *card;
4060 struct device *dev;
4061 int rc;
4062 unsigned long flags;
4063
4064 QETH_DBF_TEXT(SETUP, 2, "probedev");
4065
4066 dev = &gdev->dev;
4067 if (!get_device(dev))
4068 return -ENODEV;
4069
4070 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4071
4072 card = qeth_alloc_card();
4073 if (!card) {
4074 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4075 rc = -ENOMEM;
4076 goto err_dev;
4077 }
4078 card->read.ccwdev = gdev->cdev[0];
4079 card->write.ccwdev = gdev->cdev[1];
4080 card->data.ccwdev = gdev->cdev[2];
4081 dev_set_drvdata(&gdev->dev, card);
4082 card->gdev = gdev;
4083 gdev->cdev[0]->handler = qeth_irq;
4084 gdev->cdev[1]->handler = qeth_irq;
4085 gdev->cdev[2]->handler = qeth_irq;
4086
4087 rc = qeth_determine_card_type(card);
4088 if (rc) {
4089 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4090 goto err_card;
4091 }
4092 rc = qeth_setup_card(card);
4093 if (rc) {
4094 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4095 goto err_card;
4096 }
4097
4098 if (card->info.type == QETH_CARD_TYPE_OSN) {
4099 rc = qeth_core_create_osn_attributes(dev);
4100 if (rc)
4101 goto err_card;
4102 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4103 if (rc) {
4104 qeth_core_remove_osn_attributes(dev);
4105 goto err_card;
4106 }
4107 rc = card->discipline.ccwgdriver->probe(card->gdev);
4108 if (rc) {
4109 qeth_core_free_discipline(card);
4110 qeth_core_remove_osn_attributes(dev);
4111 goto err_card;
4112 }
4113 } else {
4114 rc = qeth_core_create_device_attributes(dev);
4115 if (rc)
4116 goto err_card;
4117 }
4118
4119 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4120 list_add_tail(&card->list, &qeth_core_card_list.list);
4121 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4122 return 0;
4123
4124 err_card:
4125 qeth_core_free_card(card);
4126 err_dev:
4127 put_device(dev);
4128 return rc;
4129 }
4130
4131 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4132 {
4133 unsigned long flags;
4134 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4135
4136 QETH_DBF_TEXT(SETUP, 2, "removedv");
4137 if (card->discipline.ccwgdriver) {
4138 card->discipline.ccwgdriver->remove(gdev);
4139 qeth_core_free_discipline(card);
4140 }
4141
4142 if (card->info.type == QETH_CARD_TYPE_OSN) {
4143 qeth_core_remove_osn_attributes(&gdev->dev);
4144 } else {
4145 qeth_core_remove_device_attributes(&gdev->dev);
4146 }
4147 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4148 list_del(&card->list);
4149 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4150 qeth_core_free_card(card);
4151 dev_set_drvdata(&gdev->dev, NULL);
4152 put_device(&gdev->dev);
4153 return;
4154 }
4155
4156 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4157 {
4158 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4159 int rc = 0;
4160 int def_discipline;
4161
4162 if (!card->discipline.ccwgdriver) {
4163 if (card->info.type == QETH_CARD_TYPE_IQD)
4164 def_discipline = QETH_DISCIPLINE_LAYER3;
4165 else
4166 def_discipline = QETH_DISCIPLINE_LAYER2;
4167 rc = qeth_core_load_discipline(card, def_discipline);
4168 if (rc)
4169 goto err;
4170 rc = card->discipline.ccwgdriver->probe(card->gdev);
4171 if (rc)
4172 goto err;
4173 }
4174 rc = card->discipline.ccwgdriver->set_online(gdev);
4175 err:
4176 return rc;
4177 }
4178
4179 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4180 {
4181 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4182 return card->discipline.ccwgdriver->set_offline(gdev);
4183 }
4184
4185 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4186 {
4187 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4188 if (card->discipline.ccwgdriver &&
4189 card->discipline.ccwgdriver->shutdown)
4190 card->discipline.ccwgdriver->shutdown(gdev);
4191 }
4192
4193 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4194 {
4195 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4196 if (card->discipline.ccwgdriver &&
4197 card->discipline.ccwgdriver->prepare)
4198 return card->discipline.ccwgdriver->prepare(gdev);
4199 return 0;
4200 }
4201
4202 static void qeth_core_complete(struct ccwgroup_device *gdev)
4203 {
4204 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4205 if (card->discipline.ccwgdriver &&
4206 card->discipline.ccwgdriver->complete)
4207 card->discipline.ccwgdriver->complete(gdev);
4208 }
4209
4210 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4211 {
4212 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4213 if (card->discipline.ccwgdriver &&
4214 card->discipline.ccwgdriver->freeze)
4215 return card->discipline.ccwgdriver->freeze(gdev);
4216 return 0;
4217 }
4218
4219 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4220 {
4221 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4222 if (card->discipline.ccwgdriver &&
4223 card->discipline.ccwgdriver->thaw)
4224 return card->discipline.ccwgdriver->thaw(gdev);
4225 return 0;
4226 }
4227
4228 static int qeth_core_restore(struct ccwgroup_device *gdev)
4229 {
4230 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4231 if (card->discipline.ccwgdriver &&
4232 card->discipline.ccwgdriver->restore)
4233 return card->discipline.ccwgdriver->restore(gdev);
4234 return 0;
4235 }
4236
4237 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4238 .owner = THIS_MODULE,
4239 .name = "qeth",
4240 .driver_id = 0xD8C5E3C8,
4241 .probe = qeth_core_probe_device,
4242 .remove = qeth_core_remove_device,
4243 .set_online = qeth_core_set_online,
4244 .set_offline = qeth_core_set_offline,
4245 .shutdown = qeth_core_shutdown,
4246 .prepare = qeth_core_prepare,
4247 .complete = qeth_core_complete,
4248 .freeze = qeth_core_freeze,
4249 .thaw = qeth_core_thaw,
4250 .restore = qeth_core_restore,
4251 };
4252
4253 static ssize_t
4254 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4255 size_t count)
4256 {
4257 int err;
4258 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4259 qeth_core_ccwgroup_driver.driver_id);
4260 if (err)
4261 return err;
4262 else
4263 return count;
4264 }
4265
4266 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4267
4268 static struct {
4269 const char str[ETH_GSTRING_LEN];
4270 } qeth_ethtool_stats_keys[] = {
4271 /* 0 */{"rx skbs"},
4272 {"rx buffers"},
4273 {"tx skbs"},
4274 {"tx buffers"},
4275 {"tx skbs no packing"},
4276 {"tx buffers no packing"},
4277 {"tx skbs packing"},
4278 {"tx buffers packing"},
4279 {"tx sg skbs"},
4280 {"tx sg frags"},
4281 /* 10 */{"rx sg skbs"},
4282 {"rx sg frags"},
4283 {"rx sg page allocs"},
4284 {"tx large kbytes"},
4285 {"tx large count"},
4286 {"tx pk state ch n->p"},
4287 {"tx pk state ch p->n"},
4288 {"tx pk watermark low"},
4289 {"tx pk watermark high"},
4290 {"queue 0 buffer usage"},
4291 /* 20 */{"queue 1 buffer usage"},
4292 {"queue 2 buffer usage"},
4293 {"queue 3 buffer usage"},
4294 {"rx handler time"},
4295 {"rx handler count"},
4296 {"rx do_QDIO time"},
4297 {"rx do_QDIO count"},
4298 {"tx handler time"},
4299 {"tx handler count"},
4300 {"tx time"},
4301 /* 30 */{"tx count"},
4302 {"tx do_QDIO time"},
4303 {"tx do_QDIO count"},
4304 {"tx csum"},
4305 };
4306
4307 int qeth_core_get_stats_count(struct net_device *dev)
4308 {
4309 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4310 }
4311 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4312
4313 void qeth_core_get_ethtool_stats(struct net_device *dev,
4314 struct ethtool_stats *stats, u64 *data)
4315 {
4316 struct qeth_card *card = dev->ml_priv;
4317 data[0] = card->stats.rx_packets -
4318 card->perf_stats.initial_rx_packets;
4319 data[1] = card->perf_stats.bufs_rec;
4320 data[2] = card->stats.tx_packets -
4321 card->perf_stats.initial_tx_packets;
4322 data[3] = card->perf_stats.bufs_sent;
4323 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4324 - card->perf_stats.skbs_sent_pack;
4325 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4326 data[6] = card->perf_stats.skbs_sent_pack;
4327 data[7] = card->perf_stats.bufs_sent_pack;
4328 data[8] = card->perf_stats.sg_skbs_sent;
4329 data[9] = card->perf_stats.sg_frags_sent;
4330 data[10] = card->perf_stats.sg_skbs_rx;
4331 data[11] = card->perf_stats.sg_frags_rx;
4332 data[12] = card->perf_stats.sg_alloc_page_rx;
4333 data[13] = (card->perf_stats.large_send_bytes >> 10);
4334 data[14] = card->perf_stats.large_send_cnt;
4335 data[15] = card->perf_stats.sc_dp_p;
4336 data[16] = card->perf_stats.sc_p_dp;
4337 data[17] = QETH_LOW_WATERMARK_PACK;
4338 data[18] = QETH_HIGH_WATERMARK_PACK;
4339 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4340 data[20] = (card->qdio.no_out_queues > 1) ?
4341 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4342 data[21] = (card->qdio.no_out_queues > 2) ?
4343 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4344 data[22] = (card->qdio.no_out_queues > 3) ?
4345 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4346 data[23] = card->perf_stats.inbound_time;
4347 data[24] = card->perf_stats.inbound_cnt;
4348 data[25] = card->perf_stats.inbound_do_qdio_time;
4349 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4350 data[27] = card->perf_stats.outbound_handler_time;
4351 data[28] = card->perf_stats.outbound_handler_cnt;
4352 data[29] = card->perf_stats.outbound_time;
4353 data[30] = card->perf_stats.outbound_cnt;
4354 data[31] = card->perf_stats.outbound_do_qdio_time;
4355 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4356 data[33] = card->perf_stats.tx_csum;
4357 }
4358 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4359
4360 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4361 {
4362 switch (stringset) {
4363 case ETH_SS_STATS:
4364 memcpy(data, &qeth_ethtool_stats_keys,
4365 sizeof(qeth_ethtool_stats_keys));
4366 break;
4367 default:
4368 WARN_ON(1);
4369 break;
4370 }
4371 }
4372 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4373
4374 void qeth_core_get_drvinfo(struct net_device *dev,
4375 struct ethtool_drvinfo *info)
4376 {
4377 struct qeth_card *card = dev->ml_priv;
4378 if (card->options.layer2)
4379 strcpy(info->driver, "qeth_l2");
4380 else
4381 strcpy(info->driver, "qeth_l3");
4382
4383 strcpy(info->version, "1.0");
4384 strcpy(info->fw_version, card->info.mcl_level);
4385 sprintf(info->bus_info, "%s/%s/%s",
4386 CARD_RDEV_ID(card),
4387 CARD_WDEV_ID(card),
4388 CARD_DDEV_ID(card));
4389 }
4390 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4391
4392 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4393 struct ethtool_cmd *ecmd)
4394 {
4395 struct qeth_card *card = netdev->ml_priv;
4396 enum qeth_link_types link_type;
4397
4398 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4399 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4400 else
4401 link_type = card->info.link_type;
4402
4403 ecmd->transceiver = XCVR_INTERNAL;
4404 ecmd->supported = SUPPORTED_Autoneg;
4405 ecmd->advertising = ADVERTISED_Autoneg;
4406 ecmd->duplex = DUPLEX_FULL;
4407 ecmd->autoneg = AUTONEG_ENABLE;
4408
4409 switch (link_type) {
4410 case QETH_LINK_TYPE_FAST_ETH:
4411 case QETH_LINK_TYPE_LANE_ETH100:
4412 ecmd->supported |= SUPPORTED_10baseT_Half |
4413 SUPPORTED_10baseT_Full |
4414 SUPPORTED_100baseT_Half |
4415 SUPPORTED_100baseT_Full |
4416 SUPPORTED_TP;
4417 ecmd->advertising |= ADVERTISED_10baseT_Half |
4418 ADVERTISED_10baseT_Full |
4419 ADVERTISED_100baseT_Half |
4420 ADVERTISED_100baseT_Full |
4421 ADVERTISED_TP;
4422 ecmd->speed = SPEED_100;
4423 ecmd->port = PORT_TP;
4424 break;
4425
4426 case QETH_LINK_TYPE_GBIT_ETH:
4427 case QETH_LINK_TYPE_LANE_ETH1000:
4428 ecmd->supported |= SUPPORTED_10baseT_Half |
4429 SUPPORTED_10baseT_Full |
4430 SUPPORTED_100baseT_Half |
4431 SUPPORTED_100baseT_Full |
4432 SUPPORTED_1000baseT_Half |
4433 SUPPORTED_1000baseT_Full |
4434 SUPPORTED_FIBRE;
4435 ecmd->advertising |= ADVERTISED_10baseT_Half |
4436 ADVERTISED_10baseT_Full |
4437 ADVERTISED_100baseT_Half |
4438 ADVERTISED_100baseT_Full |
4439 ADVERTISED_1000baseT_Half |
4440 ADVERTISED_1000baseT_Full |
4441 ADVERTISED_FIBRE;
4442 ecmd->speed = SPEED_1000;
4443 ecmd->port = PORT_FIBRE;
4444 break;
4445
4446 case QETH_LINK_TYPE_10GBIT_ETH:
4447 ecmd->supported |= SUPPORTED_10baseT_Half |
4448 SUPPORTED_10baseT_Full |
4449 SUPPORTED_100baseT_Half |
4450 SUPPORTED_100baseT_Full |
4451 SUPPORTED_1000baseT_Half |
4452 SUPPORTED_1000baseT_Full |
4453 SUPPORTED_10000baseT_Full |
4454 SUPPORTED_FIBRE;
4455 ecmd->advertising |= ADVERTISED_10baseT_Half |
4456 ADVERTISED_10baseT_Full |
4457 ADVERTISED_100baseT_Half |
4458 ADVERTISED_100baseT_Full |
4459 ADVERTISED_1000baseT_Half |
4460 ADVERTISED_1000baseT_Full |
4461 ADVERTISED_10000baseT_Full |
4462 ADVERTISED_FIBRE;
4463 ecmd->speed = SPEED_10000;
4464 ecmd->port = PORT_FIBRE;
4465 break;
4466
4467 default:
4468 ecmd->supported |= SUPPORTED_10baseT_Half |
4469 SUPPORTED_10baseT_Full |
4470 SUPPORTED_TP;
4471 ecmd->advertising |= ADVERTISED_10baseT_Half |
4472 ADVERTISED_10baseT_Full |
4473 ADVERTISED_TP;
4474 ecmd->speed = SPEED_10;
4475 ecmd->port = PORT_TP;
4476 }
4477
4478 return 0;
4479 }
4480 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4481
4482 static int __init qeth_core_init(void)
4483 {
4484 int rc;
4485
4486 pr_info("loading core functions\n");
4487 INIT_LIST_HEAD(&qeth_core_card_list.list);
4488 rwlock_init(&qeth_core_card_list.rwlock);
4489
4490 rc = qeth_register_dbf_views();
4491 if (rc)
4492 goto out_err;
4493 rc = ccw_driver_register(&qeth_ccw_driver);
4494 if (rc)
4495 goto ccw_err;
4496 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4497 if (rc)
4498 goto ccwgroup_err;
4499 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4500 &driver_attr_group);
4501 if (rc)
4502 goto driver_err;
4503 qeth_core_root_dev = root_device_register("qeth");
4504 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4505 if (rc)
4506 goto register_err;
4507
4508 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4509 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4510 if (!qeth_core_header_cache) {
4511 rc = -ENOMEM;
4512 goto slab_err;
4513 }
4514
4515 return 0;
4516 slab_err:
4517 root_device_unregister(qeth_core_root_dev);
4518 register_err:
4519 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4520 &driver_attr_group);
4521 driver_err:
4522 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4523 ccwgroup_err:
4524 ccw_driver_unregister(&qeth_ccw_driver);
4525 ccw_err:
4526 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4527 qeth_unregister_dbf_views();
4528 out_err:
4529 pr_err("Initializing the qeth device driver failed\n");
4530 return rc;
4531 }
4532
4533 static void __exit qeth_core_exit(void)
4534 {
4535 root_device_unregister(qeth_core_root_dev);
4536 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4537 &driver_attr_group);
4538 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4539 ccw_driver_unregister(&qeth_ccw_driver);
4540 kmem_cache_destroy(qeth_core_header_cache);
4541 qeth_unregister_dbf_views();
4542 pr_info("core functions removed\n");
4543 }
4544
4545 module_init(qeth_core_init);
4546 module_exit(qeth_core_exit);
4547 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4548 MODULE_DESCRIPTION("qeth core functions");
4549 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree