arch/mips/emma2rh/common/irq.c

   1 /*
   2  *  arch/mips/emma2rh/common/irq.c
   3  *      This file is common irq dispatcher.
   4  *
   5  *  Copyright (C) NEC Electronics Corporation 2005-2006
   6  *
   7  *  This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
   8  *
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; either version 2 of the License, or
  14  *  (at your option) any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *  GNU General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License
  22  *  along with this program; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  */
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/irq.h>
  28 #include <linux/types.h>
  29
  30 #include <asm/system.h>
  31 #include <asm/mipsregs.h>
  32 #include <asm/addrspace.h>
  33 #include <asm/bootinfo.h>
  34
  35 #include <asm/emma2rh/emma2rh.h>
  36
  37 /*
  38  * the first level int-handler will jump here if it is a emma2rh irq
  39  */
  40 void emma2rh_irq_dispatch(void)
  41 {
  42         u32 intStatus;
  43         u32 bitmask;
  44         u32 i;
  45
  46         intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
  47             & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
  48
  49 #ifdef EMMA2RH_SW_CASCADE
  50         if (intStatus &
  51             (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
  52                 u32 swIntStatus;
  53                 swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
  54                     & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
  55                 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  56                         if (swIntStatus & bitmask) {
  57                                 do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
  58                                 return;
  59                         }
  60                 }
  61         }
  62 #endif
  63
  64         for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  65                 if (intStatus & bitmask) {
  66                         do_IRQ(EMMA2RH_IRQ_BASE + i);
  67                         return;
  68                 }
  69         }
  70
  71         intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
  72             & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
  73
  74 #ifdef EMMA2RH_GPIO_CASCADE
  75         if (intStatus &
  76             (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
  77                 u32 gpioIntStatus;
  78                 gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
  79                     & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
  80                 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
  81                         if (gpioIntStatus & bitmask) {
  82                                 do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
  83                                 return;
  84                         }
  85                 }
  86         }
  87 #endif
  88
  89         for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
  90                 if (intStatus & bitmask) {
  91                         do_IRQ(EMMA2RH_IRQ_BASE + i);
  92                         return;
  93                 }
  94         }
  95
  96         intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
  97             & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
  98
  99         for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
 100                 if (intStatus & bitmask) {
 101                         do_IRQ(EMMA2RH_IRQ_BASE + i);
 102                         return;
 103                 }
 104         }
 105 }