arch/arm/mach-mx2/devices.c

   1 /*
   2  * Author: MontaVista Software, Inc.
   3  *       <source@mvista.com>
   4  *
   5  * Based on the OMAP devices.c
   6  *
   7  * 2005 (c) MontaVista Software, Inc. This file is licensed under the
   8  * terms of the GNU General Public License version 2. This program is
   9  * licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  *
  12  * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  13  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License
  17  * as published by the Free Software Foundation; either version 2
  18  * of the License, or (at your option) any later version.
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  27  * MA 02110-1301, USA.
  28  */
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/init.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/gpio.h>
  34
  35 #include <mach/irqs.h>
  36 #include <mach/hardware.h>
  37 #include <mach/common.h>
  38 #include <mach/mmc.h>
  39
  40 #include "devices.h"
  41
  42 /*
  43  * SPI master controller
  44  *
  45  * - i.MX1: 2 channel (slighly different register setting)
  46  * - i.MX21: 2 channel
  47  * - i.MX27: 3 channel
  48  */
  49 #define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq)                                 \
  50         static struct resource mxc_spi_resources ## n[] = {                     \
  51                 {                                                               \
  52                         .start = baseaddr,                                      \
  53                         .end = baseaddr + SZ_4K - 1,                            \
  54                         .flags = IORESOURCE_MEM,                                \
  55                 }, {                                                            \
  56                         .start = irq,                                           \
  57                         .end = irq,                                             \
  58                         .flags = IORESOURCE_IRQ,                                \
  59                 },                                                              \
  60         };                                                                      \
  61                                                                                 \
  62         struct platform_device mxc_spi_device ## n = {                          \
  63                 .name = "spi_imx",                                              \
  64                 .id = n,                                                        \
  65                 .num_resources = ARRAY_SIZE(mxc_spi_resources ## n),            \
  66                 .resource = mxc_spi_resources ## n,                             \
  67         }
  68
  69 DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
  70 DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
  71
  72 #ifdef CONFIG_MACH_MX27
  73 DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
  74 #endif
  75
  76 /*
  77  * General Purpose Timer
  78  * - i.MX21: 3 timers
  79  * - i.MX27: 6 timers
  80  */
  81 #define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq)                         \
  82         static struct resource timer ## n ##_resources[] = {            \
  83                 {                                                       \
  84                         .start = baseaddr,                              \
  85                         .end = baseaddr + SZ_4K - 1,                    \
  86                         .flags = IORESOURCE_MEM,                        \
  87                 }, {                                                    \
  88                         .start = irq,                                   \
  89                         .end = irq,                                     \
  90                         .flags = IORESOURCE_IRQ,                        \
  91                 }                                                       \
  92         };                                                              \
  93                                                                         \
  94         struct platform_device mxc_gpt ## n = {                         \
  95                 .name = "imx_gpt",                                      \
  96                 .id = n,                                                \
  97                 .num_resources = ARRAY_SIZE(timer ## n ## _resources),  \
  98                 .resource = timer ## n ## _resources,                   \
  99         }
 100
 101 /* We use gpt1 as system timer, so do not add a device for this one */
 102 DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
 103 DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
 104
 105 #ifdef CONFIG_MACH_MX27
 106 DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
 107 DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
 108 DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
 109 #endif
 110
 111 /*
 112  * Watchdog:
 113  * - i.MX1
 114  * - i.MX21
 115  * - i.MX27
 116  */
 117 static struct resource mxc_wdt_resources[] = {
 118         {
 119                 .start  = WDOG_BASE_ADDR,
 120                 .end    = WDOG_BASE_ADDR + 0x30,
 121                 .flags  = IORESOURCE_MEM,
 122         },
 123 };
 124
 125 struct platform_device mxc_wdt = {
 126         .name = "mxc_wdt",
 127         .id = 0,
 128         .num_resources = ARRAY_SIZE(mxc_wdt_resources),
 129         .resource = mxc_wdt_resources,
 130 };
 131
 132 static struct resource mxc_w1_master_resources[] = {
 133         {
 134                 .start = OWIRE_BASE_ADDR,
 135                 .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
 136                 .flags = IORESOURCE_MEM,
 137         },
 138 };
 139
 140 struct platform_device mxc_w1_master_device = {
 141         .name = "mxc_w1",
 142         .id = 0,
 143         .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
 144         .resource = mxc_w1_master_resources,
 145 };
 146
 147 static struct resource mxc_nand_resources[] = {
 148         {
 149                 .start  = NFC_BASE_ADDR,
 150                 .end    = NFC_BASE_ADDR + 0xfff,
 151                 .flags  = IORESOURCE_MEM,
 152         }, {
 153                 .start  = MXC_INT_NANDFC,
 154                 .end    = MXC_INT_NANDFC,
 155                 .flags  = IORESOURCE_IRQ,
 156         },
 157 };
 158
 159 struct platform_device mxc_nand_device = {
 160         .name = "mxc_nand",
 161         .id = 0,
 162         .num_resources = ARRAY_SIZE(mxc_nand_resources),
 163         .resource = mxc_nand_resources,
 164 };
 165
 166 /*
 167  * lcdc:
 168  * - i.MX1: the basic controller
 169  * - i.MX21: to be checked
 170  * - i.MX27: like i.MX1, with slightly variations
 171  */
 172 static struct resource mxc_fb[] = {
 173         {
 174                 .start = LCDC_BASE_ADDR,
 175                 .end   = LCDC_BASE_ADDR + 0xFFF,
 176                 .flags = IORESOURCE_MEM,
 177         }, {
 178                 .start = MXC_INT_LCDC,
 179                 .end   = MXC_INT_LCDC,
 180                 .flags = IORESOURCE_IRQ,
 181         }
 182 };
 183
 184 /* mxc lcd driver */
 185 struct platform_device mxc_fb_device = {
 186         .name = "imx-fb",
 187         .id = 0,
 188         .num_resources = ARRAY_SIZE(mxc_fb),
 189         .resource = mxc_fb,
 190         .dev = {
 191                 .coherent_dma_mask = 0xFFFFFFFF,
 192         },
 193 };
 194
 195 #ifdef CONFIG_MACH_MX27
 196 static struct resource mxc_fec_resources[] = {
 197         {
 198                 .start  = FEC_BASE_ADDR,
 199                 .end    = FEC_BASE_ADDR + 0xfff,
 200                 .flags  = IORESOURCE_MEM,
 201         }, {
 202                 .start  = MXC_INT_FEC,
 203                 .end    = MXC_INT_FEC,
 204                 .flags  = IORESOURCE_IRQ,
 205         },
 206 };
 207
 208 struct platform_device mxc_fec_device = {
 209         .name = "fec",
 210         .id = 0,
 211         .num_resources = ARRAY_SIZE(mxc_fec_resources),
 212         .resource = mxc_fec_resources,
 213 };
 214 #endif
 215
 216 #define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq)                         \
 217         static struct resource mxc_i2c_resources ## n[] = {             \
 218                 {                                                       \
 219                         .start = baseaddr,                              \
 220                         .end = baseaddr + SZ_4K - 1,                    \
 221                         .flags = IORESOURCE_MEM,                        \
 222                 }, {                                                    \
 223                         .start = irq,                                   \
 224                         .end = irq,                                     \
 225                         .flags = IORESOURCE_IRQ,                        \
 226                 }                                                       \
 227         };                                                              \
 228                                                                         \
 229         struct platform_device mxc_i2c_device ## n = {                  \
 230                 .name = "imx-i2c",                                      \
 231                 .id = n,                                                \
 232                 .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n),    \
 233                 .resource = mxc_i2c_resources ## n,                     \
 234         }
 235
 236 DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
 237
 238 #ifdef CONFIG_MACH_MX27
 239 DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
 240 #endif
 241
 242 static struct resource mxc_pwm_resources[] = {
 243         {
 244                 .start  = PWM_BASE_ADDR,
 245                 .end    = PWM_BASE_ADDR + 0x0fff,
 246                 .flags  = IORESOURCE_MEM,
 247         }, {
 248                 .start   = MXC_INT_PWM,
 249                 .end     = MXC_INT_PWM,
 250                 .flags   = IORESOURCE_IRQ,
 251         }
 252 };
 253
 254 struct platform_device mxc_pwm_device = {
 255         .name = "mxc_pwm",
 256         .id = 0,
 257         .num_resources = ARRAY_SIZE(mxc_pwm_resources),
 258         .resource = mxc_pwm_resources,
 259 };
 260
 261 /*
 262  * Resource definition for the MXC SDHC
 263  */
 264 #define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq)                 \
 265         static struct resource mxc_sdhc_resources ## n[] = {            \
 266                 {                                                       \
 267                         .start = baseaddr,                              \
 268                         .end = baseaddr + SZ_4K - 1,                    \
 269                         .flags = IORESOURCE_MEM,                        \
 270                 }, {                                                    \
 271                         .start = irq,                                   \
 272                         .end = irq,                                     \
 273                         .flags = IORESOURCE_IRQ,                        \
 274                 }, {                                                    \
 275                         .start = dmareq,                                \
 276                         .end = dmareq,                                  \
 277                         .flags = IORESOURCE_DMA,                        \
 278                 },                                                      \
 279         };                                                              \
 280                                                                         \
 281         static u64 mxc_sdhc ## n ## _dmamask = 0xffffffffUL;            \
 282                                                                         \
 283         struct platform_device mxc_sdhc_device ## n = {                 \
 284                 .name = "mxc-mmc",                                      \
 285                 .id = n,                                                \
 286                 .dev = {                                                \
 287                         .dma_mask = &mxc_sdhc ## n ## _dmamask,         \
 288                         .coherent_dma_mask = 0xffffffff,                \
 289                 },                                                      \
 290                 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n),   \
 291                 .resource = mxc_sdhc_resources ## n,            \
 292         }
 293
 294 DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
 295 DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
 296
 297 #ifdef CONFIG_MACH_MX27
 298 static struct resource otg_resources[] = {
 299         {
 300                 .start  = OTG_BASE_ADDR,
 301                 .end    = OTG_BASE_ADDR + 0x1ff,
 302                 .flags  = IORESOURCE_MEM,
 303         }, {
 304                 .start  = MXC_INT_USB3,
 305                 .end    = MXC_INT_USB3,
 306                 .flags  = IORESOURCE_IRQ,
 307         },
 308 };
 309
 310 static u64 otg_dmamask = 0xffffffffUL;
 311
 312 /* OTG gadget device */
 313 struct platform_device mxc_otg_udc_device = {
 314         .name           = "fsl-usb2-udc",
 315         .id             = -1,
 316         .dev            = {
 317                 .dma_mask               = &otg_dmamask,
 318                 .coherent_dma_mask      = 0xffffffffUL,
 319         },
 320         .resource       = otg_resources,
 321         .num_resources  = ARRAY_SIZE(otg_resources),
 322 };
 323
 324 /* OTG host */
 325 struct platform_device mxc_otg_host = {
 326         .name = "mxc-ehci",
 327         .id = 0,
 328         .dev = {
 329                 .coherent_dma_mask = 0xffffffff,
 330                 .dma_mask = &otg_dmamask,
 331         },
 332         .resource = otg_resources,
 333         .num_resources = ARRAY_SIZE(otg_resources),
 334 };
 335
 336 /* USB host 1 */
 337
 338 static u64 usbh1_dmamask = 0xffffffffUL;
 339
 340 static struct resource mxc_usbh1_resources[] = {
 341         {
 342                 .start = OTG_BASE_ADDR + 0x200,
 343                 .end = OTG_BASE_ADDR + 0x3ff,
 344                 .flags = IORESOURCE_MEM,
 345         }, {
 346                 .start = MXC_INT_USB1,
 347                 .end = MXC_INT_USB1,
 348                 .flags = IORESOURCE_IRQ,
 349         },
 350 };
 351
 352 struct platform_device mxc_usbh1 = {
 353         .name = "mxc-ehci",
 354         .id = 1,
 355         .dev = {
 356                 .coherent_dma_mask = 0xffffffff,
 357                 .dma_mask = &usbh1_dmamask,
 358         },
 359         .resource = mxc_usbh1_resources,
 360         .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
 361 };
 362
 363 /* USB host 2 */
 364 static u64 usbh2_dmamask = 0xffffffffUL;
 365
 366 static struct resource mxc_usbh2_resources[] = {
 367         {
 368                 .start = OTG_BASE_ADDR + 0x400,
 369                 .end = OTG_BASE_ADDR + 0x5ff,
 370                 .flags = IORESOURCE_MEM,
 371         }, {
 372                 .start = MXC_INT_USB2,
 373                 .end = MXC_INT_USB2,
 374                 .flags = IORESOURCE_IRQ,
 375         },
 376 };
 377
 378 struct platform_device mxc_usbh2 = {
 379         .name = "mxc-ehci",
 380         .id = 2,
 381         .dev = {
 382                 .coherent_dma_mask = 0xffffffff,
 383                 .dma_mask = &usbh2_dmamask,
 384         },
 385         .resource = mxc_usbh2_resources,
 386         .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
 387 };
 388 #endif
 389
 390 static struct resource imx_ssi_resources0[] = {
 391         {
 392                 .start  = SSI1_BASE_ADDR,
 393                 .end    = SSI1_BASE_ADDR + 0x6F,
 394                 .flags  = IORESOURCE_MEM,
 395         }, {
 396                 .start  = MXC_INT_SSI1,
 397                 .end    = MXC_INT_SSI1,
 398                 .flags  = IORESOURCE_IRQ,
 399         }, {
 400                 .name   = "tx0",
 401                 .start  = DMA_REQ_SSI1_TX0,
 402                 .end    = DMA_REQ_SSI1_TX0,
 403                 .flags  = IORESOURCE_DMA,
 404         }, {
 405                 .name   = "rx0",
 406                 .start  = DMA_REQ_SSI1_RX0,
 407                 .end    = DMA_REQ_SSI1_RX0,
 408                 .flags  = IORESOURCE_DMA,
 409         }, {
 410                 .name   = "tx1",
 411                 .start  = DMA_REQ_SSI1_TX1,
 412                 .end    = DMA_REQ_SSI1_TX1,
 413                 .flags  = IORESOURCE_DMA,
 414         }, {
 415                 .name   = "rx1",
 416                 .start  = DMA_REQ_SSI1_RX1,
 417                 .end    = DMA_REQ_SSI1_RX1,
 418                 .flags  = IORESOURCE_DMA,
 419         },
 420 };
 421
 422 static struct resource imx_ssi_resources1[] = {
 423         {
 424                 .start  = SSI2_BASE_ADDR,
 425                 .end    = SSI2_BASE_ADDR + 0x6F,
 426                 .flags  = IORESOURCE_MEM,
 427         }, {
 428                 .start  = MXC_INT_SSI2,
 429                 .end    = MXC_INT_SSI2,
 430                 .flags  = IORESOURCE_IRQ,
 431         }, {
 432                 .name   = "tx0",
 433                 .start  = DMA_REQ_SSI2_TX0,
 434                 .end    = DMA_REQ_SSI2_TX0,
 435                 .flags  = IORESOURCE_DMA,
 436         }, {
 437                 .name   = "rx0",
 438                 .start  = DMA_REQ_SSI2_RX0,
 439                 .end    = DMA_REQ_SSI2_RX0,
 440                 .flags  = IORESOURCE_DMA,
 441         }, {
 442                 .name   = "tx1",
 443                 .start  = DMA_REQ_SSI2_TX1,
 444                 .end    = DMA_REQ_SSI2_TX1,
 445                 .flags  = IORESOURCE_DMA,
 446         }, {
 447                 .name   = "rx1",
 448                 .start  = DMA_REQ_SSI2_RX1,
 449                 .end    = DMA_REQ_SSI2_RX1,
 450                 .flags  = IORESOURCE_DMA,
 451         },
 452 };
 453
 454 struct platform_device imx_ssi_device0 = {
 455         .name = "imx-ssi",
 456         .id = 0,
 457         .num_resources = ARRAY_SIZE(imx_ssi_resources0),
 458         .resource = imx_ssi_resources0,
 459 };
 460
 461 struct platform_device imx_ssi_device1 = {
 462         .name = "imx-ssi",
 463         .id = 1,
 464         .num_resources = ARRAY_SIZE(imx_ssi_resources1),
 465         .resource = imx_ssi_resources1,
 466 };
 467
 468 /* GPIO port description */
 469 static struct mxc_gpio_port imx_gpio_ports[] = {
 470         {
 471                 .chip.label = "gpio-0",
 472                 .irq = MXC_INT_GPIO,
 473                 .base = IO_ADDRESS(GPIO_BASE_ADDR),
 474                 .virtual_irq_start = MXC_GPIO_IRQ_START,
 475         }, {
 476                 .chip.label = "gpio-1",
 477                 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
 478                 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 479         }, {
 480                 .chip.label = "gpio-2",
 481                 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
 482                 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 483         }, {
 484                 .chip.label = "gpio-3",
 485                 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
 486                 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
 487         }, {
 488                 .chip.label = "gpio-4",
 489                 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400),
 490                 .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
 491         }, {
 492                 .chip.label = "gpio-5",
 493                 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500),
 494                 .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
 495         }
 496 };
 497
 498 int __init mxc_register_gpios(void)
 499 {
 500         return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 501 }