4 void set_pending_irq(unsigned int irq
, cpumask_t mask
)
6 struct irq_desc
*desc
= irq_desc
+ irq
;
9 spin_lock_irqsave(&desc
->lock
, flags
);
11 irq_desc
[irq
].pending_mask
= mask
;
12 spin_unlock_irqrestore(&desc
->lock
, flags
);
15 void move_native_irq(int irq
)
17 struct irq_desc
*desc
= irq_desc
+ irq
;
20 if (likely(!desc
->move_irq
))
24 * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
26 if (CHECK_IRQ_PER_CPU(desc
->status
)) {
33 if (unlikely(cpus_empty(irq_desc
[irq
].pending_mask
)))
36 if (!desc
->chip
->set_affinity
)
39 assert_spin_locked(&desc
->lock
);
41 cpus_and(tmp
, irq_desc
[irq
].pending_mask
, cpu_online_map
);
44 * If there was a valid mask to work with, please
45 * do the disable, re-program, enable sequence.
46 * This is *not* particularly important for level triggered
47 * but in a edge trigger case, we might be setting rte
48 * when an active trigger is comming in. This could
49 * cause some ioapics to mal-function.
50 * Being paranoid i guess!
52 if (likely(!cpus_empty(tmp
))) {
53 if (likely(!(desc
->status
& IRQ_DISABLED
)))
54 desc
->chip
->disable(irq
);
56 desc
->chip
->set_affinity(irq
,tmp
);
58 if (likely(!(desc
->status
& IRQ_DISABLED
)))
59 desc
->chip
->enable(irq
);
61 cpus_clear(irq_desc
[irq
].pending_mask
);