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Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / serial / crisv10.c
blob7ba7d70f04d6caaa8d8e5ce0cb31aa37bfc1168b
1 /*
2 * Serial port driver for the ETRAX 100LX chip
3 *
4 * Copyright (C) 1998-2007 Axis Communications AB
5 *
6 * Many, many authors. Based once upon a time on serial.c for 16x50.
7 *
8 */
9
10 static char *serial_version = "$Revision: 1.25 $";
11
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/timer.h>
17 #include <linux/interrupt.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/major.h>
21 #include <linux/string.h>
22 #include <linux/fcntl.h>
23 #include <linux/mm.h>
24 #include <linux/slab.h>
25 #include <linux/init.h>
26 #include <asm/uaccess.h>
27 #include <linux/kernel.h>
28 #include <linux/mutex.h>
29 #include <linux/bitops.h>
30
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <asm/dma.h>
34 #include <asm/system.h>
35 #include <linux/delay.h>
36
37 #include <arch/svinto.h>
38
39 /* non-arch dependent serial structures are in linux/serial.h */
40 #include <linux/serial.h>
41 /* while we keep our own stuff (struct e100_serial) in a local .h file */
42 #include "crisv10.h"
43 #include <asm/fasttimer.h>
44 #include <arch/io_interface_mux.h>
45
46 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
47 #ifndef CONFIG_ETRAX_FAST_TIMER
48 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
49 #endif
50 #endif
51
52 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
53 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
54 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
55 #endif
56
57 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
58 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
59 #endif
60
61 /*
62 * All of the compatibilty code so we can compile serial.c against
63 * older kernels is hidden in serial_compat.h
64 */
65 #if defined(LOCAL_HEADERS)
66 #include "serial_compat.h"
67 #endif
68
69 struct tty_driver *serial_driver;
70
71 /* number of characters left in xmit buffer before we ask for more */
72 #define WAKEUP_CHARS 256
73
74 //#define SERIAL_DEBUG_INTR
75 //#define SERIAL_DEBUG_OPEN
76 //#define SERIAL_DEBUG_FLOW
77 //#define SERIAL_DEBUG_DATA
78 //#define SERIAL_DEBUG_THROTTLE
79 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
80 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
81
82 /* Enable this to use serial interrupts to handle when you
83 expect the first received event on the serial port to
84 be an error, break or similar. Used to be able to flash IRMA
85 from eLinux */
86 #define SERIAL_HANDLE_EARLY_ERRORS
87
88 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
89 #define SERIAL_DESCR_BUF_SIZE 256
90
91 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
92 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
93
94 /* We don't want to load the system with massive fast timer interrupt
95 * on high baudrates so limit it to 250 us (4kHz) */
96 #define MIN_FLUSH_TIME_USEC 250
97
98 /* Add an x here to log a lot of timer stuff */
99 #define TIMERD(x)
100 /* Debug details of interrupt handling */
101 #define DINTR1(x) /* irq on/off, errors */
102 #define DINTR2(x) /* tx and rx */
103 /* Debug flip buffer stuff */
104 #define DFLIP(x)
105 /* Debug flow control and overview of data flow */
106 #define DFLOW(x)
107 #define DBAUD(x)
108 #define DLOG_INT_TRIG(x)
109
110 //#define DEBUG_LOG_INCLUDED
111 #ifndef DEBUG_LOG_INCLUDED
112 #define DEBUG_LOG(line, string, value)
113 #else
114 struct debug_log_info
115 {
116 unsigned long time;
117 unsigned long timer_data;
118 // int line;
119 const char *string;
120 int value;
121 };
122 #define DEBUG_LOG_SIZE 4096
123
124 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
125 int debug_log_pos = 0;
126
127 #define DEBUG_LOG(_line, _string, _value) do { \
128 if ((_line) == SERIAL_DEBUG_LINE) {\
129 debug_log_func(_line, _string, _value); \
130 }\
131 }while(0)
132
133 void debug_log_func(int line, const char *string, int value)
134 {
135 if (debug_log_pos < DEBUG_LOG_SIZE) {
136 debug_log[debug_log_pos].time = jiffies;
137 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
138 // debug_log[debug_log_pos].line = line;
139 debug_log[debug_log_pos].string = string;
140 debug_log[debug_log_pos].value = value;
141 debug_log_pos++;
142 }
143 /*printk(string, value);*/
144 }
145 #endif
146
147 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
148 /* Default number of timer ticks before flushing rx fifo
149 * When using "little data, low latency applications: use 0
150 * When using "much data applications (PPP)" use ~5
151 */
152 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
153 #endif
154
155 unsigned long timer_data_to_ns(unsigned long timer_data);
156
157 static void change_speed(struct e100_serial *info);
158 static void rs_throttle(struct tty_struct * tty);
159 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
160 static int rs_write(struct tty_struct *tty,
161 const unsigned char *buf, int count);
162 #ifdef CONFIG_ETRAX_RS485
163 static int e100_write_rs485(struct tty_struct *tty,
164 const unsigned char *buf, int count);
165 #endif
166 static int get_lsr_info(struct e100_serial *info, unsigned int *value);
167
168
169 #define DEF_BAUD 115200 /* 115.2 kbit/s */
170 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
171 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
172 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
173 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
174
175 /* offsets from R_SERIALx_CTRL */
176
177 #define REG_DATA 0
178 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
179 #define REG_TR_DATA 0
180 #define REG_STATUS 1
181 #define REG_TR_CTRL 1
182 #define REG_REC_CTRL 2
183 #define REG_BAUD 3
184 #define REG_XOFF 4 /* this is a 32 bit register */
185
186 /* The bitfields are the same for all serial ports */
187 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
188 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
189 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
190 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
191 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
192
193 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
194
195 /* Values for info->errorcode */
196 #define ERRCODE_SET_BREAK (TTY_BREAK)
197 #define ERRCODE_INSERT 0x100
198 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
199
200 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
201
202 /*
203 * General note regarding the use of IO_* macros in this file:
204 *
205 * We will use the bits defined for DMA channel 6 when using various
206 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
207 * the same for all channels (which of course they are).
208 *
209 * We will also use the bits defined for serial port 0 when writing commands
210 * to the different ports, as these bits too are the same for all ports.
211 */
212
213
214 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
215 static const unsigned long e100_ser_int_mask = 0
216 #ifdef CONFIG_ETRAX_SERIAL_PORT0
217 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
218 #endif
219 #ifdef CONFIG_ETRAX_SERIAL_PORT1
220 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
221 #endif
222 #ifdef CONFIG_ETRAX_SERIAL_PORT2
223 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
224 #endif
225 #ifdef CONFIG_ETRAX_SERIAL_PORT3
226 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
227 #endif
228 ;
229 unsigned long r_alt_ser_baudrate_shadow = 0;
230
231 /* this is the data for the four serial ports in the etrax100 */
232 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
233 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
234
235 static struct e100_serial rs_table[] = {
236 { .baud = DEF_BAUD,
237 .ioport = (unsigned char *)R_SERIAL0_CTRL,
238 .irq = 1U << 12, /* uses DMA 6 and 7 */
239 .oclrintradr = R_DMA_CH6_CLR_INTR,
240 .ofirstadr = R_DMA_CH6_FIRST,
241 .ocmdadr = R_DMA_CH6_CMD,
242 .ostatusadr = R_DMA_CH6_STATUS,
243 .iclrintradr = R_DMA_CH7_CLR_INTR,
244 .ifirstadr = R_DMA_CH7_FIRST,
245 .icmdadr = R_DMA_CH7_CMD,
246 .idescradr = R_DMA_CH7_DESCR,
247 .flags = STD_FLAGS,
248 .rx_ctrl = DEF_RX,
249 .tx_ctrl = DEF_TX,
250 .iseteop = 2,
251 .dma_owner = dma_ser0,
252 .io_if = if_serial_0,
253 #ifdef CONFIG_ETRAX_SERIAL_PORT0
254 .enabled = 1,
255 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
256 .dma_out_enabled = 1,
257 .dma_out_nbr = SER0_TX_DMA_NBR,
258 .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
259 .dma_out_irq_flags = IRQF_DISABLED,
260 .dma_out_irq_description = "serial 0 dma tr",
261 #else
262 .dma_out_enabled = 0,
263 .dma_out_nbr = UINT_MAX,
264 .dma_out_irq_nbr = 0,
265 .dma_out_irq_flags = 0,
266 .dma_out_irq_description = NULL,
267 #endif
268 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
269 .dma_in_enabled = 1,
270 .dma_in_nbr = SER0_RX_DMA_NBR,
271 .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
272 .dma_in_irq_flags = IRQF_DISABLED,
273 .dma_in_irq_description = "serial 0 dma rec",
274 #else
275 .dma_in_enabled = 0,
276 .dma_in_nbr = UINT_MAX,
277 .dma_in_irq_nbr = 0,
278 .dma_in_irq_flags = 0,
279 .dma_in_irq_description = NULL,
280 #endif
281 #else
282 .enabled = 0,
283 .io_if_description = NULL,
284 .dma_out_enabled = 0,
285 .dma_in_enabled = 0
286 #endif
287
288 }, /* ttyS0 */
289 #ifndef CONFIG_SVINTO_SIM
290 { .baud = DEF_BAUD,
291 .ioport = (unsigned char *)R_SERIAL1_CTRL,
292 .irq = 1U << 16, /* uses DMA 8 and 9 */
293 .oclrintradr = R_DMA_CH8_CLR_INTR,
294 .ofirstadr = R_DMA_CH8_FIRST,
295 .ocmdadr = R_DMA_CH8_CMD,
296 .ostatusadr = R_DMA_CH8_STATUS,
297 .iclrintradr = R_DMA_CH9_CLR_INTR,
298 .ifirstadr = R_DMA_CH9_FIRST,
299 .icmdadr = R_DMA_CH9_CMD,
300 .idescradr = R_DMA_CH9_DESCR,
301 .flags = STD_FLAGS,
302 .rx_ctrl = DEF_RX,
303 .tx_ctrl = DEF_TX,
304 .iseteop = 3,
305 .dma_owner = dma_ser1,
306 .io_if = if_serial_1,
307 #ifdef CONFIG_ETRAX_SERIAL_PORT1
308 .enabled = 1,
309 .io_if_description = "ser1",
310 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
311 .dma_out_enabled = 1,
312 .dma_out_nbr = SER1_TX_DMA_NBR,
313 .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
314 .dma_out_irq_flags = IRQF_DISABLED,
315 .dma_out_irq_description = "serial 1 dma tr",
316 #else
317 .dma_out_enabled = 0,
318 .dma_out_nbr = UINT_MAX,
319 .dma_out_irq_nbr = 0,
320 .dma_out_irq_flags = 0,
321 .dma_out_irq_description = NULL,
322 #endif
323 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
324 .dma_in_enabled = 1,
325 .dma_in_nbr = SER1_RX_DMA_NBR,
326 .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
327 .dma_in_irq_flags = IRQF_DISABLED,
328 .dma_in_irq_description = "serial 1 dma rec",
329 #else
330 .dma_in_enabled = 0,
331 .dma_in_enabled = 0,
332 .dma_in_nbr = UINT_MAX,
333 .dma_in_irq_nbr = 0,
334 .dma_in_irq_flags = 0,
335 .dma_in_irq_description = NULL,
336 #endif
337 #else
338 .enabled = 0,
339 .io_if_description = NULL,
340 .dma_in_irq_nbr = 0,
341 .dma_out_enabled = 0,
342 .dma_in_enabled = 0
343 #endif
344 }, /* ttyS1 */
345
346 { .baud = DEF_BAUD,
347 .ioport = (unsigned char *)R_SERIAL2_CTRL,
348 .irq = 1U << 4, /* uses DMA 2 and 3 */
349 .oclrintradr = R_DMA_CH2_CLR_INTR,
350 .ofirstadr = R_DMA_CH2_FIRST,
351 .ocmdadr = R_DMA_CH2_CMD,
352 .ostatusadr = R_DMA_CH2_STATUS,
353 .iclrintradr = R_DMA_CH3_CLR_INTR,
354 .ifirstadr = R_DMA_CH3_FIRST,
355 .icmdadr = R_DMA_CH3_CMD,
356 .idescradr = R_DMA_CH3_DESCR,
357 .flags = STD_FLAGS,
358 .rx_ctrl = DEF_RX,
359 .tx_ctrl = DEF_TX,
360 .iseteop = 0,
361 .dma_owner = dma_ser2,
362 .io_if = if_serial_2,
363 #ifdef CONFIG_ETRAX_SERIAL_PORT2
364 .enabled = 1,
365 .io_if_description = "ser2",
366 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
367 .dma_out_enabled = 1,
368 .dma_out_nbr = SER2_TX_DMA_NBR,
369 .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
370 .dma_out_irq_flags = IRQF_DISABLED,
371 .dma_out_irq_description = "serial 2 dma tr",
372 #else
373 .dma_out_enabled = 0,
374 .dma_out_nbr = UINT_MAX,
375 .dma_out_irq_nbr = 0,
376 .dma_out_irq_flags = 0,
377 .dma_out_irq_description = NULL,
378 #endif
379 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
380 .dma_in_enabled = 1,
381 .dma_in_nbr = SER2_RX_DMA_NBR,
382 .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
383 .dma_in_irq_flags = IRQF_DISABLED,
384 .dma_in_irq_description = "serial 2 dma rec",
385 #else
386 .dma_in_enabled = 0,
387 .dma_in_nbr = UINT_MAX,
388 .dma_in_irq_nbr = 0,
389 .dma_in_irq_flags = 0,
390 .dma_in_irq_description = NULL,
391 #endif
392 #else
393 .enabled = 0,
394 .io_if_description = NULL,
395 .dma_out_enabled = 0,
396 .dma_in_enabled = 0
397 #endif
398 }, /* ttyS2 */
399
400 { .baud = DEF_BAUD,
401 .ioport = (unsigned char *)R_SERIAL3_CTRL,
402 .irq = 1U << 8, /* uses DMA 4 and 5 */
403 .oclrintradr = R_DMA_CH4_CLR_INTR,
404 .ofirstadr = R_DMA_CH4_FIRST,
405 .ocmdadr = R_DMA_CH4_CMD,
406 .ostatusadr = R_DMA_CH4_STATUS,
407 .iclrintradr = R_DMA_CH5_CLR_INTR,
408 .ifirstadr = R_DMA_CH5_FIRST,
409 .icmdadr = R_DMA_CH5_CMD,
410 .idescradr = R_DMA_CH5_DESCR,
411 .flags = STD_FLAGS,
412 .rx_ctrl = DEF_RX,
413 .tx_ctrl = DEF_TX,
414 .iseteop = 1,
415 .dma_owner = dma_ser3,
416 .io_if = if_serial_3,
417 #ifdef CONFIG_ETRAX_SERIAL_PORT3
418 .enabled = 1,
419 .io_if_description = "ser3",
420 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
421 .dma_out_enabled = 1,
422 .dma_out_nbr = SER3_TX_DMA_NBR,
423 .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
424 .dma_out_irq_flags = IRQF_DISABLED,
425 .dma_out_irq_description = "serial 3 dma tr",
426 #else
427 .dma_out_enabled = 0,
428 .dma_out_nbr = UINT_MAX,
429 .dma_out_irq_nbr = 0,
430 .dma_out_irq_flags = 0,
431 .dma_out_irq_description = NULL,
432 #endif
433 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
434 .dma_in_enabled = 1,
435 .dma_in_nbr = SER3_RX_DMA_NBR,
436 .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
437 .dma_in_irq_flags = IRQF_DISABLED,
438 .dma_in_irq_description = "serial 3 dma rec",
439 #else
440 .dma_in_enabled = 0,
441 .dma_in_nbr = UINT_MAX,
442 .dma_in_irq_nbr = 0,
443 .dma_in_irq_flags = 0,
444 .dma_in_irq_description = NULL
445 #endif
446 #else
447 .enabled = 0,
448 .io_if_description = NULL,
449 .dma_out_enabled = 0,
450 .dma_in_enabled = 0
451 #endif
452 } /* ttyS3 */
453 #endif
454 };
455
456
457 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
458
459 static struct ktermios *serial_termios[NR_PORTS];
460 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
461 static struct fast_timer fast_timers[NR_PORTS];
462 #endif
463
464 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
465 #define PROCSTAT(x) x
466 struct ser_statistics_type {
467 int overrun_cnt;
468 int early_errors_cnt;
469 int ser_ints_ok_cnt;
470 int errors_cnt;
471 unsigned long int processing_flip;
472 unsigned long processing_flip_still_room;
473 unsigned long int timeout_flush_cnt;
474 int rx_dma_ints;
475 int tx_dma_ints;
476 int rx_tot;
477 int tx_tot;
478 };
479
480 static struct ser_statistics_type ser_stat[NR_PORTS];
481
482 #else
483
484 #define PROCSTAT(x)
485
486 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
487
488 /* RS-485 */
489 #if defined(CONFIG_ETRAX_RS485)
490 #ifdef CONFIG_ETRAX_FAST_TIMER
491 static struct fast_timer fast_timers_rs485[NR_PORTS];
492 #endif
493 #if defined(CONFIG_ETRAX_RS485_ON_PA)
494 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
495 #endif
496 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
497 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
498 #endif
499 #endif
500
501 /* Info and macros needed for each ports extra control/status signals. */
502 #define E100_STRUCT_PORT(line, pinname) \
503 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
504 (R_PORT_PA_DATA): ( \
505 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
506 (R_PORT_PB_DATA):&dummy_ser[line]))
507
508 #define E100_STRUCT_SHADOW(line, pinname) \
509 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
510 (&port_pa_data_shadow): ( \
511 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
512 (&port_pb_data_shadow):&dummy_ser[line]))
513 #define E100_STRUCT_MASK(line, pinname) \
514 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
515 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
516 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
517 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
518
519 #define DUMMY_DTR_MASK 1
520 #define DUMMY_RI_MASK 2
521 #define DUMMY_DSR_MASK 4
522 #define DUMMY_CD_MASK 8
523 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
524
525 /* If not all status pins are used or disabled, use mixed mode */
526 #ifdef CONFIG_ETRAX_SERIAL_PORT0
527
528 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
529
530 #if SER0_PA_BITSUM != -4
531 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
532 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
533 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
534 # endif
535 # endif
536 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
537 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
538 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
539 # endif
540 # endif
541 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
542 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
543 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
544 # endif
545 # endif
546 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
547 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
548 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
549 # endif
550 # endif
551 #endif
552
553 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
554
555 #if SER0_PB_BITSUM != -4
556 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
557 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
558 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
559 # endif
560 # endif
561 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
562 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
563 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
564 # endif
565 # endif
566 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
567 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
568 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
569 # endif
570 # endif
571 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
572 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
573 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
574 # endif
575 # endif
576 #endif
577
578 #endif /* PORT0 */
579
580
581 #ifdef CONFIG_ETRAX_SERIAL_PORT1
582
583 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
584
585 #if SER1_PA_BITSUM != -4
586 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
587 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
588 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
589 # endif
590 # endif
591 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
592 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
593 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
594 # endif
595 # endif
596 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
597 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
598 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
599 # endif
600 # endif
601 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
602 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
603 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
604 # endif
605 # endif
606 #endif
607
608 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
609
610 #if SER1_PB_BITSUM != -4
611 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
612 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
613 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
614 # endif
615 # endif
616 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
617 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
618 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
619 # endif
620 # endif
621 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
622 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
623 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
624 # endif
625 # endif
626 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
627 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
628 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
629 # endif
630 # endif
631 #endif
632
633 #endif /* PORT1 */
634
635 #ifdef CONFIG_ETRAX_SERIAL_PORT2
636
637 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
638
639 #if SER2_PA_BITSUM != -4
640 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
641 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
642 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
643 # endif
644 # endif
645 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
646 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
647 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
648 # endif
649 # endif
650 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
651 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
652 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
653 # endif
654 # endif
655 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
656 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
657 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
658 # endif
659 # endif
660 #endif
661
662 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
663
664 #if SER2_PB_BITSUM != -4
665 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
666 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
667 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
668 # endif
669 # endif
670 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
671 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
672 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
673 # endif
674 # endif
675 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
676 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
677 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
678 # endif
679 # endif
680 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
681 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
682 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
683 # endif
684 # endif
685 #endif
686
687 #endif /* PORT2 */
688
689 #ifdef CONFIG_ETRAX_SERIAL_PORT3
690
691 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
692
693 #if SER3_PA_BITSUM != -4
694 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
695 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
696 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
697 # endif
698 # endif
699 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
700 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
701 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
702 # endif
703 # endif
704 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
705 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
706 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
707 # endif
708 # endif
709 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
710 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
711 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
712 # endif
713 # endif
714 #endif
715
716 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
717
718 #if SER3_PB_BITSUM != -4
719 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
720 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
721 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
722 # endif
723 # endif
724 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
725 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
726 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
727 # endif
728 # endif
729 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
730 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
731 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
732 # endif
733 # endif
734 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
735 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
736 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
737 # endif
738 # endif
739 #endif
740
741 #endif /* PORT3 */
742
743
744 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
745 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
746 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
747 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
748 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
749 #endif
750
751 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
752 /* The pins can be mixed on PA and PB */
753 #define CONTROL_PINS_PORT_NOT_USED(line) \
754 &dummy_ser[line], &dummy_ser[line], \
755 &dummy_ser[line], &dummy_ser[line], \
756 &dummy_ser[line], &dummy_ser[line], \
757 &dummy_ser[line], &dummy_ser[line], \
758 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
759
760
761 struct control_pins
762 {
763 volatile unsigned char *dtr_port;
764 unsigned char *dtr_shadow;
765 volatile unsigned char *ri_port;
766 unsigned char *ri_shadow;
767 volatile unsigned char *dsr_port;
768 unsigned char *dsr_shadow;
769 volatile unsigned char *cd_port;
770 unsigned char *cd_shadow;
771
772 unsigned char dtr_mask;
773 unsigned char ri_mask;
774 unsigned char dsr_mask;
775 unsigned char cd_mask;
776 };
777
778 static const struct control_pins e100_modem_pins[NR_PORTS] =
779 {
780 /* Ser 0 */
781 {
782 #ifdef CONFIG_ETRAX_SERIAL_PORT0
783 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
784 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
785 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
786 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
787 E100_STRUCT_MASK(0,DTR),
788 E100_STRUCT_MASK(0,RI),
789 E100_STRUCT_MASK(0,DSR),
790 E100_STRUCT_MASK(0,CD)
791 #else
792 CONTROL_PINS_PORT_NOT_USED(0)
793 #endif
794 },
795
796 /* Ser 1 */
797 {
798 #ifdef CONFIG_ETRAX_SERIAL_PORT1
799 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
800 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
801 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
802 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
803 E100_STRUCT_MASK(1,DTR),
804 E100_STRUCT_MASK(1,RI),
805 E100_STRUCT_MASK(1,DSR),
806 E100_STRUCT_MASK(1,CD)
807 #else
808 CONTROL_PINS_PORT_NOT_USED(1)
809 #endif
810 },
811
812 /* Ser 2 */
813 {
814 #ifdef CONFIG_ETRAX_SERIAL_PORT2
815 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
816 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
817 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
818 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
819 E100_STRUCT_MASK(2,DTR),
820 E100_STRUCT_MASK(2,RI),
821 E100_STRUCT_MASK(2,DSR),
822 E100_STRUCT_MASK(2,CD)
823 #else
824 CONTROL_PINS_PORT_NOT_USED(2)
825 #endif
826 },
827
828 /* Ser 3 */
829 {
830 #ifdef CONFIG_ETRAX_SERIAL_PORT3
831 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
832 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
833 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
834 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
835 E100_STRUCT_MASK(3,DTR),
836 E100_STRUCT_MASK(3,RI),
837 E100_STRUCT_MASK(3,DSR),
838 E100_STRUCT_MASK(3,CD)
839 #else
840 CONTROL_PINS_PORT_NOT_USED(3)
841 #endif
842 }
843 };
844 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
845
846 /* All pins are on either PA or PB for each serial port */
847 #define CONTROL_PINS_PORT_NOT_USED(line) \
848 &dummy_ser[line], &dummy_ser[line], \
849 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
850
851
852 struct control_pins
853 {
854 volatile unsigned char *port;
855 unsigned char *shadow;
856
857 unsigned char dtr_mask;
858 unsigned char ri_mask;
859 unsigned char dsr_mask;
860 unsigned char cd_mask;
861 };
862
863 #define dtr_port port
864 #define dtr_shadow shadow
865 #define ri_port port
866 #define ri_shadow shadow
867 #define dsr_port port
868 #define dsr_shadow shadow
869 #define cd_port port
870 #define cd_shadow shadow
871
872 static const struct control_pins e100_modem_pins[NR_PORTS] =
873 {
874 /* Ser 0 */
875 {
876 #ifdef CONFIG_ETRAX_SERIAL_PORT0
877 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
878 E100_STRUCT_MASK(0,DTR),
879 E100_STRUCT_MASK(0,RI),
880 E100_STRUCT_MASK(0,DSR),
881 E100_STRUCT_MASK(0,CD)
882 #else
883 CONTROL_PINS_PORT_NOT_USED(0)
884 #endif
885 },
886
887 /* Ser 1 */
888 {
889 #ifdef CONFIG_ETRAX_SERIAL_PORT1
890 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
891 E100_STRUCT_MASK(1,DTR),
892 E100_STRUCT_MASK(1,RI),
893 E100_STRUCT_MASK(1,DSR),
894 E100_STRUCT_MASK(1,CD)
895 #else
896 CONTROL_PINS_PORT_NOT_USED(1)
897 #endif
898 },
899
900 /* Ser 2 */
901 {
902 #ifdef CONFIG_ETRAX_SERIAL_PORT2
903 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
904 E100_STRUCT_MASK(2,DTR),
905 E100_STRUCT_MASK(2,RI),
906 E100_STRUCT_MASK(2,DSR),
907 E100_STRUCT_MASK(2,CD)
908 #else
909 CONTROL_PINS_PORT_NOT_USED(2)
910 #endif
911 },
912
913 /* Ser 3 */
914 {
915 #ifdef CONFIG_ETRAX_SERIAL_PORT3
916 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
917 E100_STRUCT_MASK(3,DTR),
918 E100_STRUCT_MASK(3,RI),
919 E100_STRUCT_MASK(3,DSR),
920 E100_STRUCT_MASK(3,CD)
921 #else
922 CONTROL_PINS_PORT_NOT_USED(3)
923 #endif
924 }
925 };
926 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
927
928 #define E100_RTS_MASK 0x20
929 #define E100_CTS_MASK 0x40
930
931 /* All serial port signals are active low:
932 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
933 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
934 *
935 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
936 */
937
938 /* Output */
939 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
940 /* Input */
941 #define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK)
942
943 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
944 /* Is an output */
945 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
946
947 /* Normally inputs */
948 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
949 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
950
951 /* Input */
952 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
953
954
955 /*
956 * tmp_buf is used as a temporary buffer by serial_write. We need to
957 * lock it in case the memcpy_fromfs blocks while swapping in a page,
958 * and some other program tries to do a serial write at the same time.
959 * Since the lock will only come under contention when the system is
960 * swapping and available memory is low, it makes sense to share one
961 * buffer across all the serial ports, since it significantly saves
962 * memory if large numbers of serial ports are open.
963 */
964 static unsigned char *tmp_buf;
965 static DEFINE_MUTEX(tmp_buf_mutex);
966
967 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
968 static void update_char_time(struct e100_serial * info)
969 {
970 tcflag_t cflags = info->port.tty->termios->c_cflag;
971 int bits;
972
973 /* calc. number of bits / data byte */
974 /* databits + startbit and 1 stopbit */
975 if ((cflags & CSIZE) == CS7)
976 bits = 9;
977 else
978 bits = 10;
979
980 if (cflags & CSTOPB) /* 2 stopbits ? */
981 bits++;
982
983 if (cflags & PARENB) /* parity bit ? */
984 bits++;
985
986 /* calc timeout */
987 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
988 info->flush_time_usec = 4*info->char_time_usec;
989 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
990 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
991
992 }
993
994 /*
995 * This function maps from the Bxxxx defines in asm/termbits.h into real
996 * baud rates.
997 */
998
999 static int
1000 cflag_to_baud(unsigned int cflag)
1001 {
1002 static int baud_table[] = {
1003 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1004 4800, 9600, 19200, 38400 };
1005
1006 static int ext_baud_table[] = {
1007 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1008 0, 0, 0, 0, 0, 0, 0, 0 };
1009
1010 if (cflag & CBAUDEX)
1011 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1012 else
1013 return baud_table[cflag & CBAUD];
1014 }
1015
1016 /* and this maps to an etrax100 hardware baud constant */
1017
1018 static unsigned char
1019 cflag_to_etrax_baud(unsigned int cflag)
1020 {
1021 char retval;
1022
1023 static char baud_table[] = {
1024 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1025
1026 static char ext_baud_table[] = {
1027 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1028
1029 if (cflag & CBAUDEX)
1030 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1031 else
1032 retval = baud_table[cflag & CBAUD];
1033
1034 if (retval < 0) {
1035 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1036 retval = 5; /* choose default 9600 instead */
1037 }
1038
1039 return retval | (retval << 4); /* choose same for both TX and RX */
1040 }
1041
1042
1043 /* Various static support functions */
1044
1045 /* Functions to set or clear DTR/RTS on the requested line */
1046 /* It is complicated by the fact that RTS is a serial port register, while
1047 * DTR might not be implemented in the HW at all, and if it is, it can be on
1048 * any general port.
1049 */
1050
1051
1052 static inline void
1053 e100_dtr(struct e100_serial *info, int set)
1054 {
1055 #ifndef CONFIG_SVINTO_SIM
1056 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1057
1058 #ifdef SERIAL_DEBUG_IO
1059 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1060 printk("ser%i shadow before 0x%02X get: %i\n",
1061 info->line, *e100_modem_pins[info->line].dtr_shadow,
1062 E100_DTR_GET(info));
1063 #endif
1064 /* DTR is active low */
1065 {
1066 unsigned long flags;
1067
1068 local_irq_save(flags);
1069 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1070 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1071 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1072 local_irq_restore(flags);
1073 }
1074
1075 #ifdef SERIAL_DEBUG_IO
1076 printk("ser%i shadow after 0x%02X get: %i\n",
1077 info->line, *e100_modem_pins[info->line].dtr_shadow,
1078 E100_DTR_GET(info));
1079 #endif
1080 #endif
1081 }
1082
1083 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1084 * 0=0V , 1=3.3V
1085 */
1086 static inline void
1087 e100_rts(struct e100_serial *info, int set)
1088 {
1089 #ifndef CONFIG_SVINTO_SIM
1090 unsigned long flags;
1091 local_irq_save(flags);
1092 info->rx_ctrl &= ~E100_RTS_MASK;
1093 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1094 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1095 local_irq_restore(flags);
1096 #ifdef SERIAL_DEBUG_IO
1097 printk("ser%i rts %i\n", info->line, set);
1098 #endif
1099 #endif
1100 }
1101
1102
1103 /* If this behaves as a modem, RI and CD is an output */
1104 static inline void
1105 e100_ri_out(struct e100_serial *info, int set)
1106 {
1107 #ifndef CONFIG_SVINTO_SIM
1108 /* RI is active low */
1109 {
1110 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1111 unsigned long flags;
1112
1113 local_irq_save(flags);
1114 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1115 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1116 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1117 local_irq_restore(flags);
1118 }
1119 #endif
1120 }
1121 static inline void
1122 e100_cd_out(struct e100_serial *info, int set)
1123 {
1124 #ifndef CONFIG_SVINTO_SIM
1125 /* CD is active low */
1126 {
1127 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1128 unsigned long flags;
1129
1130 local_irq_save(flags);
1131 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1132 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1133 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1134 local_irq_restore(flags);
1135 }
1136 #endif
1137 }
1138
1139 static inline void
1140 e100_disable_rx(struct e100_serial *info)
1141 {
1142 #ifndef CONFIG_SVINTO_SIM
1143 /* disable the receiver */
1144 info->ioport[REG_REC_CTRL] =
1145 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1146 #endif
1147 }
1148
1149 static inline void
1150 e100_enable_rx(struct e100_serial *info)
1151 {
1152 #ifndef CONFIG_SVINTO_SIM
1153 /* enable the receiver */
1154 info->ioport[REG_REC_CTRL] =
1155 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1156 #endif
1157 }
1158
1159 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1160
1161 static inline void
1162 e100_disable_rxdma_irq(struct e100_serial *info)
1163 {
1164 #ifdef SERIAL_DEBUG_INTR
1165 printk("rxdma_irq(%d): 0\n",info->line);
1166 #endif
1167 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1168 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1169 }
1170
1171 static inline void
1172 e100_enable_rxdma_irq(struct e100_serial *info)
1173 {
1174 #ifdef SERIAL_DEBUG_INTR
1175 printk("rxdma_irq(%d): 1\n",info->line);
1176 #endif
1177 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1178 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1179 }
1180
1181 /* the tx DMA uses only dma_descr interrupt */
1182
1183 static void e100_disable_txdma_irq(struct e100_serial *info)
1184 {
1185 #ifdef SERIAL_DEBUG_INTR
1186 printk("txdma_irq(%d): 0\n",info->line);
1187 #endif
1188 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1189 *R_IRQ_MASK2_CLR = info->irq;
1190 }
1191
1192 static void e100_enable_txdma_irq(struct e100_serial *info)
1193 {
1194 #ifdef SERIAL_DEBUG_INTR
1195 printk("txdma_irq(%d): 1\n",info->line);
1196 #endif
1197 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1198 *R_IRQ_MASK2_SET = info->irq;
1199 }
1200
1201 static void e100_disable_txdma_channel(struct e100_serial *info)
1202 {
1203 unsigned long flags;
1204
1205 /* Disable output DMA channel for the serial port in question
1206 * ( set to something other than serialX)
1207 */
1208 local_irq_save(flags);
1209 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1210 if (info->line == 0) {
1211 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1212 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1213 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1214 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1215 }
1216 } else if (info->line == 1) {
1217 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1218 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1219 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1220 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1221 }
1222 } else if (info->line == 2) {
1223 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1224 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1225 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1226 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1227 }
1228 } else if (info->line == 3) {
1229 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1230 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1231 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1232 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1233 }
1234 }
1235 *R_GEN_CONFIG = genconfig_shadow;
1236 local_irq_restore(flags);
1237 }
1238
1239
1240 static void e100_enable_txdma_channel(struct e100_serial *info)
1241 {
1242 unsigned long flags;
1243
1244 local_irq_save(flags);
1245 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1246 /* Enable output DMA channel for the serial port in question */
1247 if (info->line == 0) {
1248 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1249 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1250 } else if (info->line == 1) {
1251 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1252 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1253 } else if (info->line == 2) {
1254 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1255 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1256 } else if (info->line == 3) {
1257 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1258 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1259 }
1260 *R_GEN_CONFIG = genconfig_shadow;
1261 local_irq_restore(flags);
1262 }
1263
1264 static void e100_disable_rxdma_channel(struct e100_serial *info)
1265 {
1266 unsigned long flags;
1267
1268 /* Disable input DMA channel for the serial port in question
1269 * ( set to something other than serialX)
1270 */
1271 local_irq_save(flags);
1272 if (info->line == 0) {
1273 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1274 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1275 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1276 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1277 }
1278 } else if (info->line == 1) {
1279 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1280 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1281 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1282 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1283 }
1284 } else if (info->line == 2) {
1285 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1286 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1287 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1288 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1289 }
1290 } else if (info->line == 3) {
1291 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1292 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1293 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1294 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1295 }
1296 }
1297 *R_GEN_CONFIG = genconfig_shadow;
1298 local_irq_restore(flags);
1299 }
1300
1301
1302 static void e100_enable_rxdma_channel(struct e100_serial *info)
1303 {
1304 unsigned long flags;
1305
1306 local_irq_save(flags);
1307 /* Enable input DMA channel for the serial port in question */
1308 if (info->line == 0) {
1309 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1310 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1311 } else if (info->line == 1) {
1312 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1313 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1314 } else if (info->line == 2) {
1315 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1316 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1317 } else if (info->line == 3) {
1318 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1319 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1320 }
1321 *R_GEN_CONFIG = genconfig_shadow;
1322 local_irq_restore(flags);
1323 }
1324
1325 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1326 /* in order to detect and fix errors on the first byte
1327 we have to use the serial interrupts as well. */
1328
1329 static inline void
1330 e100_disable_serial_data_irq(struct e100_serial *info)
1331 {
1332 #ifdef SERIAL_DEBUG_INTR
1333 printk("ser_irq(%d): 0\n",info->line);
1334 #endif
1335 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1336 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1337 }
1338
1339 static inline void
1340 e100_enable_serial_data_irq(struct e100_serial *info)
1341 {
1342 #ifdef SERIAL_DEBUG_INTR
1343 printk("ser_irq(%d): 1\n",info->line);
1344 printk("**** %d = %d\n",
1345 (8+2*info->line),
1346 (1U << (8+2*info->line)));
1347 #endif
1348 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1349 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1350 }
1351 #endif
1352
1353 static inline void
1354 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1355 {
1356 #ifdef SERIAL_DEBUG_INTR
1357 printk("ser_tx_irq(%d): 0\n",info->line);
1358 #endif
1359 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1360 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1361 }
1362
1363 static inline void
1364 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1365 {
1366 #ifdef SERIAL_DEBUG_INTR
1367 printk("ser_tx_irq(%d): 1\n",info->line);
1368 printk("**** %d = %d\n",
1369 (8+1+2*info->line),
1370 (1U << (8+1+2*info->line)));
1371 #endif
1372 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1373 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1374 }
1375
1376 static inline void e100_enable_rx_irq(struct e100_serial *info)
1377 {
1378 if (info->uses_dma_in)
1379 e100_enable_rxdma_irq(info);
1380 else
1381 e100_enable_serial_data_irq(info);
1382 }
1383 static inline void e100_disable_rx_irq(struct e100_serial *info)
1384 {
1385 if (info->uses_dma_in)
1386 e100_disable_rxdma_irq(info);
1387 else
1388 e100_disable_serial_data_irq(info);
1389 }
1390
1391 #if defined(CONFIG_ETRAX_RS485)
1392 /* Enable RS-485 mode on selected port. This is UGLY. */
1393 static int
1394 e100_enable_rs485(struct tty_struct *tty, struct serial_rs485 *r)
1395 {
1396 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1397
1398 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1399 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1400 #endif
1401 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1402 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1403 rs485_port_g_bit, 1);
1404 #endif
1405 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1406 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1407 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1408 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1409 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1410 #endif
1411
1412 info->rs485.flags = r->flags;
1413 if (r->delay_rts_before_send >= 1000)
1414 info->rs485.delay_rts_before_send = 1000;
1415 else
1416 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1417 /* printk("rts: on send = %i, after = %i, enabled = %i",
1418 info->rs485.rts_on_send,
1419 info->rs485.rts_after_sent,
1420 info->rs485.enabled
1421 );
1422 */
1423 return 0;
1424 }
1425
1426 static int
1427 e100_write_rs485(struct tty_struct *tty,
1428 const unsigned char *buf, int count)
1429 {
1430 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1431 int old_value = (info->rs485.flags) & SER_RS485_ENABLED;
1432
1433 /* rs485 is always implicitly enabled if we're using the ioctl()
1434 * but it doesn't have to be set in the serial_rs485
1435 * (to be backward compatible with old apps)
1436 * So we store, set and restore it.
1437 */
1438 info->rs485.flags |= SER_RS485_ENABLED;
1439 /* rs_write now deals with RS485 if enabled */
1440 count = rs_write(tty, buf, count);
1441 if (!old_value)
1442 info->rs485.flags &= ~(SER_RS485_ENABLED);
1443 return count;
1444 }
1445
1446 #ifdef CONFIG_ETRAX_FAST_TIMER
1447 /* Timer function to toggle RTS when using FAST_TIMER */
1448 static void rs485_toggle_rts_timer_function(unsigned long data)
1449 {
1450 struct e100_serial *info = (struct e100_serial *)data;
1451
1452 fast_timers_rs485[info->line].function = NULL;
1453 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
1454 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1455 e100_enable_rx(info);
1456 e100_enable_rx_irq(info);
1457 #endif
1458 }
1459 #endif
1460 #endif /* CONFIG_ETRAX_RS485 */
1461
1462 /*
1463 * ------------------------------------------------------------
1464 * rs_stop() and rs_start()
1465 *
1466 * This routines are called before setting or resetting tty->stopped.
1467 * They enable or disable transmitter using the XOFF registers, as necessary.
1468 * ------------------------------------------------------------
1469 */
1470
1471 static void
1472 rs_stop(struct tty_struct *tty)
1473 {
1474 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1475 if (info) {
1476 unsigned long flags;
1477 unsigned long xoff;
1478
1479 local_irq_save(flags);
1480 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1481 CIRC_CNT(info->xmit.head,
1482 info->xmit.tail,SERIAL_XMIT_SIZE)));
1483
1484 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char,
1485 STOP_CHAR(info->port.tty));
1486 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1487 if (tty->termios->c_iflag & IXON ) {
1488 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1489 }
1490
1491 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1492 local_irq_restore(flags);
1493 }
1494 }
1495
1496 static void
1497 rs_start(struct tty_struct *tty)
1498 {
1499 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1500 if (info) {
1501 unsigned long flags;
1502 unsigned long xoff;
1503
1504 local_irq_save(flags);
1505 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1506 CIRC_CNT(info->xmit.head,
1507 info->xmit.tail,SERIAL_XMIT_SIZE)));
1508 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1509 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1510 if (tty->termios->c_iflag & IXON ) {
1511 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1512 }
1513
1514 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1515 if (!info->uses_dma_out &&
1516 info->xmit.head != info->xmit.tail && info->xmit.buf)
1517 e100_enable_serial_tx_ready_irq(info);
1518
1519 local_irq_restore(flags);
1520 }
1521 }
1522
1523 /*
1524 * ----------------------------------------------------------------------
1525 *
1526 * Here starts the interrupt handling routines. All of the following
1527 * subroutines are declared as inline and are folded into
1528 * rs_interrupt(). They were separated out for readability's sake.
1529 *
1530 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1531 * runs with interrupts turned off. People who may want to modify
1532 * rs_interrupt() should try to keep the interrupt handler as fast as
1533 * possible. After you are done making modifications, it is not a bad
1534 * idea to do:
1535 *
1536 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1537 *
1538 * and look at the resulting assemble code in serial.s.
1539 *
1540 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1541 * -----------------------------------------------------------------------
1542 */
1543
1544 /*
1545 * This routine is used by the interrupt handler to schedule
1546 * processing in the software interrupt portion of the driver.
1547 */
1548 static void rs_sched_event(struct e100_serial *info, int event)
1549 {
1550 if (info->event & (1 << event))
1551 return;
1552 info->event |= 1 << event;
1553 schedule_work(&info->work);
1554 }
1555
1556 /* The output DMA channel is free - use it to send as many chars as possible
1557 * NOTES:
1558 * We don't pay attention to info->x_char, which means if the TTY wants to
1559 * use XON/XOFF it will set info->x_char but we won't send any X char!
1560 *
1561 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1562 * buffer containing the X char, and skip updating xmit. We'd also have to
1563 * check if the last sent char was the X char when we enter this function
1564 * the next time, to avoid updating xmit with the sent X value.
1565 */
1566
1567 static void
1568 transmit_chars_dma(struct e100_serial *info)
1569 {
1570 unsigned int c, sentl;
1571 struct etrax_dma_descr *descr;
1572
1573 #ifdef CONFIG_SVINTO_SIM
1574 /* This will output too little if tail is not 0 always since
1575 * we don't reloop to send the other part. Anyway this SHOULD be a
1576 * no-op - transmit_chars_dma would never really be called during sim
1577 * since rs_write does not write into the xmit buffer then.
1578 */
1579 if (info->xmit.tail)
1580 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1581 if (info->xmit.head != info->xmit.tail) {
1582 SIMCOUT(info->xmit.buf + info->xmit.tail,
1583 CIRC_CNT(info->xmit.head,
1584 info->xmit.tail,
1585 SERIAL_XMIT_SIZE));
1586 info->xmit.head = info->xmit.tail; /* move back head */
1587 info->tr_running = 0;
1588 }
1589 return;
1590 #endif
1591 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1592 *info->oclrintradr =
1593 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1594 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1595
1596 #ifdef SERIAL_DEBUG_INTR
1597 if (info->line == SERIAL_DEBUG_LINE)
1598 printk("tc\n");
1599 #endif
1600 if (!info->tr_running) {
1601 /* weirdo... we shouldn't get here! */
1602 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1603 return;
1604 }
1605
1606 descr = &info->tr_descr;
1607
1608 /* first get the amount of bytes sent during the last DMA transfer,
1609 and update xmit accordingly */
1610
1611 /* if the stop bit was not set, all data has been sent */
1612 if (!(descr->status & d_stop)) {
1613 sentl = descr->sw_len;
1614 } else
1615 /* otherwise we find the amount of data sent here */
1616 sentl = descr->hw_len;
1617
1618 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1619
1620 /* update stats */
1621 info->icount.tx += sentl;
1622
1623 /* update xmit buffer */
1624 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1625
1626 /* if there is only a few chars left in the buf, wake up the blocked
1627 write if any */
1628 if (CIRC_CNT(info->xmit.head,
1629 info->xmit.tail,
1630 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1631 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1632
1633 /* find out the largest amount of consecutive bytes we want to send now */
1634
1635 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1636
1637 /* Don't send all in one DMA transfer - divide it so we wake up
1638 * application before all is sent
1639 */
1640
1641 if (c >= 4*WAKEUP_CHARS)
1642 c = c/2;
1643
1644 if (c <= 0) {
1645 /* our job here is done, don't schedule any new DMA transfer */
1646 info->tr_running = 0;
1647
1648 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1649 if (info->rs485.flags & SER_RS485_ENABLED) {
1650 /* Set a short timer to toggle RTS */
1651 start_one_shot_timer(&fast_timers_rs485[info->line],
1652 rs485_toggle_rts_timer_function,
1653 (unsigned long)info,
1654 info->char_time_usec*2,
1655 "RS-485");
1656 }
1657 #endif /* RS485 */
1658 return;
1659 }
1660
1661 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1662 /* set up the descriptor correctly for output */
1663 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
1664 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
1665 descr->sw_len = c;
1666 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1667 descr->status = 0;
1668
1669 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
1670 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1671
1672 /* DMA is now running (hopefully) */
1673 } /* transmit_chars_dma */
1674
1675 static void
1676 start_transmit(struct e100_serial *info)
1677 {
1678 #if 0
1679 if (info->line == SERIAL_DEBUG_LINE)
1680 printk("x\n");
1681 #endif
1682
1683 info->tr_descr.sw_len = 0;
1684 info->tr_descr.hw_len = 0;
1685 info->tr_descr.status = 0;
1686 info->tr_running = 1;
1687 if (info->uses_dma_out)
1688 transmit_chars_dma(info);
1689 else
1690 e100_enable_serial_tx_ready_irq(info);
1691 } /* start_transmit */
1692
1693 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1694 static int serial_fast_timer_started = 0;
1695 static int serial_fast_timer_expired = 0;
1696 static void flush_timeout_function(unsigned long data);
1697 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1698 unsigned long timer_flags; \
1699 local_irq_save(timer_flags); \
1700 if (fast_timers[info->line].function == NULL) { \
1701 serial_fast_timer_started++; \
1702 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1703 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1704 start_one_shot_timer(&fast_timers[info->line], \
1705 flush_timeout_function, \
1706 (unsigned long)info, \
1707 (usec), \
1708 string); \
1709 } \
1710 else { \
1711 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1712 } \
1713 local_irq_restore(timer_flags); \
1714 }
1715 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1716
1717 #else
1718 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1719 #define START_FLUSH_FAST_TIMER(info, string)
1720 #endif
1721
1722 static struct etrax_recv_buffer *
1723 alloc_recv_buffer(unsigned int size)
1724 {
1725 struct etrax_recv_buffer *buffer;
1726
1727 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1728 return NULL;
1729
1730 buffer->next = NULL;
1731 buffer->length = 0;
1732 buffer->error = TTY_NORMAL;
1733
1734 return buffer;
1735 }
1736
1737 static void
1738 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1739 {
1740 unsigned long flags;
1741
1742 local_irq_save(flags);
1743
1744 if (!info->first_recv_buffer)
1745 info->first_recv_buffer = buffer;
1746 else
1747 info->last_recv_buffer->next = buffer;
1748
1749 info->last_recv_buffer = buffer;
1750
1751 info->recv_cnt += buffer->length;
1752 if (info->recv_cnt > info->max_recv_cnt)
1753 info->max_recv_cnt = info->recv_cnt;
1754
1755 local_irq_restore(flags);
1756 }
1757
1758 static int
1759 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1760 {
1761 struct etrax_recv_buffer *buffer;
1762 if (info->uses_dma_in) {
1763 if (!(buffer = alloc_recv_buffer(4)))
1764 return 0;
1765
1766 buffer->length = 1;
1767 buffer->error = flag;
1768 buffer->buffer[0] = data;
1769
1770 append_recv_buffer(info, buffer);
1771
1772 info->icount.rx++;
1773 } else {
1774 struct tty_struct *tty = info->port.tty;
1775 tty_insert_flip_char(tty, data, flag);
1776 info->icount.rx++;
1777 }
1778
1779 return 1;
1780 }
1781
1782 static unsigned int handle_descr_data(struct e100_serial *info,
1783 struct etrax_dma_descr *descr,
1784 unsigned int recvl)
1785 {
1786 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1787
1788 if (info->recv_cnt + recvl > 65536) {
1789 printk(KERN_CRIT
1790 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__, recvl);
1791 return 0;
1792 }
1793
1794 buffer->length = recvl;
1795
1796 if (info->errorcode == ERRCODE_SET_BREAK)
1797 buffer->error = TTY_BREAK;
1798 info->errorcode = 0;
1799
1800 append_recv_buffer(info, buffer);
1801
1802 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1803 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1804
1805 descr->buf = virt_to_phys(buffer->buffer);
1806
1807 return recvl;
1808 }
1809
1810 static unsigned int handle_all_descr_data(struct e100_serial *info)
1811 {
1812 struct etrax_dma_descr *descr;
1813 unsigned int recvl;
1814 unsigned int ret = 0;
1815
1816 while (1)
1817 {
1818 descr = &info->rec_descr[info->cur_rec_descr];
1819
1820 if (descr == phys_to_virt(*info->idescradr))
1821 break;
1822
1823 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1824 info->cur_rec_descr = 0;
1825
1826 /* find out how many bytes were read */
1827
1828 /* if the eop bit was not set, all data has been received */
1829 if (!(descr->status & d_eop)) {
1830 recvl = descr->sw_len;
1831 } else {
1832 /* otherwise we find the amount of data received here */
1833 recvl = descr->hw_len;
1834 }
1835
1836 /* Reset the status information */
1837 descr->status = 0;
1838
1839 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
1840 if (info->port.tty->stopped) {
1841 unsigned char *buf = phys_to_virt(descr->buf);
1842 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
1843 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
1844 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
1845 }
1846 );
1847
1848 /* update stats */
1849 info->icount.rx += recvl;
1850
1851 ret += handle_descr_data(info, descr, recvl);
1852 }
1853
1854 return ret;
1855 }
1856
1857 static void receive_chars_dma(struct e100_serial *info)
1858 {
1859 struct tty_struct *tty;
1860 unsigned char rstat;
1861
1862 #ifdef CONFIG_SVINTO_SIM
1863 /* No receive in the simulator. Will probably be when the rest of
1864 * the serial interface works, and this piece will just be removed.
1865 */
1866 return;
1867 #endif
1868
1869 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1870 *info->iclrintradr =
1871 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1872 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1873
1874 tty = info->port.tty;
1875 if (!tty) /* Something wrong... */
1876 return;
1877
1878 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1879 if (info->uses_dma_in)
1880 e100_enable_serial_data_irq(info);
1881 #endif
1882
1883 if (info->errorcode == ERRCODE_INSERT_BREAK)
1884 add_char_and_flag(info, '\0', TTY_BREAK);
1885
1886 handle_all_descr_data(info);
1887
1888 /* Read the status register to detect errors */
1889 rstat = info->ioport[REG_STATUS];
1890 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
1891 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
1892 }
1893
1894 if (rstat & SER_ERROR_MASK) {
1895 /* If we got an error, we must reset it by reading the
1896 * data_in field
1897 */
1898 unsigned char data = info->ioport[REG_DATA];
1899
1900 PROCSTAT(ser_stat[info->line].errors_cnt++);
1901 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1902 ((rstat & SER_ERROR_MASK) << 8) | data);
1903
1904 if (rstat & SER_PAR_ERR_MASK)
1905 add_char_and_flag(info, data, TTY_PARITY);
1906 else if (rstat & SER_OVERRUN_MASK)
1907 add_char_and_flag(info, data, TTY_OVERRUN);
1908 else if (rstat & SER_FRAMING_ERR_MASK)
1909 add_char_and_flag(info, data, TTY_FRAME);
1910 }
1911
1912 START_FLUSH_FAST_TIMER(info, "receive_chars");
1913
1914 /* Restart the receiving DMA */
1915 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1916 }
1917
1918 static int start_recv_dma(struct e100_serial *info)
1919 {
1920 struct etrax_dma_descr *descr = info->rec_descr;
1921 struct etrax_recv_buffer *buffer;
1922 int i;
1923
1924 /* Set up the receiving descriptors */
1925 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1926 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1927 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1928
1929 descr[i].ctrl = d_int;
1930 descr[i].buf = virt_to_phys(buffer->buffer);
1931 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1932 descr[i].hw_len = 0;
1933 descr[i].status = 0;
1934 descr[i].next = virt_to_phys(&descr[i+1]);
1935 }
1936
1937 /* Link the last descriptor to the first */
1938 descr[i-1].next = virt_to_phys(&descr[0]);
1939
1940 /* Start with the first descriptor in the list */
1941 info->cur_rec_descr = 0;
1942
1943 /* Start the DMA */
1944 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1945 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1946
1947 /* Input DMA should be running now */
1948 return 1;
1949 }
1950
1951 static void
1952 start_receive(struct e100_serial *info)
1953 {
1954 #ifdef CONFIG_SVINTO_SIM
1955 /* No receive in the simulator. Will probably be when the rest of
1956 * the serial interface works, and this piece will just be removed.
1957 */
1958 return;
1959 #endif
1960 if (info->uses_dma_in) {
1961 /* reset the input dma channel to be sure it works */
1962
1963 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1964 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1965 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1966
1967 start_recv_dma(info);
1968 }
1969 }
1970
1971
1972 /* the bits in the MASK2 register are laid out like this:
1973 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1974 where I is the input channel and O is the output channel for the port.
1975 info->irq is the bit number for the DMAO_DESCR so to check the others we
1976 shift info->irq to the left.
1977 */
1978
1979 /* dma output channel interrupt handler
1980 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1981 DMA8(ser1) when they have finished a descriptor with the intr flag set.
1982 */
1983
1984 static irqreturn_t
1985 tr_interrupt(int irq, void *dev_id)
1986 {
1987 struct e100_serial *info;
1988 unsigned long ireg;
1989 int i;
1990 int handled = 0;
1991
1992 #ifdef CONFIG_SVINTO_SIM
1993 /* No receive in the simulator. Will probably be when the rest of
1994 * the serial interface works, and this piece will just be removed.
1995 */
1996 {
1997 const char *s = "What? tr_interrupt in simulator??\n";
1998 SIMCOUT(s,strlen(s));
1999 }
2000 return IRQ_HANDLED;
2001 #endif
2002
2003 /* find out the line that caused this irq and get it from rs_table */
2004
2005 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2006
2007 for (i = 0; i < NR_PORTS; i++) {
2008 info = rs_table + i;
2009 if (!info->enabled || !info->uses_dma_out)
2010 continue;
2011 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2012 if (ireg & info->irq) {
2013 handled = 1;
2014 /* we can send a new dma bunch. make it so. */
2015 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2016 /* Read jiffies_usec first,
2017 * we want this time to be as late as possible
2018 */
2019 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2020 info->last_tx_active_usec = GET_JIFFIES_USEC();
2021 info->last_tx_active = jiffies;
2022 transmit_chars_dma(info);
2023 }
2024
2025 /* FIXME: here we should really check for a change in the
2026 status lines and if so call status_handle(info) */
2027 }
2028 return IRQ_RETVAL(handled);
2029 } /* tr_interrupt */
2030
2031 /* dma input channel interrupt handler */
2032
2033 static irqreturn_t
2034 rec_interrupt(int irq, void *dev_id)
2035 {
2036 struct e100_serial *info;
2037 unsigned long ireg;
2038 int i;
2039 int handled = 0;
2040
2041 #ifdef CONFIG_SVINTO_SIM
2042 /* No receive in the simulator. Will probably be when the rest of
2043 * the serial interface works, and this piece will just be removed.
2044 */
2045 {
2046 const char *s = "What? rec_interrupt in simulator??\n";
2047 SIMCOUT(s,strlen(s));
2048 }
2049 return IRQ_HANDLED;
2050 #endif
2051
2052 /* find out the line that caused this irq and get it from rs_table */
2053
2054 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2055
2056 for (i = 0; i < NR_PORTS; i++) {
2057 info = rs_table + i;
2058 if (!info->enabled || !info->uses_dma_in)
2059 continue;
2060 /* check for both dma_eop and dma_descr for the input dma channel */
2061 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2062 handled = 1;
2063 /* we have received something */
2064 receive_chars_dma(info);
2065 }
2066
2067 /* FIXME: here we should really check for a change in the
2068 status lines and if so call status_handle(info) */
2069 }
2070 return IRQ_RETVAL(handled);
2071 } /* rec_interrupt */
2072
2073 static int force_eop_if_needed(struct e100_serial *info)
2074 {
2075 /* We check data_avail bit to determine if data has
2076 * arrived since last time
2077 */
2078 unsigned char rstat = info->ioport[REG_STATUS];
2079
2080 /* error or datavail? */
2081 if (rstat & SER_ERROR_MASK) {
2082 /* Some error has occurred. If there has been valid data, an
2083 * EOP interrupt will be made automatically. If no data, the
2084 * normal ser_interrupt should be enabled and handle it.
2085 * So do nothing!
2086 */
2087 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2088 rstat | (info->line << 8));
2089 return 0;
2090 }
2091
2092 if (rstat & SER_DATA_AVAIL_MASK) {
2093 /* Ok data, no error, count it */
2094 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2095 rstat | (info->line << 8)));
2096 /* Read data to clear status flags */
2097 (void)info->ioport[REG_DATA];
2098
2099 info->forced_eop = 0;
2100 START_FLUSH_FAST_TIMER(info, "magic");
2101 return 0;
2102 }
2103
2104 /* hit the timeout, force an EOP for the input
2105 * dma channel if we haven't already
2106 */
2107 if (!info->forced_eop) {
2108 info->forced_eop = 1;
2109 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2110 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2111 FORCE_EOP(info);
2112 }
2113
2114 return 1;
2115 }
2116
2117 static void flush_to_flip_buffer(struct e100_serial *info)
2118 {
2119 struct tty_struct *tty;
2120 struct etrax_recv_buffer *buffer;
2121 unsigned long flags;
2122
2123 local_irq_save(flags);
2124 tty = info->port.tty;
2125
2126 if (!tty) {
2127 local_irq_restore(flags);
2128 return;
2129 }
2130
2131 while ((buffer = info->first_recv_buffer) != NULL) {
2132 unsigned int count = buffer->length;
2133
2134 tty_insert_flip_string(tty, buffer->buffer, count);
2135 info->recv_cnt -= count;
2136
2137 if (count == buffer->length) {
2138 info->first_recv_buffer = buffer->next;
2139 kfree(buffer);
2140 } else {
2141 buffer->length -= count;
2142 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2143 buffer->error = TTY_NORMAL;
2144 }
2145 }
2146
2147 if (!info->first_recv_buffer)
2148 info->last_recv_buffer = NULL;
2149
2150 local_irq_restore(flags);
2151
2152 /* This includes a check for low-latency */
2153 tty_flip_buffer_push(tty);
2154 }
2155
2156 static void check_flush_timeout(struct e100_serial *info)
2157 {
2158 /* Flip what we've got (if we can) */
2159 flush_to_flip_buffer(info);
2160
2161 /* We might need to flip later, but not to fast
2162 * since the system is busy processing input... */
2163 if (info->first_recv_buffer)
2164 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2165
2166 /* Force eop last, since data might have come while we're processing
2167 * and if we started the slow timer above, we won't start a fast
2168 * below.
2169 */
2170 force_eop_if_needed(info);
2171 }
2172
2173 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2174 static void flush_timeout_function(unsigned long data)
2175 {
2176 struct e100_serial *info = (struct e100_serial *)data;
2177
2178 fast_timers[info->line].function = NULL;
2179 serial_fast_timer_expired++;
2180 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2181 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2182 check_flush_timeout(info);
2183 }
2184
2185 #else
2186
2187 /* dma fifo/buffer timeout handler
2188 forces an end-of-packet for the dma input channel if no chars
2189 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2190 */
2191
2192 static struct timer_list flush_timer;
2193
2194 static void
2195 timed_flush_handler(unsigned long ptr)
2196 {
2197 struct e100_serial *info;
2198 int i;
2199
2200 #ifdef CONFIG_SVINTO_SIM
2201 return;
2202 #endif
2203
2204 for (i = 0; i < NR_PORTS; i++) {
2205 info = rs_table + i;
2206 if (info->uses_dma_in)
2207 check_flush_timeout(info);
2208 }
2209
2210 /* restart flush timer */
2211 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2212 }
2213 #endif
2214
2215 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2216
2217 /* If there is an error (ie break) when the DMA is running and
2218 * there are no bytes in the fifo the DMA is stopped and we get no
2219 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2220 * transfer, and if it is without error we can turn the serial
2221 * interrupts off.
2222 */
2223
2224 /*
2225 BREAK handling on ETRAX 100:
2226 ETRAX will generate interrupt although there is no stop bit between the
2227 characters.
2228
2229 Depending on how long the break sequence is, the end of the breaksequence
2230 will look differently:
2231 | indicates start/end of a character.
2232
2233 B= Break character (0x00) with framing error.
2234 E= Error byte with parity error received after B characters.
2235 F= "Faked" valid byte received immediately after B characters.
2236 V= Valid byte
2237
2238 1.
2239 B BL ___________________________ V
2240 .._|__________|__________| |valid data |
2241
2242 Multiple frame errors with data == 0x00 (B),
2243 the timing matches up "perfectly" so no extra ending char is detected.
2244 The RXD pin is 1 in the last interrupt, in that case
2245 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2246 know if another byte will come and this really is case 2. below
2247 (e.g F=0xFF or 0xFE)
2248 If RXD pin is 0 we can expect another character (see 2. below).
2249
2250
2251 2.
2252
2253 B B E or F__________________..__ V
2254 .._|__________|__________|______ | |valid data
2255 "valid" or
2256 parity error
2257
2258 Multiple frame errors with data == 0x00 (B),
2259 but the part of the break trigs is interpreted as a start bit (and possibly
2260 some 0 bits followed by a number of 1 bits and a stop bit).
2261 Depending on parity settings etc. this last character can be either
2262 a fake "valid" char (F) or have a parity error (E).
2263
2264 If the character is valid it will be put in the buffer,
2265 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2266 will set the flags so the tty will handle it,
2267 if it's an error byte it will not be put in the buffer
2268 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2269
2270 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2271 of the last faulty char (B) and compares it with the current time:
2272 If the time elapsed time is less then 2*char_time_usec we will assume
2273 it's a faked F char and not a Valid char and set
2274 info->errorcode = ERRCODE_SET_BREAK.
2275
2276 Flaws in the above solution:
2277 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2278 We use the timer to distinguish a F character from a V character,
2279 if a V character is to close after the break we might make the wrong decision.
2280
2281 TODO: The break will be delayed until an F or V character is received.
2282
2283 */
2284
2285 static
2286 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2287 {
2288 unsigned long data_read;
2289 struct tty_struct *tty = info->port.tty;
2290
2291 if (!tty) {
2292 printk("!NO TTY!\n");
2293 return info;
2294 }
2295
2296 /* Read data and status at the same time */
2297 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2298 more_data:
2299 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2300 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2301 }
2302 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2303
2304 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2305 IO_MASK(R_SERIAL0_READ, par_err) |
2306 IO_MASK(R_SERIAL0_READ, overrun) )) {
2307 /* An error */
2308 info->last_rx_active_usec = GET_JIFFIES_USEC();
2309 info->last_rx_active = jiffies;
2310 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2311 DLOG_INT_TRIG(
2312 if (!log_int_trig1_pos) {
2313 log_int_trig1_pos = log_int_pos;
2314 log_int(rdpc(), 0, 0);
2315 }
2316 );
2317
2318
2319 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2320 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2321 /* Most likely a break, but we get interrupts over and
2322 * over again.
2323 */
2324
2325 if (!info->break_detected_cnt) {
2326 DEBUG_LOG(info->line, "#BRK start\n", 0);
2327 }
2328 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2329 /* The RX pin is high now, so the break
2330 * must be over, but....
2331 * we can't really know if we will get another
2332 * last byte ending the break or not.
2333 * And we don't know if the byte (if any) will
2334 * have an error or look valid.
2335 */
2336 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2337 info->errorcode = ERRCODE_INSERT_BREAK;
2338 }
2339 info->break_detected_cnt++;
2340 } else {
2341 /* The error does not look like a break, but could be
2342 * the end of one
2343 */
2344 if (info->break_detected_cnt) {
2345 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2346 info->errorcode = ERRCODE_INSERT_BREAK;
2347 } else {
2348 unsigned char data = IO_EXTRACT(R_SERIAL0_READ,
2349 data_in, data_read);
2350 char flag = TTY_NORMAL;
2351 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2352 struct tty_struct *tty = info->port.tty;
2353 tty_insert_flip_char(tty, 0, flag);
2354 info->icount.rx++;
2355 }
2356
2357 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2358 info->icount.parity++;
2359 flag = TTY_PARITY;
2360 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2361 info->icount.overrun++;
2362 flag = TTY_OVERRUN;
2363 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2364 info->icount.frame++;
2365 flag = TTY_FRAME;
2366 }
2367 tty_insert_flip_char(tty, data, flag);
2368 info->errorcode = 0;
2369 }
2370 info->break_detected_cnt = 0;
2371 }
2372 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2373 /* No error */
2374 DLOG_INT_TRIG(
2375 if (!log_int_trig1_pos) {
2376 if (log_int_pos >= log_int_size) {
2377 log_int_pos = 0;
2378 }
2379 log_int_trig0_pos = log_int_pos;
2380 log_int(rdpc(), 0, 0);
2381 }
2382 );
2383 tty_insert_flip_char(tty,
2384 IO_EXTRACT(R_SERIAL0_READ, data_in, data_read),
2385 TTY_NORMAL);
2386 } else {
2387 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2388 }
2389
2390
2391 info->icount.rx++;
2392 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2393 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2394 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2395 goto more_data;
2396 }
2397
2398 tty_flip_buffer_push(info->port.tty);
2399 return info;
2400 }
2401
2402 static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2403 {
2404 unsigned char rstat;
2405
2406 #ifdef SERIAL_DEBUG_INTR
2407 printk("Interrupt from serport %d\n", i);
2408 #endif
2409 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2410 if (!info->uses_dma_in) {
2411 return handle_ser_rx_interrupt_no_dma(info);
2412 }
2413 /* DMA is used */
2414 rstat = info->ioport[REG_STATUS];
2415 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2416 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2417 }
2418
2419 if (rstat & SER_ERROR_MASK) {
2420 unsigned char data;
2421
2422 info->last_rx_active_usec = GET_JIFFIES_USEC();
2423 info->last_rx_active = jiffies;
2424 /* If we got an error, we must reset it by reading the
2425 * data_in field
2426 */
2427 data = info->ioport[REG_DATA];
2428 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2429 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2430 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2431 /* Most likely a break, but we get interrupts over and
2432 * over again.
2433 */
2434
2435 if (!info->break_detected_cnt) {
2436 DEBUG_LOG(info->line, "#BRK start\n", 0);
2437 }
2438 if (rstat & SER_RXD_MASK) {
2439 /* The RX pin is high now, so the break
2440 * must be over, but....
2441 * we can't really know if we will get another
2442 * last byte ending the break or not.
2443 * And we don't know if the byte (if any) will
2444 * have an error or look valid.
2445 */
2446 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2447 info->errorcode = ERRCODE_INSERT_BREAK;
2448 }
2449 info->break_detected_cnt++;
2450 } else {
2451 /* The error does not look like a break, but could be
2452 * the end of one
2453 */
2454 if (info->break_detected_cnt) {
2455 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2456 info->errorcode = ERRCODE_INSERT_BREAK;
2457 } else {
2458 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2459 info->icount.brk++;
2460 add_char_and_flag(info, '\0', TTY_BREAK);
2461 }
2462
2463 if (rstat & SER_PAR_ERR_MASK) {
2464 info->icount.parity++;
2465 add_char_and_flag(info, data, TTY_PARITY);
2466 } else if (rstat & SER_OVERRUN_MASK) {
2467 info->icount.overrun++;
2468 add_char_and_flag(info, data, TTY_OVERRUN);
2469 } else if (rstat & SER_FRAMING_ERR_MASK) {
2470 info->icount.frame++;
2471 add_char_and_flag(info, data, TTY_FRAME);
2472 }
2473
2474 info->errorcode = 0;
2475 }
2476 info->break_detected_cnt = 0;
2477 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2478 ((rstat & SER_ERROR_MASK) << 8) | data);
2479 }
2480 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2481 } else { /* It was a valid byte, now let the DMA do the rest */
2482 unsigned long curr_time_u = GET_JIFFIES_USEC();
2483 unsigned long curr_time = jiffies;
2484
2485 if (info->break_detected_cnt) {
2486 /* Detect if this character is a new valid char or the
2487 * last char in a break sequence: If LSBits are 0 and
2488 * MSBits are high AND the time is close to the
2489 * previous interrupt we should discard it.
2490 */
2491 long elapsed_usec =
2492 (curr_time - info->last_rx_active) * (1000000/HZ) +
2493 curr_time_u - info->last_rx_active_usec;
2494 if (elapsed_usec < 2*info->char_time_usec) {
2495 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2496 /* Report as BREAK (error) and let
2497 * receive_chars_dma() handle it
2498 */
2499 info->errorcode = ERRCODE_SET_BREAK;
2500 } else {
2501 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2502 }
2503 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2504 }
2505
2506 #ifdef SERIAL_DEBUG_INTR
2507 printk("** OK, disabling ser_interrupts\n");
2508 #endif
2509 e100_disable_serial_data_irq(info);
2510 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2511 info->break_detected_cnt = 0;
2512
2513 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2514 }
2515 /* Restarting the DMA never hurts */
2516 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2517 START_FLUSH_FAST_TIMER(info, "ser_int");
2518 return info;
2519 } /* handle_ser_rx_interrupt */
2520
2521 static void handle_ser_tx_interrupt(struct e100_serial *info)
2522 {
2523 unsigned long flags;
2524
2525 if (info->x_char) {
2526 unsigned char rstat;
2527 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2528 local_irq_save(flags);
2529 rstat = info->ioport[REG_STATUS];
2530 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2531
2532 info->ioport[REG_TR_DATA] = info->x_char;
2533 info->icount.tx++;
2534 info->x_char = 0;
2535 /* We must enable since it is disabled in ser_interrupt */
2536 e100_enable_serial_tx_ready_irq(info);
2537 local_irq_restore(flags);
2538 return;
2539 }
2540 if (info->uses_dma_out) {
2541 unsigned char rstat;
2542 int i;
2543 /* We only use normal tx interrupt when sending x_char */
2544 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2545 local_irq_save(flags);
2546 rstat = info->ioport[REG_STATUS];
2547 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2548 e100_disable_serial_tx_ready_irq(info);
2549 if (info->port.tty->stopped)
2550 rs_stop(info->port.tty);
2551 /* Enable the DMA channel and tell it to continue */
2552 e100_enable_txdma_channel(info);
2553 /* Wait 12 cycles before doing the DMA command */
2554 for(i = 6; i > 0; i--)
2555 nop();
2556
2557 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2558 local_irq_restore(flags);
2559 return;
2560 }
2561 /* Normal char-by-char interrupt */
2562 if (info->xmit.head == info->xmit.tail
2563 || info->port.tty->stopped
2564 || info->port.tty->hw_stopped) {
2565 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n",
2566 info->port.tty->stopped));
2567 e100_disable_serial_tx_ready_irq(info);
2568 info->tr_running = 0;
2569 return;
2570 }
2571 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2572 /* Send a byte, rs485 timing is critical so turn of ints */
2573 local_irq_save(flags);
2574 info->ioport[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2575 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2576 info->icount.tx++;
2577 if (info->xmit.head == info->xmit.tail) {
2578 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2579 if (info->rs485.flags & SER_RS485_ENABLED) {
2580 /* Set a short timer to toggle RTS */
2581 start_one_shot_timer(&fast_timers_rs485[info->line],
2582 rs485_toggle_rts_timer_function,
2583 (unsigned long)info,
2584 info->char_time_usec*2,
2585 "RS-485");
2586 }
2587 #endif /* RS485 */
2588 info->last_tx_active_usec = GET_JIFFIES_USEC();
2589 info->last_tx_active = jiffies;
2590 e100_disable_serial_tx_ready_irq(info);
2591 info->tr_running = 0;
2592 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2593 } else {
2594 /* We must enable since it is disabled in ser_interrupt */
2595 e100_enable_serial_tx_ready_irq(info);
2596 }
2597 local_irq_restore(flags);
2598
2599 if (CIRC_CNT(info->xmit.head,
2600 info->xmit.tail,
2601 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2602 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2603
2604 } /* handle_ser_tx_interrupt */
2605
2606 /* result of time measurements:
2607 * RX duration 54-60 us when doing something, otherwise 6-9 us
2608 * ser_int duration: just sending: 8-15 us normally, up to 73 us
2609 */
2610 static irqreturn_t
2611 ser_interrupt(int irq, void *dev_id)
2612 {
2613 static volatile int tx_started = 0;
2614 struct e100_serial *info;
2615 int i;
2616 unsigned long flags;
2617 unsigned long irq_mask1_rd;
2618 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
2619 int handled = 0;
2620 static volatile unsigned long reentered_ready_mask = 0;
2621
2622 local_irq_save(flags);
2623 irq_mask1_rd = *R_IRQ_MASK1_RD;
2624 /* First handle all rx interrupts with ints disabled */
2625 info = rs_table;
2626 irq_mask1_rd &= e100_ser_int_mask;
2627 for (i = 0; i < NR_PORTS; i++) {
2628 /* Which line caused the data irq? */
2629 if (irq_mask1_rd & data_mask) {
2630 handled = 1;
2631 handle_ser_rx_interrupt(info);
2632 }
2633 info += 1;
2634 data_mask <<= 2;
2635 }
2636 /* Handle tx interrupts with interrupts enabled so we
2637 * can take care of new data interrupts while transmitting
2638 * We protect the tx part with the tx_started flag.
2639 * We disable the tr_ready interrupts we are about to handle and
2640 * unblock the serial interrupt so new serial interrupts may come.
2641 *
2642 * If we get a new interrupt:
2643 * - it migth be due to synchronous serial ports.
2644 * - serial irq will be blocked by general irq handler.
2645 * - async data will be handled above (sync will be ignored).
2646 * - tx_started flag will prevent us from trying to send again and
2647 * we will exit fast - no need to unblock serial irq.
2648 * - Next (sync) serial interrupt handler will be runned with
2649 * disabled interrupt due to restore_flags() at end of function,
2650 * so sync handler will not be preempted or reentered.
2651 */
2652 if (!tx_started) {
2653 unsigned long ready_mask;
2654 unsigned long
2655 tx_started = 1;
2656 /* Only the tr_ready interrupts left */
2657 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2658 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2659 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2660 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2661 while (irq_mask1_rd) {
2662 /* Disable those we are about to handle */
2663 *R_IRQ_MASK1_CLR = irq_mask1_rd;
2664 /* Unblock the serial interrupt */
2665 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
2666
2667 local_irq_enable();
2668 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
2669 info = rs_table;
2670 for (i = 0; i < NR_PORTS; i++) {
2671 /* Which line caused the ready irq? */
2672 if (irq_mask1_rd & ready_mask) {
2673 handled = 1;
2674 handle_ser_tx_interrupt(info);
2675 }
2676 info += 1;
2677 ready_mask <<= 2;
2678 }
2679 /* handle_ser_tx_interrupt enables tr_ready interrupts */
2680 local_irq_disable();
2681 /* Handle reentered TX interrupt */
2682 irq_mask1_rd = reentered_ready_mask;
2683 }
2684 local_irq_disable();
2685 tx_started = 0;
2686 } else {
2687 unsigned long ready_mask;
2688 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2689 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2690 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2691 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2692 if (ready_mask) {
2693 reentered_ready_mask |= ready_mask;
2694 /* Disable those we are about to handle */
2695 *R_IRQ_MASK1_CLR = ready_mask;
2696 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
2697 }
2698 }
2699
2700 local_irq_restore(flags);
2701 return IRQ_RETVAL(handled);
2702 } /* ser_interrupt */
2703 #endif
2704
2705 /*
2706 * -------------------------------------------------------------------
2707 * Here ends the serial interrupt routines.
2708 * -------------------------------------------------------------------
2709 */
2710
2711 /*
2712 * This routine is used to handle the "bottom half" processing for the
2713 * serial driver, known also the "software interrupt" processing.
2714 * This processing is done at the kernel interrupt level, after the
2715 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
2716 * is where time-consuming activities which can not be done in the
2717 * interrupt driver proper are done; the interrupt driver schedules
2718 * them using rs_sched_event(), and they get done here.
2719 */
2720 static void
2721 do_softint(struct work_struct *work)
2722 {
2723 struct e100_serial *info;
2724 struct tty_struct *tty;
2725
2726 info = container_of(work, struct e100_serial, work);
2727
2728 tty = info->port.tty;
2729 if (!tty)
2730 return;
2731
2732 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
2733 tty_wakeup(tty);
2734 }
2735
2736 static int
2737 startup(struct e100_serial * info)
2738 {
2739 unsigned long flags;
2740 unsigned long xmit_page;
2741 int i;
2742
2743 xmit_page = get_zeroed_page(GFP_KERNEL);
2744 if (!xmit_page)
2745 return -ENOMEM;
2746
2747 local_irq_save(flags);
2748
2749 /* if it was already initialized, skip this */
2750
2751 if (info->flags & ASYNC_INITIALIZED) {
2752 local_irq_restore(flags);
2753 free_page(xmit_page);
2754 return 0;
2755 }
2756
2757 if (info->xmit.buf)
2758 free_page(xmit_page);
2759 else
2760 info->xmit.buf = (unsigned char *) xmit_page;
2761
2762 #ifdef SERIAL_DEBUG_OPEN
2763 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2764 #endif
2765
2766 #ifdef CONFIG_SVINTO_SIM
2767 /* Bits and pieces collected from below. Better to have them
2768 in one ifdef:ed clause than to mix in a lot of ifdefs,
2769 right? */
2770 if (info->port.tty)
2771 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2772
2773 info->xmit.head = info->xmit.tail = 0;
2774 info->first_recv_buffer = info->last_recv_buffer = NULL;
2775 info->recv_cnt = info->max_recv_cnt = 0;
2776
2777 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2778 info->rec_descr[i].buf = NULL;
2779
2780 /* No real action in the simulator, but may set info important
2781 to ioctl. */
2782 change_speed(info);
2783 #else
2784
2785 /*
2786 * Clear the FIFO buffers and disable them
2787 * (they will be reenabled in change_speed())
2788 */
2789
2790 /*
2791 * Reset the DMA channels and make sure their interrupts are cleared
2792 */
2793
2794 if (info->dma_in_enabled) {
2795 info->uses_dma_in = 1;
2796 e100_enable_rxdma_channel(info);
2797
2798 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2799
2800 /* Wait until reset cycle is complete */
2801 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2802 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2803
2804 /* Make sure the irqs are cleared */
2805 *info->iclrintradr =
2806 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2807 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2808 } else {
2809 e100_disable_rxdma_channel(info);
2810 }
2811
2812 if (info->dma_out_enabled) {
2813 info->uses_dma_out = 1;
2814 e100_enable_txdma_channel(info);
2815 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2816
2817 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2818 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2819
2820 /* Make sure the irqs are cleared */
2821 *info->oclrintradr =
2822 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2823 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2824 } else {
2825 e100_disable_txdma_channel(info);
2826 }
2827
2828 if (info->port.tty)
2829 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2830
2831 info->xmit.head = info->xmit.tail = 0;
2832 info->first_recv_buffer = info->last_recv_buffer = NULL;
2833 info->recv_cnt = info->max_recv_cnt = 0;
2834
2835 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2836 info->rec_descr[i].buf = 0;
2837
2838 /*
2839 * and set the speed and other flags of the serial port
2840 * this will start the rx/tx as well
2841 */
2842 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2843 e100_enable_serial_data_irq(info);
2844 #endif
2845 change_speed(info);
2846
2847 /* dummy read to reset any serial errors */
2848
2849 (void)info->ioport[REG_DATA];
2850
2851 /* enable the interrupts */
2852 if (info->uses_dma_out)
2853 e100_enable_txdma_irq(info);
2854
2855 e100_enable_rx_irq(info);
2856
2857 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
2858
2859 /* setup the dma input descriptor and start dma */
2860
2861 start_receive(info);
2862
2863 /* for safety, make sure the descriptors last result is 0 bytes written */
2864
2865 info->tr_descr.sw_len = 0;
2866 info->tr_descr.hw_len = 0;
2867 info->tr_descr.status = 0;
2868
2869 /* enable RTS/DTR last */
2870
2871 e100_rts(info, 1);
2872 e100_dtr(info, 1);
2873
2874 #endif /* CONFIG_SVINTO_SIM */
2875
2876 info->flags |= ASYNC_INITIALIZED;
2877
2878 local_irq_restore(flags);
2879 return 0;
2880 }
2881
2882 /*
2883 * This routine will shutdown a serial port; interrupts are disabled, and
2884 * DTR is dropped if the hangup on close termio flag is on.
2885 */
2886 static void
2887 shutdown(struct e100_serial * info)
2888 {
2889 unsigned long flags;
2890 struct etrax_dma_descr *descr = info->rec_descr;
2891 struct etrax_recv_buffer *buffer;
2892 int i;
2893
2894 #ifndef CONFIG_SVINTO_SIM
2895 /* shut down the transmitter and receiver */
2896 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2897 e100_disable_rx(info);
2898 info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2899
2900 /* disable interrupts, reset dma channels */
2901 if (info->uses_dma_in) {
2902 e100_disable_rxdma_irq(info);
2903 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2904 info->uses_dma_in = 0;
2905 } else {
2906 e100_disable_serial_data_irq(info);
2907 }
2908
2909 if (info->uses_dma_out) {
2910 e100_disable_txdma_irq(info);
2911 info->tr_running = 0;
2912 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2913 info->uses_dma_out = 0;
2914 } else {
2915 e100_disable_serial_tx_ready_irq(info);
2916 info->tr_running = 0;
2917 }
2918
2919 #endif /* CONFIG_SVINTO_SIM */
2920
2921 if (!(info->flags & ASYNC_INITIALIZED))
2922 return;
2923
2924 #ifdef SERIAL_DEBUG_OPEN
2925 printk("Shutting down serial port %d (irq %d)....\n", info->line,
2926 info->irq);
2927 #endif
2928
2929 local_irq_save(flags);
2930
2931 if (info->xmit.buf) {
2932 free_page((unsigned long)info->xmit.buf);
2933 info->xmit.buf = NULL;
2934 }
2935
2936 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2937 if (descr[i].buf) {
2938 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2939 kfree(buffer);
2940 descr[i].buf = 0;
2941 }
2942
2943 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) {
2944 /* hang up DTR and RTS if HUPCL is enabled */
2945 e100_dtr(info, 0);
2946 e100_rts(info, 0); /* could check CRTSCTS before doing this */
2947 }
2948
2949 if (info->port.tty)
2950 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2951
2952 info->flags &= ~ASYNC_INITIALIZED;
2953 local_irq_restore(flags);
2954 }
2955
2956
2957 /* change baud rate and other assorted parameters */
2958
2959 static void
2960 change_speed(struct e100_serial *info)
2961 {
2962 unsigned int cflag;
2963 unsigned long xoff;
2964 unsigned long flags;
2965 /* first some safety checks */
2966
2967 if (!info->port.tty || !info->port.tty->termios)
2968 return;
2969 if (!info->ioport)
2970 return;
2971
2972 cflag = info->port.tty->termios->c_cflag;
2973
2974 /* possibly, the tx/rx should be disabled first to do this safely */
2975
2976 /* change baud-rate and write it to the hardware */
2977 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
2978 /* Special baudrate */
2979 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
2980 unsigned long alt_source =
2981 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2982 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2983 /* R_ALT_SER_BAUDRATE selects the source */
2984 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2985 (unsigned long)info->baud_base, info->custom_divisor));
2986 if (info->baud_base == SERIAL_PRESCALE_BASE) {
2987 /* 0, 2-65535 (0=65536) */
2988 u16 divisor = info->custom_divisor;
2989 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
2990 /* baudrate is 3.125MHz/custom_divisor */
2991 alt_source =
2992 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
2993 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
2994 alt_source = 0x11;
2995 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
2996 *R_SERIAL_PRESCALE = divisor;
2997 info->baud = SERIAL_PRESCALE_BASE/divisor;
2998 }
2999 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3000 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3001 info->custom_divisor == 1) ||
3002 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3003 info->custom_divisor == 8)) {
3004 /* ext_clk selected */
3005 alt_source =
3006 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3007 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3008 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3009 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3010 }
3011 #endif
3012 else
3013 {
3014 /* Bad baudbase, we don't support using timer0
3015 * for baudrate.
3016 */
3017 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3018 (unsigned long)info->baud_base, info->custom_divisor);
3019 }
3020 r_alt_ser_baudrate_shadow &= ~mask;
3021 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3022 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3023 } else {
3024 /* Normal baudrate */
3025 /* Make sure we use normal baudrate */
3026 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3027 unsigned long alt_source =
3028 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3029 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3030 r_alt_ser_baudrate_shadow &= ~mask;
3031 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3032 #ifndef CONFIG_SVINTO_SIM
3033 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3034 #endif /* CONFIG_SVINTO_SIM */
3035
3036 info->baud = cflag_to_baud(cflag);
3037 #ifndef CONFIG_SVINTO_SIM
3038 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3039 #endif /* CONFIG_SVINTO_SIM */
3040 }
3041
3042 #ifndef CONFIG_SVINTO_SIM
3043 /* start with default settings and then fill in changes */
3044 local_irq_save(flags);
3045 /* 8 bit, no/even parity */
3046 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3047 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3048 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3049
3050 /* 8 bit, no/even parity, 1 stop bit, no cts */
3051 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3052 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3053 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3054 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3055 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3056
3057 if ((cflag & CSIZE) == CS7) {
3058 /* set 7 bit mode */
3059 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3060 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3061 }
3062
3063 if (cflag & CSTOPB) {
3064 /* set 2 stop bit mode */
3065 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3066 }
3067
3068 if (cflag & PARENB) {
3069 /* enable parity */
3070 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3071 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3072 }
3073
3074 if (cflag & CMSPAR) {
3075 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3076 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3077 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3078 }
3079 if (cflag & PARODD) {
3080 /* set odd parity (or Mark if CMSPAR) */
3081 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3082 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3083 }
3084
3085 if (cflag & CRTSCTS) {
3086 /* enable automatic CTS handling */
3087 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3088 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3089 }
3090
3091 /* make sure the tx and rx are enabled */
3092
3093 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3094 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3095
3096 /* actually write the control regs to the hardware */
3097
3098 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3099 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
3100 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->port.tty));
3101 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3102 if (info->port.tty->termios->c_iflag & IXON ) {
3103 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n",
3104 STOP_CHAR(info->port.tty)));
3105 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3106 }
3107
3108 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3109 local_irq_restore(flags);
3110 #endif /* !CONFIG_SVINTO_SIM */
3111
3112 update_char_time(info);
3113
3114 } /* change_speed */
3115
3116 /* start transmitting chars NOW */
3117
3118 static void
3119 rs_flush_chars(struct tty_struct *tty)
3120 {
3121 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3122 unsigned long flags;
3123
3124 if (info->tr_running ||
3125 info->xmit.head == info->xmit.tail ||
3126 tty->stopped ||
3127 tty->hw_stopped ||
3128 !info->xmit.buf)
3129 return;
3130
3131 #ifdef SERIAL_DEBUG_FLOW
3132 printk("rs_flush_chars\n");
3133 #endif
3134
3135 /* this protection might not exactly be necessary here */
3136
3137 local_irq_save(flags);
3138 start_transmit(info);
3139 local_irq_restore(flags);
3140 }
3141
3142 static int rs_raw_write(struct tty_struct *tty,
3143 const unsigned char *buf, int count)
3144 {
3145 int c, ret = 0;
3146 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3147 unsigned long flags;
3148
3149 /* first some sanity checks */
3150
3151 if (!tty || !info->xmit.buf || !tmp_buf)
3152 return 0;
3153
3154 #ifdef SERIAL_DEBUG_DATA
3155 if (info->line == SERIAL_DEBUG_LINE)
3156 printk("rs_raw_write (%d), status %d\n",
3157 count, info->ioport[REG_STATUS]);
3158 #endif
3159
3160 #ifdef CONFIG_SVINTO_SIM
3161 /* Really simple. The output is here and now. */
3162 SIMCOUT(buf, count);
3163 return count;
3164 #endif
3165 local_save_flags(flags);
3166 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3167 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3168
3169
3170 /* The local_irq_disable/restore_flags pairs below are needed
3171 * because the DMA interrupt handler moves the info->xmit values.
3172 * the memcpy needs to be in the critical region unfortunately,
3173 * because we need to read xmit values, memcpy, write xmit values
3174 * in one atomic operation... this could perhaps be avoided by
3175 * more clever design.
3176 */
3177 local_irq_disable();
3178 while (count) {
3179 c = CIRC_SPACE_TO_END(info->xmit.head,
3180 info->xmit.tail,
3181 SERIAL_XMIT_SIZE);
3182
3183 if (count < c)
3184 c = count;
3185 if (c <= 0)
3186 break;
3187
3188 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3189 info->xmit.head = (info->xmit.head + c) &
3190 (SERIAL_XMIT_SIZE-1);
3191 buf += c;
3192 count -= c;
3193 ret += c;
3194 }
3195 local_irq_restore(flags);
3196
3197 /* enable transmitter if not running, unless the tty is stopped
3198 * this does not need IRQ protection since if tr_running == 0
3199 * the IRQ's are not running anyway for this port.
3200 */
3201 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3202
3203 if (info->xmit.head != info->xmit.tail &&
3204 !tty->stopped &&
3205 !tty->hw_stopped &&
3206 !info->tr_running) {
3207 start_transmit(info);
3208 }
3209
3210 return ret;
3211 } /* raw_raw_write() */
3212
3213 static int
3214 rs_write(struct tty_struct *tty,
3215 const unsigned char *buf, int count)
3216 {
3217 #if defined(CONFIG_ETRAX_RS485)
3218 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3219
3220 if (info->rs485.flags & SER_RS485_ENABLED)
3221 {
3222 /* If we are in RS-485 mode, we need to toggle RTS and disable
3223 * the receiver before initiating a DMA transfer
3224 */
3225 #ifdef CONFIG_ETRAX_FAST_TIMER
3226 /* Abort any started timer */
3227 fast_timers_rs485[info->line].function = NULL;
3228 del_fast_timer(&fast_timers_rs485[info->line]);
3229 #endif
3230 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_ON_SEND));
3231 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3232 e100_disable_rx(info);
3233 e100_enable_rx_irq(info);
3234 #endif
3235
3236 if (info->rs485.delay_rts_before_send > 0)
3237 msleep(info->rs485.delay_rts_before_send);
3238 }
3239 #endif /* CONFIG_ETRAX_RS485 */
3240
3241 count = rs_raw_write(tty, buf, count);
3242
3243 #if defined(CONFIG_ETRAX_RS485)
3244 if (info->rs485.flags & SER_RS485_ENABLED)
3245 {
3246 unsigned int val;
3247 /* If we are in RS-485 mode the following has to be done:
3248 * wait until DMA is ready
3249 * wait on transmit shift register
3250 * toggle RTS
3251 * enable the receiver
3252 */
3253
3254 /* Sleep until all sent */
3255 tty_wait_until_sent(tty, 0);
3256 #ifdef CONFIG_ETRAX_FAST_TIMER
3257 /* Now sleep a little more so that shift register is empty */
3258 schedule_usleep(info->char_time_usec * 2);
3259 #endif
3260 /* wait on transmit shift register */
3261 do{
3262 get_lsr_info(info, &val);
3263 }while (!(val & TIOCSER_TEMT));
3264
3265 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
3266
3267 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3268 e100_enable_rx(info);
3269 e100_enable_rxdma_irq(info);
3270 #endif
3271 }
3272 #endif /* CONFIG_ETRAX_RS485 */
3273
3274 return count;
3275 } /* rs_write */
3276
3277
3278 /* how much space is available in the xmit buffer? */
3279
3280 static int
3281 rs_write_room(struct tty_struct *tty)
3282 {
3283 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3284
3285 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3286 }
3287
3288 /* How many chars are in the xmit buffer?
3289 * This does not include any chars in the transmitter FIFO.
3290 * Use wait_until_sent for waiting for FIFO drain.
3291 */
3292
3293 static int
3294 rs_chars_in_buffer(struct tty_struct *tty)
3295 {
3296 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3297
3298 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3299 }
3300
3301 /* discard everything in the xmit buffer */
3302
3303 static void
3304 rs_flush_buffer(struct tty_struct *tty)
3305 {
3306 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3307 unsigned long flags;
3308
3309 local_irq_save(flags);
3310 info->xmit.head = info->xmit.tail = 0;
3311 local_irq_restore(flags);
3312
3313 tty_wakeup(tty);
3314 }
3315
3316 /*
3317 * This function is used to send a high-priority XON/XOFF character to
3318 * the device
3319 *
3320 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3321 * but we do it in handle_ser_tx_interrupt().
3322 * We disable DMA channel and enable tx ready interrupt and write the
3323 * character when possible.
3324 */
3325 static void rs_send_xchar(struct tty_struct *tty, char ch)
3326 {
3327 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3328 unsigned long flags;
3329 local_irq_save(flags);
3330 if (info->uses_dma_out) {
3331 /* Put the DMA on hold and disable the channel */
3332 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3333 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3334 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3335 e100_disable_txdma_channel(info);
3336 }
3337
3338 /* Must make sure transmitter is not stopped before we can transmit */
3339 if (tty->stopped)
3340 rs_start(tty);
3341
3342 /* Enable manual transmit interrupt and send from there */
3343 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3344 info->x_char = ch;
3345 e100_enable_serial_tx_ready_irq(info);
3346 local_irq_restore(flags);
3347 }
3348
3349 /*
3350 * ------------------------------------------------------------
3351 * rs_throttle()
3352 *
3353 * This routine is called by the upper-layer tty layer to signal that
3354 * incoming characters should be throttled.
3355 * ------------------------------------------------------------
3356 */
3357 static void
3358 rs_throttle(struct tty_struct * tty)
3359 {
3360 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3361 #ifdef SERIAL_DEBUG_THROTTLE
3362 char buf[64];
3363
3364 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3365 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3366 #endif
3367 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3368
3369 /* Do RTS before XOFF since XOFF might take some time */
3370 if (tty->termios->c_cflag & CRTSCTS) {
3371 /* Turn off RTS line */
3372 e100_rts(info, 0);
3373 }
3374 if (I_IXOFF(tty))
3375 rs_send_xchar(tty, STOP_CHAR(tty));
3376
3377 }
3378
3379 static void
3380 rs_unthrottle(struct tty_struct * tty)
3381 {
3382 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3383 #ifdef SERIAL_DEBUG_THROTTLE
3384 char buf[64];
3385
3386 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3387 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3388 #endif
3389 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3390 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3391 /* Do RTS before XOFF since XOFF might take some time */
3392 if (tty->termios->c_cflag & CRTSCTS) {
3393 /* Assert RTS line */
3394 e100_rts(info, 1);
3395 }
3396
3397 if (I_IXOFF(tty)) {
3398 if (info->x_char)
3399 info->x_char = 0;
3400 else
3401 rs_send_xchar(tty, START_CHAR(tty));
3402 }
3403
3404 }
3405
3406 /*
3407 * ------------------------------------------------------------
3408 * rs_ioctl() and friends
3409 * ------------------------------------------------------------
3410 */
3411
3412 static int
3413 get_serial_info(struct e100_serial * info,
3414 struct serial_struct * retinfo)
3415 {
3416 struct serial_struct tmp;
3417
3418 /* this is all probably wrong, there are a lot of fields
3419 * here that we don't have in e100_serial and maybe we
3420 * should set them to something else than 0.
3421 */
3422
3423 if (!retinfo)
3424 return -EFAULT;
3425 memset(&tmp, 0, sizeof(tmp));
3426 tmp.type = info->type;
3427 tmp.line = info->line;
3428 tmp.port = (int)info->ioport;
3429 tmp.irq = info->irq;
3430 tmp.flags = info->flags;
3431 tmp.baud_base = info->baud_base;
3432 tmp.close_delay = info->close_delay;
3433 tmp.closing_wait = info->closing_wait;
3434 tmp.custom_divisor = info->custom_divisor;
3435 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3436 return -EFAULT;
3437 return 0;
3438 }
3439
3440 static int
3441 set_serial_info(struct e100_serial *info,
3442 struct serial_struct *new_info)
3443 {
3444 struct serial_struct new_serial;
3445 struct e100_serial old_info;
3446 int retval = 0;
3447
3448 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3449 return -EFAULT;
3450
3451 old_info = *info;
3452
3453 if (!capable(CAP_SYS_ADMIN)) {
3454 if ((new_serial.type != info->type) ||
3455 (new_serial.close_delay != info->close_delay) ||
3456 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3457 (info->flags & ~ASYNC_USR_MASK)))
3458 return -EPERM;
3459 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3460 (new_serial.flags & ASYNC_USR_MASK));
3461 goto check_and_exit;
3462 }
3463
3464 if (info->count > 1)
3465 return -EBUSY;
3466
3467 /*
3468 * OK, past this point, all the error checking has been done.
3469 * At this point, we start making changes.....
3470 */
3471
3472 info->baud_base = new_serial.baud_base;
3473 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3474 (new_serial.flags & ASYNC_FLAGS));
3475 info->custom_divisor = new_serial.custom_divisor;
3476 info->type = new_serial.type;
3477 info->close_delay = new_serial.close_delay;
3478 info->closing_wait = new_serial.closing_wait;
3479 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3480
3481 check_and_exit:
3482 if (info->flags & ASYNC_INITIALIZED) {
3483 change_speed(info);
3484 } else
3485 retval = startup(info);
3486 return retval;
3487 }
3488
3489 /*
3490 * get_lsr_info - get line status register info
3491 *
3492 * Purpose: Let user call ioctl() to get info when the UART physically
3493 * is emptied. On bus types like RS485, the transmitter must
3494 * release the bus after transmitting. This must be done when
3495 * the transmit shift register is empty, not be done when the
3496 * transmit holding register is empty. This functionality
3497 * allows an RS485 driver to be written in user space.
3498 */
3499 static int
3500 get_lsr_info(struct e100_serial * info, unsigned int *value)
3501 {
3502 unsigned int result = TIOCSER_TEMT;
3503 #ifndef CONFIG_SVINTO_SIM
3504 unsigned long curr_time = jiffies;
3505 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3506 unsigned long elapsed_usec =
3507 (curr_time - info->last_tx_active) * 1000000/HZ +
3508 curr_time_usec - info->last_tx_active_usec;
3509
3510 if (info->xmit.head != info->xmit.tail ||
3511 elapsed_usec < 2*info->char_time_usec) {
3512 result = 0;
3513 }
3514 #endif
3515
3516 if (copy_to_user(value, &result, sizeof(int)))
3517 return -EFAULT;
3518 return 0;
3519 }
3520
3521 #ifdef SERIAL_DEBUG_IO
3522 struct state_str
3523 {
3524 int state;
3525 const char *str;
3526 };
3527
3528 const struct state_str control_state_str[] = {
3529 {TIOCM_DTR, "DTR" },
3530 {TIOCM_RTS, "RTS"},
3531 {TIOCM_ST, "ST?" },
3532 {TIOCM_SR, "SR?" },
3533 {TIOCM_CTS, "CTS" },
3534 {TIOCM_CD, "CD" },
3535 {TIOCM_RI, "RI" },
3536 {TIOCM_DSR, "DSR" },
3537 {0, NULL }
3538 };
3539
3540 char *get_control_state_str(int MLines, char *s)
3541 {
3542 int i = 0;
3543
3544 s[0]='\0';
3545 while (control_state_str[i].str != NULL) {
3546 if (MLines & control_state_str[i].state) {
3547 if (s[0] != '\0') {
3548 strcat(s, ", ");
3549 }
3550 strcat(s, control_state_str[i].str);
3551 }
3552 i++;
3553 }
3554 return s;
3555 }
3556 #endif
3557
3558 static int
3559 rs_break(struct tty_struct *tty, int break_state)
3560 {
3561 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3562 unsigned long flags;
3563
3564 if (!info->ioport)
3565 return -EIO;
3566
3567 local_irq_save(flags);
3568 if (break_state == -1) {
3569 /* Go to manual mode and set the txd pin to 0 */
3570 /* Clear bit 7 (txd) and 6 (tr_enable) */
3571 info->tx_ctrl &= 0x3F;
3572 } else {
3573 /* Set bit 7 (txd) and 6 (tr_enable) */
3574 info->tx_ctrl |= (0x80 | 0x40);
3575 }
3576 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3577 local_irq_restore(flags);
3578 return 0;
3579 }
3580
3581 static int
3582 rs_tiocmset(struct tty_struct *tty, struct file *file,
3583 unsigned int set, unsigned int clear)
3584 {
3585 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3586 unsigned long flags;
3587
3588 local_irq_save(flags);
3589
3590 if (clear & TIOCM_RTS)
3591 e100_rts(info, 0);
3592 if (clear & TIOCM_DTR)
3593 e100_dtr(info, 0);
3594 /* Handle FEMALE behaviour */
3595 if (clear & TIOCM_RI)
3596 e100_ri_out(info, 0);
3597 if (clear & TIOCM_CD)
3598 e100_cd_out(info, 0);
3599
3600 if (set & TIOCM_RTS)
3601 e100_rts(info, 1);
3602 if (set & TIOCM_DTR)
3603 e100_dtr(info, 1);
3604 /* Handle FEMALE behaviour */
3605 if (set & TIOCM_RI)
3606 e100_ri_out(info, 1);
3607 if (set & TIOCM_CD)
3608 e100_cd_out(info, 1);
3609
3610 local_irq_restore(flags);
3611 return 0;
3612 }
3613
3614 static int
3615 rs_tiocmget(struct tty_struct *tty, struct file *file)
3616 {
3617 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3618 unsigned int result;
3619 unsigned long flags;
3620
3621 local_irq_save(flags);
3622
3623 result =
3624 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3625 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3626 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3627 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3628 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3629 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3630
3631 local_irq_restore(flags);
3632
3633 #ifdef SERIAL_DEBUG_IO
3634 printk(KERN_DEBUG "ser%i: modem state: %i 0x%08X\n",
3635 info->line, result, result);
3636 {
3637 char s[100];
3638
3639 get_control_state_str(result, s);
3640 printk(KERN_DEBUG "state: %s\n", s);
3641 }
3642 #endif
3643 return result;
3644
3645 }
3646
3647
3648 static int
3649 rs_ioctl(struct tty_struct *tty, struct file * file,
3650 unsigned int cmd, unsigned long arg)
3651 {
3652 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3653
3654 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3655 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
3656 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3657 if (tty->flags & (1 << TTY_IO_ERROR))
3658 return -EIO;
3659 }
3660
3661 switch (cmd) {
3662 case TIOCGSERIAL:
3663 return get_serial_info(info,
3664 (struct serial_struct *) arg);
3665 case TIOCSSERIAL:
3666 return set_serial_info(info,
3667 (struct serial_struct *) arg);
3668 case TIOCSERGETLSR: /* Get line status register */
3669 return get_lsr_info(info, (unsigned int *) arg);
3670
3671 case TIOCSERGSTRUCT:
3672 if (copy_to_user((struct e100_serial *) arg,
3673 info, sizeof(struct e100_serial)))
3674 return -EFAULT;
3675 return 0;
3676
3677 #if defined(CONFIG_ETRAX_RS485)
3678 case TIOCSERSETRS485:
3679 {
3680 /* In this ioctl we still use the old structure
3681 * rs485_control for backward compatibility
3682 * (if we use serial_rs485, then old user-level code
3683 * wouldn't work anymore...).
3684 * The use of this ioctl is deprecated: use TIOCSRS485
3685 * instead.*/
3686 struct rs485_control rs485ctrl;
3687 struct serial_rs485 rs485data;
3688 printk(KERN_DEBUG "The use of this ioctl is deprecated. Use TIOCSRS485 instead\n");
3689 if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg,
3690 sizeof(rs485ctrl)))
3691 return -EFAULT;
3692
3693 rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send;
3694 rs485data.flags = 0;
3695 if (rs485ctrl.enabled)
3696 rs485data.flags |= SER_RS485_ENABLED;
3697 else
3698 rs485data.flags &= ~(SER_RS485_ENABLED);
3699
3700 if (rs485ctrl.rts_on_send)
3701 rs485data.flags |= SER_RS485_RTS_ON_SEND;
3702 else
3703 rs485data.flags &= ~(SER_RS485_RTS_ON_SEND);
3704
3705 if (rs485ctrl.rts_after_sent)
3706 rs485data.flags |= SER_RS485_RTS_AFTER_SEND;
3707 else
3708 rs485data.flags &= ~(SER_RS485_RTS_AFTER_SEND);
3709
3710 return e100_enable_rs485(tty, &rs485data);
3711 }
3712
3713 case TIOCSRS485:
3714 {
3715 /* This is the new version of TIOCSRS485, with new
3716 * data structure serial_rs485 */
3717 struct serial_rs485 rs485data;
3718 if (copy_from_user(&rs485data, (struct rs485_control *)arg,
3719 sizeof(rs485data)))
3720 return -EFAULT;
3721
3722 return e100_enable_rs485(tty, &rs485data);
3723 }
3724
3725
3726 case TIOCSERWRRS485:
3727 {
3728 struct rs485_write rs485wr;
3729 if (copy_from_user(&rs485wr, (struct rs485_write *)arg,
3730 sizeof(rs485wr)))
3731 return -EFAULT;
3732
3733 return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
3734 }
3735 #endif
3736
3737 default:
3738 return -ENOIOCTLCMD;
3739 }
3740 return 0;
3741 }
3742
3743 static void
3744 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3745 {
3746 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3747
3748 change_speed(info);
3749
3750 /* Handle turning off CRTSCTS */
3751 if ((old_termios->c_cflag & CRTSCTS) &&
3752 !(tty->termios->c_cflag & CRTSCTS)) {
3753 tty->hw_stopped = 0;
3754 rs_start(tty);
3755 }
3756
3757 }
3758
3759 /*
3760 * ------------------------------------------------------------
3761 * rs_close()
3762 *
3763 * This routine is called when the serial port gets closed. First, we
3764 * wait for the last remaining data to be sent. Then, we unlink its
3765 * S structure from the interrupt chain if necessary, and we free
3766 * that IRQ if nothing is left in the chain.
3767 * ------------------------------------------------------------
3768 */
3769 static void
3770 rs_close(struct tty_struct *tty, struct file * filp)
3771 {
3772 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3773 unsigned long flags;
3774
3775 if (!info)
3776 return;
3777
3778 /* interrupts are disabled for this entire function */
3779
3780 local_irq_save(flags);
3781
3782 if (tty_hung_up_p(filp)) {
3783 local_irq_restore(flags);
3784 return;
3785 }
3786
3787 #ifdef SERIAL_DEBUG_OPEN
3788 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3789 info->line, info->count);
3790 #endif
3791 if ((tty->count == 1) && (info->count != 1)) {
3792 /*
3793 * Uh, oh. tty->count is 1, which means that the tty
3794 * structure will be freed. Info->count should always
3795 * be one in these conditions. If it's greater than
3796 * one, we've got real problems, since it means the
3797 * serial port won't be shutdown.
3798 */
3799 printk(KERN_CRIT
3800 "rs_close: bad serial port count; tty->count is 1, "
3801 "info->count is %d\n", info->count);
3802 info->count = 1;
3803 }
3804 if (--info->count < 0) {
3805 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
3806 info->line, info->count);
3807 info->count = 0;
3808 }
3809 if (info->count) {
3810 local_irq_restore(flags);
3811 return;
3812 }
3813 info->flags |= ASYNC_CLOSING;
3814 /*
3815 * Save the termios structure, since this port may have
3816 * separate termios for callout and dialin.
3817 */
3818 if (info->flags & ASYNC_NORMAL_ACTIVE)
3819 info->normal_termios = *tty->termios;
3820 /*
3821 * Now we wait for the transmit buffer to clear; and we notify
3822 * the line discipline to only process XON/XOFF characters.
3823 */
3824 tty->closing = 1;
3825 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
3826 tty_wait_until_sent(tty, info->closing_wait);
3827 /*
3828 * At this point we stop accepting input. To do this, we
3829 * disable the serial receiver and the DMA receive interrupt.
3830 */
3831 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3832 e100_disable_serial_data_irq(info);
3833 #endif
3834
3835 #ifndef CONFIG_SVINTO_SIM
3836 e100_disable_rx(info);
3837 e100_disable_rx_irq(info);
3838
3839 if (info->flags & ASYNC_INITIALIZED) {
3840 /*
3841 * Before we drop DTR, make sure the UART transmitter
3842 * has completely drained; this is especially
3843 * important as we have a transmit FIFO!
3844 */
3845 rs_wait_until_sent(tty, HZ);
3846 }
3847 #endif
3848
3849 shutdown(info);
3850 rs_flush_buffer(tty);
3851 tty_ldisc_flush(tty);
3852 tty->closing = 0;
3853 info->event = 0;
3854 info->port.tty = NULL;
3855 if (info->blocked_open) {
3856 if (info->close_delay)
3857 schedule_timeout_interruptible(info->close_delay);
3858 wake_up_interruptible(&info->open_wait);
3859 }
3860 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3861 wake_up_interruptible(&info->close_wait);
3862 local_irq_restore(flags);
3863
3864 /* port closed */
3865
3866 #if defined(CONFIG_ETRAX_RS485)
3867 if (info->rs485.flags & SER_RS485_ENABLED) {
3868 info->rs485.flags &= ~(SER_RS485_ENABLED);
3869 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3870 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3871 #endif
3872 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3873 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3874 rs485_port_g_bit, 0);
3875 #endif
3876 #if defined(CONFIG_ETRAX_RS485_LTC1387)
3877 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3878 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
3879 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3880 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
3881 #endif
3882 }
3883 #endif
3884
3885 /*
3886 * Release any allocated DMA irq's.
3887 */
3888 if (info->dma_in_enabled) {
3889 free_irq(info->dma_in_irq_nbr, info);
3890 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3891 info->uses_dma_in = 0;
3892 #ifdef SERIAL_DEBUG_OPEN
3893 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3894 info->dma_in_irq_description);
3895 #endif
3896 }
3897 if (info->dma_out_enabled) {
3898 free_irq(info->dma_out_irq_nbr, info);
3899 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3900 info->uses_dma_out = 0;
3901 #ifdef SERIAL_DEBUG_OPEN
3902 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3903 info->dma_out_irq_description);
3904 #endif
3905 }
3906 }
3907
3908 /*
3909 * rs_wait_until_sent() --- wait until the transmitter is empty
3910 */
3911 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3912 {
3913 unsigned long orig_jiffies;
3914 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3915 unsigned long curr_time = jiffies;
3916 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3917 long elapsed_usec =
3918 (curr_time - info->last_tx_active) * (1000000/HZ) +
3919 curr_time_usec - info->last_tx_active_usec;
3920
3921 /*
3922 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3923 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3924 */
3925 lock_kernel();
3926 orig_jiffies = jiffies;
3927 while (info->xmit.head != info->xmit.tail || /* More in send queue */
3928 (*info->ostatusadr & 0x007f) || /* more in FIFO */
3929 (elapsed_usec < 2*info->char_time_usec)) {
3930 schedule_timeout_interruptible(1);
3931 if (signal_pending(current))
3932 break;
3933 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3934 break;
3935 curr_time = jiffies;
3936 curr_time_usec = GET_JIFFIES_USEC();
3937 elapsed_usec =
3938 (curr_time - info->last_tx_active) * (1000000/HZ) +
3939 curr_time_usec - info->last_tx_active_usec;
3940 }
3941 set_current_state(TASK_RUNNING);
3942 unlock_kernel();
3943 }
3944
3945 /*
3946 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3947 */
3948 void
3949 rs_hangup(struct tty_struct *tty)
3950 {
3951 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3952
3953 rs_flush_buffer(tty);
3954 shutdown(info);
3955 info->event = 0;
3956 info->count = 0;
3957 info->flags &= ~ASYNC_NORMAL_ACTIVE;
3958 info->port.tty = NULL;
3959 wake_up_interruptible(&info->open_wait);
3960 }
3961
3962 /*
3963 * ------------------------------------------------------------
3964 * rs_open() and friends
3965 * ------------------------------------------------------------
3966 */
3967 static int
3968 block_til_ready(struct tty_struct *tty, struct file * filp,
3969 struct e100_serial *info)
3970 {
3971 DECLARE_WAITQUEUE(wait, current);
3972 unsigned long flags;
3973 int retval;
3974 int do_clocal = 0, extra_count = 0;
3975
3976 /*
3977 * If the device is in the middle of being closed, then block
3978 * until it's done, and then try again.
3979 */
3980 if (tty_hung_up_p(filp) ||
3981 (info->flags & ASYNC_CLOSING)) {
3982 wait_event_interruptible(info->close_wait,
3983 !(info->flags & ASYNC_CLOSING));
3984 #ifdef SERIAL_DO_RESTART
3985 if (info->flags & ASYNC_HUP_NOTIFY)
3986 return -EAGAIN;
3987 else
3988 return -ERESTARTSYS;
3989 #else
3990 return -EAGAIN;
3991 #endif
3992 }
3993
3994 /*
3995 * If non-blocking mode is set, or the port is not enabled,
3996 * then make the check up front and then exit.
3997 */
3998 if ((filp->f_flags & O_NONBLOCK) ||
3999 (tty->flags & (1 << TTY_IO_ERROR))) {
4000 info->flags |= ASYNC_NORMAL_ACTIVE;
4001 return 0;
4002 }
4003
4004 if (tty->termios->c_cflag & CLOCAL) {
4005 do_clocal = 1;
4006 }
4007
4008 /*
4009 * Block waiting for the carrier detect and the line to become
4010 * free (i.e., not in use by the callout). While we are in
4011 * this loop, info->count is dropped by one, so that
4012 * rs_close() knows when to free things. We restore it upon
4013 * exit, either normal or abnormal.
4014 */
4015 retval = 0;
4016 add_wait_queue(&info->open_wait, &wait);
4017 #ifdef SERIAL_DEBUG_OPEN
4018 printk("block_til_ready before block: ttyS%d, count = %d\n",
4019 info->line, info->count);
4020 #endif
4021 local_irq_save(flags);
4022 if (!tty_hung_up_p(filp)) {
4023 extra_count++;
4024 info->count--;
4025 }
4026 local_irq_restore(flags);
4027 info->blocked_open++;
4028 while (1) {
4029 local_irq_save(flags);
4030 /* assert RTS and DTR */
4031 e100_rts(info, 1);
4032 e100_dtr(info, 1);
4033 local_irq_restore(flags);
4034 set_current_state(TASK_INTERRUPTIBLE);
4035 if (tty_hung_up_p(filp) ||
4036 !(info->flags & ASYNC_INITIALIZED)) {
4037 #ifdef SERIAL_DO_RESTART
4038 if (info->flags & ASYNC_HUP_NOTIFY)
4039 retval = -EAGAIN;
4040 else
4041 retval = -ERESTARTSYS;
4042 #else
4043 retval = -EAGAIN;
4044 #endif
4045 break;
4046 }
4047 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4048 /* && (do_clocal || DCD_IS_ASSERTED) */
4049 break;
4050 if (signal_pending(current)) {
4051 retval = -ERESTARTSYS;
4052 break;
4053 }
4054 #ifdef SERIAL_DEBUG_OPEN
4055 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4056 info->line, info->count);
4057 #endif
4058 schedule();
4059 }
4060 set_current_state(TASK_RUNNING);
4061 remove_wait_queue(&info->open_wait, &wait);
4062 if (extra_count)
4063 info->count++;
4064 info->blocked_open--;
4065 #ifdef SERIAL_DEBUG_OPEN
4066 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4067 info->line, info->count);
4068 #endif
4069 if (retval)
4070 return retval;
4071 info->flags |= ASYNC_NORMAL_ACTIVE;
4072 return 0;
4073 }
4074
4075 static void
4076 deinit_port(struct e100_serial *info)
4077 {
4078 if (info->dma_out_enabled) {
4079 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
4080 free_irq(info->dma_out_irq_nbr, info);
4081 }
4082 if (info->dma_in_enabled) {
4083 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
4084 free_irq(info->dma_in_irq_nbr, info);
4085 }
4086 }
4087
4088 /*
4089 * This routine is called whenever a serial port is opened.
4090 * It performs the serial-specific initialization for the tty structure.
4091 */
4092 static int
4093 rs_open(struct tty_struct *tty, struct file * filp)
4094 {
4095 struct e100_serial *info;
4096 int retval, line;
4097 unsigned long page;
4098 int allocated_resources = 0;
4099
4100 /* find which port we want to open */
4101 line = tty->index;
4102
4103 if (line < 0 || line >= NR_PORTS)
4104 return -ENODEV;
4105
4106 /* find the corresponding e100_serial struct in the table */
4107 info = rs_table + line;
4108
4109 /* don't allow the opening of ports that are not enabled in the HW config */
4110 if (!info->enabled)
4111 return -ENODEV;
4112
4113 #ifdef SERIAL_DEBUG_OPEN
4114 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4115 info->count);
4116 #endif
4117
4118 info->count++;
4119 tty->driver_data = info;
4120 info->port.tty = tty;
4121
4122 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4123
4124 if (!tmp_buf) {
4125 page = get_zeroed_page(GFP_KERNEL);
4126 if (!page) {
4127 return -ENOMEM;
4128 }
4129 if (tmp_buf)
4130 free_page(page);
4131 else
4132 tmp_buf = (unsigned char *) page;
4133 }
4134
4135 /*
4136 * If the port is in the middle of closing, bail out now
4137 */
4138 if (tty_hung_up_p(filp) ||
4139 (info->flags & ASYNC_CLOSING)) {
4140 wait_event_interruptible(info->close_wait,
4141 !(info->flags & ASYNC_CLOSING));
4142 #ifdef SERIAL_DO_RESTART
4143 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4144 -EAGAIN : -ERESTARTSYS);
4145 #else
4146 return -EAGAIN;
4147 #endif
4148 }
4149
4150 /*
4151 * If DMA is enabled try to allocate the irq's.
4152 */
4153 if (info->count == 1) {
4154 allocated_resources = 1;
4155 if (info->dma_in_enabled) {
4156 if (request_irq(info->dma_in_irq_nbr,
4157 rec_interrupt,
4158 info->dma_in_irq_flags,
4159 info->dma_in_irq_description,
4160 info)) {
4161 printk(KERN_WARNING "DMA irq '%s' busy; "
4162 "falling back to non-DMA mode\n",
4163 info->dma_in_irq_description);
4164 /* Make sure we never try to use DMA in */
4165 /* for the port again. */
4166 info->dma_in_enabled = 0;
4167 } else if (cris_request_dma(info->dma_in_nbr,
4168 info->dma_in_irq_description,
4169 DMA_VERBOSE_ON_ERROR,
4170 info->dma_owner)) {
4171 free_irq(info->dma_in_irq_nbr, info);
4172 printk(KERN_WARNING "DMA '%s' busy; "
4173 "falling back to non-DMA mode\n",
4174 info->dma_in_irq_description);
4175 /* Make sure we never try to use DMA in */
4176 /* for the port again. */
4177 info->dma_in_enabled = 0;
4178 }
4179 #ifdef SERIAL_DEBUG_OPEN
4180 else
4181 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4182 info->dma_in_irq_description);
4183 #endif
4184 }
4185 if (info->dma_out_enabled) {
4186 if (request_irq(info->dma_out_irq_nbr,
4187 tr_interrupt,
4188 info->dma_out_irq_flags,
4189 info->dma_out_irq_description,
4190 info)) {
4191 printk(KERN_WARNING "DMA irq '%s' busy; "
4192 "falling back to non-DMA mode\n",
4193 info->dma_out_irq_description);
4194 /* Make sure we never try to use DMA out */
4195 /* for the port again. */
4196 info->dma_out_enabled = 0;
4197 } else if (cris_request_dma(info->dma_out_nbr,
4198 info->dma_out_irq_description,
4199 DMA_VERBOSE_ON_ERROR,
4200 info->dma_owner)) {
4201 free_irq(info->dma_out_irq_nbr, info);
4202 printk(KERN_WARNING "DMA '%s' busy; "
4203 "falling back to non-DMA mode\n",
4204 info->dma_out_irq_description);
4205 /* Make sure we never try to use DMA out */
4206 /* for the port again. */
4207 info->dma_out_enabled = 0;
4208 }
4209 #ifdef SERIAL_DEBUG_OPEN
4210 else
4211 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4212 info->dma_out_irq_description);
4213 #endif
4214 }
4215 }
4216
4217 /*
4218 * Start up the serial port
4219 */
4220
4221 retval = startup(info);
4222 if (retval) {
4223 if (allocated_resources)
4224 deinit_port(info);
4225
4226 /* FIXME Decrease count info->count here too? */
4227 return retval;
4228 }
4229
4230
4231 retval = block_til_ready(tty, filp, info);
4232 if (retval) {
4233 #ifdef SERIAL_DEBUG_OPEN
4234 printk("rs_open returning after block_til_ready with %d\n",
4235 retval);
4236 #endif
4237 if (allocated_resources)
4238 deinit_port(info);
4239
4240 return retval;
4241 }
4242
4243 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4244 *tty->termios = info->normal_termios;
4245 change_speed(info);
4246 }
4247
4248 #ifdef SERIAL_DEBUG_OPEN
4249 printk("rs_open ttyS%d successful...\n", info->line);
4250 #endif
4251 DLOG_INT_TRIG( log_int_pos = 0);
4252
4253 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4254 info->icount.rx = 0;
4255 } );
4256
4257 return 0;
4258 }
4259
4260 /*
4261 * /proc fs routines....
4262 */
4263
4264 static int line_info(char *buf, struct e100_serial *info)
4265 {
4266 char stat_buf[30];
4267 int ret;
4268 unsigned long tmp;
4269
4270 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4271 info->line, (unsigned long)info->ioport, info->irq);
4272
4273 if (!info->ioport || (info->type == PORT_UNKNOWN)) {
4274 ret += sprintf(buf+ret, "\n");
4275 return ret;
4276 }
4277
4278 stat_buf[0] = 0;
4279 stat_buf[1] = 0;
4280 if (!E100_RTS_GET(info))
4281 strcat(stat_buf, "|RTS");
4282 if (!E100_CTS_GET(info))
4283 strcat(stat_buf, "|CTS");
4284 if (!E100_DTR_GET(info))
4285 strcat(stat_buf, "|DTR");
4286 if (!E100_DSR_GET(info))
4287 strcat(stat_buf, "|DSR");
4288 if (!E100_CD_GET(info))
4289 strcat(stat_buf, "|CD");
4290 if (!E100_RI_GET(info))
4291 strcat(stat_buf, "|RI");
4292
4293 ret += sprintf(buf+ret, " baud:%d", info->baud);
4294
4295 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4296 (unsigned long)info->icount.tx,
4297 (unsigned long)info->icount.rx);
4298 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4299 if (tmp) {
4300 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4301 (unsigned long)tmp,
4302 (unsigned long)SERIAL_XMIT_SIZE);
4303 }
4304
4305 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4306 (unsigned long)info->recv_cnt,
4307 (unsigned long)info->max_recv_cnt);
4308
4309 #if 1
4310 if (info->port.tty) {
4311
4312 if (info->port.tty->stopped)
4313 ret += sprintf(buf+ret, " stopped:%i",
4314 (int)info->port.tty->stopped);
4315 if (info->port.tty->hw_stopped)
4316 ret += sprintf(buf+ret, " hw_stopped:%i",
4317 (int)info->port.tty->hw_stopped);
4318 }
4319
4320 {
4321 unsigned char rstat = info->ioport[REG_STATUS];
4322 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4323 ret += sprintf(buf+ret, " xoff_detect:1");
4324 }
4325
4326 #endif
4327
4328
4329
4330
4331 if (info->icount.frame)
4332 ret += sprintf(buf+ret, " fe:%lu",
4333 (unsigned long)info->icount.frame);
4334
4335 if (info->icount.parity)
4336 ret += sprintf(buf+ret, " pe:%lu",
4337 (unsigned long)info->icount.parity);
4338
4339 if (info->icount.brk)
4340 ret += sprintf(buf+ret, " brk:%lu",
4341 (unsigned long)info->icount.brk);
4342
4343 if (info->icount.overrun)
4344 ret += sprintf(buf+ret, " oe:%lu",
4345 (unsigned long)info->icount.overrun);
4346
4347 /*
4348 * Last thing is the RS-232 status lines
4349 */
4350 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4351 return ret;
4352 }
4353
4354 int rs_read_proc(char *page, char **start, off_t off, int count,
4355 int *eof, void *data)
4356 {
4357 int i, len = 0, l;
4358 off_t begin = 0;
4359
4360 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4361 serial_version);
4362 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4363 if (!rs_table[i].enabled)
4364 continue;
4365 l = line_info(page + len, &rs_table[i]);
4366 len += l;
4367 if (len+begin > off+count)
4368 goto done;
4369 if (len+begin < off) {
4370 begin += len;
4371 len = 0;
4372 }
4373 }
4374 #ifdef DEBUG_LOG_INCLUDED
4375 for (i = 0; i < debug_log_pos; i++) {
4376 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4377 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4378 if (len+begin > off+count)
4379 goto done;
4380 if (len+begin < off) {
4381 begin += len;
4382 len = 0;
4383 }
4384 }
4385 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4386 i, DEBUG_LOG_SIZE, begin+len);
4387 debug_log_pos = 0;
4388 #endif
4389
4390 *eof = 1;
4391 done:
4392 if (off >= len+begin)
4393 return 0;
4394 *start = page + (off-begin);
4395 return ((count < begin+len-off) ? count : begin+len-off);
4396 }
4397
4398 /* Finally, routines used to initialize the serial driver. */
4399
4400 static void
4401 show_serial_version(void)
4402 {
4403 printk(KERN_INFO
4404 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4405 &serial_version[11]); /* "$Revision: x.yy" */
4406 }
4407
4408 /* rs_init inits the driver at boot (using the module_init chain) */
4409
4410 static const struct tty_operations rs_ops = {
4411 .open = rs_open,
4412 .close = rs_close,
4413 .write = rs_write,
4414 .flush_chars = rs_flush_chars,
4415 .write_room = rs_write_room,
4416 .chars_in_buffer = rs_chars_in_buffer,
4417 .flush_buffer = rs_flush_buffer,
4418 .ioctl = rs_ioctl,
4419 .throttle = rs_throttle,
4420 .unthrottle = rs_unthrottle,
4421 .set_termios = rs_set_termios,
4422 .stop = rs_stop,
4423 .start = rs_start,
4424 .hangup = rs_hangup,
4425 .break_ctl = rs_break,
4426 .send_xchar = rs_send_xchar,
4427 .wait_until_sent = rs_wait_until_sent,
4428 .read_proc = rs_read_proc,
4429 .tiocmget = rs_tiocmget,
4430 .tiocmset = rs_tiocmset
4431 };
4432
4433 static int __init
4434 rs_init(void)
4435 {
4436 int i;
4437 struct e100_serial *info;
4438 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4439
4440 if (!driver)
4441 return -ENOMEM;
4442
4443 show_serial_version();
4444
4445 /* Setup the timed flush handler system */
4446
4447 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4448 setup_timer(&flush_timer, timed_flush_handler, 0);
4449 mod_timer(&flush_timer, jiffies + 5);
4450 #endif
4451
4452 #if defined(CONFIG_ETRAX_RS485)
4453 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4454 if (cris_io_interface_allocate_pins(if_ser0, 'a', rs485_pa_bit,
4455 rs485_pa_bit)) {
4456 printk(KERN_CRIT "ETRAX100LX serial: Could not allocate "
4457 "RS485 pin\n");
4458 put_tty_driver(driver);
4459 return -EBUSY;
4460 }
4461 #endif
4462 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4463 if (cris_io_interface_allocate_pins(if_ser0, 'g', rs485_pa_bit,
4464 rs485_port_g_bit)) {
4465 printk(KERN_CRIT "ETRAX100LX serial: Could not allocate "
4466 "RS485 pin\n");
4467 put_tty_driver(driver);
4468 return -EBUSY;
4469 }
4470 #endif
4471 #endif
4472
4473 /* Initialize the tty_driver structure */
4474
4475 driver->driver_name = "serial";
4476 driver->name = "ttyS";
4477 driver->major = TTY_MAJOR;
4478 driver->minor_start = 64;
4479 driver->type = TTY_DRIVER_TYPE_SERIAL;
4480 driver->subtype = SERIAL_TYPE_NORMAL;
4481 driver->init_termios = tty_std_termios;
4482 driver->init_termios.c_cflag =
4483 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4484 driver->init_termios.c_ispeed = 115200;
4485 driver->init_termios.c_ospeed = 115200;
4486 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4487
4488 tty_set_operations(driver, &rs_ops);
4489 serial_driver = driver;
4490 if (tty_register_driver(driver))
4491 panic("Couldn't register serial driver\n");
4492 /* do some initializing for the separate ports */
4493
4494 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4495 if (info->enabled) {
4496 if (cris_request_io_interface(info->io_if,
4497 info->io_if_description)) {
4498 printk(KERN_CRIT "ETRAX100LX async serial: "
4499 "Could not allocate IO pins for "
4500 "%s, port %d\n",
4501 info->io_if_description, i);
4502 info->enabled = 0;
4503 }
4504 }
4505 info->uses_dma_in = 0;
4506 info->uses_dma_out = 0;
4507 info->line = i;
4508 info->port.tty = NULL;
4509 info->type = PORT_ETRAX;
4510 info->tr_running = 0;
4511 info->forced_eop = 0;
4512 info->baud_base = DEF_BAUD_BASE;
4513 info->custom_divisor = 0;
4514 info->flags = 0;
4515 info->close_delay = 5*HZ/10;
4516 info->closing_wait = 30*HZ;
4517 info->x_char = 0;
4518 info->event = 0;
4519 info->count = 0;
4520 info->blocked_open = 0;
4521 info->normal_termios = driver->init_termios;
4522 init_waitqueue_head(&info->open_wait);
4523 init_waitqueue_head(&info->close_wait);
4524 info->xmit.buf = NULL;
4525 info->xmit.tail = info->xmit.head = 0;
4526 info->first_recv_buffer = info->last_recv_buffer = NULL;
4527 info->recv_cnt = info->max_recv_cnt = 0;
4528 info->last_tx_active_usec = 0;
4529 info->last_tx_active = 0;
4530
4531 #if defined(CONFIG_ETRAX_RS485)
4532 /* Set sane defaults */
4533 info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND);
4534 info->rs485.flags |= SER_RS485_RTS_AFTER_SEND;
4535 info->rs485.delay_rts_before_send = 0;
4536 info->rs485.flags &= ~(SER_RS485_ENABLED);
4537 #endif
4538 INIT_WORK(&info->work, do_softint);
4539
4540 if (info->enabled) {
4541 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4542 serial_driver->name, info->line, (unsigned int)info->ioport);
4543 }
4544 }
4545 #ifdef CONFIG_ETRAX_FAST_TIMER
4546 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4547 memset(fast_timers, 0, sizeof(fast_timers));
4548 #endif
4549 #ifdef CONFIG_ETRAX_RS485
4550 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4551 #endif
4552 fast_timer_init();
4553 #endif
4554
4555 #ifndef CONFIG_SVINTO_SIM
4556 #ifndef CONFIG_ETRAX_KGDB
4557 /* Not needed in simulator. May only complicate stuff. */
4558 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4559
4560 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt,
4561 IRQF_SHARED | IRQF_DISABLED, "serial ", driver))
4562 panic("%s: Failed to request irq8", __func__);
4563
4564 #endif
4565 #endif /* CONFIG_SVINTO_SIM */
4566
4567 return 0;
4568 }
4569
4570 /* this makes sure that rs_init is called during kernel boot */
4571
4572 module_init(rs_init);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree