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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-powerpc / oprofile_impl.h
blob71043bf3641f369311c3343c6b0700ff899ea981
1 /*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * Based on alpha version.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13 #define _ASM_POWERPC_OPROFILE_IMPL_H
14 #ifdef __KERNEL__
16 #define OP_MAX_COUNTER 8
18 /* Per-counter configuration as set via oprofilefs. */
19 struct op_counter_config {
20 unsigned long enabled;
21 unsigned long event;
22 unsigned long count;
23 /* Classic doesn't support per-counter user/kernel selection */
24 unsigned long kernel;
25 unsigned long user;
26 unsigned long unit_mask;
29 /* System-wide configuration as set via oprofilefs. */
30 struct op_system_config {
31 #ifdef CONFIG_PPC64
32 unsigned long mmcr0;
33 unsigned long mmcr1;
34 unsigned long mmcra;
35 #endif
36 unsigned long enable_kernel;
37 unsigned long enable_user;
40 /* Per-arch configuration */
41 struct op_powerpc_model {
42 void (*reg_setup) (struct op_counter_config *,
43 struct op_system_config *,
44 int num_counters);
45 void (*cpu_setup) (struct op_counter_config *);
46 void (*start) (struct op_counter_config *);
47 void (*global_start) (struct op_counter_config *);
48 void (*stop) (void);
49 void (*global_stop) (void);
50 void (*handle_interrupt) (struct pt_regs *,
51 struct op_counter_config *);
52 int num_counters;
55 extern struct op_powerpc_model op_model_fsl_booke;
56 extern struct op_powerpc_model op_model_rs64;
57 extern struct op_powerpc_model op_model_power4;
58 extern struct op_powerpc_model op_model_7450;
59 extern struct op_powerpc_model op_model_cell;
61 #ifndef CONFIG_FSL_BOOKE
63 /* All the classic PPC parts use these */
64 static inline unsigned int ctr_read(unsigned int i)
66 switch(i) {
67 case 0:
68 return mfspr(SPRN_PMC1);
69 case 1:
70 return mfspr(SPRN_PMC2);
71 case 2:
72 return mfspr(SPRN_PMC3);
73 case 3:
74 return mfspr(SPRN_PMC4);
75 case 4:
76 return mfspr(SPRN_PMC5);
77 case 5:
78 return mfspr(SPRN_PMC6);
80 /* No PPC32 chip has more than 6 so far */
81 #ifdef CONFIG_PPC64
82 case 6:
83 return mfspr(SPRN_PMC7);
84 case 7:
85 return mfspr(SPRN_PMC8);
86 #endif
87 default:
88 return 0;
92 static inline void ctr_write(unsigned int i, unsigned int val)
94 switch(i) {
95 case 0:
96 mtspr(SPRN_PMC1, val);
97 break;
98 case 1:
99 mtspr(SPRN_PMC2, val);
100 break;
101 case 2:
102 mtspr(SPRN_PMC3, val);
103 break;
104 case 3:
105 mtspr(SPRN_PMC4, val);
106 break;
107 case 4:
108 mtspr(SPRN_PMC5, val);
109 break;
110 case 5:
111 mtspr(SPRN_PMC6, val);
112 break;
114 /* No PPC32 chip has more than 6, yet */
115 #ifdef CONFIG_PPC64
116 case 6:
117 mtspr(SPRN_PMC7, val);
118 break;
119 case 7:
120 mtspr(SPRN_PMC8, val);
121 break;
122 #endif
123 default:
124 break;
127 #else /* CONFIG_FSL_BOOKE */
128 static inline u32 get_pmlca(int ctr)
130 u32 pmlca;
132 switch (ctr) {
133 case 0:
134 pmlca = mfpmr(PMRN_PMLCA0);
135 break;
136 case 1:
137 pmlca = mfpmr(PMRN_PMLCA1);
138 break;
139 case 2:
140 pmlca = mfpmr(PMRN_PMLCA2);
141 break;
142 case 3:
143 pmlca = mfpmr(PMRN_PMLCA3);
144 break;
145 default:
146 panic("Bad ctr number\n");
149 return pmlca;
152 static inline void set_pmlca(int ctr, u32 pmlca)
154 switch (ctr) {
155 case 0:
156 mtpmr(PMRN_PMLCA0, pmlca);
157 break;
158 case 1:
159 mtpmr(PMRN_PMLCA1, pmlca);
160 break;
161 case 2:
162 mtpmr(PMRN_PMLCA2, pmlca);
163 break;
164 case 3:
165 mtpmr(PMRN_PMLCA3, pmlca);
166 break;
167 default:
168 panic("Bad ctr number\n");
172 static inline unsigned int ctr_read(unsigned int i)
174 switch(i) {
175 case 0:
176 return mfpmr(PMRN_PMC0);
177 case 1:
178 return mfpmr(PMRN_PMC1);
179 case 2:
180 return mfpmr(PMRN_PMC2);
181 case 3:
182 return mfpmr(PMRN_PMC3);
183 default:
184 return 0;
188 static inline void ctr_write(unsigned int i, unsigned int val)
190 switch(i) {
191 case 0:
192 mtpmr(PMRN_PMC0, val);
193 break;
194 case 1:
195 mtpmr(PMRN_PMC1, val);
196 break;
197 case 2:
198 mtpmr(PMRN_PMC2, val);
199 break;
200 case 3:
201 mtpmr(PMRN_PMC3, val);
202 break;
203 default:
204 break;
209 #endif /* CONFIG_FSL_BOOKE */
212 extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
214 #endif /* __KERNEL__ */
215 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */