arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/io.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/list.h>
   8 #include <linux/of.h>
   9 #include <linux/of_fdt.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_platform.h>
  12 #include <linux/of_irq.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/of_pci.h>
  16 #include <linux/initrd.h>
  17
  18 #include <asm/hpet.h>
  19 #include <asm/irq_controller.h>
  20 #include <asm/apic.h>
  21 #include <asm/pci_x86.h>
  22
  23 __initdata u64 initial_dtb;
  24 char __initdata cmd_line[COMMAND_LINE_SIZE];
  25 static LIST_HEAD(irq_domains);
  26 static DEFINE_RAW_SPINLOCK(big_irq_lock);
  27
  28 int __initdata of_ioapic;
  29
  30 #ifdef CONFIG_X86_IO_APIC
  31 static void add_interrupt_host(struct irq_domain *ih)
  32 {
  33         unsigned long flags;
  34
  35         raw_spin_lock_irqsave(&big_irq_lock, flags);
  36         list_add(&ih->l, &irq_domains);
  37         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  38 }
  39 #endif
  40
  41 static struct irq_domain *get_ih_from_node(struct device_node *controller)
  42 {
  43         struct irq_domain *ih, *found = NULL;
  44         unsigned long flags;
  45
  46         raw_spin_lock_irqsave(&big_irq_lock, flags);
  47         list_for_each_entry(ih, &irq_domains, l) {
  48                 if (ih->controller ==  controller) {
  49                         found = ih;
  50                         break;
  51                 }
  52         }
  53         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  54         return found;
  55 }
  56
  57 unsigned int irq_create_of_mapping(struct device_node *controller,
  58                                    const u32 *intspec, unsigned int intsize)
  59 {
  60         struct irq_domain *ih;
  61         u32 virq, type;
  62         int ret;
  63
  64         ih = get_ih_from_node(controller);
  65         if (!ih)
  66                 return 0;
  67         ret = ih->xlate(ih, intspec, intsize, &virq, &type);
  68         if (ret)
  69                 return 0;
  70         if (type == IRQ_TYPE_NONE)
  71                 return virq;
  72         irq_set_irq_type(virq, type);
  73         return virq;
  74 }
  75 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
  76
  77 unsigned long pci_address_to_pio(phys_addr_t address)
  78 {
  79         /*
  80          * The ioport address can be directly used by inX / outX
  81          */
  82         BUG_ON(address >= (1 << 16));
  83         return (unsigned long)address;
  84 }
  85 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  86
  87 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  88 {
  89         BUG();
  90 }
  91
  92 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  93 {
  94         BUG();
  95 }
  96
  97 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  98 {
  99         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
 100 }
 101
 102 #ifdef CONFIG_BLK_DEV_INITRD
 103 void __init early_init_dt_setup_initrd_arch(unsigned long start,
 104                                             unsigned long end)
 105 {
 106         initrd_start = (unsigned long)__va(start);
 107         initrd_end = (unsigned long)__va(end);
 108         initrd_below_start_ok = 1;
 109 }
 110 #endif
 111
 112 void __init add_dtb(u64 data)
 113 {
 114         initial_dtb = data + offsetof(struct setup_data, data);
 115 }
 116
 117 /*
 118  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
 119  */
 120 static struct of_device_id __initdata ce4100_ids[] = {
 121         { .compatible = "intel,ce4100-cp", },
 122         { .compatible = "isa", },
 123         { .compatible = "pci", },
 124         {},
 125 };
 126
 127 static int __init add_bus_probe(void)
 128 {
 129         if (!of_have_populated_dt())
 130                 return 0;
 131
 132         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
 133 }
 134 module_init(add_bus_probe);
 135
 136 #ifdef CONFIG_PCI
 137 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
 138 {
 139         struct device_node *np;
 140
 141         for_each_node_by_type(np, "pci") {
 142                 const void *prop;
 143                 unsigned int bus_min;
 144
 145                 prop = of_get_property(np, "bus-range", NULL);
 146                 if (!prop)
 147                         continue;
 148                 bus_min = be32_to_cpup(prop);
 149                 if (bus->number == bus_min)
 150                         return np;
 151         }
 152         return NULL;
 153 }
 154
 155 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 156 {
 157         struct of_irq oirq;
 158         u32 virq;
 159         int ret;
 160         u8 pin;
 161
 162         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 163         if (ret)
 164                 return ret;
 165         if (!pin)
 166                 return 0;
 167
 168         ret = of_irq_map_pci(dev, &oirq);
 169         if (ret)
 170                 return ret;
 171
 172         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
 173                         oirq.size);
 174         if (virq == 0)
 175                 return -EINVAL;
 176         dev->irq = virq;
 177         return 0;
 178 }
 179
 180 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 181 {
 182 }
 183
 184 void __cpuinit x86_of_pci_init(void)
 185 {
 186         pcibios_enable_irq = x86_of_pci_irq_enable;
 187         pcibios_disable_irq = x86_of_pci_irq_disable;
 188 }
 189 #endif
 190
 191 static void __init dtb_setup_hpet(void)
 192 {
 193 #ifdef CONFIG_HPET_TIMER
 194         struct device_node *dn;
 195         struct resource r;
 196         int ret;
 197
 198         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 199         if (!dn)
 200                 return;
 201         ret = of_address_to_resource(dn, 0, &r);
 202         if (ret) {
 203                 WARN_ON(1);
 204                 return;
 205         }
 206         hpet_address = r.start;
 207 #endif
 208 }
 209
 210 static void __init dtb_lapic_setup(void)
 211 {
 212 #ifdef CONFIG_X86_LOCAL_APIC
 213         struct device_node *dn;
 214         struct resource r;
 215         int ret;
 216
 217         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 218         if (!dn)
 219                 return;
 220
 221         ret = of_address_to_resource(dn, 0, &r);
 222         if (WARN_ON(ret))
 223                 return;
 224
 225         /* Did the boot loader setup the local APIC ? */
 226         if (!cpu_has_apic) {
 227                 if (apic_force_enable(r.start))
 228                         return;
 229         }
 230         smp_found_config = 1;
 231         pic_mode = 1;
 232         register_lapic_address(r.start);
 233         generic_processor_info(boot_cpu_physical_apicid,
 234                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 235 #endif
 236 }
 237
 238 #ifdef CONFIG_X86_IO_APIC
 239 static unsigned int ioapic_id;
 240
 241 static void __init dtb_add_ioapic(struct device_node *dn)
 242 {
 243         struct resource r;
 244         int ret;
 245
 246         ret = of_address_to_resource(dn, 0, &r);
 247         if (ret) {
 248                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 249                                 dn->full_name);
 250                 return;
 251         }
 252         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 253 }
 254
 255 static void __init dtb_ioapic_setup(void)
 256 {
 257         struct device_node *dn;
 258
 259         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 260                 dtb_add_ioapic(dn);
 261
 262         if (nr_ioapics) {
 263                 of_ioapic = 1;
 264                 return;
 265         }
 266         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 267 }
 268 #else
 269 static void __init dtb_ioapic_setup(void) {}
 270 #endif
 271
 272 static void __init dtb_apic_setup(void)
 273 {
 274         dtb_lapic_setup();
 275         dtb_ioapic_setup();
 276 }
 277
 278 #ifdef CONFIG_OF_FLATTREE
 279 static void __init x86_flattree_get_config(void)
 280 {
 281         u32 size, map_len;
 282         void *new_dtb;
 283
 284         if (!initial_dtb)
 285                 return;
 286
 287         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 288                         (u64)sizeof(struct boot_param_header));
 289
 290         initial_boot_params = early_memremap(initial_dtb, map_len);
 291         size = be32_to_cpu(initial_boot_params->totalsize);
 292         if (map_len < size) {
 293                 early_iounmap(initial_boot_params, map_len);
 294                 initial_boot_params = early_memremap(initial_dtb, size);
 295                 map_len = size;
 296         }
 297
 298         new_dtb = alloc_bootmem(size);
 299         memcpy(new_dtb, initial_boot_params, size);
 300         early_iounmap(initial_boot_params, map_len);
 301
 302         initial_boot_params = new_dtb;
 303
 304         /* root level address cells */
 305         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 306
 307         unflatten_device_tree();
 308 }
 309 #else
 310 static inline void x86_flattree_get_config(void) { }
 311 #endif
 312
 313 void __init x86_dtb_init(void)
 314 {
 315         x86_flattree_get_config();
 316
 317         if (!of_have_populated_dt())
 318                 return;
 319
 320         dtb_setup_hpet();
 321         dtb_apic_setup();
 322 }
 323
 324 #ifdef CONFIG_X86_IO_APIC
 325
 326 struct of_ioapic_type {
 327         u32 out_type;
 328         u32 trigger;
 329         u32 polarity;
 330 };
 331
 332 static struct of_ioapic_type of_ioapic_type[] =
 333 {
 334         {
 335                 .out_type       = IRQ_TYPE_EDGE_RISING,
 336                 .trigger        = IOAPIC_EDGE,
 337                 .polarity       = 1,
 338         },
 339         {
 340                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 341                 .trigger        = IOAPIC_LEVEL,
 342                 .polarity       = 0,
 343         },
 344         {
 345                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 346                 .trigger        = IOAPIC_LEVEL,
 347                 .polarity       = 1,
 348         },
 349         {
 350                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 351                 .trigger        = IOAPIC_EDGE,
 352                 .polarity       = 0,
 353         },
 354 };
 355
 356 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
 357                         u32 *out_hwirq, u32 *out_type)
 358 {
 359         struct mp_ioapic_gsi *gsi_cfg;
 360         struct io_apic_irq_attr attr;
 361         struct of_ioapic_type *it;
 362         u32 line, idx, type;
 363
 364         if (intsize < 2)
 365                 return -EINVAL;
 366
 367         line = *intspec;
 368         idx = (u32) id->priv;
 369         gsi_cfg = mp_ioapic_gsi_routing(idx);
 370         *out_hwirq = line + gsi_cfg->gsi_base;
 371
 372         intspec++;
 373         type = *intspec;
 374
 375         if (type >= ARRAY_SIZE(of_ioapic_type))
 376                 return -EINVAL;
 377
 378         it = of_ioapic_type + type;
 379         *out_type = it->out_type;
 380
 381         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 382
 383         return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
 384 }
 385
 386 static void __init ioapic_add_ofnode(struct device_node *np)
 387 {
 388         struct resource r;
 389         int i, ret;
 390
 391         ret = of_address_to_resource(np, 0, &r);
 392         if (ret) {
 393                 printk(KERN_ERR "Failed to obtain address for %s\n",
 394                                 np->full_name);
 395                 return;
 396         }
 397
 398         for (i = 0; i < nr_ioapics; i++) {
 399                 if (r.start == mpc_ioapic_addr(i)) {
 400                         struct irq_domain *id;
 401
 402                         id = kzalloc(sizeof(*id), GFP_KERNEL);
 403                         BUG_ON(!id);
 404                         id->controller = np;
 405                         id->xlate = ioapic_xlate;
 406                         id->priv = (void *)i;
 407                         add_interrupt_host(id);
 408                         return;
 409                 }
 410         }
 411         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 412 }
 413
 414 void __init x86_add_irq_domains(void)
 415 {
 416         struct device_node *dp;
 417
 418         if (!of_have_populated_dt())
 419                 return;
 420
 421         for_each_node_with_property(dp, "interrupt-controller") {
 422                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 423                         ioapic_add_ofnode(dp);
 424         }
 425 }
 426 #else
 427 void __init x86_add_irq_domains(void) { }
 428 #endif