2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
21 #include <trace/events/asoc.h>
23 static unsigned int snd_soc_4_12_read(struct snd_soc_codec
*codec
,
29 if (reg
>= codec
->driver
->reg_cache_size
||
30 snd_soc_codec_volatile_register(codec
, reg
) ||
31 codec
->cache_bypass
) {
32 if (codec
->cache_only
)
35 BUG_ON(!codec
->hw_read
);
36 return codec
->hw_read(codec
, reg
);
39 ret
= snd_soc_cache_read(codec
, reg
, &val
);
45 static int snd_soc_4_12_write(struct snd_soc_codec
*codec
, unsigned int reg
,
51 data
[0] = (reg
<< 4) | ((value
>> 8) & 0x000f);
52 data
[1] = value
& 0x00ff;
54 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
55 reg
< codec
->driver
->reg_cache_size
&&
56 !codec
->cache_bypass
) {
57 ret
= snd_soc_cache_write(codec
, reg
, value
);
62 if (codec
->cache_only
) {
63 codec
->cache_sync
= 1;
67 ret
= codec
->hw_write(codec
->control_data
, data
, 2);
76 #if defined(CONFIG_SPI_MASTER)
77 static int snd_soc_4_12_spi_write(void *control_data
, const char *data
,
80 struct spi_device
*spi
= control_data
;
81 struct spi_transfer t
;
92 memset(&t
, 0, sizeof t
);
97 spi_message_add_tail(&t
, &m
);
103 #define snd_soc_4_12_spi_write NULL
106 static unsigned int snd_soc_7_9_read(struct snd_soc_codec
*codec
,
112 if (reg
>= codec
->driver
->reg_cache_size
||
113 snd_soc_codec_volatile_register(codec
, reg
) ||
114 codec
->cache_bypass
) {
115 if (codec
->cache_only
)
118 BUG_ON(!codec
->hw_read
);
119 return codec
->hw_read(codec
, reg
);
122 ret
= snd_soc_cache_read(codec
, reg
, &val
);
128 static int snd_soc_7_9_write(struct snd_soc_codec
*codec
, unsigned int reg
,
134 data
[0] = (reg
<< 1) | ((value
>> 8) & 0x0001);
135 data
[1] = value
& 0x00ff;
137 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
138 reg
< codec
->driver
->reg_cache_size
&&
139 !codec
->cache_bypass
) {
140 ret
= snd_soc_cache_write(codec
, reg
, value
);
145 if (codec
->cache_only
) {
146 codec
->cache_sync
= 1;
150 ret
= codec
->hw_write(codec
->control_data
, data
, 2);
159 #if defined(CONFIG_SPI_MASTER)
160 static int snd_soc_7_9_spi_write(void *control_data
, const char *data
,
163 struct spi_device
*spi
= control_data
;
164 struct spi_transfer t
;
165 struct spi_message m
;
174 spi_message_init(&m
);
175 memset(&t
, 0, sizeof t
);
180 spi_message_add_tail(&t
, &m
);
186 #define snd_soc_7_9_spi_write NULL
189 static int snd_soc_8_8_write(struct snd_soc_codec
*codec
, unsigned int reg
,
197 data
[1] = value
& 0xff;
199 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
200 reg
< codec
->driver
->reg_cache_size
&&
201 !codec
->cache_bypass
) {
202 ret
= snd_soc_cache_write(codec
, reg
, value
);
207 if (codec
->cache_only
) {
208 codec
->cache_sync
= 1;
212 if (codec
->hw_write(codec
->control_data
, data
, 2) == 2)
218 static unsigned int snd_soc_8_8_read(struct snd_soc_codec
*codec
,
225 if (reg
>= codec
->driver
->reg_cache_size
||
226 snd_soc_codec_volatile_register(codec
, reg
) ||
227 codec
->cache_bypass
) {
228 if (codec
->cache_only
)
231 BUG_ON(!codec
->hw_read
);
232 return codec
->hw_read(codec
, reg
);
235 ret
= snd_soc_cache_read(codec
, reg
, &val
);
241 #if defined(CONFIG_SPI_MASTER)
242 static int snd_soc_8_8_spi_write(void *control_data
, const char *data
,
245 struct spi_device
*spi
= control_data
;
246 struct spi_transfer t
;
247 struct spi_message m
;
256 spi_message_init(&m
);
257 memset(&t
, 0, sizeof t
);
262 spi_message_add_tail(&t
, &m
);
268 #define snd_soc_8_8_spi_write NULL
271 static int snd_soc_8_16_write(struct snd_soc_codec
*codec
, unsigned int reg
,
278 data
[1] = (value
>> 8) & 0xff;
279 data
[2] = value
& 0xff;
281 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
282 reg
< codec
->driver
->reg_cache_size
&&
283 !codec
->cache_bypass
) {
284 ret
= snd_soc_cache_write(codec
, reg
, value
);
289 if (codec
->cache_only
) {
290 codec
->cache_sync
= 1;
294 if (codec
->hw_write(codec
->control_data
, data
, 3) == 3)
300 static unsigned int snd_soc_8_16_read(struct snd_soc_codec
*codec
,
306 if (reg
>= codec
->driver
->reg_cache_size
||
307 snd_soc_codec_volatile_register(codec
, reg
) ||
308 codec
->cache_bypass
) {
309 if (codec
->cache_only
)
312 BUG_ON(!codec
->hw_read
);
313 return codec
->hw_read(codec
, reg
);
316 ret
= snd_soc_cache_read(codec
, reg
, &val
);
322 #if defined(CONFIG_SPI_MASTER)
323 static int snd_soc_8_16_spi_write(void *control_data
, const char *data
,
326 struct spi_device
*spi
= control_data
;
327 struct spi_transfer t
;
328 struct spi_message m
;
338 spi_message_init(&m
);
339 memset(&t
, 0, sizeof t
);
344 spi_message_add_tail(&t
, &m
);
350 #define snd_soc_8_16_spi_write NULL
353 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
354 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec
*codec
,
357 struct i2c_msg xfer
[2];
361 struct i2c_client
*client
= codec
->control_data
;
364 xfer
[0].addr
= client
->addr
;
370 xfer
[1].addr
= client
->addr
;
371 xfer
[1].flags
= I2C_M_RD
;
375 ret
= i2c_transfer(client
->adapter
, xfer
, 2);
377 dev_err(&client
->dev
, "i2c_transfer() returned %d\n", ret
);
384 #define snd_soc_8_8_read_i2c NULL
387 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
388 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec
*codec
,
391 struct i2c_msg xfer
[2];
395 struct i2c_client
*client
= codec
->control_data
;
398 xfer
[0].addr
= client
->addr
;
404 xfer
[1].addr
= client
->addr
;
405 xfer
[1].flags
= I2C_M_RD
;
407 xfer
[1].buf
= (u8
*)&data
;
409 ret
= i2c_transfer(client
->adapter
, xfer
, 2);
411 dev_err(&client
->dev
, "i2c_transfer() returned %d\n", ret
);
415 return (data
>> 8) | ((data
& 0xff) << 8);
418 #define snd_soc_8_16_read_i2c NULL
421 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
422 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec
*codec
,
425 struct i2c_msg xfer
[2];
429 struct i2c_client
*client
= codec
->control_data
;
432 xfer
[0].addr
= client
->addr
;
435 xfer
[0].buf
= (u8
*)®
;
438 xfer
[1].addr
= client
->addr
;
439 xfer
[1].flags
= I2C_M_RD
;
443 ret
= i2c_transfer(client
->adapter
, xfer
, 2);
445 dev_err(&client
->dev
, "i2c_transfer() returned %d\n", ret
);
452 #define snd_soc_16_8_read_i2c NULL
455 static unsigned int snd_soc_16_8_read(struct snd_soc_codec
*codec
,
462 if (reg
>= codec
->driver
->reg_cache_size
||
463 snd_soc_codec_volatile_register(codec
, reg
) ||
464 codec
->cache_bypass
) {
465 if (codec
->cache_only
)
468 BUG_ON(!codec
->hw_read
);
469 return codec
->hw_read(codec
, reg
);
472 ret
= snd_soc_cache_read(codec
, reg
, &val
);
478 static int snd_soc_16_8_write(struct snd_soc_codec
*codec
, unsigned int reg
,
484 data
[0] = (reg
>> 8) & 0xff;
485 data
[1] = reg
& 0xff;
489 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
490 reg
< codec
->driver
->reg_cache_size
&&
491 !codec
->cache_bypass
) {
492 ret
= snd_soc_cache_write(codec
, reg
, value
);
497 if (codec
->cache_only
) {
498 codec
->cache_sync
= 1;
502 ret
= codec
->hw_write(codec
->control_data
, data
, 3);
511 #if defined(CONFIG_SPI_MASTER)
512 static int snd_soc_16_8_spi_write(void *control_data
, const char *data
,
515 struct spi_device
*spi
= control_data
;
516 struct spi_transfer t
;
517 struct spi_message m
;
527 spi_message_init(&m
);
528 memset(&t
, 0, sizeof t
);
533 spi_message_add_tail(&t
, &m
);
539 #define snd_soc_16_8_spi_write NULL
542 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
543 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec
*codec
,
546 struct i2c_msg xfer
[2];
547 u16 reg
= cpu_to_be16(r
);
550 struct i2c_client
*client
= codec
->control_data
;
553 xfer
[0].addr
= client
->addr
;
556 xfer
[0].buf
= (u8
*)®
;
559 xfer
[1].addr
= client
->addr
;
560 xfer
[1].flags
= I2C_M_RD
;
562 xfer
[1].buf
= (u8
*)&data
;
564 ret
= i2c_transfer(client
->adapter
, xfer
, 2);
566 dev_err(&client
->dev
, "i2c_transfer() returned %d\n", ret
);
570 return be16_to_cpu(data
);
573 #define snd_soc_16_16_read_i2c NULL
576 static unsigned int snd_soc_16_16_read(struct snd_soc_codec
*codec
,
582 if (reg
>= codec
->driver
->reg_cache_size
||
583 snd_soc_codec_volatile_register(codec
, reg
) ||
584 codec
->cache_bypass
) {
585 if (codec
->cache_only
)
588 BUG_ON(!codec
->hw_read
);
589 return codec
->hw_read(codec
, reg
);
592 ret
= snd_soc_cache_read(codec
, reg
, &val
);
599 static int snd_soc_16_16_write(struct snd_soc_codec
*codec
, unsigned int reg
,
605 data
[0] = (reg
>> 8) & 0xff;
606 data
[1] = reg
& 0xff;
607 data
[2] = (value
>> 8) & 0xff;
608 data
[3] = value
& 0xff;
610 if (!snd_soc_codec_volatile_register(codec
, reg
) &&
611 reg
< codec
->driver
->reg_cache_size
&&
612 !codec
->cache_bypass
) {
613 ret
= snd_soc_cache_write(codec
, reg
, value
);
618 if (codec
->cache_only
) {
619 codec
->cache_sync
= 1;
623 ret
= codec
->hw_write(codec
->control_data
, data
, 4);
632 #if defined(CONFIG_SPI_MASTER)
633 static int snd_soc_16_16_spi_write(void *control_data
, const char *data
,
636 struct spi_device
*spi
= control_data
;
637 struct spi_transfer t
;
638 struct spi_message m
;
649 spi_message_init(&m
);
650 memset(&t
, 0, sizeof t
);
655 spi_message_add_tail(&t
, &m
);
661 #define snd_soc_16_16_spi_write NULL
667 int (*write
)(struct snd_soc_codec
*codec
, unsigned int, unsigned int);
668 int (*spi_write
)(void *, const char *, int);
669 unsigned int (*read
)(struct snd_soc_codec
*, unsigned int);
670 unsigned int (*i2c_read
)(struct snd_soc_codec
*, unsigned int);
673 .addr_bits
= 4, .data_bits
= 12,
674 .write
= snd_soc_4_12_write
, .read
= snd_soc_4_12_read
,
675 .spi_write
= snd_soc_4_12_spi_write
,
678 .addr_bits
= 7, .data_bits
= 9,
679 .write
= snd_soc_7_9_write
, .read
= snd_soc_7_9_read
,
680 .spi_write
= snd_soc_7_9_spi_write
,
683 .addr_bits
= 8, .data_bits
= 8,
684 .write
= snd_soc_8_8_write
, .read
= snd_soc_8_8_read
,
685 .i2c_read
= snd_soc_8_8_read_i2c
,
686 .spi_write
= snd_soc_8_8_spi_write
,
689 .addr_bits
= 8, .data_bits
= 16,
690 .write
= snd_soc_8_16_write
, .read
= snd_soc_8_16_read
,
691 .i2c_read
= snd_soc_8_16_read_i2c
,
692 .spi_write
= snd_soc_8_16_spi_write
,
695 .addr_bits
= 16, .data_bits
= 8,
696 .write
= snd_soc_16_8_write
, .read
= snd_soc_16_8_read
,
697 .i2c_read
= snd_soc_16_8_read_i2c
,
698 .spi_write
= snd_soc_16_8_spi_write
,
701 .addr_bits
= 16, .data_bits
= 16,
702 .write
= snd_soc_16_16_write
, .read
= snd_soc_16_16_read
,
703 .i2c_read
= snd_soc_16_16_read_i2c
,
704 .spi_write
= snd_soc_16_16_spi_write
,
709 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
711 * @codec: CODEC to configure.
712 * @type: Type of cache.
713 * @addr_bits: Number of bits of register address data.
714 * @data_bits: Number of bits of data per register.
715 * @control: Control bus used.
717 * Register formats are frequently shared between many I2C and SPI
718 * devices. In order to promote code reuse the ASoC core provides
719 * some standard implementations of CODEC read and write operations
720 * which can be set up using this function.
722 * The caller is responsible for allocating and initialising the
725 * Note that at present this code cannot be used by CODECs with
726 * volatile registers.
728 int snd_soc_codec_set_cache_io(struct snd_soc_codec
*codec
,
729 int addr_bits
, int data_bits
,
730 enum snd_soc_control_type control
)
734 for (i
= 0; i
< ARRAY_SIZE(io_types
); i
++)
735 if (io_types
[i
].addr_bits
== addr_bits
&&
736 io_types
[i
].data_bits
== data_bits
)
738 if (i
== ARRAY_SIZE(io_types
)) {
740 "No I/O functions for %d bit address %d bit data\n",
741 addr_bits
, data_bits
);
745 codec
->write
= io_types
[i
].write
;
746 codec
->read
= io_types
[i
].read
;
753 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
754 codec
->hw_write
= (hw_write_t
)i2c_master_send
;
756 if (io_types
[i
].i2c_read
)
757 codec
->hw_read
= io_types
[i
].i2c_read
;
759 codec
->control_data
= container_of(codec
->dev
,
765 if (io_types
[i
].spi_write
)
766 codec
->hw_write
= io_types
[i
].spi_write
;
768 codec
->control_data
= container_of(codec
->dev
,
776 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io
);
778 static bool snd_soc_set_cache_val(void *base
, unsigned int idx
,
779 unsigned int val
, unsigned int word_size
)
784 if (cache
[idx
] == val
)
791 if (cache
[idx
] == val
)
802 static unsigned int snd_soc_get_cache_val(const void *base
, unsigned int idx
,
803 unsigned int word_size
)
807 const u8
*cache
= base
;
811 const u16
*cache
= base
;
821 struct snd_soc_rbtree_node
{
826 } __attribute__ ((packed
));
828 struct snd_soc_rbtree_ctx
{
832 static struct snd_soc_rbtree_node
*snd_soc_rbtree_lookup(
833 struct rb_root
*root
, unsigned int reg
)
835 struct rb_node
*node
;
836 struct snd_soc_rbtree_node
*rbnode
;
838 node
= root
->rb_node
;
840 rbnode
= container_of(node
, struct snd_soc_rbtree_node
, node
);
841 if (rbnode
->reg
< reg
)
842 node
= node
->rb_left
;
843 else if (rbnode
->reg
> reg
)
844 node
= node
->rb_right
;
852 static int snd_soc_rbtree_insert(struct rb_root
*root
,
853 struct snd_soc_rbtree_node
*rbnode
)
855 struct rb_node
**new, *parent
;
856 struct snd_soc_rbtree_node
*rbnode_tmp
;
859 new = &root
->rb_node
;
861 rbnode_tmp
= container_of(*new, struct snd_soc_rbtree_node
,
864 if (rbnode_tmp
->reg
< rbnode
->reg
)
865 new = &((*new)->rb_left
);
866 else if (rbnode_tmp
->reg
> rbnode
->reg
)
867 new = &((*new)->rb_right
);
872 /* insert the node into the rbtree */
873 rb_link_node(&rbnode
->node
, parent
, new);
874 rb_insert_color(&rbnode
->node
, root
);
879 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec
*codec
)
881 struct snd_soc_rbtree_ctx
*rbtree_ctx
;
882 struct rb_node
*node
;
883 struct snd_soc_rbtree_node
*rbnode
;
887 rbtree_ctx
= codec
->reg_cache
;
888 for (node
= rb_first(&rbtree_ctx
->root
); node
; node
= rb_next(node
)) {
889 rbnode
= rb_entry(node
, struct snd_soc_rbtree_node
, node
);
890 if (rbnode
->value
== rbnode
->defval
)
892 ret
= snd_soc_cache_read(codec
, rbnode
->reg
, &val
);
895 codec
->cache_bypass
= 1;
896 ret
= snd_soc_write(codec
, rbnode
->reg
, val
);
897 codec
->cache_bypass
= 0;
900 dev_dbg(codec
->dev
, "Synced register %#x, value = %#x\n",
907 static int snd_soc_rbtree_cache_write(struct snd_soc_codec
*codec
,
908 unsigned int reg
, unsigned int value
)
910 struct snd_soc_rbtree_ctx
*rbtree_ctx
;
911 struct snd_soc_rbtree_node
*rbnode
;
913 rbtree_ctx
= codec
->reg_cache
;
914 rbnode
= snd_soc_rbtree_lookup(&rbtree_ctx
->root
, reg
);
916 if (rbnode
->value
== value
)
918 rbnode
->value
= value
;
920 /* bail out early, no need to create the rbnode yet */
924 * for uninitialized registers whose value is changed
925 * from the default zero, create an rbnode and insert
928 rbnode
= kzalloc(sizeof *rbnode
, GFP_KERNEL
);
932 rbnode
->value
= value
;
933 snd_soc_rbtree_insert(&rbtree_ctx
->root
, rbnode
);
939 static int snd_soc_rbtree_cache_read(struct snd_soc_codec
*codec
,
940 unsigned int reg
, unsigned int *value
)
942 struct snd_soc_rbtree_ctx
*rbtree_ctx
;
943 struct snd_soc_rbtree_node
*rbnode
;
945 rbtree_ctx
= codec
->reg_cache
;
946 rbnode
= snd_soc_rbtree_lookup(&rbtree_ctx
->root
, reg
);
948 *value
= rbnode
->value
;
950 /* uninitialized registers default to 0 */
957 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec
*codec
)
959 struct rb_node
*next
;
960 struct snd_soc_rbtree_ctx
*rbtree_ctx
;
961 struct snd_soc_rbtree_node
*rbtree_node
;
963 /* if we've already been called then just return */
964 rbtree_ctx
= codec
->reg_cache
;
968 /* free up the rbtree */
969 next
= rb_first(&rbtree_ctx
->root
);
971 rbtree_node
= rb_entry(next
, struct snd_soc_rbtree_node
, node
);
972 next
= rb_next(&rbtree_node
->node
);
973 rb_erase(&rbtree_node
->node
, &rbtree_ctx
->root
);
977 /* release the resources */
978 kfree(codec
->reg_cache
);
979 codec
->reg_cache
= NULL
;
984 static int snd_soc_rbtree_cache_init(struct snd_soc_codec
*codec
)
986 struct snd_soc_rbtree_node
*rbtree_node
;
987 struct snd_soc_rbtree_ctx
*rbtree_ctx
;
989 unsigned int word_size
;
993 codec
->reg_cache
= kmalloc(sizeof *rbtree_ctx
, GFP_KERNEL
);
994 if (!codec
->reg_cache
)
997 rbtree_ctx
= codec
->reg_cache
;
998 rbtree_ctx
->root
= RB_ROOT
;
1000 if (!codec
->reg_def_copy
)
1004 * populate the rbtree with the initialized registers. All other
1005 * registers will be inserted when they are first modified.
1007 word_size
= codec
->driver
->reg_word_size
;
1008 for (i
= 0; i
< codec
->driver
->reg_cache_size
; ++i
) {
1009 val
= snd_soc_get_cache_val(codec
->reg_def_copy
, i
, word_size
);
1012 rbtree_node
= kzalloc(sizeof *rbtree_node
, GFP_KERNEL
);
1015 snd_soc_cache_exit(codec
);
1018 rbtree_node
->reg
= i
;
1019 rbtree_node
->value
= val
;
1020 rbtree_node
->defval
= val
;
1021 snd_soc_rbtree_insert(&rbtree_ctx
->root
, rbtree_node
);
1027 #ifdef CONFIG_SND_SOC_CACHE_LZO
1028 struct snd_soc_lzo_ctx
{
1034 size_t decompressed_size
;
1035 unsigned long *sync_bmp
;
1039 #define LZO_BLOCK_NUM 8
1040 static int snd_soc_lzo_block_count(void)
1042 return LZO_BLOCK_NUM
;
1045 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx
*lzo_ctx
)
1047 lzo_ctx
->wmem
= kmalloc(LZO1X_MEM_COMPRESS
, GFP_KERNEL
);
1053 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx
*lzo_ctx
)
1055 size_t compress_size
;
1058 ret
= lzo1x_1_compress(lzo_ctx
->src
, lzo_ctx
->src_len
,
1059 lzo_ctx
->dst
, &compress_size
, lzo_ctx
->wmem
);
1060 if (ret
!= LZO_E_OK
|| compress_size
> lzo_ctx
->dst_len
)
1062 lzo_ctx
->dst_len
= compress_size
;
1066 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx
*lzo_ctx
)
1071 dst_len
= lzo_ctx
->dst_len
;
1072 ret
= lzo1x_decompress_safe(lzo_ctx
->src
, lzo_ctx
->src_len
,
1073 lzo_ctx
->dst
, &dst_len
);
1074 if (ret
!= LZO_E_OK
|| dst_len
!= lzo_ctx
->dst_len
)
1079 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec
*codec
,
1080 struct snd_soc_lzo_ctx
*lzo_ctx
)
1084 lzo_ctx
->dst_len
= lzo1x_worst_compress(PAGE_SIZE
);
1085 lzo_ctx
->dst
= kmalloc(lzo_ctx
->dst_len
, GFP_KERNEL
);
1086 if (!lzo_ctx
->dst
) {
1087 lzo_ctx
->dst_len
= 0;
1091 ret
= snd_soc_lzo_compress(lzo_ctx
);
1097 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec
*codec
,
1098 struct snd_soc_lzo_ctx
*lzo_ctx
)
1102 lzo_ctx
->dst_len
= lzo_ctx
->decompressed_size
;
1103 lzo_ctx
->dst
= kmalloc(lzo_ctx
->dst_len
, GFP_KERNEL
);
1104 if (!lzo_ctx
->dst
) {
1105 lzo_ctx
->dst_len
= 0;
1109 ret
= snd_soc_lzo_decompress(lzo_ctx
);
1115 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec
*codec
,
1118 const struct snd_soc_codec_driver
*codec_drv
;
1120 codec_drv
= codec
->driver
;
1121 return (reg
* codec_drv
->reg_word_size
) /
1122 DIV_ROUND_UP(codec
->reg_size
, snd_soc_lzo_block_count());
1125 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec
*codec
,
1128 const struct snd_soc_codec_driver
*codec_drv
;
1130 codec_drv
= codec
->driver
;
1131 return reg
% (DIV_ROUND_UP(codec
->reg_size
, snd_soc_lzo_block_count()) /
1132 codec_drv
->reg_word_size
);
1135 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec
*codec
)
1137 const struct snd_soc_codec_driver
*codec_drv
;
1139 codec_drv
= codec
->driver
;
1140 return DIV_ROUND_UP(codec
->reg_size
, snd_soc_lzo_block_count());
1143 static int snd_soc_lzo_cache_sync(struct snd_soc_codec
*codec
)
1145 struct snd_soc_lzo_ctx
**lzo_blocks
;
1150 lzo_blocks
= codec
->reg_cache
;
1151 for_each_set_bit(i
, lzo_blocks
[0]->sync_bmp
, lzo_blocks
[0]->sync_bmp_nbits
) {
1152 ret
= snd_soc_cache_read(codec
, i
, &val
);
1155 codec
->cache_bypass
= 1;
1156 ret
= snd_soc_write(codec
, i
, val
);
1157 codec
->cache_bypass
= 0;
1160 dev_dbg(codec
->dev
, "Synced register %#x, value = %#x\n",
1167 static int snd_soc_lzo_cache_write(struct snd_soc_codec
*codec
,
1168 unsigned int reg
, unsigned int value
)
1170 struct snd_soc_lzo_ctx
*lzo_block
, **lzo_blocks
;
1171 int ret
, blkindex
, blkpos
;
1172 size_t blksize
, tmp_dst_len
;
1175 /* index of the compressed lzo block */
1176 blkindex
= snd_soc_lzo_get_blkindex(codec
, reg
);
1177 /* register index within the decompressed block */
1178 blkpos
= snd_soc_lzo_get_blkpos(codec
, reg
);
1179 /* size of the compressed block */
1180 blksize
= snd_soc_lzo_get_blksize(codec
);
1181 lzo_blocks
= codec
->reg_cache
;
1182 lzo_block
= lzo_blocks
[blkindex
];
1184 /* save the pointer and length of the compressed block */
1185 tmp_dst
= lzo_block
->dst
;
1186 tmp_dst_len
= lzo_block
->dst_len
;
1188 /* prepare the source to be the compressed block */
1189 lzo_block
->src
= lzo_block
->dst
;
1190 lzo_block
->src_len
= lzo_block
->dst_len
;
1192 /* decompress the block */
1193 ret
= snd_soc_lzo_decompress_cache_block(codec
, lzo_block
);
1195 kfree(lzo_block
->dst
);
1199 /* write the new value to the cache */
1200 if (snd_soc_set_cache_val(lzo_block
->dst
, blkpos
, value
,
1201 codec
->driver
->reg_word_size
)) {
1202 kfree(lzo_block
->dst
);
1206 /* prepare the source to be the decompressed block */
1207 lzo_block
->src
= lzo_block
->dst
;
1208 lzo_block
->src_len
= lzo_block
->dst_len
;
1210 /* compress the block */
1211 ret
= snd_soc_lzo_compress_cache_block(codec
, lzo_block
);
1213 kfree(lzo_block
->dst
);
1214 kfree(lzo_block
->src
);
1218 /* set the bit so we know we have to sync this register */
1219 set_bit(reg
, lzo_block
->sync_bmp
);
1221 kfree(lzo_block
->src
);
1224 lzo_block
->dst
= tmp_dst
;
1225 lzo_block
->dst_len
= tmp_dst_len
;
1229 static int snd_soc_lzo_cache_read(struct snd_soc_codec
*codec
,
1230 unsigned int reg
, unsigned int *value
)
1232 struct snd_soc_lzo_ctx
*lzo_block
, **lzo_blocks
;
1233 int ret
, blkindex
, blkpos
;
1234 size_t blksize
, tmp_dst_len
;
1238 /* index of the compressed lzo block */
1239 blkindex
= snd_soc_lzo_get_blkindex(codec
, reg
);
1240 /* register index within the decompressed block */
1241 blkpos
= snd_soc_lzo_get_blkpos(codec
, reg
);
1242 /* size of the compressed block */
1243 blksize
= snd_soc_lzo_get_blksize(codec
);
1244 lzo_blocks
= codec
->reg_cache
;
1245 lzo_block
= lzo_blocks
[blkindex
];
1247 /* save the pointer and length of the compressed block */
1248 tmp_dst
= lzo_block
->dst
;
1249 tmp_dst_len
= lzo_block
->dst_len
;
1251 /* prepare the source to be the compressed block */
1252 lzo_block
->src
= lzo_block
->dst
;
1253 lzo_block
->src_len
= lzo_block
->dst_len
;
1255 /* decompress the block */
1256 ret
= snd_soc_lzo_decompress_cache_block(codec
, lzo_block
);
1258 /* fetch the value from the cache */
1259 *value
= snd_soc_get_cache_val(lzo_block
->dst
, blkpos
,
1260 codec
->driver
->reg_word_size
);
1262 kfree(lzo_block
->dst
);
1263 /* restore the pointer and length of the compressed block */
1264 lzo_block
->dst
= tmp_dst
;
1265 lzo_block
->dst_len
= tmp_dst_len
;
1269 static int snd_soc_lzo_cache_exit(struct snd_soc_codec
*codec
)
1271 struct snd_soc_lzo_ctx
**lzo_blocks
;
1274 lzo_blocks
= codec
->reg_cache
;
1278 blkcount
= snd_soc_lzo_block_count();
1280 * the pointer to the bitmap used for syncing the cache
1281 * is shared amongst all lzo_blocks. Ensure it is freed
1285 kfree(lzo_blocks
[0]->sync_bmp
);
1286 for (i
= 0; i
< blkcount
; ++i
) {
1287 if (lzo_blocks
[i
]) {
1288 kfree(lzo_blocks
[i
]->wmem
);
1289 kfree(lzo_blocks
[i
]->dst
);
1291 /* each lzo_block is a pointer returned by kmalloc or NULL */
1292 kfree(lzo_blocks
[i
]);
1295 codec
->reg_cache
= NULL
;
1299 static int snd_soc_lzo_cache_init(struct snd_soc_codec
*codec
)
1301 struct snd_soc_lzo_ctx
**lzo_blocks
;
1303 const struct snd_soc_codec_driver
*codec_drv
;
1304 int ret
, tofree
, i
, blksize
, blkcount
;
1305 const char *p
, *end
;
1306 unsigned long *sync_bmp
;
1309 codec_drv
= codec
->driver
;
1312 * If we have not been given a default register cache
1313 * then allocate a dummy zero-ed out region, compress it
1314 * and remember to free it afterwards.
1317 if (!codec
->reg_def_copy
)
1320 if (!codec
->reg_def_copy
) {
1321 codec
->reg_def_copy
= kzalloc(codec
->reg_size
, GFP_KERNEL
);
1322 if (!codec
->reg_def_copy
)
1326 blkcount
= snd_soc_lzo_block_count();
1327 codec
->reg_cache
= kzalloc(blkcount
* sizeof *lzo_blocks
,
1329 if (!codec
->reg_cache
) {
1333 lzo_blocks
= codec
->reg_cache
;
1336 * allocate a bitmap to be used when syncing the cache with
1337 * the hardware. Each time a register is modified, the corresponding
1338 * bit is set in the bitmap, so we know that we have to sync
1341 bmp_size
= codec_drv
->reg_cache_size
;
1342 sync_bmp
= kmalloc(BITS_TO_LONGS(bmp_size
) * sizeof(long),
1348 bitmap_zero(sync_bmp
, bmp_size
);
1350 /* allocate the lzo blocks and initialize them */
1351 for (i
= 0; i
< blkcount
; ++i
) {
1352 lzo_blocks
[i
] = kzalloc(sizeof **lzo_blocks
,
1354 if (!lzo_blocks
[i
]) {
1359 lzo_blocks
[i
]->sync_bmp
= sync_bmp
;
1360 lzo_blocks
[i
]->sync_bmp_nbits
= bmp_size
;
1361 /* alloc the working space for the compressed block */
1362 ret
= snd_soc_lzo_prepare(lzo_blocks
[i
]);
1367 blksize
= snd_soc_lzo_get_blksize(codec
);
1368 p
= codec
->reg_def_copy
;
1369 end
= codec
->reg_def_copy
+ codec
->reg_size
;
1370 /* compress the register map and fill the lzo blocks */
1371 for (i
= 0; i
< blkcount
; ++i
, p
+= blksize
) {
1372 lzo_blocks
[i
]->src
= p
;
1373 if (p
+ blksize
> end
)
1374 lzo_blocks
[i
]->src_len
= end
- p
;
1376 lzo_blocks
[i
]->src_len
= blksize
;
1377 ret
= snd_soc_lzo_compress_cache_block(codec
,
1381 lzo_blocks
[i
]->decompressed_size
=
1382 lzo_blocks
[i
]->src_len
;
1386 kfree(codec
->reg_def_copy
);
1387 codec
->reg_def_copy
= NULL
;
1391 snd_soc_cache_exit(codec
);
1394 kfree(codec
->reg_def_copy
);
1395 codec
->reg_def_copy
= NULL
;
1401 static int snd_soc_flat_cache_sync(struct snd_soc_codec
*codec
)
1405 const struct snd_soc_codec_driver
*codec_drv
;
1408 codec_drv
= codec
->driver
;
1409 for (i
= 0; i
< codec_drv
->reg_cache_size
; ++i
) {
1410 ret
= snd_soc_cache_read(codec
, i
, &val
);
1413 if (codec
->reg_def_copy
)
1414 if (snd_soc_get_cache_val(codec
->reg_def_copy
,
1415 i
, codec_drv
->reg_word_size
) == val
)
1417 ret
= snd_soc_write(codec
, i
, val
);
1420 dev_dbg(codec
->dev
, "Synced register %#x, value = %#x\n",
1426 static int snd_soc_flat_cache_write(struct snd_soc_codec
*codec
,
1427 unsigned int reg
, unsigned int value
)
1429 snd_soc_set_cache_val(codec
->reg_cache
, reg
, value
,
1430 codec
->driver
->reg_word_size
);
1434 static int snd_soc_flat_cache_read(struct snd_soc_codec
*codec
,
1435 unsigned int reg
, unsigned int *value
)
1437 *value
= snd_soc_get_cache_val(codec
->reg_cache
, reg
,
1438 codec
->driver
->reg_word_size
);
1442 static int snd_soc_flat_cache_exit(struct snd_soc_codec
*codec
)
1444 if (!codec
->reg_cache
)
1446 kfree(codec
->reg_cache
);
1447 codec
->reg_cache
= NULL
;
1451 static int snd_soc_flat_cache_init(struct snd_soc_codec
*codec
)
1453 const struct snd_soc_codec_driver
*codec_drv
;
1455 codec_drv
= codec
->driver
;
1457 if (codec
->reg_def_copy
)
1458 codec
->reg_cache
= kmemdup(codec
->reg_def_copy
,
1459 codec
->reg_size
, GFP_KERNEL
);
1461 codec
->reg_cache
= kzalloc(codec
->reg_size
, GFP_KERNEL
);
1462 if (!codec
->reg_cache
)
1468 /* an array of all supported compression types */
1469 static const struct snd_soc_cache_ops cache_types
[] = {
1470 /* Flat *must* be the first entry for fallback */
1472 .id
= SND_SOC_FLAT_COMPRESSION
,
1474 .init
= snd_soc_flat_cache_init
,
1475 .exit
= snd_soc_flat_cache_exit
,
1476 .read
= snd_soc_flat_cache_read
,
1477 .write
= snd_soc_flat_cache_write
,
1478 .sync
= snd_soc_flat_cache_sync
1480 #ifdef CONFIG_SND_SOC_CACHE_LZO
1482 .id
= SND_SOC_LZO_COMPRESSION
,
1484 .init
= snd_soc_lzo_cache_init
,
1485 .exit
= snd_soc_lzo_cache_exit
,
1486 .read
= snd_soc_lzo_cache_read
,
1487 .write
= snd_soc_lzo_cache_write
,
1488 .sync
= snd_soc_lzo_cache_sync
1492 .id
= SND_SOC_RBTREE_COMPRESSION
,
1494 .init
= snd_soc_rbtree_cache_init
,
1495 .exit
= snd_soc_rbtree_cache_exit
,
1496 .read
= snd_soc_rbtree_cache_read
,
1497 .write
= snd_soc_rbtree_cache_write
,
1498 .sync
= snd_soc_rbtree_cache_sync
1502 int snd_soc_cache_init(struct snd_soc_codec
*codec
)
1506 for (i
= 0; i
< ARRAY_SIZE(cache_types
); ++i
)
1507 if (cache_types
[i
].id
== codec
->compress_type
)
1510 /* Fall back to flat compression */
1511 if (i
== ARRAY_SIZE(cache_types
)) {
1512 dev_warn(codec
->dev
, "Could not match compress type: %d\n",
1513 codec
->compress_type
);
1517 mutex_init(&codec
->cache_rw_mutex
);
1518 codec
->cache_ops
= &cache_types
[i
];
1520 if (codec
->cache_ops
->init
) {
1521 if (codec
->cache_ops
->name
)
1522 dev_dbg(codec
->dev
, "Initializing %s cache for %s codec\n",
1523 codec
->cache_ops
->name
, codec
->name
);
1524 return codec
->cache_ops
->init(codec
);
1530 * NOTE: keep in mind that this function might be called
1533 int snd_soc_cache_exit(struct snd_soc_codec
*codec
)
1535 if (codec
->cache_ops
&& codec
->cache_ops
->exit
) {
1536 if (codec
->cache_ops
->name
)
1537 dev_dbg(codec
->dev
, "Destroying %s cache for %s codec\n",
1538 codec
->cache_ops
->name
, codec
->name
);
1539 return codec
->cache_ops
->exit(codec
);
1545 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1547 * @codec: CODEC to configure.
1548 * @reg: The register index.
1549 * @value: The value to be returned.
1551 int snd_soc_cache_read(struct snd_soc_codec
*codec
,
1552 unsigned int reg
, unsigned int *value
)
1556 mutex_lock(&codec
->cache_rw_mutex
);
1558 if (value
&& codec
->cache_ops
&& codec
->cache_ops
->read
) {
1559 ret
= codec
->cache_ops
->read(codec
, reg
, value
);
1560 mutex_unlock(&codec
->cache_rw_mutex
);
1564 mutex_unlock(&codec
->cache_rw_mutex
);
1567 EXPORT_SYMBOL_GPL(snd_soc_cache_read
);
1570 * snd_soc_cache_write: Set the value of a given register in the cache.
1572 * @codec: CODEC to configure.
1573 * @reg: The register index.
1574 * @value: The new register value.
1576 int snd_soc_cache_write(struct snd_soc_codec
*codec
,
1577 unsigned int reg
, unsigned int value
)
1581 mutex_lock(&codec
->cache_rw_mutex
);
1583 if (codec
->cache_ops
&& codec
->cache_ops
->write
) {
1584 ret
= codec
->cache_ops
->write(codec
, reg
, value
);
1585 mutex_unlock(&codec
->cache_rw_mutex
);
1589 mutex_unlock(&codec
->cache_rw_mutex
);
1592 EXPORT_SYMBOL_GPL(snd_soc_cache_write
);
1595 * snd_soc_cache_sync: Sync the register cache with the hardware.
1597 * @codec: CODEC to configure.
1599 * Any registers that should not be synced should be marked as
1600 * volatile. In general drivers can choose not to use the provided
1601 * syncing functionality if they so require.
1603 int snd_soc_cache_sync(struct snd_soc_codec
*codec
)
1608 if (!codec
->cache_sync
) {
1612 if (!codec
->cache_ops
|| !codec
->cache_ops
->sync
)
1615 if (codec
->cache_ops
->name
)
1616 name
= codec
->cache_ops
->name
;
1620 if (codec
->cache_ops
->name
)
1621 dev_dbg(codec
->dev
, "Syncing %s cache for %s codec\n",
1622 codec
->cache_ops
->name
, codec
->name
);
1623 trace_snd_soc_cache_sync(codec
, name
, "start");
1624 ret
= codec
->cache_ops
->sync(codec
);
1626 codec
->cache_sync
= 0;
1627 trace_snd_soc_cache_sync(codec
, name
, "end");
1630 EXPORT_SYMBOL_GPL(snd_soc_cache_sync
);
1632 static int snd_soc_get_reg_access_index(struct snd_soc_codec
*codec
,
1635 const struct snd_soc_codec_driver
*codec_drv
;
1636 unsigned int min
, max
, index
;
1638 codec_drv
= codec
->driver
;
1640 max
= codec_drv
->reg_access_size
- 1;
1642 index
= (min
+ max
) / 2;
1643 if (codec_drv
->reg_access_default
[index
].reg
== reg
)
1645 if (codec_drv
->reg_access_default
[index
].reg
< reg
)
1649 } while (min
<= max
);
1653 int snd_soc_default_volatile_register(struct snd_soc_codec
*codec
,
1658 if (reg
>= codec
->driver
->reg_cache_size
)
1660 index
= snd_soc_get_reg_access_index(codec
, reg
);
1663 return codec
->driver
->reg_access_default
[index
].vol
;
1665 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register
);
1667 int snd_soc_default_readable_register(struct snd_soc_codec
*codec
,
1672 if (reg
>= codec
->driver
->reg_cache_size
)
1674 index
= snd_soc_get_reg_access_index(codec
, reg
);
1677 return codec
->driver
->reg_access_default
[index
].read
;
1679 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register
);