1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include <linux/device.h>
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
39 static int i915_modeset
= -1;
40 module_param_named(modeset
, i915_modeset
, int, 0400);
42 unsigned int i915_fbpercrtc
= 0;
43 module_param_named(fbpercrtc
, i915_fbpercrtc
, int, 0400);
45 unsigned int i915_powersave
= 1;
46 module_param_named(powersave
, i915_powersave
, int, 0400);
48 unsigned int i915_lvds_downclock
= 0;
49 module_param_named(lvds_downclock
, i915_lvds_downclock
, int, 0400);
51 static struct drm_driver driver
;
52 extern int intel_agp_enabled
;
54 #define INTEL_VGA_DEVICE(id, info) { \
55 .class = PCI_CLASS_DISPLAY_VGA << 8, \
56 .class_mask = 0xffff00, \
59 .subvendor = PCI_ANY_ID, \
60 .subdevice = PCI_ANY_ID, \
61 .driver_data = (unsigned long) info }
63 static const struct intel_device_info intel_i830_info
= {
64 .gen
= 2, .is_i8xx
= 1, .is_mobile
= 1, .cursor_needs_physical
= 1,
67 static const struct intel_device_info intel_845g_info
= {
68 .gen
= 2, .is_i8xx
= 1,
71 static const struct intel_device_info intel_i85x_info
= {
72 .gen
= 2, .is_i8xx
= 1, .is_i85x
= 1, .is_mobile
= 1,
73 .cursor_needs_physical
= 1,
76 static const struct intel_device_info intel_i865g_info
= {
77 .gen
= 2, .is_i8xx
= 1,
80 static const struct intel_device_info intel_i915g_info
= {
81 .gen
= 3, .is_i915g
= 1, .is_i9xx
= 1, .cursor_needs_physical
= 1,
83 static const struct intel_device_info intel_i915gm_info
= {
84 .gen
= 3, .is_i9xx
= 1, .is_mobile
= 1,
85 .cursor_needs_physical
= 1,
87 static const struct intel_device_info intel_i945g_info
= {
88 .gen
= 3, .is_i9xx
= 1, .has_hotplug
= 1, .cursor_needs_physical
= 1,
90 static const struct intel_device_info intel_i945gm_info
= {
91 .gen
= 3, .is_i945gm
= 1, .is_i9xx
= 1, .is_mobile
= 1,
92 .has_hotplug
= 1, .cursor_needs_physical
= 1,
95 static const struct intel_device_info intel_i965g_info
= {
96 .gen
= 4, .is_broadwater
= 1, .is_i965g
= 1, .is_i9xx
= 1,
100 static const struct intel_device_info intel_i965gm_info
= {
101 .gen
= 4, .is_crestline
= 1, .is_i965g
= 1, .is_i965gm
= 1, .is_i9xx
= 1,
102 .is_mobile
= 1, .has_fbc
= 1, .has_rc6
= 1, .has_hotplug
= 1,
105 static const struct intel_device_info intel_g33_info
= {
106 .gen
= 3, .is_g33
= 1, .is_i9xx
= 1,
107 .need_gfx_hws
= 1, .has_hotplug
= 1,
110 static const struct intel_device_info intel_g45_info
= {
111 .gen
= 4, .is_i965g
= 1, .is_g4x
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
112 .has_pipe_cxsr
= 1, .has_hotplug
= 1,
115 static const struct intel_device_info intel_gm45_info
= {
116 .gen
= 4, .is_i965g
= 1, .is_g4x
= 1, .is_i9xx
= 1,
117 .is_mobile
= 1, .need_gfx_hws
= 1, .has_fbc
= 1, .has_rc6
= 1,
118 .has_pipe_cxsr
= 1, .has_hotplug
= 1,
121 static const struct intel_device_info intel_pineview_info
= {
122 .gen
= 3, .is_g33
= 1, .is_pineview
= 1, .is_mobile
= 1, .is_i9xx
= 1,
123 .need_gfx_hws
= 1, .has_hotplug
= 1,
126 static const struct intel_device_info intel_ironlake_d_info
= {
127 .gen
= 5, .is_ironlake
= 1, .is_i965g
= 1, .is_i9xx
= 1,
128 .need_gfx_hws
= 1, .has_pipe_cxsr
= 1, .has_hotplug
= 1,
131 static const struct intel_device_info intel_ironlake_m_info
= {
132 .gen
= 5, .is_ironlake
= 1, .is_mobile
= 1, .is_i965g
= 1, .is_i9xx
= 1,
133 .need_gfx_hws
= 1, .has_fbc
= 1, .has_rc6
= 1, .has_hotplug
= 1,
136 static const struct intel_device_info intel_sandybridge_d_info
= {
137 .gen
= 6, .is_i965g
= 1, .is_i9xx
= 1,
138 .need_gfx_hws
= 1, .has_hotplug
= 1,
141 static const struct intel_device_info intel_sandybridge_m_info
= {
142 .gen
= 6, .is_i965g
= 1, .is_mobile
= 1, .is_i9xx
= 1,
143 .need_gfx_hws
= 1, .has_hotplug
= 1,
146 static const struct pci_device_id pciidlist
[] = { /* aka */
147 INTEL_VGA_DEVICE(0x3577, &intel_i830_info
), /* I830_M */
148 INTEL_VGA_DEVICE(0x2562, &intel_845g_info
), /* 845_G */
149 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info
), /* I855_GM */
150 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info
),
151 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info
), /* I865_G */
152 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info
), /* I915_G */
153 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info
), /* E7221_G */
154 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info
), /* I915_GM */
155 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info
), /* I945_G */
156 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info
), /* I945_GM */
157 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info
), /* I945_GME */
158 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info
), /* I946_GZ */
159 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info
), /* G35_G */
160 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info
), /* I965_Q */
161 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info
), /* I965_G */
162 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info
), /* Q35_G */
163 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info
), /* G33_G */
164 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info
), /* Q33_G */
165 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info
), /* I965_GM */
166 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info
), /* I965_GME */
167 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info
), /* GM45_G */
168 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info
), /* IGD_E_G */
169 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info
), /* Q45_G */
170 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info
), /* G45_G */
171 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info
), /* G41_G */
172 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info
), /* B43_G */
173 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info
),
174 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info
),
175 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info
),
176 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info
),
177 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info
),
178 INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info
),
179 INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info
),
183 #if defined(CONFIG_DRM_I915_KMS)
184 MODULE_DEVICE_TABLE(pci
, pciidlist
);
187 #define INTEL_PCH_DEVICE_ID_MASK 0xff00
188 #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
190 void intel_detect_pch (struct drm_device
*dev
)
192 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
196 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
197 * make graphics device passthrough work easy for VMM, that only
198 * need to expose ISA bridge to let driver know the real hardware
199 * underneath. This is a requirement from virtualization team.
201 pch
= pci_get_class(PCI_CLASS_BRIDGE_ISA
<< 8, NULL
);
203 if (pch
->vendor
== PCI_VENDOR_ID_INTEL
) {
205 id
= pch
->device
& INTEL_PCH_DEVICE_ID_MASK
;
207 if (id
== INTEL_PCH_CPT_DEVICE_ID_TYPE
) {
208 dev_priv
->pch_type
= PCH_CPT
;
209 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
216 static int i915_drm_freeze(struct drm_device
*dev
)
218 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
220 pci_save_state(dev
->pdev
);
222 /* If KMS is active, we do the leavevt stuff here */
223 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
224 int error
= i915_gem_idle(dev
);
226 dev_err(&dev
->pdev
->dev
,
227 "GEM idle failed, resume might fail\n");
230 drm_irq_uninstall(dev
);
233 i915_save_state(dev
);
235 intel_opregion_free(dev
, 1);
237 /* Modeset on resume, not lid events */
238 dev_priv
->modeset_on_lid
= 0;
243 int i915_suspend(struct drm_device
*dev
, pm_message_t state
)
247 if (!dev
|| !dev
->dev_private
) {
248 DRM_ERROR("dev: %p\n", dev
);
249 DRM_ERROR("DRM not initialized, aborting suspend.\n");
253 if (state
.event
== PM_EVENT_PRETHAW
)
256 error
= i915_drm_freeze(dev
);
260 if (state
.event
== PM_EVENT_SUSPEND
) {
261 /* Shut down the device */
262 pci_disable_device(dev
->pdev
);
263 pci_set_power_state(dev
->pdev
, PCI_D3hot
);
269 static int i915_drm_thaw(struct drm_device
*dev
)
271 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
274 i915_restore_state(dev
);
276 intel_opregion_init(dev
, 1);
278 /* KMS EnterVT equivalent */
279 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
280 mutex_lock(&dev
->struct_mutex
);
281 dev_priv
->mm
.suspended
= 0;
283 error
= i915_gem_init_ringbuffer(dev
);
284 mutex_unlock(&dev
->struct_mutex
);
286 drm_irq_install(dev
);
288 /* Resume the modeset for every activated CRTC */
289 drm_helper_resume_force_mode(dev
);
292 dev_priv
->modeset_on_lid
= 0;
297 int i915_resume(struct drm_device
*dev
)
299 if (pci_enable_device(dev
->pdev
))
302 pci_set_master(dev
->pdev
);
304 return i915_drm_thaw(dev
);
308 * i965_reset - reset chip after a hang
309 * @dev: drm device to reset
310 * @flags: reset domains
312 * Reset the chip. Useful if a hang is detected. Returns zero on successful
313 * reset or otherwise an error code.
315 * Procedure is fairly simple:
316 * - reset the chip using the reset reg
317 * - re-init context state
318 * - re-init hardware status page
319 * - re-init ring buffer
320 * - re-init interrupt state
323 int i965_reset(struct drm_device
*dev
, u8 flags
)
325 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
326 unsigned long timeout
;
329 * We really should only reset the display subsystem if we actually
332 bool need_display
= true;
334 mutex_lock(&dev
->struct_mutex
);
339 i915_gem_retire_requests(dev
);
342 i915_save_display(dev
);
344 if (IS_I965G(dev
) || IS_G4X(dev
)) {
346 * Set the domains we want to reset, then the reset bit (bit 0).
347 * Clear the reset bit after a while and wait for hardware status
348 * bit (bit 1) to be set
350 pci_read_config_byte(dev
->pdev
, GDRST
, &gdrst
);
351 pci_write_config_byte(dev
->pdev
, GDRST
, gdrst
| flags
| ((flags
== GDRST_FULL
) ? 0x1 : 0x0));
353 pci_write_config_byte(dev
->pdev
, GDRST
, gdrst
& 0xfe);
355 /* ...we don't want to loop forever though, 500ms should be plenty */
356 timeout
= jiffies
+ msecs_to_jiffies(500);
359 pci_read_config_byte(dev
->pdev
, GDRST
, &gdrst
);
360 } while ((gdrst
& 0x1) && time_after(timeout
, jiffies
));
363 WARN(true, "i915: Failed to reset chip\n");
364 mutex_unlock(&dev
->struct_mutex
);
368 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
369 mutex_unlock(&dev
->struct_mutex
);
373 /* Ok, now get things going again... */
376 * Everything depends on having the GTT running, so we need to start
377 * there. Fortunately we don't need to do this unless we reset the
378 * chip at a PCI level.
380 * Next we need to restore the context, but we don't use those
383 * Ring buffer needs to be re-initialized in the KMS case, or if X
384 * was running at the time of the reset (i.e. we weren't VT
387 if (drm_core_check_feature(dev
, DRIVER_MODESET
) ||
388 !dev_priv
->mm
.suspended
) {
389 struct intel_ring_buffer
*ring
= &dev_priv
->render_ring
;
390 dev_priv
->mm
.suspended
= 0;
391 ring
->init(dev
, ring
);
392 mutex_unlock(&dev
->struct_mutex
);
393 drm_irq_uninstall(dev
);
394 drm_irq_install(dev
);
395 mutex_lock(&dev
->struct_mutex
);
399 * Display needs restore too...
402 i915_restore_display(dev
);
404 mutex_unlock(&dev
->struct_mutex
);
410 i915_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
412 return drm_get_pci_dev(pdev
, ent
, &driver
);
416 i915_pci_remove(struct pci_dev
*pdev
)
418 struct drm_device
*dev
= pci_get_drvdata(pdev
);
423 static int i915_pm_suspend(struct device
*dev
)
425 struct pci_dev
*pdev
= to_pci_dev(dev
);
426 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
429 if (!drm_dev
|| !drm_dev
->dev_private
) {
430 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
434 error
= i915_drm_freeze(drm_dev
);
438 pci_disable_device(pdev
);
439 pci_set_power_state(pdev
, PCI_D3hot
);
444 static int i915_pm_resume(struct device
*dev
)
446 struct pci_dev
*pdev
= to_pci_dev(dev
);
447 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
449 return i915_resume(drm_dev
);
452 static int i915_pm_freeze(struct device
*dev
)
454 struct pci_dev
*pdev
= to_pci_dev(dev
);
455 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
457 if (!drm_dev
|| !drm_dev
->dev_private
) {
458 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
462 return i915_drm_freeze(drm_dev
);
465 static int i915_pm_thaw(struct device
*dev
)
467 struct pci_dev
*pdev
= to_pci_dev(dev
);
468 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
470 return i915_drm_thaw(drm_dev
);
473 static int i915_pm_poweroff(struct device
*dev
)
475 struct pci_dev
*pdev
= to_pci_dev(dev
);
476 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
478 return i915_drm_freeze(drm_dev
);
481 static const struct dev_pm_ops i915_pm_ops
= {
482 .suspend
= i915_pm_suspend
,
483 .resume
= i915_pm_resume
,
484 .freeze
= i915_pm_freeze
,
485 .thaw
= i915_pm_thaw
,
486 .poweroff
= i915_pm_poweroff
,
487 .restore
= i915_pm_resume
,
490 static struct vm_operations_struct i915_gem_vm_ops
= {
491 .fault
= i915_gem_fault
,
492 .open
= drm_gem_vm_open
,
493 .close
= drm_gem_vm_close
,
496 static struct drm_driver driver
= {
497 /* don't use mtrr's here, the Xserver or user space app should
498 * deal with them for intel hardware.
501 DRIVER_USE_AGP
| DRIVER_REQUIRE_AGP
| /* DRIVER_USE_MTRR |*/
502 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
,
503 .load
= i915_driver_load
,
504 .unload
= i915_driver_unload
,
505 .open
= i915_driver_open
,
506 .lastclose
= i915_driver_lastclose
,
507 .preclose
= i915_driver_preclose
,
508 .postclose
= i915_driver_postclose
,
510 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
511 .suspend
= i915_suspend
,
512 .resume
= i915_resume
,
514 .device_is_agp
= i915_driver_device_is_agp
,
515 .enable_vblank
= i915_enable_vblank
,
516 .disable_vblank
= i915_disable_vblank
,
517 .irq_preinstall
= i915_driver_irq_preinstall
,
518 .irq_postinstall
= i915_driver_irq_postinstall
,
519 .irq_uninstall
= i915_driver_irq_uninstall
,
520 .irq_handler
= i915_driver_irq_handler
,
521 .reclaim_buffers
= drm_core_reclaim_buffers
,
522 .get_map_ofs
= drm_core_get_map_ofs
,
523 .get_reg_ofs
= drm_core_get_reg_ofs
,
524 .master_create
= i915_master_create
,
525 .master_destroy
= i915_master_destroy
,
526 #if defined(CONFIG_DEBUG_FS)
527 .debugfs_init
= i915_debugfs_init
,
528 .debugfs_cleanup
= i915_debugfs_cleanup
,
530 .gem_init_object
= i915_gem_init_object
,
531 .gem_free_object
= i915_gem_free_object
,
532 .gem_vm_ops
= &i915_gem_vm_ops
,
533 .ioctls
= i915_ioctls
,
535 .owner
= THIS_MODULE
,
537 .release
= drm_release
,
538 .unlocked_ioctl
= drm_ioctl
,
539 .mmap
= drm_gem_mmap
,
541 .fasync
= drm_fasync
,
544 .compat_ioctl
= i915_compat_ioctl
,
550 .id_table
= pciidlist
,
551 .probe
= i915_pci_probe
,
552 .remove
= i915_pci_remove
,
553 .driver
.pm
= &i915_pm_ops
,
559 .major
= DRIVER_MAJOR
,
560 .minor
= DRIVER_MINOR
,
561 .patchlevel
= DRIVER_PATCHLEVEL
,
564 static int __init
i915_init(void)
566 if (!intel_agp_enabled
) {
567 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
571 driver
.num_ioctls
= i915_max_ioctl
;
573 i915_gem_shrinker_init();
576 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
577 * explicitly disabled with the module pararmeter.
579 * Otherwise, just follow the parameter (defaulting to off).
581 * Allow optional vga_text_mode_force boot option to override
582 * the default behavior.
584 #if defined(CONFIG_DRM_I915_KMS)
585 if (i915_modeset
!= 0)
586 driver
.driver_features
|= DRIVER_MODESET
;
588 if (i915_modeset
== 1)
589 driver
.driver_features
|= DRIVER_MODESET
;
591 #ifdef CONFIG_VGA_CONSOLE
592 if (vgacon_text_force() && i915_modeset
== -1)
593 driver
.driver_features
&= ~DRIVER_MODESET
;
596 if (!(driver
.driver_features
& DRIVER_MODESET
)) {
597 driver
.suspend
= i915_suspend
;
598 driver
.resume
= i915_resume
;
601 return drm_init(&driver
);
604 static void __exit
i915_exit(void)
606 i915_gem_shrinker_exit();
610 module_init(i915_init
);
611 module_exit(i915_exit
);
613 MODULE_AUTHOR(DRIVER_AUTHOR
);
614 MODULE_DESCRIPTION(DRIVER_DESC
);
615 MODULE_LICENSE("GPL and additional rights");