2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31"
51 * Transmit timeout, default 5 seconds.
53 static int watchdog
= 5000;
54 module_param(watchdog
, int, 0400);
55 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
57 /* DM9000 register address locking.
59 * The DM9000 uses an address register to control where data written
60 * to the data register goes. This means that the address register
61 * must be preserved over interrupts or similar calls.
63 * During interrupt and other critical calls, a spinlock is used to
64 * protect the system, but the calls themselves save the address
65 * in the address register in case they are interrupting another
66 * access to the device.
68 * For general accesses a lock is provided so that calls which are
69 * allowed to sleep are serialised so that the address register does
70 * not need to be saved. This lock also serves to serialise access
71 * to the EEPROM and PHY access registers which are shared between
75 /* The driver supports the original DM9000E, and now the two newer
76 * devices, DM9000A and DM9000B.
80 TYPE_DM9000E
, /* original DM9000 */
85 /* Structure/enum declaration ------------------------------- */
86 typedef struct board_info
{
88 void __iomem
*io_addr
; /* Register I/O base address */
89 void __iomem
*io_data
; /* Data I/O address */
96 u8 io_mode
; /* 0:word, 2:byte */
101 unsigned int in_suspend
:1;
104 enum dm9000_type type
;
106 void (*inblk
)(void __iomem
*port
, void *data
, int length
);
107 void (*outblk
)(void __iomem
*port
, void *data
, int length
);
108 void (*dumpblk
)(void __iomem
*port
, int length
);
110 struct device
*dev
; /* parent device */
112 struct resource
*addr_res
; /* resources found */
113 struct resource
*data_res
;
114 struct resource
*addr_req
; /* resources requested */
115 struct resource
*data_req
;
116 struct resource
*irq_res
;
118 struct mutex addr_lock
; /* phy and eeprom access lock */
120 struct delayed_work phy_poll
;
121 struct net_device
*ndev
;
125 struct mii_if_info mii
;
131 #define dm9000_dbg(db, lev, msg...) do { \
132 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
133 (lev) < db->debug_level) { \
134 dev_dbg(db->dev, msg); \
138 static inline board_info_t
*to_dm9000_board(struct net_device
*dev
)
143 /* DM9000 network board routine ---------------------------- */
146 dm9000_reset(board_info_t
* db
)
148 dev_dbg(db
->dev
, "resetting device\n");
151 writeb(DM9000_NCR
, db
->io_addr
);
153 writeb(NCR_RST
, db
->io_data
);
158 * Read a byte from I/O port
161 ior(board_info_t
* db
, int reg
)
163 writeb(reg
, db
->io_addr
);
164 return readb(db
->io_data
);
168 * Write a byte to I/O port
172 iow(board_info_t
* db
, int reg
, int value
)
174 writeb(reg
, db
->io_addr
);
175 writeb(value
, db
->io_data
);
178 /* routines for sending block to chip */
180 static void dm9000_outblk_8bit(void __iomem
*reg
, void *data
, int count
)
182 writesb(reg
, data
, count
);
185 static void dm9000_outblk_16bit(void __iomem
*reg
, void *data
, int count
)
187 writesw(reg
, data
, (count
+1) >> 1);
190 static void dm9000_outblk_32bit(void __iomem
*reg
, void *data
, int count
)
192 writesl(reg
, data
, (count
+3) >> 2);
195 /* input block from chip to memory */
197 static void dm9000_inblk_8bit(void __iomem
*reg
, void *data
, int count
)
199 readsb(reg
, data
, count
);
203 static void dm9000_inblk_16bit(void __iomem
*reg
, void *data
, int count
)
205 readsw(reg
, data
, (count
+1) >> 1);
208 static void dm9000_inblk_32bit(void __iomem
*reg
, void *data
, int count
)
210 readsl(reg
, data
, (count
+3) >> 2);
213 /* dump block from chip to null */
215 static void dm9000_dumpblk_8bit(void __iomem
*reg
, int count
)
220 for (i
= 0; i
< count
; i
++)
224 static void dm9000_dumpblk_16bit(void __iomem
*reg
, int count
)
229 count
= (count
+ 1) >> 1;
231 for (i
= 0; i
< count
; i
++)
235 static void dm9000_dumpblk_32bit(void __iomem
*reg
, int count
)
240 count
= (count
+ 3) >> 2;
242 for (i
= 0; i
< count
; i
++)
248 * select the specified set of io routines to use with the
252 static void dm9000_set_io(struct board_info
*db
, int byte_width
)
254 /* use the size of the data resource to work out what IO
255 * routines we want to use
258 switch (byte_width
) {
260 db
->dumpblk
= dm9000_dumpblk_8bit
;
261 db
->outblk
= dm9000_outblk_8bit
;
262 db
->inblk
= dm9000_inblk_8bit
;
267 dev_dbg(db
->dev
, ": 3 byte IO, falling back to 16bit\n");
269 db
->dumpblk
= dm9000_dumpblk_16bit
;
270 db
->outblk
= dm9000_outblk_16bit
;
271 db
->inblk
= dm9000_inblk_16bit
;
276 db
->dumpblk
= dm9000_dumpblk_32bit
;
277 db
->outblk
= dm9000_outblk_32bit
;
278 db
->inblk
= dm9000_inblk_32bit
;
283 static void dm9000_schedule_poll(board_info_t
*db
)
285 if (db
->type
== TYPE_DM9000E
)
286 schedule_delayed_work(&db
->phy_poll
, HZ
* 2);
289 static int dm9000_ioctl(struct net_device
*dev
, struct ifreq
*req
, int cmd
)
291 board_info_t
*dm
= to_dm9000_board(dev
);
293 if (!netif_running(dev
))
296 return generic_mii_ioctl(&dm
->mii
, if_mii(req
), cmd
, NULL
);
300 dm9000_read_locked(board_info_t
*db
, int reg
)
305 spin_lock_irqsave(&db
->lock
, flags
);
307 spin_unlock_irqrestore(&db
->lock
, flags
);
312 static int dm9000_wait_eeprom(board_info_t
*db
)
315 int timeout
= 8; /* wait max 8msec */
317 /* The DM9000 data sheets say we should be able to
318 * poll the ERRE bit in EPCR to wait for the EEPROM
319 * operation. From testing several chips, this bit
320 * does not seem to work.
322 * We attempt to use the bit, but fall back to the
323 * timeout (which is why we do not return an error
324 * on expiry) to say that the EEPROM operation has
329 status
= dm9000_read_locked(db
, DM9000_EPCR
);
331 if ((status
& EPCR_ERRE
) == 0)
337 dev_dbg(db
->dev
, "timeout waiting EEPROM\n");
346 * Read a word data from EEPROM
349 dm9000_read_eeprom(board_info_t
*db
, int offset
, u8
*to
)
353 if (db
->flags
& DM9000_PLATF_NO_EEPROM
) {
359 mutex_lock(&db
->addr_lock
);
361 spin_lock_irqsave(&db
->lock
, flags
);
363 iow(db
, DM9000_EPAR
, offset
);
364 iow(db
, DM9000_EPCR
, EPCR_ERPRR
);
366 spin_unlock_irqrestore(&db
->lock
, flags
);
368 dm9000_wait_eeprom(db
);
370 /* delay for at-least 150uS */
373 spin_lock_irqsave(&db
->lock
, flags
);
375 iow(db
, DM9000_EPCR
, 0x0);
377 to
[0] = ior(db
, DM9000_EPDRL
);
378 to
[1] = ior(db
, DM9000_EPDRH
);
380 spin_unlock_irqrestore(&db
->lock
, flags
);
382 mutex_unlock(&db
->addr_lock
);
386 * Write a word data to SROM
389 dm9000_write_eeprom(board_info_t
*db
, int offset
, u8
*data
)
393 if (db
->flags
& DM9000_PLATF_NO_EEPROM
)
396 mutex_lock(&db
->addr_lock
);
398 spin_lock_irqsave(&db
->lock
, flags
);
399 iow(db
, DM9000_EPAR
, offset
);
400 iow(db
, DM9000_EPDRH
, data
[1]);
401 iow(db
, DM9000_EPDRL
, data
[0]);
402 iow(db
, DM9000_EPCR
, EPCR_WEP
| EPCR_ERPRW
);
403 spin_unlock_irqrestore(&db
->lock
, flags
);
405 dm9000_wait_eeprom(db
);
407 mdelay(1); /* wait at least 150uS to clear */
409 spin_lock_irqsave(&db
->lock
, flags
);
410 iow(db
, DM9000_EPCR
, 0);
411 spin_unlock_irqrestore(&db
->lock
, flags
);
413 mutex_unlock(&db
->addr_lock
);
418 static void dm9000_get_drvinfo(struct net_device
*dev
,
419 struct ethtool_drvinfo
*info
)
421 board_info_t
*dm
= to_dm9000_board(dev
);
423 strcpy(info
->driver
, CARDNAME
);
424 strcpy(info
->version
, DRV_VERSION
);
425 strcpy(info
->bus_info
, to_platform_device(dm
->dev
)->name
);
428 static u32
dm9000_get_msglevel(struct net_device
*dev
)
430 board_info_t
*dm
= to_dm9000_board(dev
);
432 return dm
->msg_enable
;
435 static void dm9000_set_msglevel(struct net_device
*dev
, u32 value
)
437 board_info_t
*dm
= to_dm9000_board(dev
);
439 dm
->msg_enable
= value
;
442 static int dm9000_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
444 board_info_t
*dm
= to_dm9000_board(dev
);
446 mii_ethtool_gset(&dm
->mii
, cmd
);
450 static int dm9000_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
452 board_info_t
*dm
= to_dm9000_board(dev
);
454 return mii_ethtool_sset(&dm
->mii
, cmd
);
457 static int dm9000_nway_reset(struct net_device
*dev
)
459 board_info_t
*dm
= to_dm9000_board(dev
);
460 return mii_nway_restart(&dm
->mii
);
463 static u32
dm9000_get_link(struct net_device
*dev
)
465 board_info_t
*dm
= to_dm9000_board(dev
);
468 if (dm
->flags
& DM9000_PLATF_EXT_PHY
)
469 ret
= mii_link_ok(&dm
->mii
);
471 ret
= dm9000_read_locked(dm
, DM9000_NSR
) & NSR_LINKST
? 1 : 0;
476 #define DM_EEPROM_MAGIC (0x444D394B)
478 static int dm9000_get_eeprom_len(struct net_device
*dev
)
483 static int dm9000_get_eeprom(struct net_device
*dev
,
484 struct ethtool_eeprom
*ee
, u8
*data
)
486 board_info_t
*dm
= to_dm9000_board(dev
);
487 int offset
= ee
->offset
;
491 /* EEPROM access is aligned to two bytes */
493 if ((len
& 1) != 0 || (offset
& 1) != 0)
496 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
499 ee
->magic
= DM_EEPROM_MAGIC
;
501 for (i
= 0; i
< len
; i
+= 2)
502 dm9000_read_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
507 static int dm9000_set_eeprom(struct net_device
*dev
,
508 struct ethtool_eeprom
*ee
, u8
*data
)
510 board_info_t
*dm
= to_dm9000_board(dev
);
511 int offset
= ee
->offset
;
515 /* EEPROM access is aligned to two bytes */
517 if ((len
& 1) != 0 || (offset
& 1) != 0)
520 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
523 if (ee
->magic
!= DM_EEPROM_MAGIC
)
526 for (i
= 0; i
< len
; i
+= 2)
527 dm9000_write_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
532 static const struct ethtool_ops dm9000_ethtool_ops
= {
533 .get_drvinfo
= dm9000_get_drvinfo
,
534 .get_settings
= dm9000_get_settings
,
535 .set_settings
= dm9000_set_settings
,
536 .get_msglevel
= dm9000_get_msglevel
,
537 .set_msglevel
= dm9000_set_msglevel
,
538 .nway_reset
= dm9000_nway_reset
,
539 .get_link
= dm9000_get_link
,
540 .get_eeprom_len
= dm9000_get_eeprom_len
,
541 .get_eeprom
= dm9000_get_eeprom
,
542 .set_eeprom
= dm9000_set_eeprom
,
545 static void dm9000_show_carrier(board_info_t
*db
,
546 unsigned carrier
, unsigned nsr
)
548 struct net_device
*ndev
= db
->ndev
;
549 unsigned ncr
= dm9000_read_locked(db
, DM9000_NCR
);
552 dev_info(db
->dev
, "%s: link up, %dMbps, %s-duplex, no LPA\n",
553 ndev
->name
, (nsr
& NSR_SPEED
) ? 10 : 100,
554 (ncr
& NCR_FDX
) ? "full" : "half");
556 dev_info(db
->dev
, "%s: link down\n", ndev
->name
);
560 dm9000_poll_work(struct work_struct
*w
)
562 struct delayed_work
*dw
= container_of(w
, struct delayed_work
, work
);
563 board_info_t
*db
= container_of(dw
, board_info_t
, phy_poll
);
564 struct net_device
*ndev
= db
->ndev
;
566 if (db
->flags
& DM9000_PLATF_SIMPLE_PHY
&&
567 !(db
->flags
& DM9000_PLATF_EXT_PHY
)) {
568 unsigned nsr
= dm9000_read_locked(db
, DM9000_NSR
);
569 unsigned old_carrier
= netif_carrier_ok(ndev
) ? 1 : 0;
570 unsigned new_carrier
;
572 new_carrier
= (nsr
& NSR_LINKST
) ? 1 : 0;
574 if (old_carrier
!= new_carrier
) {
575 if (netif_msg_link(db
))
576 dm9000_show_carrier(db
, new_carrier
, nsr
);
579 netif_carrier_off(ndev
);
581 netif_carrier_on(ndev
);
584 mii_check_media(&db
->mii
, netif_msg_link(db
), 0);
586 if (netif_running(ndev
))
587 dm9000_schedule_poll(db
);
590 /* dm9000_release_board
592 * release a board, and any mapped resources
596 dm9000_release_board(struct platform_device
*pdev
, struct board_info
*db
)
598 /* unmap our resources */
600 iounmap(db
->io_addr
);
601 iounmap(db
->io_data
);
603 /* release the resources */
605 release_resource(db
->data_req
);
608 release_resource(db
->addr_req
);
612 static unsigned char dm9000_type_to_char(enum dm9000_type type
)
615 case TYPE_DM9000E
: return 'e';
616 case TYPE_DM9000A
: return 'a';
617 case TYPE_DM9000B
: return 'b';
624 * Set DM9000 multicast address
627 dm9000_hash_table(struct net_device
*dev
)
629 board_info_t
*db
= (board_info_t
*) dev
->priv
;
630 struct dev_mc_list
*mcptr
= dev
->mc_list
;
631 int mc_cnt
= dev
->mc_count
;
635 u8 rcr
= RCR_DIS_LONG
| RCR_DIS_CRC
| RCR_RXEN
;
638 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
640 spin_lock_irqsave(&db
->lock
, flags
);
642 for (i
= 0, oft
= DM9000_PAR
; i
< 6; i
++, oft
++)
643 iow(db
, oft
, dev
->dev_addr
[i
]);
645 /* Clear Hash Table */
646 for (i
= 0; i
< 4; i
++)
649 /* broadcast address */
650 hash_table
[3] = 0x8000;
652 if (dev
->flags
& IFF_PROMISC
)
655 if (dev
->flags
& IFF_ALLMULTI
)
658 /* the multicast address in Hash Table : 64 bits */
659 for (i
= 0; i
< mc_cnt
; i
++, mcptr
= mcptr
->next
) {
660 hash_val
= ether_crc_le(6, mcptr
->dmi_addr
) & 0x3f;
661 hash_table
[hash_val
/ 16] |= (u16
) 1 << (hash_val
% 16);
664 /* Write the hash table to MAC MD table */
665 for (i
= 0, oft
= DM9000_MAR
; i
< 4; i
++) {
666 iow(db
, oft
++, hash_table
[i
]);
667 iow(db
, oft
++, hash_table
[i
] >> 8);
670 iow(db
, DM9000_RCR
, rcr
);
671 spin_unlock_irqrestore(&db
->lock
, flags
);
675 * Initilize dm9000 board
678 dm9000_init_dm9000(struct net_device
*dev
)
680 board_info_t
*db
= dev
->priv
;
683 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
686 db
->io_mode
= ior(db
, DM9000_ISR
) >> 6; /* ISR bit7:6 keeps I/O mode */
688 /* GPIO0 on pre-activate PHY */
689 iow(db
, DM9000_GPR
, 0); /* REG_1F bit0 activate phyxcer */
690 iow(db
, DM9000_GPCR
, GPCR_GEP_CNTL
); /* Let GPIO0 output */
691 iow(db
, DM9000_GPR
, 0); /* Enable PHY */
693 if (db
->flags
& DM9000_PLATF_EXT_PHY
)
694 iow(db
, DM9000_NCR
, NCR_EXT_PHY
);
696 /* Program operating register */
697 iow(db
, DM9000_TCR
, 0); /* TX Polling clear */
698 iow(db
, DM9000_BPTR
, 0x3f); /* Less 3Kb, 200us */
699 iow(db
, DM9000_FCR
, 0xff); /* Flow Control */
700 iow(db
, DM9000_SMCR
, 0); /* Special Mode */
701 /* clear TX status */
702 iow(db
, DM9000_NSR
, NSR_WAKEST
| NSR_TX2END
| NSR_TX1END
);
703 iow(db
, DM9000_ISR
, ISR_CLR_STATUS
); /* Clear interrupt status */
705 /* Set address filter table */
706 dm9000_hash_table(dev
);
708 imr
= IMR_PAR
| IMR_PTM
| IMR_PRM
;
709 if (db
->type
!= TYPE_DM9000E
)
714 /* Enable TX/RX interrupt mask */
715 iow(db
, DM9000_IMR
, imr
);
717 /* Init Driver variable */
719 db
->queue_pkt_len
= 0;
720 dev
->trans_start
= 0;
723 /* Our watchdog timed out. Called by the networking layer */
724 static void dm9000_timeout(struct net_device
*dev
)
726 board_info_t
*db
= (board_info_t
*) dev
->priv
;
730 /* Save previous register address */
731 reg_save
= readb(db
->io_addr
);
732 spin_lock_irqsave(&db
->lock
, flags
);
734 netif_stop_queue(dev
);
736 dm9000_init_dm9000(dev
);
737 /* We can accept TX packets again */
738 dev
->trans_start
= jiffies
;
739 netif_wake_queue(dev
);
741 /* Restore previous register address */
742 writeb(reg_save
, db
->io_addr
);
743 spin_unlock_irqrestore(&db
->lock
, flags
);
747 * Hardware start transmission.
748 * Send a packet to media from the upper layer.
751 dm9000_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
754 board_info_t
*db
= dev
->priv
;
756 dm9000_dbg(db
, 3, "%s:\n", __func__
);
758 if (db
->tx_pkt_cnt
> 1)
761 spin_lock_irqsave(&db
->lock
, flags
);
763 /* Move data to DM9000 TX RAM */
764 writeb(DM9000_MWCMD
, db
->io_addr
);
766 (db
->outblk
)(db
->io_data
, skb
->data
, skb
->len
);
767 dev
->stats
.tx_bytes
+= skb
->len
;
770 /* TX control: First packet immediately send, second packet queue */
771 if (db
->tx_pkt_cnt
== 1) {
772 /* Set TX length to DM9000 */
773 iow(db
, DM9000_TXPLL
, skb
->len
);
774 iow(db
, DM9000_TXPLH
, skb
->len
>> 8);
776 /* Issue TX polling command */
777 iow(db
, DM9000_TCR
, TCR_TXREQ
); /* Cleared after TX complete */
779 dev
->trans_start
= jiffies
; /* save the time stamp */
782 db
->queue_pkt_len
= skb
->len
;
783 netif_stop_queue(dev
);
786 spin_unlock_irqrestore(&db
->lock
, flags
);
795 * DM9000 interrupt handler
796 * receive the packet to upper layer, free the transmitted packet
799 static void dm9000_tx_done(struct net_device
*dev
, board_info_t
*db
)
801 int tx_status
= ior(db
, DM9000_NSR
); /* Got TX status */
803 if (tx_status
& (NSR_TX2END
| NSR_TX1END
)) {
804 /* One packet sent complete */
806 dev
->stats
.tx_packets
++;
808 if (netif_msg_tx_done(db
))
809 dev_dbg(db
->dev
, "tx done, NSR %02x\n", tx_status
);
811 /* Queue packet check & send */
812 if (db
->tx_pkt_cnt
> 0) {
813 iow(db
, DM9000_TXPLL
, db
->queue_pkt_len
);
814 iow(db
, DM9000_TXPLH
, db
->queue_pkt_len
>> 8);
815 iow(db
, DM9000_TCR
, TCR_TXREQ
);
816 dev
->trans_start
= jiffies
;
818 netif_wake_queue(dev
);
822 struct dm9000_rxhdr
{
826 } __attribute__((__packed__
));
829 * Received a packet and pass to upper layer
832 dm9000_rx(struct net_device
*dev
)
834 board_info_t
*db
= (board_info_t
*) dev
->priv
;
835 struct dm9000_rxhdr rxhdr
;
841 /* Check packet ready or not */
843 ior(db
, DM9000_MRCMDX
); /* Dummy read */
845 /* Get most updated data */
846 rxbyte
= readb(db
->io_data
);
848 /* Status check: this byte must be 0 or 1 */
849 if (rxbyte
> DM9000_PKT_RDY
) {
850 dev_warn(db
->dev
, "status check fail: %d\n", rxbyte
);
851 iow(db
, DM9000_RCR
, 0x00); /* Stop Device */
852 iow(db
, DM9000_ISR
, IMR_PAR
); /* Stop INT request */
856 if (rxbyte
!= DM9000_PKT_RDY
)
859 /* A packet ready now & Get status/length */
861 writeb(DM9000_MRCMD
, db
->io_addr
);
863 (db
->inblk
)(db
->io_data
, &rxhdr
, sizeof(rxhdr
));
865 RxLen
= le16_to_cpu(rxhdr
.RxLen
);
867 if (netif_msg_rx_status(db
))
868 dev_dbg(db
->dev
, "RX: status %02x, length %04x\n",
869 rxhdr
.RxStatus
, RxLen
);
871 /* Packet Status check */
874 if (netif_msg_rx_err(db
))
875 dev_dbg(db
->dev
, "RX: Bad Packet (runt)\n");
878 if (RxLen
> DM9000_PKT_MAX
) {
879 dev_dbg(db
->dev
, "RST: RX Len:%x\n", RxLen
);
882 /* rxhdr.RxStatus is identical to RSR register. */
883 if (rxhdr
.RxStatus
& (RSR_FOE
| RSR_CE
| RSR_AE
|
887 if (rxhdr
.RxStatus
& RSR_FOE
) {
888 if (netif_msg_rx_err(db
))
889 dev_dbg(db
->dev
, "fifo error\n");
890 dev
->stats
.rx_fifo_errors
++;
892 if (rxhdr
.RxStatus
& RSR_CE
) {
893 if (netif_msg_rx_err(db
))
894 dev_dbg(db
->dev
, "crc error\n");
895 dev
->stats
.rx_crc_errors
++;
897 if (rxhdr
.RxStatus
& RSR_RF
) {
898 if (netif_msg_rx_err(db
))
899 dev_dbg(db
->dev
, "length error\n");
900 dev
->stats
.rx_length_errors
++;
904 /* Move data from DM9000 */
906 && ((skb
= dev_alloc_skb(RxLen
+ 4)) != NULL
)) {
908 rdptr
= (u8
*) skb_put(skb
, RxLen
- 4);
910 /* Read received packet from RX SRAM */
912 (db
->inblk
)(db
->io_data
, rdptr
, RxLen
);
913 dev
->stats
.rx_bytes
+= RxLen
;
915 /* Pass to upper layer */
916 skb
->protocol
= eth_type_trans(skb
, dev
);
918 dev
->stats
.rx_packets
++;
921 /* need to dump the packet's data */
923 (db
->dumpblk
)(db
->io_data
, RxLen
);
925 } while (rxbyte
== DM9000_PKT_RDY
);
928 static irqreturn_t
dm9000_interrupt(int irq
, void *dev_id
)
930 struct net_device
*dev
= dev_id
;
931 board_info_t
*db
= dev
->priv
;
935 dm9000_dbg(db
, 3, "entering %s\n", __func__
);
937 /* A real interrupt coming */
939 spin_lock(&db
->lock
);
941 /* Save previous register address */
942 reg_save
= readb(db
->io_addr
);
944 /* Disable all interrupts */
945 iow(db
, DM9000_IMR
, IMR_PAR
);
947 /* Got DM9000 interrupt status */
948 int_status
= ior(db
, DM9000_ISR
); /* Got ISR */
949 iow(db
, DM9000_ISR
, int_status
); /* Clear ISR status */
951 if (netif_msg_intr(db
))
952 dev_dbg(db
->dev
, "interrupt status %02x\n", int_status
);
954 /* Received the coming packet */
955 if (int_status
& ISR_PRS
)
958 /* Trnasmit Interrupt check */
959 if (int_status
& ISR_PTS
)
960 dm9000_tx_done(dev
, db
);
962 if (db
->type
!= TYPE_DM9000E
) {
963 if (int_status
& ISR_LNKCHNG
) {
964 /* fire a link-change request */
965 schedule_delayed_work(&db
->phy_poll
, 1);
969 /* Re-enable interrupt mask */
970 iow(db
, DM9000_IMR
, db
->imr_all
);
972 /* Restore previous register address */
973 writeb(reg_save
, db
->io_addr
);
975 spin_unlock(&db
->lock
);
980 #ifdef CONFIG_NET_POLL_CONTROLLER
984 static void dm9000_poll_controller(struct net_device
*dev
)
986 disable_irq(dev
->irq
);
987 dm9000_interrupt(dev
->irq
, dev
);
988 enable_irq(dev
->irq
);
993 * Open the interface.
994 * The interface is opened whenever "ifconfig" actives it.
997 dm9000_open(struct net_device
*dev
)
999 board_info_t
*db
= dev
->priv
;
1000 unsigned long irqflags
= db
->irq_res
->flags
& IRQF_TRIGGER_MASK
;
1002 if (netif_msg_ifup(db
))
1003 dev_dbg(db
->dev
, "enabling %s\n", dev
->name
);
1005 /* If there is no IRQ type specified, default to something that
1006 * may work, and tell the user that this is a problem */
1008 if (irqflags
== IRQF_TRIGGER_NONE
)
1009 dev_warn(db
->dev
, "WARNING: no IRQ resource flags set.\n");
1011 irqflags
|= IRQF_SHARED
;
1013 if (request_irq(dev
->irq
, &dm9000_interrupt
, irqflags
, dev
->name
, dev
))
1016 /* Initialize DM9000 board */
1018 dm9000_init_dm9000(dev
);
1020 /* Init driver variable */
1023 mii_check_media(&db
->mii
, netif_msg_link(db
), 1);
1024 netif_start_queue(dev
);
1026 dm9000_schedule_poll(db
);
1032 * Sleep, either by using msleep() or if we are suspending, then
1033 * use mdelay() to sleep.
1035 static void dm9000_msleep(board_info_t
*db
, unsigned int ms
)
1044 * Read a word from phyxcer
1047 dm9000_phy_read(struct net_device
*dev
, int phy_reg_unused
, int reg
)
1049 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1050 unsigned long flags
;
1051 unsigned int reg_save
;
1054 mutex_lock(&db
->addr_lock
);
1056 spin_lock_irqsave(&db
->lock
,flags
);
1058 /* Save previous register address */
1059 reg_save
= readb(db
->io_addr
);
1061 /* Fill the phyxcer register into REG_0C */
1062 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1064 iow(db
, DM9000_EPCR
, EPCR_ERPRR
| EPCR_EPOS
); /* Issue phyxcer read command */
1066 writeb(reg_save
, db
->io_addr
);
1067 spin_unlock_irqrestore(&db
->lock
,flags
);
1069 dm9000_msleep(db
, 1); /* Wait read complete */
1071 spin_lock_irqsave(&db
->lock
,flags
);
1072 reg_save
= readb(db
->io_addr
);
1074 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer read command */
1076 /* The read data keeps on REG_0D & REG_0E */
1077 ret
= (ior(db
, DM9000_EPDRH
) << 8) | ior(db
, DM9000_EPDRL
);
1079 /* restore the previous address */
1080 writeb(reg_save
, db
->io_addr
);
1081 spin_unlock_irqrestore(&db
->lock
,flags
);
1083 mutex_unlock(&db
->addr_lock
);
1085 dm9000_dbg(db
, 5, "phy_read[%02x] -> %04x\n", reg
, ret
);
1090 * Write a word to phyxcer
1093 dm9000_phy_write(struct net_device
*dev
,
1094 int phyaddr_unused
, int reg
, int value
)
1096 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1097 unsigned long flags
;
1098 unsigned long reg_save
;
1100 dm9000_dbg(db
, 5, "phy_write[%02x] = %04x\n", reg
, value
);
1101 mutex_lock(&db
->addr_lock
);
1103 spin_lock_irqsave(&db
->lock
,flags
);
1105 /* Save previous register address */
1106 reg_save
= readb(db
->io_addr
);
1108 /* Fill the phyxcer register into REG_0C */
1109 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1111 /* Fill the written data into REG_0D & REG_0E */
1112 iow(db
, DM9000_EPDRL
, value
);
1113 iow(db
, DM9000_EPDRH
, value
>> 8);
1115 iow(db
, DM9000_EPCR
, EPCR_EPOS
| EPCR_ERPRW
); /* Issue phyxcer write command */
1117 writeb(reg_save
, db
->io_addr
);
1118 spin_unlock_irqrestore(&db
->lock
, flags
);
1120 dm9000_msleep(db
, 1); /* Wait write complete */
1122 spin_lock_irqsave(&db
->lock
,flags
);
1123 reg_save
= readb(db
->io_addr
);
1125 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer write command */
1127 /* restore the previous address */
1128 writeb(reg_save
, db
->io_addr
);
1130 spin_unlock_irqrestore(&db
->lock
, flags
);
1131 mutex_unlock(&db
->addr_lock
);
1135 dm9000_shutdown(struct net_device
*dev
)
1137 board_info_t
*db
= dev
->priv
;
1140 dm9000_phy_write(dev
, 0, MII_BMCR
, BMCR_RESET
); /* PHY RESET */
1141 iow(db
, DM9000_GPR
, 0x01); /* Power-Down PHY */
1142 iow(db
, DM9000_IMR
, IMR_PAR
); /* Disable all interrupt */
1143 iow(db
, DM9000_RCR
, 0x00); /* Disable RX */
1147 * Stop the interface.
1148 * The interface is stopped when it is brought.
1151 dm9000_stop(struct net_device
*ndev
)
1153 board_info_t
*db
= ndev
->priv
;
1155 if (netif_msg_ifdown(db
))
1156 dev_dbg(db
->dev
, "shutting down %s\n", ndev
->name
);
1158 cancel_delayed_work_sync(&db
->phy_poll
);
1160 netif_stop_queue(ndev
);
1161 netif_carrier_off(ndev
);
1163 /* free interrupt */
1164 free_irq(ndev
->irq
, ndev
);
1166 dm9000_shutdown(ndev
);
1171 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
1174 * Search DM9000 board, allocate space and register it
1176 static int __devinit
1177 dm9000_probe(struct platform_device
*pdev
)
1179 struct dm9000_plat_data
*pdata
= pdev
->dev
.platform_data
;
1180 struct board_info
*db
; /* Point a board information structure */
1181 struct net_device
*ndev
;
1182 const unsigned char *mac_src
;
1188 /* Init network device */
1189 ndev
= alloc_etherdev(sizeof(struct board_info
));
1191 dev_err(&pdev
->dev
, "could not allocate device.\n");
1195 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1197 dev_dbg(&pdev
->dev
, "dm9000_probe()\n");
1199 /* setup board info structure */
1201 memset(db
, 0, sizeof(*db
));
1203 db
->dev
= &pdev
->dev
;
1206 spin_lock_init(&db
->lock
);
1207 mutex_init(&db
->addr_lock
);
1209 INIT_DELAYED_WORK(&db
->phy_poll
, dm9000_poll_work
);
1211 db
->addr_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1212 db
->data_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1213 db
->irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1215 if (db
->addr_res
== NULL
|| db
->data_res
== NULL
||
1216 db
->irq_res
== NULL
) {
1217 dev_err(db
->dev
, "insufficient resources\n");
1222 iosize
= res_size(db
->addr_res
);
1223 db
->addr_req
= request_mem_region(db
->addr_res
->start
, iosize
,
1226 if (db
->addr_req
== NULL
) {
1227 dev_err(db
->dev
, "cannot claim address reg area\n");
1232 db
->io_addr
= ioremap(db
->addr_res
->start
, iosize
);
1234 if (db
->io_addr
== NULL
) {
1235 dev_err(db
->dev
, "failed to ioremap address reg\n");
1240 iosize
= res_size(db
->data_res
);
1241 db
->data_req
= request_mem_region(db
->data_res
->start
, iosize
,
1244 if (db
->data_req
== NULL
) {
1245 dev_err(db
->dev
, "cannot claim data reg area\n");
1250 db
->io_data
= ioremap(db
->data_res
->start
, iosize
);
1252 if (db
->io_data
== NULL
) {
1253 dev_err(db
->dev
, "failed to ioremap data reg\n");
1258 /* fill in parameters for net-dev structure */
1259 ndev
->base_addr
= (unsigned long)db
->io_addr
;
1260 ndev
->irq
= db
->irq_res
->start
;
1262 /* ensure at least we have a default set of IO routines */
1263 dm9000_set_io(db
, iosize
);
1265 /* check to see if anything is being over-ridden */
1266 if (pdata
!= NULL
) {
1267 /* check to see if the driver wants to over-ride the
1268 * default IO width */
1270 if (pdata
->flags
& DM9000_PLATF_8BITONLY
)
1271 dm9000_set_io(db
, 1);
1273 if (pdata
->flags
& DM9000_PLATF_16BITONLY
)
1274 dm9000_set_io(db
, 2);
1276 if (pdata
->flags
& DM9000_PLATF_32BITONLY
)
1277 dm9000_set_io(db
, 4);
1279 /* check to see if there are any IO routine
1282 if (pdata
->inblk
!= NULL
)
1283 db
->inblk
= pdata
->inblk
;
1285 if (pdata
->outblk
!= NULL
)
1286 db
->outblk
= pdata
->outblk
;
1288 if (pdata
->dumpblk
!= NULL
)
1289 db
->dumpblk
= pdata
->dumpblk
;
1291 db
->flags
= pdata
->flags
;
1294 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1295 db
->flags
|= DM9000_PLATF_SIMPLE_PHY
;
1300 /* try multiple times, DM9000 sometimes gets the read wrong */
1301 for (i
= 0; i
< 8; i
++) {
1302 id_val
= ior(db
, DM9000_VIDL
);
1303 id_val
|= (u32
)ior(db
, DM9000_VIDH
) << 8;
1304 id_val
|= (u32
)ior(db
, DM9000_PIDL
) << 16;
1305 id_val
|= (u32
)ior(db
, DM9000_PIDH
) << 24;
1307 if (id_val
== DM9000_ID
)
1309 dev_err(db
->dev
, "read wrong id 0x%08x\n", id_val
);
1312 if (id_val
!= DM9000_ID
) {
1313 dev_err(db
->dev
, "wrong id: 0x%08x\n", id_val
);
1318 /* Identify what type of DM9000 we are working on */
1320 id_val
= ior(db
, DM9000_CHIPR
);
1321 dev_dbg(db
->dev
, "dm9000 revision 0x%02x\n", id_val
);
1325 db
->type
= TYPE_DM9000A
;
1328 db
->type
= TYPE_DM9000B
;
1331 dev_dbg(db
->dev
, "ID %02x => defaulting to DM9000E\n", id_val
);
1332 db
->type
= TYPE_DM9000E
;
1335 /* from this point we assume that we have found a DM9000 */
1337 /* driver system function */
1340 ndev
->open
= &dm9000_open
;
1341 ndev
->hard_start_xmit
= &dm9000_start_xmit
;
1342 ndev
->tx_timeout
= &dm9000_timeout
;
1343 ndev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1344 ndev
->stop
= &dm9000_stop
;
1345 ndev
->set_multicast_list
= &dm9000_hash_table
;
1346 ndev
->ethtool_ops
= &dm9000_ethtool_ops
;
1347 ndev
->do_ioctl
= &dm9000_ioctl
;
1349 #ifdef CONFIG_NET_POLL_CONTROLLER
1350 ndev
->poll_controller
= &dm9000_poll_controller
;
1353 db
->msg_enable
= NETIF_MSG_LINK
;
1354 db
->mii
.phy_id_mask
= 0x1f;
1355 db
->mii
.reg_num_mask
= 0x1f;
1356 db
->mii
.force_media
= 0;
1357 db
->mii
.full_duplex
= 0;
1359 db
->mii
.mdio_read
= dm9000_phy_read
;
1360 db
->mii
.mdio_write
= dm9000_phy_write
;
1364 /* try reading the node address from the attached EEPROM */
1365 for (i
= 0; i
< 6; i
+= 2)
1366 dm9000_read_eeprom(db
, i
/ 2, ndev
->dev_addr
+i
);
1368 if (!is_valid_ether_addr(ndev
->dev_addr
) && pdata
!= NULL
) {
1369 mac_src
= "platform data";
1370 memcpy(ndev
->dev_addr
, pdata
->dev_addr
, 6);
1373 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
1374 /* try reading from mac */
1377 for (i
= 0; i
< 6; i
++)
1378 ndev
->dev_addr
[i
] = ior(db
, i
+DM9000_PAR
);
1381 if (!is_valid_ether_addr(ndev
->dev_addr
))
1382 dev_warn(db
->dev
, "%s: Invalid ethernet MAC address. Please "
1383 "set using ifconfig\n", ndev
->name
);
1385 platform_set_drvdata(pdev
, ndev
);
1386 ret
= register_netdev(ndev
);
1389 DECLARE_MAC_BUF(mac
);
1390 printk(KERN_INFO
"%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",
1391 ndev
->name
, dm9000_type_to_char(db
->type
),
1392 db
->io_addr
, db
->io_data
, ndev
->irq
,
1393 print_mac(mac
, ndev
->dev_addr
), mac_src
);
1398 dev_err(db
->dev
, "not found (%d).\n", ret
);
1400 dm9000_release_board(pdev
, db
);
1407 dm9000_drv_suspend(struct platform_device
*dev
, pm_message_t state
)
1409 struct net_device
*ndev
= platform_get_drvdata(dev
);
1413 db
= (board_info_t
*) ndev
->priv
;
1416 if (netif_running(ndev
)) {
1417 netif_device_detach(ndev
);
1418 dm9000_shutdown(ndev
);
1425 dm9000_drv_resume(struct platform_device
*dev
)
1427 struct net_device
*ndev
= platform_get_drvdata(dev
);
1428 board_info_t
*db
= (board_info_t
*) ndev
->priv
;
1432 if (netif_running(ndev
)) {
1434 dm9000_init_dm9000(ndev
);
1436 netif_device_attach(ndev
);
1444 static int __devexit
1445 dm9000_drv_remove(struct platform_device
*pdev
)
1447 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1449 platform_set_drvdata(pdev
, NULL
);
1451 unregister_netdev(ndev
);
1452 dm9000_release_board(pdev
, (board_info_t
*) ndev
->priv
);
1453 free_netdev(ndev
); /* free device structure */
1455 dev_dbg(&pdev
->dev
, "released and freed device\n");
1459 static struct platform_driver dm9000_driver
= {
1462 .owner
= THIS_MODULE
,
1464 .probe
= dm9000_probe
,
1465 .remove
= __devexit_p(dm9000_drv_remove
),
1466 .suspend
= dm9000_drv_suspend
,
1467 .resume
= dm9000_drv_resume
,
1473 printk(KERN_INFO
"%s Ethernet Driver, V%s\n", CARDNAME
, DRV_VERSION
);
1475 return platform_driver_register(&dm9000_driver
);
1479 dm9000_cleanup(void)
1481 platform_driver_unregister(&dm9000_driver
);
1484 module_init(dm9000_init
);
1485 module_exit(dm9000_cleanup
);
1487 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1488 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1489 MODULE_LICENSE("GPL");
1490 MODULE_ALIAS("platform:dm9000");