drivers/mmc/host/sdhci-s3c.c

   1 /* linux/drivers/mmc/host/sdhci-s3c.c
   2  *
   3  * Copyright 2008 Openmoko Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * SDHCI (HSMMC) support for Samsung SoC
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/slab.h>
  19 #include <linux/clk.h>
  20 #include <linux/io.h>
  21 #include <linux/gpio.h>
  22 #include <linux/module.h>
  23
  24 #include <linux/mmc/host.h>
  25
  26 #include <plat/sdhci.h>
  27 #include <plat/regs-sdhci.h>
  28
  29 #include "sdhci.h"
  30
  31 #define MAX_BUS_CLK     (4)
  32
  33 /**
  34  * struct sdhci_s3c - S3C SDHCI instance
  35  * @host: The SDHCI host created
  36  * @pdev: The platform device we where created from.
  37  * @ioarea: The resource created when we claimed the IO area.
  38  * @pdata: The platform data for this controller.
  39  * @cur_clk: The index of the current bus clock.
  40  * @clk_io: The clock for the internal bus interface.
  41  * @clk_bus: The clocks that are available for the SD/MMC bus clock.
  42  */
  43 struct sdhci_s3c {
  44         struct sdhci_host       *host;
  45         struct platform_device  *pdev;
  46         struct resource         *ioarea;
  47         struct s3c_sdhci_platdata *pdata;
  48         unsigned int            cur_clk;
  49         int                     ext_cd_irq;
  50         int                     ext_cd_gpio;
  51
  52         struct clk              *clk_io;
  53         struct clk              *clk_bus[MAX_BUS_CLK];
  54 };
  55
  56 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
  57 {
  58         return sdhci_priv(host);
  59 }
  60
  61 /**
  62  * get_curclk - convert ctrl2 register to clock source number
  63  * @ctrl2: Control2 register value.
  64  */
  65 static u32 get_curclk(u32 ctrl2)
  66 {
  67         ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  68         ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  69
  70         return ctrl2;
  71 }
  72
  73 static void sdhci_s3c_check_sclk(struct sdhci_host *host)
  74 {
  75         struct sdhci_s3c *ourhost = to_s3c(host);
  76         u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
  77
  78         if (get_curclk(tmp) != ourhost->cur_clk) {
  79                 dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
  80
  81                 tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  82                 tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  83                 writel(tmp, host->ioaddr + 0x80);
  84         }
  85 }
  86
  87 /**
  88  * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
  89  * @host: The SDHCI host instance.
  90  *
  91  * Callback to return the maximum clock rate acheivable by the controller.
  92 */
  93 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
  94 {
  95         struct sdhci_s3c *ourhost = to_s3c(host);
  96         struct clk *busclk;
  97         unsigned int rate, max;
  98         int clk;
  99
 100         /* note, a reset will reset the clock source */
 101
 102         sdhci_s3c_check_sclk(host);
 103
 104         for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
 105                 busclk = ourhost->clk_bus[clk];
 106                 if (!busclk)
 107                         continue;
 108
 109                 rate = clk_get_rate(busclk);
 110                 if (rate > max)
 111                         max = rate;
 112         }
 113
 114         return max;
 115 }
 116
 117 /**
 118  * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
 119  * @ourhost: Our SDHCI instance.
 120  * @src: The source clock index.
 121  * @wanted: The clock frequency wanted.
 122  */
 123 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
 124                                              unsigned int src,
 125                                              unsigned int wanted)
 126 {
 127         unsigned long rate;
 128         struct clk *clksrc = ourhost->clk_bus[src];
 129         int div;
 130
 131         if (!clksrc)
 132                 return UINT_MAX;
 133
 134         /*
 135          * Clock divider's step is different as 1 from that of host controller
 136          * when 'clk_type' is S3C_SDHCI_CLK_DIV_EXTERNAL.
 137          */
 138         if (ourhost->pdata->clk_type) {
 139                 rate = clk_round_rate(clksrc, wanted);
 140                 return wanted - rate;
 141         }
 142
 143         rate = clk_get_rate(clksrc);
 144
 145         for (div = 1; div < 256; div *= 2) {
 146                 if ((rate / div) <= wanted)
 147                         break;
 148         }
 149
 150         dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
 151                 src, rate, wanted, rate / div);
 152
 153         return (wanted - (rate / div));
 154 }
 155
 156 /**
 157  * sdhci_s3c_set_clock - callback on clock change
 158  * @host: The SDHCI host being changed
 159  * @clock: The clock rate being requested.
 160  *
 161  * When the card's clock is going to be changed, look at the new frequency
 162  * and find the best clock source to go with it.
 163 */
 164 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 165 {
 166         struct sdhci_s3c *ourhost = to_s3c(host);
 167         unsigned int best = UINT_MAX;
 168         unsigned int delta;
 169         int best_src = 0;
 170         int src;
 171         u32 ctrl;
 172
 173         /* don't bother if the clock is going off. */
 174         if (clock == 0)
 175                 return;
 176
 177         for (src = 0; src < MAX_BUS_CLK; src++) {
 178                 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
 179                 if (delta < best) {
 180                         best = delta;
 181                         best_src = src;
 182                 }
 183         }
 184
 185         dev_dbg(&ourhost->pdev->dev,
 186                 "selected source %d, clock %d, delta %d\n",
 187                  best_src, clock, best);
 188
 189         /* select the new clock source */
 190
 191         if (ourhost->cur_clk != best_src) {
 192                 struct clk *clk = ourhost->clk_bus[best_src];
 193
 194                 /* turn clock off to card before changing clock source */
 195                 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 196
 197                 ourhost->cur_clk = best_src;
 198                 host->max_clk = clk_get_rate(clk);
 199
 200                 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
 201                 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
 202                 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
 203                 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 204         }
 205
 206         /* reprogram default hardware configuration */
 207         writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
 208                 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
 209
 210         ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
 211         ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
 212                   S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
 213                   S3C_SDHCI_CTRL2_ENFBCLKRX |
 214                   S3C_SDHCI_CTRL2_DFCNT_NONE |
 215                   S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
 216         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 217
 218         /* reconfigure the controller for new clock rate */
 219         ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
 220         if (clock < 25 * 1000000)
 221                 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
 222         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 223 }
 224
 225 /**
 226  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
 227  * @host: The SDHCI host being queried
 228  *
 229  * To init mmc host properly a minimal clock value is needed. For high system
 230  * bus clock's values the standard formula gives values out of allowed range.
 231  * The clock still can be set to lower values, if clock source other then
 232  * system bus is selected.
 233 */
 234 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
 235 {
 236         struct sdhci_s3c *ourhost = to_s3c(host);
 237         unsigned int delta, min = UINT_MAX;
 238         int src;
 239
 240         for (src = 0; src < MAX_BUS_CLK; src++) {
 241                 delta = sdhci_s3c_consider_clock(ourhost, src, 0);
 242                 if (delta == UINT_MAX)
 243                         continue;
 244                 /* delta is a negative value in this case */
 245                 if (-delta < min)
 246                         min = -delta;
 247         }
 248         return min;
 249 }
 250
 251 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
 252 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
 253 {
 254         struct sdhci_s3c *ourhost = to_s3c(host);
 255
 256         return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);
 257 }
 258
 259 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
 260 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
 261 {
 262         struct sdhci_s3c *ourhost = to_s3c(host);
 263
 264         /*
 265          * initial clock can be in the frequency range of
 266          * 100KHz-400KHz, so we set it as max value.
 267          */
 268         return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000);
 269 }
 270
 271 /* sdhci_cmu_set_clock - callback on clock change.*/
 272 static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
 273 {
 274         struct sdhci_s3c *ourhost = to_s3c(host);
 275
 276         /* don't bother if the clock is going off */
 277         if (clock == 0)
 278                 return;
 279
 280         sdhci_s3c_set_clock(host, clock);
 281
 282         clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
 283
 284         host->clock = clock;
 285 }
 286
 287 /**
 288  * sdhci_s3c_platform_8bit_width - support 8bit buswidth
 289  * @host: The SDHCI host being queried
 290  * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
 291  *
 292  * We have 8-bit width support but is not a v3 controller.
 293  * So we add platform_8bit_width() and support 8bit width.
 294  */
 295 static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
 296 {
 297         u8 ctrl;
 298
 299         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 300
 301         switch (width) {
 302         case MMC_BUS_WIDTH_8:
 303                 ctrl |= SDHCI_CTRL_8BITBUS;
 304                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 305                 break;
 306         case MMC_BUS_WIDTH_4:
 307                 ctrl |= SDHCI_CTRL_4BITBUS;
 308                 ctrl &= ~SDHCI_CTRL_8BITBUS;
 309                 break;
 310         default:
 311                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 312                 ctrl &= ~SDHCI_CTRL_8BITBUS;
 313                 break;
 314         }
 315
 316         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 317
 318         return 0;
 319 }
 320
 321 static struct sdhci_ops sdhci_s3c_ops = {
 322         .get_max_clock          = sdhci_s3c_get_max_clk,
 323         .set_clock              = sdhci_s3c_set_clock,
 324         .get_min_clock          = sdhci_s3c_get_min_clock,
 325         .platform_8bit_width    = sdhci_s3c_platform_8bit_width,
 326 };
 327
 328 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
 329 {
 330         struct sdhci_host *host = platform_get_drvdata(dev);
 331         unsigned long flags;
 332
 333         if (host) {
 334                 spin_lock_irqsave(&host->lock, flags);
 335                 if (state) {
 336                         dev_dbg(&dev->dev, "card inserted.\n");
 337                         host->flags &= ~SDHCI_DEVICE_DEAD;
 338                         host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 339                 } else {
 340                         dev_dbg(&dev->dev, "card removed.\n");
 341                         host->flags |= SDHCI_DEVICE_DEAD;
 342                         host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 343                 }
 344                 tasklet_schedule(&host->card_tasklet);
 345                 spin_unlock_irqrestore(&host->lock, flags);
 346         }
 347 }
 348
 349 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
 350 {
 351         struct sdhci_s3c *sc = dev_id;
 352         int status = gpio_get_value(sc->ext_cd_gpio);
 353         if (sc->pdata->ext_cd_gpio_invert)
 354                 status = !status;
 355         sdhci_s3c_notify_change(sc->pdev, status);
 356         return IRQ_HANDLED;
 357 }
 358
 359 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
 360 {
 361         struct s3c_sdhci_platdata *pdata = sc->pdata;
 362         struct device *dev = &sc->pdev->dev;
 363
 364         if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
 365                 sc->ext_cd_gpio = pdata->ext_cd_gpio;
 366                 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
 367                 if (sc->ext_cd_irq &&
 368                     request_threaded_irq(sc->ext_cd_irq, NULL,
 369                                          sdhci_s3c_gpio_card_detect_thread,
 370                                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 371                                          dev_name(dev), sc) == 0) {
 372                         int status = gpio_get_value(sc->ext_cd_gpio);
 373                         if (pdata->ext_cd_gpio_invert)
 374                                 status = !status;
 375                         sdhci_s3c_notify_change(sc->pdev, status);
 376                 } else {
 377                         dev_warn(dev, "cannot request irq for card detect\n");
 378                         sc->ext_cd_irq = 0;
 379                 }
 380         } else {
 381                 dev_err(dev, "cannot request gpio for card detect\n");
 382         }
 383 }
 384
 385 static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 386 {
 387         struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
 388         struct device *dev = &pdev->dev;
 389         struct sdhci_host *host;
 390         struct sdhci_s3c *sc;
 391         struct resource *res;
 392         int ret, irq, ptr, clks;
 393
 394         if (!pdata) {
 395                 dev_err(dev, "no device data specified\n");
 396                 return -ENOENT;
 397         }
 398
 399         irq = platform_get_irq(pdev, 0);
 400         if (irq < 0) {
 401                 dev_err(dev, "no irq specified\n");
 402                 return irq;
 403         }
 404
 405         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 406         if (!res) {
 407                 dev_err(dev, "no memory specified\n");
 408                 return -ENOENT;
 409         }
 410
 411         host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
 412         if (IS_ERR(host)) {
 413                 dev_err(dev, "sdhci_alloc_host() failed\n");
 414                 return PTR_ERR(host);
 415         }
 416
 417         sc = sdhci_priv(host);
 418
 419         sc->host = host;
 420         sc->pdev = pdev;
 421         sc->pdata = pdata;
 422         sc->ext_cd_gpio = -1; /* invalid gpio number */
 423
 424         platform_set_drvdata(pdev, host);
 425
 426         sc->clk_io = clk_get(dev, "hsmmc");
 427         if (IS_ERR(sc->clk_io)) {
 428                 dev_err(dev, "failed to get io clock\n");
 429                 ret = PTR_ERR(sc->clk_io);
 430                 goto err_io_clk;
 431         }
 432
 433         /* enable the local io clock and keep it running for the moment. */
 434         clk_enable(sc->clk_io);
 435
 436         for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 437                 struct clk *clk;
 438                 char *name = pdata->clocks[ptr];
 439
 440                 if (name == NULL)
 441                         continue;
 442
 443                 clk = clk_get(dev, name);
 444                 if (IS_ERR(clk)) {
 445                         dev_err(dev, "failed to get clock %s\n", name);
 446                         continue;
 447                 }
 448
 449                 clks++;
 450                 sc->clk_bus[ptr] = clk;
 451
 452                 /*
 453                  * save current clock index to know which clock bus
 454                  * is used later in overriding functions.
 455                  */
 456                 sc->cur_clk = ptr;
 457
 458                 clk_enable(clk);
 459
 460                 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
 461                          ptr, name, clk_get_rate(clk));
 462         }
 463
 464         if (clks == 0) {
 465                 dev_err(dev, "failed to find any bus clocks\n");
 466                 ret = -ENOENT;
 467                 goto err_no_busclks;
 468         }
 469
 470         sc->ioarea = request_mem_region(res->start, resource_size(res),
 471                                         mmc_hostname(host->mmc));
 472         if (!sc->ioarea) {
 473                 dev_err(dev, "failed to reserve register area\n");
 474                 ret = -ENXIO;
 475                 goto err_req_regs;
 476         }
 477
 478         host->ioaddr = ioremap_nocache(res->start, resource_size(res));
 479         if (!host->ioaddr) {
 480                 dev_err(dev, "failed to map registers\n");
 481                 ret = -ENXIO;
 482                 goto err_req_regs;
 483         }
 484
 485         /* Ensure we have minimal gpio selected CMD/CLK/Detect */
 486         if (pdata->cfg_gpio)
 487                 pdata->cfg_gpio(pdev, pdata->max_width);
 488
 489         host->hw_name = "samsung-hsmmc";
 490         host->ops = &sdhci_s3c_ops;
 491         host->quirks = 0;
 492         host->irq = irq;
 493
 494         /* Setup quirks for the controller */
 495         host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
 496         host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
 497
 498 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
 499
 500         /* we currently see overruns on errors, so disable the SDMA
 501          * support as well. */
 502         host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
 503
 504 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
 505
 506         /* It seems we do not get an DATA transfer complete on non-busy
 507          * transfers, not sure if this is a problem with this specific
 508          * SDHCI block, or a missing configuration that needs to be set. */
 509         host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
 510
 511         /* This host supports the Auto CMD12 */
 512         host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
 513
 514         /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
 515         host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
 516
 517         if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
 518             pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
 519                 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 520
 521         if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
 522                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
 523
 524         if (pdata->host_caps)
 525                 host->mmc->caps |= pdata->host_caps;
 526
 527         host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 528                          SDHCI_QUIRK_32BIT_DMA_SIZE);
 529
 530         /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
 531         host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
 532
 533         /*
 534          * If controller does not have internal clock divider,
 535          * we can use overriding functions instead of default.
 536          */
 537         if (pdata->clk_type) {
 538                 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
 539                 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
 540                 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
 541         }
 542
 543         /* It supports additional host capabilities if needed */
 544         if (pdata->host_caps)
 545                 host->mmc->caps |= pdata->host_caps;
 546
 547         ret = sdhci_add_host(host);
 548         if (ret) {
 549                 dev_err(dev, "sdhci_add_host() failed\n");
 550                 goto err_add_host;
 551         }
 552
 553         /* The following two methods of card detection might call
 554            sdhci_s3c_notify_change() immediately, so they can be called
 555            only after sdhci_add_host(). Setup errors are ignored. */
 556         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
 557                 pdata->ext_cd_init(&sdhci_s3c_notify_change);
 558         if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
 559             gpio_is_valid(pdata->ext_cd_gpio))
 560                 sdhci_s3c_setup_card_detect_gpio(sc);
 561
 562         return 0;
 563
 564  err_add_host:
 565         release_resource(sc->ioarea);
 566         kfree(sc->ioarea);
 567
 568  err_req_regs:
 569         for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 570                 if (sc->clk_bus[ptr]) {
 571                         clk_disable(sc->clk_bus[ptr]);
 572                         clk_put(sc->clk_bus[ptr]);
 573                 }
 574         }
 575
 576  err_no_busclks:
 577         clk_disable(sc->clk_io);
 578         clk_put(sc->clk_io);
 579
 580  err_io_clk:
 581         sdhci_free_host(host);
 582
 583         return ret;
 584 }
 585
 586 static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
 587 {
 588         struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
 589         struct sdhci_host *host =  platform_get_drvdata(pdev);
 590         struct sdhci_s3c *sc = sdhci_priv(host);
 591         int ptr;
 592
 593         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
 594                 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
 595
 596         if (sc->ext_cd_irq)
 597                 free_irq(sc->ext_cd_irq, sc);
 598
 599         if (gpio_is_valid(sc->ext_cd_gpio))
 600                 gpio_free(sc->ext_cd_gpio);
 601
 602         sdhci_remove_host(host, 1);
 603
 604         for (ptr = 0; ptr < 3; ptr++) {
 605                 if (sc->clk_bus[ptr]) {
 606                         clk_disable(sc->clk_bus[ptr]);
 607                         clk_put(sc->clk_bus[ptr]);
 608                 }
 609         }
 610         clk_disable(sc->clk_io);
 611         clk_put(sc->clk_io);
 612
 613         iounmap(host->ioaddr);
 614         release_resource(sc->ioarea);
 615         kfree(sc->ioarea);
 616
 617         sdhci_free_host(host);
 618         platform_set_drvdata(pdev, NULL);
 619
 620         return 0;
 621 }
 622
 623 #ifdef CONFIG_PM
 624
 625 static int sdhci_s3c_suspend(struct device *dev)
 626 {
 627         struct sdhci_host *host = dev_get_drvdata(dev);
 628
 629         return sdhci_suspend_host(host);
 630 }
 631
 632 static int sdhci_s3c_resume(struct device *dev)
 633 {
 634         struct sdhci_host *host = dev_get_drvdata(dev);
 635
 636         return sdhci_resume_host(host);
 637 }
 638
 639 static const struct dev_pm_ops sdhci_s3c_pmops = {
 640         .suspend        = sdhci_s3c_suspend,
 641         .resume         = sdhci_s3c_resume,
 642 };
 643
 644 #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
 645
 646 #else
 647 #define SDHCI_S3C_PMOPS NULL
 648 #endif
 649
 650 static struct platform_driver sdhci_s3c_driver = {
 651         .probe          = sdhci_s3c_probe,
 652         .remove         = __devexit_p(sdhci_s3c_remove),
 653         .driver         = {
 654                 .owner  = THIS_MODULE,
 655                 .name   = "s3c-sdhci",
 656                 .pm     = SDHCI_S3C_PMOPS,
 657         },
 658 };
 659
 660 static int __init sdhci_s3c_init(void)
 661 {
 662         return platform_driver_register(&sdhci_s3c_driver);
 663 }
 664
 665 static void __exit sdhci_s3c_exit(void)
 666 {
 667         platform_driver_unregister(&sdhci_s3c_driver);
 668 }
 669
 670 module_init(sdhci_s3c_init);
 671 module_exit(sdhci_s3c_exit);
 672
 673 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
 674 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 675 MODULE_LICENSE("GPL v2");
 676 MODULE_ALIAS("platform:s3c-sdhci");