2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
102 config HAVE_LATENCYTOP_SUPPORT
107 config LOCKDEP_SUPPORT
111 config TRACE_IRQFLAGS_SUPPORT
115 config HARDIRQS_SW_RESEND
119 config GENERIC_IRQ_PROBE
123 config GENERIC_LOCKBREAK
126 depends on SMP && PREEMPT
128 config RWSEM_GENERIC_SPINLOCK
132 config RWSEM_XCHGADD_ALGORITHM
135 config ARCH_HAS_ILOG2_U32
138 config ARCH_HAS_ILOG2_U64
141 config ARCH_HAS_CPUFREQ
144 Internal node to signify that the ARCH has CPUFREQ support
145 and that the relevant menu configurations are displayed for
148 config ARCH_HAS_CPU_IDLE_WAIT
151 config GENERIC_HWEIGHT
155 config GENERIC_CALIBRATE_DELAY
159 config ARCH_MAY_HAVE_PC_FDC
165 config NEED_DMA_MAP_STATE
168 config GENERIC_ISA_DMA
177 config GENERIC_HARDIRQS_NO__DO_IRQ
180 config ARM_L1_CACHE_SHIFT_6
183 Setting ARM L1 cache line size to 64 Bytes.
187 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
188 default DRAM_BASE if REMAP_VECTORS_TO_RAM
191 The base address of exception vectors.
193 source "init/Kconfig"
195 source "kernel/Kconfig.freezer"
200 bool "MMU-based Paged Memory Management Support"
203 Select if you want MMU-based virtualised addressing space
204 support by paged memory management. If unsure, say 'Y'.
207 # The "ARM system type" choice list is ordered alphabetically by option
208 # text. Please add new entries in the option alphabetic order.
211 prompt "ARM system type"
212 default ARCH_VERSATILE
215 bool "Agilent AAEC-2000 based"
219 select ARCH_USES_GETTIMEOFFSET
221 This enables support for systems based on the Agilent AAEC-2000
223 config ARCH_INTEGRATOR
224 bool "ARM Ltd. Integrator family"
226 select ARCH_HAS_CPUFREQ
229 select GENERIC_CLOCKEVENTS
230 select PLAT_VERSATILE
232 Support for ARM's Integrator platform.
235 bool "ARM Ltd. RealView family"
239 select GENERIC_CLOCKEVENTS
240 select ARCH_WANT_OPTIONAL_GPIOLIB
241 select PLAT_VERSATILE
242 select ARM_TIMER_SP804
243 select GPIO_PL061 if GPIOLIB
245 This enables support for ARM Ltd RealView boards.
247 config ARCH_VERSATILE
248 bool "ARM Ltd. Versatile family"
253 select GENERIC_CLOCKEVENTS
254 select ARCH_WANT_OPTIONAL_GPIOLIB
255 select PLAT_VERSATILE
256 select ARM_TIMER_SP804
258 This enables support for ARM Ltd Versatile board.
261 bool "ARM Ltd. Versatile Express family"
262 select ARCH_WANT_OPTIONAL_GPIOLIB
264 select ARM_TIMER_SP804
266 select GENERIC_CLOCKEVENTS
269 select PLAT_VERSATILE
271 This enables support for the ARM Ltd Versatile Express boards.
275 select ARCH_REQUIRE_GPIOLIB
278 This enables support for systems based on the Atmel AT91RM9200,
279 AT91SAM9 and AT91CAP9 processors.
282 bool "Broadcom BCMRING"
287 select GENERIC_CLOCKEVENTS
288 select ARCH_WANT_OPTIONAL_GPIOLIB
290 Support for Broadcom's BCMRing platform.
293 bool "Cirrus Logic CLPS711x/EP721x-based"
295 select ARCH_USES_GETTIMEOFFSET
297 Support for Cirrus Logic 711x/721x based boards.
300 bool "Cavium Networks CNS3XXX family"
302 select GENERIC_CLOCKEVENTS
304 select PCI_DOMAINS if PCI
306 Support for Cavium Networks CNS3XXX platform.
309 bool "Cortina Systems Gemini"
311 select ARCH_REQUIRE_GPIOLIB
312 select ARCH_USES_GETTIMEOFFSET
314 Support for the Cortina Systems Gemini family SoCs
321 select ARCH_USES_GETTIMEOFFSET
323 This is an evaluation board for the StrongARM processor available
324 from Digital. It has limited hardware on-board, including an
325 Ethernet interface, two PCMCIA sockets, two serial ports and a
334 select ARCH_REQUIRE_GPIOLIB
335 select ARCH_HAS_HOLES_MEMORYMODEL
336 select ARCH_USES_GETTIMEOFFSET
338 This enables support for the Cirrus EP93xx series of CPUs.
340 config ARCH_FOOTBRIDGE
344 select ARCH_USES_GETTIMEOFFSET
346 Support for systems based on the DC21285 companion chip
347 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
350 bool "Freescale MXC/iMX-based"
351 select GENERIC_CLOCKEVENTS
352 select ARCH_REQUIRE_GPIOLIB
355 Support for Freescale MXC/iMX-based family of processors
358 bool "Freescale STMP3xxx"
361 select ARCH_REQUIRE_GPIOLIB
362 select GENERIC_CLOCKEVENTS
363 select USB_ARCH_HAS_EHCI
365 Support for systems based on the Freescale 3xxx CPUs.
368 bool "Hilscher NetX based"
371 select GENERIC_CLOCKEVENTS
373 This enables support for systems based on the Hilscher NetX Soc
376 bool "Hynix HMS720x-based"
379 select ARCH_USES_GETTIMEOFFSET
381 This enables support for systems based on the Hynix HMS720x
389 select ARCH_SUPPORTS_MSI
392 Support for Intel's IOP13XX (XScale) family of processors.
400 select ARCH_REQUIRE_GPIOLIB
402 Support for Intel's 80219 and IOP32X (XScale) family of
411 select ARCH_REQUIRE_GPIOLIB
413 Support for Intel's IOP33X (XScale) family of processors.
420 select ARCH_USES_GETTIMEOFFSET
422 Support for Intel's IXP23xx (XScale) family of processors.
425 bool "IXP2400/2800-based"
429 select ARCH_USES_GETTIMEOFFSET
431 Support for Intel's IXP2400/2800 (XScale) family of processors.
438 select GENERIC_CLOCKEVENTS
439 select DMABOUNCE if PCI
441 Support for Intel's IXP4XX (XScale) family of processors.
446 select ARCH_REQUIRE_GPIOLIB
447 select GENERIC_CLOCKEVENTS
450 Support for the Marvell Dove SoC 88AP510
453 bool "Marvell Kirkwood"
456 select ARCH_REQUIRE_GPIOLIB
457 select GENERIC_CLOCKEVENTS
460 Support for the following Marvell Kirkwood series SoCs:
461 88F6180, 88F6192 and 88F6281.
464 bool "Marvell Loki (88RC8480)"
466 select GENERIC_CLOCKEVENTS
469 Support for the Marvell Loki (88RC8480) SoC.
474 select ARCH_REQUIRE_GPIOLIB
477 select USB_ARCH_HAS_OHCI
480 select GENERIC_CLOCKEVENTS
482 Support for the NXP LPC32XX family of processors
485 bool "Marvell MV78xx0"
488 select ARCH_REQUIRE_GPIOLIB
489 select GENERIC_CLOCKEVENTS
492 Support for the following Marvell MV78xx0 series SoCs:
500 select ARCH_REQUIRE_GPIOLIB
501 select GENERIC_CLOCKEVENTS
504 Support for the following Marvell Orion 5x series SoCs:
505 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
506 Orion-2 (5281), Orion-1-90 (6183).
509 bool "Marvell PXA168/910/MMP2"
511 select ARCH_REQUIRE_GPIOLIB
513 select GENERIC_CLOCKEVENTS
517 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
520 bool "Micrel/Kendin KS8695"
522 select ARCH_REQUIRE_GPIOLIB
523 select ARCH_USES_GETTIMEOFFSET
525 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
526 System-on-Chip devices.
529 bool "NetSilicon NS9xxx"
532 select GENERIC_CLOCKEVENTS
535 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
538 <http://www.digi.com/products/microprocessors/index.jsp>
541 bool "Nuvoton W90X900 CPU"
543 select ARCH_REQUIRE_GPIOLIB
545 select GENERIC_CLOCKEVENTS
547 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
548 At present, the w90x900 has been renamed nuc900, regarding
549 the ARM series product line, you can login the following
550 link address to know more.
552 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
553 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
556 bool "Nuvoton NUC93X CPU"
560 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
561 low-power and high performance MPEG-4/JPEG multimedia controller chip.
566 select GENERIC_CLOCKEVENTS
570 select ARCH_HAS_BARRIERS if CACHE_L2X0
572 This enables support for NVIDIA Tegra based systems (Tegra APX,
573 Tegra 6xx and Tegra 2 series).
576 bool "Philips Nexperia PNX4008 Mobile"
579 select ARCH_USES_GETTIMEOFFSET
581 This enables support for Philips PNX4008 mobile platform.
584 bool "PXA2xx/PXA3xx-based"
587 select ARCH_HAS_CPUFREQ
589 select ARCH_REQUIRE_GPIOLIB
590 select GENERIC_CLOCKEVENTS
594 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
599 select GENERIC_CLOCKEVENTS
600 select ARCH_REQUIRE_GPIOLIB
602 Support for Qualcomm MSM/QSD based systems. This runs on the
603 apps processor of the MSM/QSD and depends on a shared memory
604 interface to the modem processor which runs the baseband
605 stack and controls some vital subsystems
606 (clock and power control, etc).
609 bool "Renesas SH-Mobile"
611 Support for Renesas's SH-Mobile ARM platforms
618 select ARCH_MAY_HAVE_PC_FDC
619 select HAVE_PATA_PLATFORM
622 select ARCH_SPARSEMEM_ENABLE
623 select ARCH_USES_GETTIMEOFFSET
625 On the Acorn Risc-PC, Linux can support the internal IDE disk and
626 CD-ROM interface, serial and parallel port, and the floppy drive.
632 select ARCH_SPARSEMEM_ENABLE
634 select ARCH_HAS_CPUFREQ
636 select GENERIC_CLOCKEVENTS
639 select ARCH_REQUIRE_GPIOLIB
641 Support for StrongARM 11x0 based boards.
644 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
646 select ARCH_HAS_CPUFREQ
648 select ARCH_USES_GETTIMEOFFSET
649 select HAVE_S3C2410_I2C
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
653 the Samsung SMDK2410 development board (and derivatives).
655 Note, the S3C2416 and the S3C2450 are so close that they even share
656 the same SoC ID code. This means that there is no seperate machine
657 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
660 bool "Samsung S3C64XX"
666 select ARCH_USES_GETTIMEOFFSET
667 select ARCH_HAS_CPUFREQ
668 select ARCH_REQUIRE_GPIOLIB
669 select SAMSUNG_CLKSRC
670 select SAMSUNG_IRQ_VIC_TIMER
671 select SAMSUNG_IRQ_UART
672 select S3C_GPIO_TRACK
673 select S3C_GPIO_PULL_UPDOWN
674 select S3C_GPIO_CFG_S3C24XX
675 select S3C_GPIO_CFG_S3C64XX
677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT
679 select HAVE_S3C2410_I2C
680 select HAVE_S3C2410_WATCHDOG
682 Samsung S3C64XX series based systems
685 bool "Samsung S5P6440"
689 select HAVE_S3C2410_WATCHDOG
690 select ARCH_USES_GETTIMEOFFSET
691 select HAVE_S3C2410_I2C
694 Samsung S5P6440 CPU based systems
697 bool "Samsung S5P6442"
701 select ARCH_USES_GETTIMEOFFSET
702 select HAVE_S3C2410_WATCHDOG
704 Samsung S5P6442 CPU based systems
707 bool "Samsung S5PC100"
711 select ARM_L1_CACHE_SHIFT_6
712 select ARCH_USES_GETTIMEOFFSET
713 select HAVE_S3C2410_I2C
715 select HAVE_S3C2410_WATCHDOG
717 Samsung S5PC100 series based systems
720 bool "Samsung S5PV210/S5PC110"
724 select ARM_L1_CACHE_SHIFT_6
725 select ARCH_USES_GETTIMEOFFSET
726 select HAVE_S3C2410_I2C
728 select HAVE_S3C2410_WATCHDOG
730 Samsung S5PV210/S5PC110 series based systems
733 bool "Samsung S5PV310/S5PC210"
737 select GENERIC_CLOCKEVENTS
739 Samsung S5PV310 series based systems
748 select ARCH_USES_GETTIMEOFFSET
750 Support for the StrongARM based Digital DNARD machine, also known
751 as "Shark" (<http://www.shark-linux.de/shark.html>).
756 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
757 select ARCH_USES_GETTIMEOFFSET
759 Say Y here for systems based on one of the Sharp LH7A40X
760 System on a Chip processors. These CPUs include an ARM922T
761 core with a wide array of integrated devices for
762 hand-held and low-power applications.
765 bool "ST-Ericsson U300 Series"
771 select GENERIC_CLOCKEVENTS
775 Support for ST-Ericsson U300 series mobile platforms.
778 bool "ST-Ericsson U8500 Series"
781 select GENERIC_CLOCKEVENTS
783 select ARCH_REQUIRE_GPIOLIB
785 Support for ST-Ericsson's Ux500 architecture
788 bool "STMicroelectronics Nomadik"
793 select GENERIC_CLOCKEVENTS
794 select ARCH_REQUIRE_GPIOLIB
796 Support for the Nomadik platform by ST-Ericsson
800 select GENERIC_CLOCKEVENTS
801 select ARCH_REQUIRE_GPIOLIB
805 select GENERIC_ALLOCATOR
806 select ARCH_HAS_HOLES_MEMORYMODEL
808 Support for TI's DaVinci platform.
813 select ARCH_REQUIRE_GPIOLIB
814 select ARCH_HAS_CPUFREQ
815 select GENERIC_CLOCKEVENTS
816 select ARCH_HAS_HOLES_MEMORYMODEL
818 Support for TI's OMAP platform (OMAP1 and OMAP2).
823 select ARCH_REQUIRE_GPIOLIB
825 select GENERIC_CLOCKEVENTS
828 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
833 # This is sorted alphabetically by mach-* pathname. However, plat-*
834 # Kconfigs may be included either alphabetically (according to the
835 # plat- suffix) or along side the corresponding mach-* source.
837 source "arch/arm/mach-aaec2000/Kconfig"
839 source "arch/arm/mach-at91/Kconfig"
841 source "arch/arm/mach-bcmring/Kconfig"
843 source "arch/arm/mach-clps711x/Kconfig"
845 source "arch/arm/mach-cns3xxx/Kconfig"
847 source "arch/arm/mach-davinci/Kconfig"
849 source "arch/arm/mach-dove/Kconfig"
851 source "arch/arm/mach-ep93xx/Kconfig"
853 source "arch/arm/mach-footbridge/Kconfig"
855 source "arch/arm/mach-gemini/Kconfig"
857 source "arch/arm/mach-h720x/Kconfig"
859 source "arch/arm/mach-integrator/Kconfig"
861 source "arch/arm/mach-iop32x/Kconfig"
863 source "arch/arm/mach-iop33x/Kconfig"
865 source "arch/arm/mach-iop13xx/Kconfig"
867 source "arch/arm/mach-ixp4xx/Kconfig"
869 source "arch/arm/mach-ixp2000/Kconfig"
871 source "arch/arm/mach-ixp23xx/Kconfig"
873 source "arch/arm/mach-kirkwood/Kconfig"
875 source "arch/arm/mach-ks8695/Kconfig"
877 source "arch/arm/mach-lh7a40x/Kconfig"
879 source "arch/arm/mach-loki/Kconfig"
881 source "arch/arm/mach-lpc32xx/Kconfig"
883 source "arch/arm/mach-msm/Kconfig"
885 source "arch/arm/mach-mv78xx0/Kconfig"
887 source "arch/arm/plat-mxc/Kconfig"
889 source "arch/arm/mach-netx/Kconfig"
891 source "arch/arm/mach-nomadik/Kconfig"
892 source "arch/arm/plat-nomadik/Kconfig"
894 source "arch/arm/mach-ns9xxx/Kconfig"
896 source "arch/arm/mach-nuc93x/Kconfig"
898 source "arch/arm/plat-omap/Kconfig"
900 source "arch/arm/mach-omap1/Kconfig"
902 source "arch/arm/mach-omap2/Kconfig"
904 source "arch/arm/mach-orion5x/Kconfig"
906 source "arch/arm/mach-pxa/Kconfig"
907 source "arch/arm/plat-pxa/Kconfig"
909 source "arch/arm/mach-mmp/Kconfig"
911 source "arch/arm/mach-realview/Kconfig"
913 source "arch/arm/mach-sa1100/Kconfig"
915 source "arch/arm/plat-samsung/Kconfig"
916 source "arch/arm/plat-s3c24xx/Kconfig"
917 source "arch/arm/plat-s5p/Kconfig"
919 source "arch/arm/plat-spear/Kconfig"
922 source "arch/arm/mach-s3c2400/Kconfig"
923 source "arch/arm/mach-s3c2410/Kconfig"
924 source "arch/arm/mach-s3c2412/Kconfig"
925 source "arch/arm/mach-s3c2416/Kconfig"
926 source "arch/arm/mach-s3c2440/Kconfig"
927 source "arch/arm/mach-s3c2443/Kconfig"
931 source "arch/arm/mach-s3c64xx/Kconfig"
934 source "arch/arm/mach-s5p6440/Kconfig"
936 source "arch/arm/mach-s5p6442/Kconfig"
938 source "arch/arm/mach-s5pc100/Kconfig"
940 source "arch/arm/mach-s5pv210/Kconfig"
942 source "arch/arm/mach-s5pv310/Kconfig"
944 source "arch/arm/mach-shmobile/Kconfig"
946 source "arch/arm/plat-stmp3xxx/Kconfig"
948 source "arch/arm/mach-tegra/Kconfig"
950 source "arch/arm/mach-u300/Kconfig"
952 source "arch/arm/mach-ux500/Kconfig"
954 source "arch/arm/mach-versatile/Kconfig"
956 source "arch/arm/mach-vexpress/Kconfig"
958 source "arch/arm/mach-w90x900/Kconfig"
960 # Definitions to make life easier
966 select GENERIC_CLOCKEVENTS
974 config PLAT_VERSATILE
977 config ARM_TIMER_SP804
980 source arch/arm/mm/Kconfig
983 bool "Enable iWMMXt support"
984 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
985 default y if PXA27x || PXA3xx || ARCH_MMP
987 Enable support for iWMMXt context switching at run time if
988 running on a CPU that supports it.
990 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
993 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
997 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
998 (!ARCH_OMAP3 || OMAP3_EMU)
1003 source "arch/arm/Kconfig-nommu"
1006 config ARM_ERRATA_411920
1007 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1010 Invalidation of the Instruction Cache operation can
1011 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1012 It does not affect the MPCore. This option enables the ARM Ltd.
1013 recommended workaround.
1015 config ARM_ERRATA_430973
1016 bool "ARM errata: Stale prediction on replaced interworking branch"
1019 This option enables the workaround for the 430973 Cortex-A8
1020 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1021 interworking branch is replaced with another code sequence at the
1022 same virtual address, whether due to self-modifying code or virtual
1023 to physical address re-mapping, Cortex-A8 does not recover from the
1024 stale interworking branch prediction. This results in Cortex-A8
1025 executing the new code sequence in the incorrect ARM or Thumb state.
1026 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1027 and also flushes the branch target cache at every context switch.
1028 Note that setting specific bits in the ACTLR register may not be
1029 available in non-secure mode.
1031 config ARM_ERRATA_458693
1032 bool "ARM errata: Processor deadlock when a false hazard is created"
1035 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1036 erratum. For very specific sequences of memory operations, it is
1037 possible for a hazard condition intended for a cache line to instead
1038 be incorrectly associated with a different cache line. This false
1039 hazard might then cause a processor deadlock. The workaround enables
1040 the L1 caching of the NEON accesses and disables the PLD instruction
1041 in the ACTLR register. Note that setting specific bits in the ACTLR
1042 register may not be available in non-secure mode.
1044 config ARM_ERRATA_460075
1045 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1048 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1049 erratum. Any asynchronous access to the L2 cache may encounter a
1050 situation in which recent store transactions to the L2 cache are lost
1051 and overwritten with stale memory contents from external memory. The
1052 workaround disables the write-allocate mode for the L2 cache via the
1053 ACTLR register. Note that setting specific bits in the ACTLR register
1054 may not be available in non-secure mode.
1056 config ARM_ERRATA_742230
1057 bool "ARM errata: DMB operation may be faulty"
1058 depends on CPU_V7 && SMP
1060 This option enables the workaround for the 742230 Cortex-A9
1061 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1062 between two write operations may not ensure the correct visibility
1063 ordering of the two writes. This workaround sets a specific bit in
1064 the diagnostic register of the Cortex-A9 which causes the DMB
1065 instruction to behave as a DSB, ensuring the correct behaviour of
1068 config ARM_ERRATA_742231
1069 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1070 depends on CPU_V7 && SMP
1072 This option enables the workaround for the 742231 Cortex-A9
1073 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1074 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1075 accessing some data located in the same cache line, may get corrupted
1076 data due to bad handling of the address hazard when the line gets
1077 replaced from one of the CPUs at the same time as another CPU is
1078 accessing it. This workaround sets specific bits in the diagnostic
1079 register of the Cortex-A9 which reduces the linefill issuing
1080 capabilities of the processor.
1082 config PL310_ERRATA_588369
1083 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1084 depends on CACHE_L2X0 && ARCH_OMAP4
1086 The PL310 L2 cache controller implements three types of Clean &
1087 Invalidate maintenance operations: by Physical Address
1088 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1089 They are architecturally defined to behave as the execution of a
1090 clean operation followed immediately by an invalidate operation,
1091 both performing to the same memory location. This functionality
1092 is not correctly implemented in PL310 as clean lines are not
1093 invalidated as a result of these operations. Note that this errata
1094 uses Texas Instrument's secure monitor api.
1096 config ARM_ERRATA_720789
1097 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1098 depends on CPU_V7 && SMP
1100 This option enables the workaround for the 720789 Cortex-A9 (prior to
1101 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1102 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1103 As a consequence of this erratum, some TLB entries which should be
1104 invalidated are not, resulting in an incoherency in the system page
1105 tables. The workaround changes the TLB flushing routines to invalidate
1106 entries regardless of the ASID.
1109 source "arch/arm/common/Kconfig"
1119 Find out whether you have ISA slots on your motherboard. ISA is the
1120 name of a bus system, i.e. the way the CPU talks to the other stuff
1121 inside your box. Other bus systems are PCI, EISA, MicroChannel
1122 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1123 newer boards don't support it. If you have ISA, say Y, otherwise N.
1125 # Select ISA DMA controller support
1130 # Select ISA DMA interface
1135 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1137 Find out whether you have a PCI motherboard. PCI is the name of a
1138 bus system, i.e. the way the CPU talks to the other stuff inside
1139 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1140 VESA. If you have PCI, say Y, otherwise N.
1149 # Select the host bridge type
1150 config PCI_HOST_VIA82C505
1152 depends on PCI && ARCH_SHARK
1155 config PCI_HOST_ITE8152
1157 depends on PCI && MACH_ARMCORE
1161 source "drivers/pci/Kconfig"
1163 source "drivers/pcmcia/Kconfig"
1167 menu "Kernel Features"
1169 source "kernel/time/Kconfig"
1172 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1173 depends on EXPERIMENTAL
1174 depends on GENERIC_CLOCKEVENTS
1175 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1176 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1177 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1178 select USE_GENERIC_SMP_HELPERS
1181 This enables support for systems with more than one CPU. If you have
1182 a system with only one CPU, like most personal computers, say N. If
1183 you have a system with more than one CPU, say Y.
1185 If you say N here, the kernel will run on single and multiprocessor
1186 machines, but will use only one CPU of a multiprocessor machine. If
1187 you say Y here, the kernel will run on many, but not all, single
1188 processor machines. On a single processor machine, the kernel will
1189 run faster if you say N here.
1191 See also <file:Documentation/i386/IO-APIC.txt>,
1192 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1193 <http://www.linuxdoc.org/docs.html#howto>.
1195 If you don't know what to do here, say N.
1198 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1199 depends on EXPERIMENTAL
1200 depends on SMP && !XIP && !THUMB2_KERNEL
1203 SMP kernels contain instructions which fail on non-SMP processors.
1204 Enabling this option allows the kernel to modify itself to make
1205 these instructions safe. Disabling it allows about 1K of space
1208 If you don't know what to do here, say Y.
1214 This option enables support for the ARM system coherency unit
1220 This options enables support for the ARM timer and watchdog unit
1223 prompt "Memory split"
1226 Select the desired split between kernel and user memory.
1228 If you are not absolutely sure what you are doing, leave this
1232 bool "3G/1G user/kernel split"
1234 bool "2G/2G user/kernel split"
1236 bool "1G/3G user/kernel split"
1241 default 0x40000000 if VMSPLIT_1G
1242 default 0x80000000 if VMSPLIT_2G
1246 int "Maximum number of CPUs (2-32)"
1252 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1253 depends on SMP && HOTPLUG && EXPERIMENTAL
1255 Say Y here to experiment with turning CPUs off and on. CPUs
1256 can be controlled through /sys/devices/system/cpu.
1259 bool "Use local timer interrupts"
1264 Enable support for local timers on SMP platforms, rather then the
1265 legacy IPI broadcast method. Local timers allows the system
1266 accounting to be spread across the timer interval, preventing a
1267 "thundering herd" at every timer tick.
1269 source kernel/Kconfig.preempt
1273 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1274 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1275 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1276 default AT91_TIMER_HZ if ARCH_AT91
1277 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1280 config THUMB2_KERNEL
1281 bool "Compile the kernel in Thumb-2 mode"
1282 depends on CPU_V7 && EXPERIMENTAL
1284 select ARM_ASM_UNIFIED
1286 By enabling this option, the kernel will be compiled in
1287 Thumb-2 mode. A compiler/assembler that understand the unified
1288 ARM-Thumb syntax is needed.
1292 config ARM_ASM_UNIFIED
1296 bool "Use the ARM EABI to compile the kernel"
1298 This option allows for the kernel to be compiled using the latest
1299 ARM ABI (aka EABI). This is only useful if you are using a user
1300 space environment that is also compiled with EABI.
1302 Since there are major incompatibilities between the legacy ABI and
1303 EABI, especially with regard to structure member alignment, this
1304 option also changes the kernel syscall calling convention to
1305 disambiguate both ABIs and allow for backward compatibility support
1306 (selected with CONFIG_OABI_COMPAT).
1308 To use this you need GCC version 4.0.0 or later.
1311 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1312 depends on AEABI && EXPERIMENTAL
1315 This option preserves the old syscall interface along with the
1316 new (ARM EABI) one. It also provides a compatibility layer to
1317 intercept syscalls that have structure arguments which layout
1318 in memory differs between the legacy ABI and the new ARM EABI
1319 (only for non "thumb" binaries). This option adds a tiny
1320 overhead to all syscalls and produces a slightly larger kernel.
1321 If you know you'll be using only pure EABI user space then you
1322 can say N here. If this option is not selected and you attempt
1323 to execute a legacy ABI binary then the result will be
1324 UNPREDICTABLE (in fact it can be predicted that it won't work
1325 at all). If in doubt say Y.
1327 config ARCH_HAS_HOLES_MEMORYMODEL
1330 config ARCH_SPARSEMEM_ENABLE
1333 config ARCH_SPARSEMEM_DEFAULT
1334 def_bool ARCH_SPARSEMEM_ENABLE
1336 config ARCH_SELECT_MEMORY_MODEL
1337 def_bool ARCH_SPARSEMEM_ENABLE
1340 bool "High Memory Support (EXPERIMENTAL)"
1341 depends on MMU && EXPERIMENTAL
1343 The address space of ARM processors is only 4 Gigabytes large
1344 and it has to accommodate user address space, kernel address
1345 space as well as some memory mapped IO. That means that, if you
1346 have a large amount of physical memory and/or IO, not all of the
1347 memory can be "permanently mapped" by the kernel. The physical
1348 memory that is not permanently mapped is called "high memory".
1350 Depending on the selected kernel/user memory split, minimum
1351 vmalloc space and actual amount of RAM, you may not need this
1352 option which should result in a slightly faster kernel.
1357 bool "Allocate 2nd-level pagetables from highmem"
1359 depends on !OUTER_CACHE
1361 config HW_PERF_EVENTS
1362 bool "Enable hardware performance counter support for perf events"
1363 depends on PERF_EVENTS && CPU_HAS_PMU
1366 Enable hardware performance counter support for perf events. If
1367 disabled, perf events will use software events only.
1372 This enables support for sparse irqs. This is useful in general
1373 as most CPUs have a fairly sparse array of IRQ vectors, which
1374 the irq_desc then maps directly on to. Systems with a high
1375 number of off-chip IRQs will want to treat this as
1376 experimental until they have been independently verified.
1380 config FORCE_MAX_ZONEORDER
1381 int "Maximum zone order" if ARCH_SHMOBILE
1382 range 11 64 if ARCH_SHMOBILE
1383 default "9" if SA1111
1386 The kernel memory allocator divides physically contiguous memory
1387 blocks into "zones", where each zone is a power of two number of
1388 pages. This option selects the largest power of two that the kernel
1389 keeps in the memory allocator. If you need to allocate very large
1390 blocks of physically contiguous memory, then you may need to
1391 increase this value.
1393 This config option is actually maximum order plus one. For example,
1394 a value of 11 means that the largest free memory block is 2^10 pages.
1397 bool "Timer and CPU usage LEDs"
1398 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1399 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1400 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1401 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1402 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1403 ARCH_AT91 || ARCH_DAVINCI || \
1404 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1406 If you say Y here, the LEDs on your machine will be used
1407 to provide useful information about your current system status.
1409 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1410 be able to select which LEDs are active using the options below. If
1411 you are compiling a kernel for the EBSA-110 or the LART however, the
1412 red LED will simply flash regularly to indicate that the system is
1413 still functional. It is safe to say Y here if you have a CATS
1414 system, but the driver will do nothing.
1417 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1418 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1419 || MACH_OMAP_PERSEUS2
1421 depends on !GENERIC_CLOCKEVENTS
1422 default y if ARCH_EBSA110
1424 If you say Y here, one of the system LEDs (the green one on the
1425 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1426 will flash regularly to indicate that the system is still
1427 operational. This is mainly useful to kernel hackers who are
1428 debugging unstable kernels.
1430 The LART uses the same LED for both Timer LED and CPU usage LED
1431 functions. You may choose to use both, but the Timer LED function
1432 will overrule the CPU usage LED.
1435 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1437 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1438 || MACH_OMAP_PERSEUS2
1441 If you say Y here, the red LED will be used to give a good real
1442 time indication of CPU usage, by lighting whenever the idle task
1443 is not currently executing.
1445 The LART uses the same LED for both Timer LED and CPU usage LED
1446 functions. You may choose to use both, but the Timer LED function
1447 will overrule the CPU usage LED.
1449 config ALIGNMENT_TRAP
1451 depends on CPU_CP15_MMU
1452 default y if !ARCH_EBSA110
1453 select HAVE_PROC_CPU if PROC_FS
1455 ARM processors cannot fetch/store information which is not
1456 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1457 address divisible by 4. On 32-bit ARM processors, these non-aligned
1458 fetch/store instructions will be emulated in software if you say
1459 here, which has a severe performance impact. This is necessary for
1460 correct operation of some network protocols. With an IP-only
1461 configuration it is safe to say N, otherwise say Y.
1463 config UACCESS_WITH_MEMCPY
1464 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1465 depends on MMU && EXPERIMENTAL
1466 default y if CPU_FEROCEON
1468 Implement faster copy_to_user and clear_user methods for CPU
1469 cores where a 8-word STM instruction give significantly higher
1470 memory write throughput than a sequence of individual 32bit stores.
1472 A possible side effect is a slight increase in scheduling latency
1473 between threads sharing the same address space if they invoke
1474 such copy operations with large buffers.
1476 However, if the CPU data cache is using a write-allocate mode,
1477 this option is unlikely to provide any performance gain.
1479 config CC_STACKPROTECTOR
1480 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1482 This option turns on the -fstack-protector GCC feature. This
1483 feature puts, at the beginning of functions, a canary value on
1484 the stack just before the return address, and validates
1485 the value just before actually returning. Stack based buffer
1486 overflows (that need to overwrite this return address) now also
1487 overwrite the canary, which gets detected and the attack is then
1488 neutralized via a kernel panic.
1489 This feature requires gcc version 4.2 or above.
1491 config DEPRECATED_PARAM_STRUCT
1492 bool "Provide old way to pass kernel parameters"
1494 This was deprecated in 2001 and announced to live on for 5 years.
1495 Some old boot loaders still use this way.
1501 # Compressed boot loader in ROM. Yes, we really want to ask about
1502 # TEXT and BSS so we preserve their values in the config files.
1503 config ZBOOT_ROM_TEXT
1504 hex "Compressed ROM boot loader base address"
1507 The physical address at which the ROM-able zImage is to be
1508 placed in the target. Platforms which normally make use of
1509 ROM-able zImage formats normally set this to a suitable
1510 value in their defconfig file.
1512 If ZBOOT_ROM is not enabled, this has no effect.
1514 config ZBOOT_ROM_BSS
1515 hex "Compressed ROM boot loader BSS address"
1518 The base address of an area of read/write memory in the target
1519 for the ROM-able zImage which must be available while the
1520 decompressor is running. It must be large enough to hold the
1521 entire decompressed kernel plus an additional 128 KiB.
1522 Platforms which normally make use of ROM-able zImage formats
1523 normally set this to a suitable value in their defconfig file.
1525 If ZBOOT_ROM is not enabled, this has no effect.
1528 bool "Compressed boot loader in ROM/flash"
1529 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1531 Say Y here if you intend to execute your compressed kernel image
1532 (zImage) directly from ROM or flash. If unsure, say N.
1535 string "Default kernel command string"
1538 On some architectures (EBSA110 and CATS), there is currently no way
1539 for the boot loader to pass arguments to the kernel. For these
1540 architectures, you should supply some command-line options at build
1541 time by entering them here. As a minimum, you should specify the
1542 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1544 config CMDLINE_FORCE
1545 bool "Always use the default kernel command string"
1546 depends on CMDLINE != ""
1548 Always use the default kernel command string, even if the boot
1549 loader passes other arguments to the kernel.
1550 This is useful if you cannot or don't want to change the
1551 command-line options your boot loader passes to the kernel.
1556 bool "Kernel Execute-In-Place from ROM"
1557 depends on !ZBOOT_ROM
1559 Execute-In-Place allows the kernel to run from non-volatile storage
1560 directly addressable by the CPU, such as NOR flash. This saves RAM
1561 space since the text section of the kernel is not loaded from flash
1562 to RAM. Read-write sections, such as the data section and stack,
1563 are still copied to RAM. The XIP kernel is not compressed since
1564 it has to run directly from flash, so it will take more space to
1565 store it. The flash address used to link the kernel object files,
1566 and for storing it, is configuration dependent. Therefore, if you
1567 say Y here, you must know the proper physical address where to
1568 store the kernel image depending on your own flash memory usage.
1570 Also note that the make target becomes "make xipImage" rather than
1571 "make zImage" or "make Image". The final kernel binary to put in
1572 ROM memory will be arch/arm/boot/xipImage.
1576 config XIP_PHYS_ADDR
1577 hex "XIP Kernel Physical Location"
1578 depends on XIP_KERNEL
1579 default "0x00080000"
1581 This is the physical address in your flash memory the kernel will
1582 be linked for and stored to. This address is dependent on your
1586 bool "Kexec system call (EXPERIMENTAL)"
1587 depends on EXPERIMENTAL
1589 kexec is a system call that implements the ability to shutdown your
1590 current kernel, and to start another kernel. It is like a reboot
1591 but it is independent of the system firmware. And like a reboot
1592 you can start any kernel with it, not just Linux.
1594 It is an ongoing process to be certain the hardware in a machine
1595 is properly shutdown, so do not be surprised if this code does not
1596 initially work for you. It may help to enable device hotplugging
1600 bool "Export atags in procfs"
1604 Should the atags used to boot the kernel be exported in an "atags"
1605 file in procfs. Useful with kexec.
1607 config AUTO_ZRELADDR
1608 bool "Auto calculation of the decompressed kernel image address"
1609 depends on !ZBOOT_ROM && !ARCH_U300
1611 ZRELADDR is the physical address where the decompressed kernel
1612 image will be placed. If AUTO_ZRELADDR is selected, the address
1613 will be determined at run-time by masking the current IP with
1614 0xf8000000. This assumes the zImage being placed in the first 128MB
1615 from start of memory.
1619 menu "CPU Power Management"
1623 source "drivers/cpufreq/Kconfig"
1625 config CPU_FREQ_SA1100
1628 config CPU_FREQ_SA1110
1631 config CPU_FREQ_INTEGRATOR
1632 tristate "CPUfreq driver for ARM Integrator CPUs"
1633 depends on ARCH_INTEGRATOR && CPU_FREQ
1636 This enables the CPUfreq driver for ARM Integrator CPUs.
1638 For details, take a look at <file:Documentation/cpu-freq>.
1644 depends on CPU_FREQ && ARCH_PXA && PXA25x
1646 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1648 config CPU_FREQ_S3C64XX
1649 bool "CPUfreq support for Samsung S3C64XX CPUs"
1650 depends on CPU_FREQ && CPU_S3C6410
1655 Internal configuration node for common cpufreq on Samsung SoC
1657 config CPU_FREQ_S3C24XX
1658 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1659 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1662 This enables the CPUfreq driver for the Samsung S3C24XX family
1665 For details, take a look at <file:Documentation/cpu-freq>.
1669 config CPU_FREQ_S3C24XX_PLL
1670 bool "Support CPUfreq changing of PLL frequency"
1671 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1673 Compile in support for changing the PLL frequency from the
1674 S3C24XX series CPUfreq driver. The PLL takes time to settle
1675 after a frequency change, so by default it is not enabled.
1677 This also means that the PLL tables for the selected CPU(s) will
1678 be built which may increase the size of the kernel image.
1680 config CPU_FREQ_S3C24XX_DEBUG
1681 bool "Debug CPUfreq Samsung driver core"
1682 depends on CPU_FREQ_S3C24XX
1684 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1686 config CPU_FREQ_S3C24XX_IODEBUG
1687 bool "Debug CPUfreq Samsung driver IO timing"
1688 depends on CPU_FREQ_S3C24XX
1690 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1692 config CPU_FREQ_S3C24XX_DEBUGFS
1693 bool "Export debugfs for CPUFreq"
1694 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1696 Export status information via debugfs.
1700 source "drivers/cpuidle/Kconfig"
1704 menu "Floating point emulation"
1706 comment "At least one emulation must be selected"
1709 bool "NWFPE math emulation"
1710 depends on !AEABI || OABI_COMPAT
1712 Say Y to include the NWFPE floating point emulator in the kernel.
1713 This is necessary to run most binaries. Linux does not currently
1714 support floating point hardware so you need to say Y here even if
1715 your machine has an FPA or floating point co-processor podule.
1717 You may say N here if you are going to load the Acorn FPEmulator
1718 early in the bootup.
1721 bool "Support extended precision"
1722 depends on FPE_NWFPE
1724 Say Y to include 80-bit support in the kernel floating-point
1725 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1726 Note that gcc does not generate 80-bit operations by default,
1727 so in most cases this option only enlarges the size of the
1728 floating point emulator without any good reason.
1730 You almost surely want to say N here.
1733 bool "FastFPE math emulation (EXPERIMENTAL)"
1734 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1736 Say Y here to include the FAST floating point emulator in the kernel.
1737 This is an experimental much faster emulator which now also has full
1738 precision for the mantissa. It does not support any exceptions.
1739 It is very simple, and approximately 3-6 times faster than NWFPE.
1741 It should be sufficient for most programs. It may be not suitable
1742 for scientific calculations, but you have to check this for yourself.
1743 If you do not feel you need a faster FP emulation you should better
1747 bool "VFP-format floating point maths"
1748 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1750 Say Y to include VFP support code in the kernel. This is needed
1751 if your hardware includes a VFP unit.
1753 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1754 release notes and additional status information.
1756 Say N if your target does not have VFP hardware.
1764 bool "Advanced SIMD (NEON) Extension support"
1765 depends on VFPv3 && CPU_V7
1767 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1772 menu "Userspace binary formats"
1774 source "fs/Kconfig.binfmt"
1777 tristate "RISC OS personality"
1780 Say Y here to include the kernel code necessary if you want to run
1781 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1782 experimental; if this sounds frightening, say N and sleep in peace.
1783 You can also say M here to compile this support as a module (which
1784 will be called arthur).
1788 menu "Power management options"
1790 source "kernel/power/Kconfig"
1792 config ARCH_SUSPEND_POSSIBLE
1797 source "net/Kconfig"
1799 source "drivers/Kconfig"
1803 source "arch/arm/Kconfig.debug"
1805 source "security/Kconfig"
1807 source "crypto/Kconfig"
1809 source "lib/Kconfig"