drivers/staging/vt6655/baseband.c

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * File: baseband.c
  20  *
  21  * Purpose: Implement functions to access baseband
  22  *
  23  * Author: Kyle Hsu
  24  *
  25  * Date: Aug.22, 2002
  26  *
  27  * Functions:
  28  *      BBuGetFrameTime        - Calculate data frame transmitting time
  29  *      BBvCaculateParameter   - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
  30  *      BBbReadEmbeded         - Embeded read baseband register via MAC
  31  *      BBbWriteEmbeded        - Embeded write baseband register via MAC
  32  *      BBbIsRegBitsOn         - Test if baseband register bits on
  33  *      BBbIsRegBitsOff        - Test if baseband register bits off
  34  *      BBbVT3253Init          - VIA VT3253 baseband chip init code
  35  *      BBvReadAllRegs         - Read All Baseband Registers
  36  *      BBvLoopbackOn          - Turn on BaseBand Loopback mode
  37  *      BBvLoopbackOff         - Turn off BaseBand Loopback mode
  38  *
  39  * Revision History:
  40  *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
  41  *      08-07-2003 Bryan YC Fan:  Add MAXIM2827/2825 and RFMD2959 support.
  42  *      08-26-2003 Kyle Hsu    :  Modify BBuGetFrameTime() and BBvCaculateParameter().
  43  *                                cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
  44  *                                Add the comments.
  45  *      09-01-2003 Bryan YC Fan:  RF & BB tables updated.
  46  *                                Modified BBvLoopbackOn & BBvLoopbackOff().
  47  */
  48
  49 #if !defined(__TMACRO_H__)
  50 #include "tmacro.h"
  51 #endif
  52 #if !defined(__TBIT_H__)
  53 #include "tbit.h"
  54 #endif
  55 #if !defined(__TETHER_H__)
  56 #include "tether.h"
  57 #endif
  58 #if !defined(__MAC_H__)
  59 #include "mac.h"
  60 #endif
  61 #if !defined(__BASEBAND_H__)
  62 #include "baseband.h"
  63 #endif
  64 #if !defined(__SROM_H__)
  65 #include "srom.h"
  66 #endif
  67 #if !defined(__UMEM_H__)
  68 #include "umem.h"
  69 #endif
  70 #if !defined(__RF_H__)
  71 #include "rf.h"
  72 #endif
  73
  74 /*---------------------  Static Definitions -------------------------*/
  75 //static int          msglevel                =MSG_LEVEL_DEBUG;
  76 static int          msglevel                =MSG_LEVEL_INFO;
  77
  78 //#define       PLICE_DEBUG
  79
  80 /*---------------------  Static Classes  ----------------------------*/
  81
  82 /*---------------------  Static Variables  --------------------------*/
  83 /*---------------------  Static Functions  --------------------------*/
  84
  85 /*---------------------  Export Variables  --------------------------*/
  86
  87 /*---------------------  Static Definitions -------------------------*/
  88
  89 /*---------------------  Static Classes  ----------------------------*/
  90
  91 /*---------------------  Static Variables  --------------------------*/
  92
  93
  94
  95 #define CB_VT3253_INIT_FOR_RFMD 446
  96 BYTE byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
  97     {0x00, 0x30},
  98     {0x01, 0x00},
  99     {0x02, 0x00},
 100     {0x03, 0x00},
 101     {0x04, 0x00},
 102     {0x05, 0x00},
 103     {0x06, 0x00},
 104     {0x07, 0x00},
 105     {0x08, 0x70},
 106     {0x09, 0x45},
 107     {0x0a, 0x2a},
 108     {0x0b, 0x76},
 109     {0x0c, 0x00},
 110     {0x0d, 0x01},
 111     {0x0e, 0x80},
 112     {0x0f, 0x00},
 113     {0x10, 0x00},
 114     {0x11, 0x00},
 115     {0x12, 0x00},
 116     {0x13, 0x00},
 117     {0x14, 0x00},
 118     {0x15, 0x00},
 119     {0x16, 0x00},
 120     {0x17, 0x00},
 121     {0x18, 0x00},
 122     {0x19, 0x00},
 123     {0x1a, 0x00},
 124     {0x1b, 0x9d},
 125     {0x1c, 0x05},
 126     {0x1d, 0x00},
 127     {0x1e, 0x00},
 128     {0x1f, 0x00},
 129     {0x20, 0x00},
 130     {0x21, 0x00},
 131     {0x22, 0x00},
 132     {0x23, 0x00},
 133     {0x24, 0x00},
 134     {0x25, 0x4a},
 135     {0x26, 0x00},
 136     {0x27, 0x00},
 137     {0x28, 0x00},
 138     {0x29, 0x00},
 139     {0x2a, 0x00},
 140     {0x2b, 0x00},
 141     {0x2c, 0x00},
 142     {0x2d, 0xa8},
 143     {0x2e, 0x1a},
 144     {0x2f, 0x0c},
 145     {0x30, 0x26},
 146     {0x31, 0x5b},
 147     {0x32, 0x00},
 148     {0x33, 0x00},
 149     {0x34, 0x00},
 150     {0x35, 0x00},
 151     {0x36, 0xaa},
 152     {0x37, 0xaa},
 153     {0x38, 0xff},
 154     {0x39, 0xff},
 155     {0x3a, 0x00},
 156     {0x3b, 0x00},
 157     {0x3c, 0x00},
 158     {0x3d, 0x0d},
 159     {0x3e, 0x51},
 160     {0x3f, 0x04},
 161     {0x40, 0x00},
 162     {0x41, 0x08},
 163     {0x42, 0x00},
 164     {0x43, 0x08},
 165     {0x44, 0x06},
 166     {0x45, 0x14},
 167     {0x46, 0x05},
 168     {0x47, 0x08},
 169     {0x48, 0x00},
 170     {0x49, 0x00},
 171     {0x4a, 0x00},
 172     {0x4b, 0x00},
 173     {0x4c, 0x09},
 174     {0x4d, 0x80},
 175     {0x4e, 0x00},
 176     {0x4f, 0xc5},
 177     {0x50, 0x14},
 178     {0x51, 0x19},
 179     {0x52, 0x00},
 180     {0x53, 0x00},
 181     {0x54, 0x00},
 182     {0x55, 0x00},
 183     {0x56, 0x00},
 184     {0x57, 0x00},
 185     {0x58, 0x00},
 186     {0x59, 0xb0},
 187     {0x5a, 0x00},
 188     {0x5b, 0x00},
 189     {0x5c, 0x00},
 190     {0x5d, 0x00},
 191     {0x5e, 0x00},
 192     {0x5f, 0x00},
 193     {0x60, 0x44},
 194     {0x61, 0x04},
 195     {0x62, 0x00},
 196     {0x63, 0x00},
 197     {0x64, 0x00},
 198     {0x65, 0x00},
 199     {0x66, 0x04},
 200     {0x67, 0xb7},
 201     {0x68, 0x00},
 202     {0x69, 0x00},
 203     {0x6a, 0x00},
 204     {0x6b, 0x00},
 205     {0x6c, 0x00},
 206     {0x6d, 0x03},
 207     {0x6e, 0x01},
 208     {0x6f, 0x00},
 209     {0x70, 0x00},
 210     {0x71, 0x00},
 211     {0x72, 0x00},
 212     {0x73, 0x00},
 213     {0x74, 0x00},
 214     {0x75, 0x00},
 215     {0x76, 0x00},
 216     {0x77, 0x00},
 217     {0x78, 0x00},
 218     {0x79, 0x00},
 219     {0x7a, 0x00},
 220     {0x7b, 0x00},
 221     {0x7c, 0x00},
 222     {0x7d, 0x00},
 223     {0x7e, 0x00},
 224     {0x7f, 0x00},
 225     {0x80, 0x0b},
 226     {0x81, 0x00},
 227     {0x82, 0x3c},
 228     {0x83, 0x00},
 229     {0x84, 0x00},
 230     {0x85, 0x00},
 231     {0x86, 0x00},
 232     {0x87, 0x00},
 233     {0x88, 0x08},
 234     {0x89, 0x00},
 235     {0x8a, 0x08},
 236     {0x8b, 0xa6},
 237     {0x8c, 0x84},
 238     {0x8d, 0x47},
 239     {0x8e, 0xbb},
 240     {0x8f, 0x02},
 241     {0x90, 0x21},
 242     {0x91, 0x0c},
 243     {0x92, 0x04},
 244     {0x93, 0x22},
 245     {0x94, 0x00},
 246     {0x95, 0x00},
 247     {0x96, 0x00},
 248     {0x97, 0xeb},
 249     {0x98, 0x00},
 250     {0x99, 0x00},
 251     {0x9a, 0x00},
 252     {0x9b, 0x00},
 253     {0x9c, 0x00},
 254     {0x9d, 0x00},
 255     {0x9e, 0x00},
 256     {0x9f, 0x00},
 257     {0xa0, 0x00},
 258     {0xa1, 0x00},
 259     {0xa2, 0x00},
 260     {0xa3, 0x00},
 261     {0xa4, 0x00},
 262     {0xa5, 0x00},
 263     {0xa6, 0x10},
 264     {0xa7, 0x04},
 265     {0xa8, 0x10},
 266     {0xa9, 0x00},
 267     {0xaa, 0x8f},
 268     {0xab, 0x00},
 269     {0xac, 0x00},
 270     {0xad, 0x00},
 271     {0xae, 0x00},
 272     {0xaf, 0x80},
 273     {0xb0, 0x38},
 274     {0xb1, 0x00},
 275     {0xb2, 0x00},
 276     {0xb3, 0x00},
 277     {0xb4, 0xee},
 278     {0xb5, 0xff},
 279     {0xb6, 0x10},
 280     {0xb7, 0x00},
 281     {0xb8, 0x00},
 282     {0xb9, 0x00},
 283     {0xba, 0x00},
 284     {0xbb, 0x03},
 285     {0xbc, 0x00},
 286     {0xbd, 0x00},
 287     {0xbe, 0x00},
 288     {0xbf, 0x00},
 289     {0xc0, 0x10},
 290     {0xc1, 0x10},
 291     {0xc2, 0x18},
 292     {0xc3, 0x20},
 293     {0xc4, 0x10},
 294     {0xc5, 0x00},
 295     {0xc6, 0x22},
 296     {0xc7, 0x14},
 297     {0xc8, 0x0f},
 298     {0xc9, 0x08},
 299     {0xca, 0xa4},
 300     {0xcb, 0xa7},
 301     {0xcc, 0x3c},
 302     {0xcd, 0x10},
 303     {0xce, 0x20},
 304     {0xcf, 0x00},
 305     {0xd0, 0x00},
 306     {0xd1, 0x10},
 307     {0xd2, 0x00},
 308     {0xd3, 0x00},
 309     {0xd4, 0x10},
 310     {0xd5, 0x33},
 311     {0xd6, 0x70},
 312     {0xd7, 0x01},
 313     {0xd8, 0x00},
 314     {0xd9, 0x00},
 315     {0xda, 0x00},
 316     {0xdb, 0x00},
 317     {0xdc, 0x00},
 318     {0xdd, 0x00},
 319     {0xde, 0x00},
 320     {0xdf, 0x00},
 321     {0xe0, 0x00},
 322     {0xe1, 0x00},
 323     {0xe2, 0xcc},
 324     {0xe3, 0x04},
 325     {0xe4, 0x08},
 326     {0xe5, 0x10},
 327     {0xe6, 0x00},
 328     {0xe7, 0x0e},
 329     {0xe8, 0x88},
 330     {0xe9, 0xd4},
 331     {0xea, 0x05},
 332     {0xeb, 0xf0},
 333     {0xec, 0x79},
 334     {0xed, 0x0f},
 335     {0xee, 0x04},
 336     {0xef, 0x04},
 337     {0xf0, 0x00},
 338     {0xf1, 0x00},
 339     {0xf2, 0x00},
 340     {0xf3, 0x00},
 341     {0xf4, 0x00},
 342     {0xf5, 0x00},
 343     {0xf6, 0x00},
 344     {0xf7, 0x00},
 345     {0xf8, 0x00},
 346     {0xf9, 0x00},
 347     {0xF0, 0x00},
 348     {0xF1, 0xF8},
 349     {0xF0, 0x80},
 350     {0xF0, 0x00},
 351     {0xF1, 0xF4},
 352     {0xF0, 0x81},
 353     {0xF0, 0x01},
 354     {0xF1, 0xF0},
 355     {0xF0, 0x82},
 356     {0xF0, 0x02},
 357     {0xF1, 0xEC},
 358     {0xF0, 0x83},
 359     {0xF0, 0x03},
 360     {0xF1, 0xE8},
 361     {0xF0, 0x84},
 362     {0xF0, 0x04},
 363     {0xF1, 0xE4},
 364     {0xF0, 0x85},
 365     {0xF0, 0x05},
 366     {0xF1, 0xE0},
 367     {0xF0, 0x86},
 368     {0xF0, 0x06},
 369     {0xF1, 0xDC},
 370     {0xF0, 0x87},
 371     {0xF0, 0x07},
 372     {0xF1, 0xD8},
 373     {0xF0, 0x88},
 374     {0xF0, 0x08},
 375     {0xF1, 0xD4},
 376     {0xF0, 0x89},
 377     {0xF0, 0x09},
 378     {0xF1, 0xD0},
 379     {0xF0, 0x8A},
 380     {0xF0, 0x0A},
 381     {0xF1, 0xCC},
 382     {0xF0, 0x8B},
 383     {0xF0, 0x0B},
 384     {0xF1, 0xC8},
 385     {0xF0, 0x8C},
 386     {0xF0, 0x0C},
 387     {0xF1, 0xC4},
 388     {0xF0, 0x8D},
 389     {0xF0, 0x0D},
 390     {0xF1, 0xC0},
 391     {0xF0, 0x8E},
 392     {0xF0, 0x0E},
 393     {0xF1, 0xBC},
 394     {0xF0, 0x8F},
 395     {0xF0, 0x0F},
 396     {0xF1, 0xB8},
 397     {0xF0, 0x90},
 398     {0xF0, 0x10},
 399     {0xF1, 0xB4},
 400     {0xF0, 0x91},
 401     {0xF0, 0x11},
 402     {0xF1, 0xB0},
 403     {0xF0, 0x92},
 404     {0xF0, 0x12},
 405     {0xF1, 0xAC},
 406     {0xF0, 0x93},
 407     {0xF0, 0x13},
 408     {0xF1, 0xA8},
 409     {0xF0, 0x94},
 410     {0xF0, 0x14},
 411     {0xF1, 0xA4},
 412     {0xF0, 0x95},
 413     {0xF0, 0x15},
 414     {0xF1, 0xA0},
 415     {0xF0, 0x96},
 416     {0xF0, 0x16},
 417     {0xF1, 0x9C},
 418     {0xF0, 0x97},
 419     {0xF0, 0x17},
 420     {0xF1, 0x98},
 421     {0xF0, 0x98},
 422     {0xF0, 0x18},
 423     {0xF1, 0x94},
 424     {0xF0, 0x99},
 425     {0xF0, 0x19},
 426     {0xF1, 0x90},
 427     {0xF0, 0x9A},
 428     {0xF0, 0x1A},
 429     {0xF1, 0x8C},
 430     {0xF0, 0x9B},
 431     {0xF0, 0x1B},
 432     {0xF1, 0x88},
 433     {0xF0, 0x9C},
 434     {0xF0, 0x1C},
 435     {0xF1, 0x84},
 436     {0xF0, 0x9D},
 437     {0xF0, 0x1D},
 438     {0xF1, 0x80},
 439     {0xF0, 0x9E},
 440     {0xF0, 0x1E},
 441     {0xF1, 0x7C},
 442     {0xF0, 0x9F},
 443     {0xF0, 0x1F},
 444     {0xF1, 0x78},
 445     {0xF0, 0xA0},
 446     {0xF0, 0x20},
 447     {0xF1, 0x74},
 448     {0xF0, 0xA1},
 449     {0xF0, 0x21},
 450     {0xF1, 0x70},
 451     {0xF0, 0xA2},
 452     {0xF0, 0x22},
 453     {0xF1, 0x6C},
 454     {0xF0, 0xA3},
 455     {0xF0, 0x23},
 456     {0xF1, 0x68},
 457     {0xF0, 0xA4},
 458     {0xF0, 0x24},
 459     {0xF1, 0x64},
 460     {0xF0, 0xA5},
 461     {0xF0, 0x25},
 462     {0xF1, 0x60},
 463     {0xF0, 0xA6},
 464     {0xF0, 0x26},
 465     {0xF1, 0x5C},
 466     {0xF0, 0xA7},
 467     {0xF0, 0x27},
 468     {0xF1, 0x58},
 469     {0xF0, 0xA8},
 470     {0xF0, 0x28},
 471     {0xF1, 0x54},
 472     {0xF0, 0xA9},
 473     {0xF0, 0x29},
 474     {0xF1, 0x50},
 475     {0xF0, 0xAA},
 476     {0xF0, 0x2A},
 477     {0xF1, 0x4C},
 478     {0xF0, 0xAB},
 479     {0xF0, 0x2B},
 480     {0xF1, 0x48},
 481     {0xF0, 0xAC},
 482     {0xF0, 0x2C},
 483     {0xF1, 0x44},
 484     {0xF0, 0xAD},
 485     {0xF0, 0x2D},
 486     {0xF1, 0x40},
 487     {0xF0, 0xAE},
 488     {0xF0, 0x2E},
 489     {0xF1, 0x3C},
 490     {0xF0, 0xAF},
 491     {0xF0, 0x2F},
 492     {0xF1, 0x38},
 493     {0xF0, 0xB0},
 494     {0xF0, 0x30},
 495     {0xF1, 0x34},
 496     {0xF0, 0xB1},
 497     {0xF0, 0x31},
 498     {0xF1, 0x30},
 499     {0xF0, 0xB2},
 500     {0xF0, 0x32},
 501     {0xF1, 0x2C},
 502     {0xF0, 0xB3},
 503     {0xF0, 0x33},
 504     {0xF1, 0x28},
 505     {0xF0, 0xB4},
 506     {0xF0, 0x34},
 507     {0xF1, 0x24},
 508     {0xF0, 0xB5},
 509     {0xF0, 0x35},
 510     {0xF1, 0x20},
 511     {0xF0, 0xB6},
 512     {0xF0, 0x36},
 513     {0xF1, 0x1C},
 514     {0xF0, 0xB7},
 515     {0xF0, 0x37},
 516     {0xF1, 0x18},
 517     {0xF0, 0xB8},
 518     {0xF0, 0x38},
 519     {0xF1, 0x14},
 520     {0xF0, 0xB9},
 521     {0xF0, 0x39},
 522     {0xF1, 0x10},
 523     {0xF0, 0xBA},
 524     {0xF0, 0x3A},
 525     {0xF1, 0x0C},
 526     {0xF0, 0xBB},
 527     {0xF0, 0x3B},
 528     {0xF1, 0x08},
 529     {0xF0, 0x00},
 530     {0xF0, 0x3C},
 531     {0xF1, 0x04},
 532     {0xF0, 0xBD},
 533     {0xF0, 0x3D},
 534     {0xF1, 0x00},
 535     {0xF0, 0xBE},
 536     {0xF0, 0x3E},
 537     {0xF1, 0x00},
 538     {0xF0, 0xBF},
 539     {0xF0, 0x3F},
 540     {0xF1, 0x00},
 541     {0xF0, 0xC0},
 542     {0xF0, 0x00},
 543 };
 544
 545 #define CB_VT3253B0_INIT_FOR_RFMD 256
 546 BYTE byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
 547     {0x00, 0x31},
 548     {0x01, 0x00},
 549     {0x02, 0x00},
 550     {0x03, 0x00},
 551     {0x04, 0x00},
 552     {0x05, 0x81},
 553     {0x06, 0x00},
 554     {0x07, 0x00},
 555     {0x08, 0x38},
 556     {0x09, 0x45},
 557     {0x0a, 0x2a},
 558     {0x0b, 0x76},
 559     {0x0c, 0x00},
 560     {0x0d, 0x00},
 561     {0x0e, 0x80},
 562     {0x0f, 0x00},
 563     {0x10, 0x00},
 564     {0x11, 0x00},
 565     {0x12, 0x00},
 566     {0x13, 0x00},
 567     {0x14, 0x00},
 568     {0x15, 0x00},
 569     {0x16, 0x00},
 570     {0x17, 0x00},
 571     {0x18, 0x00},
 572     {0x19, 0x00},
 573     {0x1a, 0x00},
 574     {0x1b, 0x8e},
 575     {0x1c, 0x06},
 576     {0x1d, 0x00},
 577     {0x1e, 0x00},
 578     {0x1f, 0x00},
 579     {0x20, 0x00},
 580     {0x21, 0x00},
 581     {0x22, 0x00},
 582     {0x23, 0x00},
 583     {0x24, 0x00},
 584     {0x25, 0x4a},
 585     {0x26, 0x00},
 586     {0x27, 0x00},
 587     {0x28, 0x00},
 588     {0x29, 0x00},
 589     {0x2a, 0x00},
 590     {0x2b, 0x00},
 591     {0x2c, 0x00},
 592     {0x2d, 0x34},
 593     {0x2e, 0x18},
 594     {0x2f, 0x0c},
 595     {0x30, 0x26},
 596     {0x31, 0x5b},
 597     {0x32, 0x00},
 598     {0x33, 0x00},
 599     {0x34, 0x00},
 600     {0x35, 0x00},
 601     {0x36, 0xaa},
 602     {0x37, 0xaa},
 603     {0x38, 0xff},
 604     {0x39, 0xff},
 605     {0x3a, 0xf8},
 606     {0x3b, 0x00},
 607     {0x3c, 0x00},
 608     {0x3d, 0x09},
 609     {0x3e, 0x0d},
 610     {0x3f, 0x04},
 611     {0x40, 0x00},
 612     {0x41, 0x08},
 613     {0x42, 0x00},
 614     {0x43, 0x08},
 615     {0x44, 0x08},
 616     {0x45, 0x14},
 617     {0x46, 0x05},
 618     {0x47, 0x08},
 619     {0x48, 0x00},
 620     {0x49, 0x00},
 621     {0x4a, 0x00},
 622     {0x4b, 0x00},
 623     {0x4c, 0x09},
 624     {0x4d, 0x80},
 625     {0x4e, 0x00},
 626     {0x4f, 0xc5},
 627     {0x50, 0x14},
 628     {0x51, 0x19},
 629     {0x52, 0x00},
 630     {0x53, 0x00},
 631     {0x54, 0x00},
 632     {0x55, 0x00},
 633     {0x56, 0x00},
 634     {0x57, 0x00},
 635     {0x58, 0x00},
 636     {0x59, 0xb0},
 637     {0x5a, 0x00},
 638     {0x5b, 0x00},
 639     {0x5c, 0x00},
 640     {0x5d, 0x00},
 641     {0x5e, 0x00},
 642     {0x5f, 0x00},
 643     {0x60, 0x39},
 644     {0x61, 0x83},
 645     {0x62, 0x00},
 646     {0x63, 0x00},
 647     {0x64, 0x00},
 648     {0x65, 0x00},
 649     {0x66, 0xc0},
 650     {0x67, 0x49},
 651     {0x68, 0x00},
 652     {0x69, 0x00},
 653     {0x6a, 0x00},
 654     {0x6b, 0x00},
 655     {0x6c, 0x00},
 656     {0x6d, 0x03},
 657     {0x6e, 0x01},
 658     {0x6f, 0x00},
 659     {0x70, 0x00},
 660     {0x71, 0x00},
 661     {0x72, 0x00},
 662     {0x73, 0x00},
 663     {0x74, 0x00},
 664     {0x75, 0x00},
 665     {0x76, 0x00},
 666     {0x77, 0x00},
 667     {0x78, 0x00},
 668     {0x79, 0x00},
 669     {0x7a, 0x00},
 670     {0x7b, 0x00},
 671     {0x7c, 0x00},
 672     {0x7d, 0x00},
 673     {0x7e, 0x00},
 674     {0x7f, 0x00},
 675     {0x80, 0x89},
 676     {0x81, 0x00},
 677     {0x82, 0x0e},
 678     {0x83, 0x00},
 679     {0x84, 0x00},
 680     {0x85, 0x00},
 681     {0x86, 0x00},
 682     {0x87, 0x00},
 683     {0x88, 0x08},
 684     {0x89, 0x00},
 685     {0x8a, 0x0e},
 686     {0x8b, 0xa7},
 687     {0x8c, 0x88},
 688     {0x8d, 0x47},
 689     {0x8e, 0xaa},
 690     {0x8f, 0x02},
 691     {0x90, 0x23},
 692     {0x91, 0x0c},
 693     {0x92, 0x06},
 694     {0x93, 0x08},
 695     {0x94, 0x00},
 696     {0x95, 0x00},
 697     {0x96, 0x00},
 698     {0x97, 0xeb},
 699     {0x98, 0x00},
 700     {0x99, 0x00},
 701     {0x9a, 0x00},
 702     {0x9b, 0x00},
 703     {0x9c, 0x00},
 704     {0x9d, 0x00},
 705     {0x9e, 0x00},
 706     {0x9f, 0x00},
 707     {0xa0, 0x00},
 708     {0xa1, 0x00},
 709     {0xa2, 0x00},
 710     {0xa3, 0xcd},
 711     {0xa4, 0x07},
 712     {0xa5, 0x33},
 713     {0xa6, 0x18},
 714     {0xa7, 0x00},
 715     {0xa8, 0x18},
 716     {0xa9, 0x00},
 717     {0xaa, 0x28},
 718     {0xab, 0x00},
 719     {0xac, 0x00},
 720     {0xad, 0x00},
 721     {0xae, 0x00},
 722     {0xaf, 0x18},
 723     {0xb0, 0x38},
 724     {0xb1, 0x30},
 725     {0xb2, 0x00},
 726     {0xb3, 0x00},
 727     {0xb4, 0x00},
 728     {0xb5, 0x00},
 729     {0xb6, 0x84},
 730     {0xb7, 0xfd},
 731     {0xb8, 0x00},
 732     {0xb9, 0x00},
 733     {0xba, 0x00},
 734     {0xbb, 0x03},
 735     {0xbc, 0x00},
 736     {0xbd, 0x00},
 737     {0xbe, 0x00},
 738     {0xbf, 0x00},
 739     {0xc0, 0x10},
 740     {0xc1, 0x20},
 741     {0xc2, 0x18},
 742     {0xc3, 0x20},
 743     {0xc4, 0x10},
 744     {0xc5, 0x2c},
 745     {0xc6, 0x1e},
 746     {0xc7, 0x10},
 747     {0xc8, 0x12},
 748     {0xc9, 0x01},
 749     {0xca, 0x6f},
 750     {0xcb, 0xa7},
 751     {0xcc, 0x3c},
 752     {0xcd, 0x10},
 753     {0xce, 0x00},
 754     {0xcf, 0x22},
 755     {0xd0, 0x00},
 756     {0xd1, 0x10},
 757     {0xd2, 0x00},
 758     {0xd3, 0x00},
 759     {0xd4, 0x10},
 760     {0xd5, 0x33},
 761     {0xd6, 0x80},
 762     {0xd7, 0x21},
 763     {0xd8, 0x00},
 764     {0xd9, 0x00},
 765     {0xda, 0x00},
 766     {0xdb, 0x00},
 767     {0xdc, 0x00},
 768     {0xdd, 0x00},
 769     {0xde, 0x00},
 770     {0xdf, 0x00},
 771     {0xe0, 0x00},
 772     {0xe1, 0xB3},
 773     {0xe2, 0x00},
 774     {0xe3, 0x00},
 775     {0xe4, 0x00},
 776     {0xe5, 0x10},
 777     {0xe6, 0x00},
 778     {0xe7, 0x18},
 779     {0xe8, 0x08},
 780     {0xe9, 0xd4},
 781     {0xea, 0x00},
 782     {0xeb, 0xff},
 783     {0xec, 0x79},
 784     {0xed, 0x10},
 785     {0xee, 0x30},
 786     {0xef, 0x02},
 787     {0xf0, 0x00},
 788     {0xf1, 0x09},
 789     {0xf2, 0x00},
 790     {0xf3, 0x00},
 791     {0xf4, 0x00},
 792     {0xf5, 0x00},
 793     {0xf6, 0x00},
 794     {0xf7, 0x00},
 795     {0xf8, 0x00},
 796     {0xf9, 0x00},
 797     {0xfa, 0x00},
 798     {0xfb, 0x00},
 799     {0xfc, 0x00},
 800     {0xfd, 0x00},
 801     {0xfe, 0x00},
 802     {0xff, 0x00},
 803 };
 804
 805 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
 806 // For RFMD2959
 807 BYTE byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
 808     {0xF0, 0x00},
 809     {0xF1, 0x3E},
 810     {0xF0, 0x80},
 811     {0xF0, 0x00},
 812     {0xF1, 0x3E},
 813     {0xF0, 0x81},
 814     {0xF0, 0x01},
 815     {0xF1, 0x3E},
 816     {0xF0, 0x82},
 817     {0xF0, 0x02},
 818     {0xF1, 0x3E},
 819     {0xF0, 0x83},
 820     {0xF0, 0x03},
 821     {0xF1, 0x3B},
 822     {0xF0, 0x84},
 823     {0xF0, 0x04},
 824     {0xF1, 0x39},
 825     {0xF0, 0x85},
 826     {0xF0, 0x05},
 827     {0xF1, 0x38},
 828     {0xF0, 0x86},
 829     {0xF0, 0x06},
 830     {0xF1, 0x37},
 831     {0xF0, 0x87},
 832     {0xF0, 0x07},
 833     {0xF1, 0x36},
 834     {0xF0, 0x88},
 835     {0xF0, 0x08},
 836     {0xF1, 0x35},
 837     {0xF0, 0x89},
 838     {0xF0, 0x09},
 839     {0xF1, 0x35},
 840     {0xF0, 0x8A},
 841     {0xF0, 0x0A},
 842     {0xF1, 0x34},
 843     {0xF0, 0x8B},
 844     {0xF0, 0x0B},
 845     {0xF1, 0x34},
 846     {0xF0, 0x8C},
 847     {0xF0, 0x0C},
 848     {0xF1, 0x33},
 849     {0xF0, 0x8D},
 850     {0xF0, 0x0D},
 851     {0xF1, 0x32},
 852     {0xF0, 0x8E},
 853     {0xF0, 0x0E},
 854     {0xF1, 0x31},
 855     {0xF0, 0x8F},
 856     {0xF0, 0x0F},
 857     {0xF1, 0x30},
 858     {0xF0, 0x90},
 859     {0xF0, 0x10},
 860     {0xF1, 0x2F},
 861     {0xF0, 0x91},
 862     {0xF0, 0x11},
 863     {0xF1, 0x2F},
 864     {0xF0, 0x92},
 865     {0xF0, 0x12},
 866     {0xF1, 0x2E},
 867     {0xF0, 0x93},
 868     {0xF0, 0x13},
 869     {0xF1, 0x2D},
 870     {0xF0, 0x94},
 871     {0xF0, 0x14},
 872     {0xF1, 0x2C},
 873     {0xF0, 0x95},
 874     {0xF0, 0x15},
 875     {0xF1, 0x2B},
 876     {0xF0, 0x96},
 877     {0xF0, 0x16},
 878     {0xF1, 0x2B},
 879     {0xF0, 0x97},
 880     {0xF0, 0x17},
 881     {0xF1, 0x2A},
 882     {0xF0, 0x98},
 883     {0xF0, 0x18},
 884     {0xF1, 0x29},
 885     {0xF0, 0x99},
 886     {0xF0, 0x19},
 887     {0xF1, 0x28},
 888     {0xF0, 0x9A},
 889     {0xF0, 0x1A},
 890     {0xF1, 0x27},
 891     {0xF0, 0x9B},
 892     {0xF0, 0x1B},
 893     {0xF1, 0x26},
 894     {0xF0, 0x9C},
 895     {0xF0, 0x1C},
 896     {0xF1, 0x25},
 897     {0xF0, 0x9D},
 898     {0xF0, 0x1D},
 899     {0xF1, 0x24},
 900     {0xF0, 0x9E},
 901     {0xF0, 0x1E},
 902     {0xF1, 0x24},
 903     {0xF0, 0x9F},
 904     {0xF0, 0x1F},
 905     {0xF1, 0x23},
 906     {0xF0, 0xA0},
 907     {0xF0, 0x20},
 908     {0xF1, 0x22},
 909     {0xF0, 0xA1},
 910     {0xF0, 0x21},
 911     {0xF1, 0x21},
 912     {0xF0, 0xA2},
 913     {0xF0, 0x22},
 914     {0xF1, 0x20},
 915     {0xF0, 0xA3},
 916     {0xF0, 0x23},
 917     {0xF1, 0x20},
 918     {0xF0, 0xA4},
 919     {0xF0, 0x24},
 920     {0xF1, 0x1F},
 921     {0xF0, 0xA5},
 922     {0xF0, 0x25},
 923     {0xF1, 0x1E},
 924     {0xF0, 0xA6},
 925     {0xF0, 0x26},
 926     {0xF1, 0x1D},
 927     {0xF0, 0xA7},
 928     {0xF0, 0x27},
 929     {0xF1, 0x1C},
 930     {0xF0, 0xA8},
 931     {0xF0, 0x28},
 932     {0xF1, 0x1B},
 933     {0xF0, 0xA9},
 934     {0xF0, 0x29},
 935     {0xF1, 0x1B},
 936     {0xF0, 0xAA},
 937     {0xF0, 0x2A},
 938     {0xF1, 0x1A},
 939     {0xF0, 0xAB},
 940     {0xF0, 0x2B},
 941     {0xF1, 0x1A},
 942     {0xF0, 0xAC},
 943     {0xF0, 0x2C},
 944     {0xF1, 0x19},
 945     {0xF0, 0xAD},
 946     {0xF0, 0x2D},
 947     {0xF1, 0x18},
 948     {0xF0, 0xAE},
 949     {0xF0, 0x2E},
 950     {0xF1, 0x17},
 951     {0xF0, 0xAF},
 952     {0xF0, 0x2F},
 953     {0xF1, 0x16},
 954     {0xF0, 0xB0},
 955     {0xF0, 0x30},
 956     {0xF1, 0x15},
 957     {0xF0, 0xB1},
 958     {0xF0, 0x31},
 959     {0xF1, 0x15},
 960     {0xF0, 0xB2},
 961     {0xF0, 0x32},
 962     {0xF1, 0x15},
 963     {0xF0, 0xB3},
 964     {0xF0, 0x33},
 965     {0xF1, 0x14},
 966     {0xF0, 0xB4},
 967     {0xF0, 0x34},
 968     {0xF1, 0x13},
 969     {0xF0, 0xB5},
 970     {0xF0, 0x35},
 971     {0xF1, 0x12},
 972     {0xF0, 0xB6},
 973     {0xF0, 0x36},
 974     {0xF1, 0x11},
 975     {0xF0, 0xB7},
 976     {0xF0, 0x37},
 977     {0xF1, 0x10},
 978     {0xF0, 0xB8},
 979     {0xF0, 0x38},
 980     {0xF1, 0x0F},
 981     {0xF0, 0xB9},
 982     {0xF0, 0x39},
 983     {0xF1, 0x0E},
 984     {0xF0, 0xBA},
 985     {0xF0, 0x3A},
 986     {0xF1, 0x0D},
 987     {0xF0, 0xBB},
 988     {0xF0, 0x3B},
 989     {0xF1, 0x0C},
 990     {0xF0, 0xBC},
 991     {0xF0, 0x3C},
 992     {0xF1, 0x0B},
 993     {0xF0, 0xBD},
 994     {0xF0, 0x3D},
 995     {0xF1, 0x0B},
 996     {0xF0, 0xBE},
 997     {0xF0, 0x3E},
 998     {0xF1, 0x0A},
 999     {0xF0, 0xBF},
1000     {0xF0, 0x3F},
1001     {0xF1, 0x09},
1002     {0xF0, 0x00},
1003 };
1004
1005 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
1006 // For AIROHA
1007 BYTE byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
1008     {0x00, 0x31},
1009     {0x01, 0x00},
1010     {0x02, 0x00},
1011     {0x03, 0x00},
1012     {0x04, 0x00},
1013     {0x05, 0x80},
1014     {0x06, 0x00},
1015     {0x07, 0x00},
1016     {0x08, 0x70},
1017     {0x09, 0x41},
1018     {0x0a, 0x2A},
1019     {0x0b, 0x76},
1020     {0x0c, 0x00},
1021     {0x0d, 0x00},
1022     {0x0e, 0x80},
1023     {0x0f, 0x00},
1024     {0x10, 0x00},
1025     {0x11, 0x00},
1026     {0x12, 0x00},
1027     {0x13, 0x00},
1028     {0x14, 0x00},
1029     {0x15, 0x00},
1030     {0x16, 0x00},
1031     {0x17, 0x00},
1032     {0x18, 0x00},
1033     {0x19, 0x00},
1034     {0x1a, 0x00},
1035     {0x1b, 0x8f},
1036     {0x1c, 0x09},
1037     {0x1d, 0x00},
1038     {0x1e, 0x00},
1039     {0x1f, 0x00},
1040     {0x20, 0x00},
1041     {0x21, 0x00},
1042     {0x22, 0x00},
1043     {0x23, 0x00},
1044     {0x24, 0x00},
1045     {0x25, 0x4a},
1046     {0x26, 0x00},
1047     {0x27, 0x00},
1048     {0x28, 0x00},
1049     {0x29, 0x00},
1050     {0x2a, 0x00},
1051     {0x2b, 0x00},
1052     {0x2c, 0x00},
1053     {0x2d, 0x4a},
1054     {0x2e, 0x00},
1055     {0x2f, 0x0a},
1056     {0x30, 0x26},
1057     {0x31, 0x5b},
1058     {0x32, 0x00},
1059     {0x33, 0x00},
1060     {0x34, 0x00},
1061     {0x35, 0x00},
1062     {0x36, 0xaa},
1063     {0x37, 0xaa},
1064     {0x38, 0xff},
1065     {0x39, 0xff},
1066     {0x3a, 0x79},
1067     {0x3b, 0x00},
1068     {0x3c, 0x00},
1069     {0x3d, 0x0b},
1070     {0x3e, 0x48},
1071     {0x3f, 0x04},
1072     {0x40, 0x00},
1073     {0x41, 0x08},
1074     {0x42, 0x00},
1075     {0x43, 0x08},
1076     {0x44, 0x08},
1077     {0x45, 0x14},
1078     {0x46, 0x05},
1079     {0x47, 0x09},
1080     {0x48, 0x00},
1081     {0x49, 0x00},
1082     {0x4a, 0x00},
1083     {0x4b, 0x00},
1084     {0x4c, 0x09},
1085     {0x4d, 0x73},
1086     {0x4e, 0x00},
1087     {0x4f, 0xc5},
1088     {0x50, 0x15},
1089     {0x51, 0x19},
1090     {0x52, 0x00},
1091     {0x53, 0x00},
1092     {0x54, 0x00},
1093     {0x55, 0x00},
1094     {0x56, 0x00},
1095     {0x57, 0x00},
1096     {0x58, 0x00},
1097     {0x59, 0xb0},
1098     {0x5a, 0x00},
1099     {0x5b, 0x00},
1100     {0x5c, 0x00},
1101     {0x5d, 0x00},
1102     {0x5e, 0x00},
1103     {0x5f, 0x00},
1104     {0x60, 0xe4},
1105     {0x61, 0x80},
1106     {0x62, 0x00},
1107     {0x63, 0x00},
1108     {0x64, 0x00},
1109     {0x65, 0x00},
1110     {0x66, 0x98},
1111     {0x67, 0x0a},
1112     {0x68, 0x00},
1113     {0x69, 0x00},
1114     {0x6a, 0x00},
1115     {0x6b, 0x00},
1116     //{0x6c, 0x80},
1117     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1118     {0x6d, 0x03},
1119     {0x6e, 0x01},
1120     {0x6f, 0x00},
1121     {0x70, 0x00},
1122     {0x71, 0x00},
1123     {0x72, 0x00},
1124     {0x73, 0x00},
1125     {0x74, 0x00},
1126     {0x75, 0x00},
1127     {0x76, 0x00},
1128     {0x77, 0x00},
1129     {0x78, 0x00},
1130     {0x79, 0x00},
1131     {0x7a, 0x00},
1132     {0x7b, 0x00},
1133     {0x7c, 0x00},
1134     {0x7d, 0x00},
1135     {0x7e, 0x00},
1136     {0x7f, 0x00},
1137     {0x80, 0x8c},
1138     {0x81, 0x01},
1139     {0x82, 0x09},
1140     {0x83, 0x00},
1141     {0x84, 0x00},
1142     {0x85, 0x00},
1143     {0x86, 0x00},
1144     {0x87, 0x00},
1145     {0x88, 0x08},
1146     {0x89, 0x00},
1147     {0x8a, 0x0f},
1148     {0x8b, 0xb7},
1149     {0x8c, 0x88},
1150     {0x8d, 0x47},
1151     {0x8e, 0xaa},
1152     {0x8f, 0x02},
1153     {0x90, 0x22},
1154     {0x91, 0x00},
1155     {0x92, 0x00},
1156     {0x93, 0x00},
1157     {0x94, 0x00},
1158     {0x95, 0x00},
1159     {0x96, 0x00},
1160     {0x97, 0xeb},
1161     {0x98, 0x00},
1162     {0x99, 0x00},
1163     {0x9a, 0x00},
1164     {0x9b, 0x00},
1165     {0x9c, 0x00},
1166     {0x9d, 0x00},
1167     {0x9e, 0x00},
1168     {0x9f, 0x01},
1169     {0xa0, 0x00},
1170     {0xa1, 0x00},
1171     {0xa2, 0x00},
1172     {0xa3, 0x00},
1173     {0xa4, 0x00},
1174     {0xa5, 0x00},
1175     {0xa6, 0x10},
1176     {0xa7, 0x00},
1177     {0xa8, 0x18},
1178     {0xa9, 0x00},
1179     {0xaa, 0x00},
1180     {0xab, 0x00},
1181     {0xac, 0x00},
1182     {0xad, 0x00},
1183     {0xae, 0x00},
1184     {0xaf, 0x18},
1185     {0xb0, 0x38},
1186     {0xb1, 0x30},
1187     {0xb2, 0x00},
1188     {0xb3, 0x00},
1189     {0xb4, 0xff},
1190     {0xb5, 0x0f},
1191     {0xb6, 0xe4},
1192     {0xb7, 0xe2},
1193     {0xb8, 0x00},
1194     {0xb9, 0x00},
1195     {0xba, 0x00},
1196     {0xbb, 0x03},
1197     {0xbc, 0x01},
1198     {0xbd, 0x00},
1199     {0xbe, 0x00},
1200     {0xbf, 0x00},
1201     {0xc0, 0x18},
1202     {0xc1, 0x20},
1203     {0xc2, 0x07},
1204     {0xc3, 0x18},
1205     {0xc4, 0xff},
1206     {0xc5, 0x2c},
1207     {0xc6, 0x0c},
1208     {0xc7, 0x0a},
1209     {0xc8, 0x0e},
1210     {0xc9, 0x01},
1211     {0xca, 0x68},
1212     {0xcb, 0xa7},
1213     {0xcc, 0x3c},
1214     {0xcd, 0x10},
1215     {0xce, 0x00},
1216     {0xcf, 0x25},
1217     {0xd0, 0x40},
1218     {0xd1, 0x12},
1219     {0xd2, 0x00},
1220     {0xd3, 0x00},
1221     {0xd4, 0x10},
1222     {0xd5, 0x28},
1223     {0xd6, 0x80},
1224     {0xd7, 0x2A},
1225     {0xd8, 0x00},
1226     {0xd9, 0x00},
1227     {0xda, 0x00},
1228     {0xdb, 0x00},
1229     {0xdc, 0x00},
1230     {0xdd, 0x00},
1231     {0xde, 0x00},
1232     {0xdf, 0x00},
1233     {0xe0, 0x00},
1234     {0xe1, 0xB3},
1235     {0xe2, 0x00},
1236     {0xe3, 0x00},
1237     {0xe4, 0x00},
1238     {0xe5, 0x10},
1239     {0xe6, 0x00},
1240     {0xe7, 0x1C},
1241     {0xe8, 0x00},
1242     {0xe9, 0xf4},
1243     {0xea, 0x00},
1244     {0xeb, 0xff},
1245     {0xec, 0x79},
1246     {0xed, 0x20},
1247     {0xee, 0x30},
1248     {0xef, 0x01},
1249     {0xf0, 0x00},
1250     {0xf1, 0x3e},
1251     {0xf2, 0x00},
1252     {0xf3, 0x00},
1253     {0xf4, 0x00},
1254     {0xf5, 0x00},
1255     {0xf6, 0x00},
1256     {0xf7, 0x00},
1257     {0xf8, 0x00},
1258     {0xf9, 0x00},
1259     {0xfa, 0x00},
1260     {0xfb, 0x00},
1261     {0xfc, 0x00},
1262     {0xfd, 0x00},
1263     {0xfe, 0x00},
1264     {0xff, 0x00},
1265 };
1266
1267
1268
1269 #define CB_VT3253B0_INIT_FOR_UW2451 256
1270 //For UW2451
1271 BYTE byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1272     {0x00, 0x31},
1273     {0x01, 0x00},
1274     {0x02, 0x00},
1275     {0x03, 0x00},
1276     {0x04, 0x00},
1277     {0x05, 0x81},
1278     {0x06, 0x00},
1279     {0x07, 0x00},
1280     {0x08, 0x38},
1281     {0x09, 0x45},
1282     {0x0a, 0x28},
1283     {0x0b, 0x76},
1284     {0x0c, 0x00},
1285     {0x0d, 0x00},
1286     {0x0e, 0x80},
1287     {0x0f, 0x00},
1288     {0x10, 0x00},
1289     {0x11, 0x00},
1290     {0x12, 0x00},
1291     {0x13, 0x00},
1292     {0x14, 0x00},
1293     {0x15, 0x00},
1294     {0x16, 0x00},
1295     {0x17, 0x00},
1296     {0x18, 0x00},
1297     {0x19, 0x00},
1298     {0x1a, 0x00},
1299     {0x1b, 0x8f},
1300     {0x1c, 0x0f},
1301     {0x1d, 0x00},
1302     {0x1e, 0x00},
1303     {0x1f, 0x00},
1304     {0x20, 0x00},
1305     {0x21, 0x00},
1306     {0x22, 0x00},
1307     {0x23, 0x00},
1308     {0x24, 0x00},
1309     {0x25, 0x4a},
1310     {0x26, 0x00},
1311     {0x27, 0x00},
1312     {0x28, 0x00},
1313     {0x29, 0x00},
1314     {0x2a, 0x00},
1315     {0x2b, 0x00},
1316     {0x2c, 0x00},
1317     {0x2d, 0x18},
1318     {0x2e, 0x00},
1319     {0x2f, 0x0a},
1320     {0x30, 0x26},
1321     {0x31, 0x5b},
1322     {0x32, 0x00},
1323     {0x33, 0x00},
1324     {0x34, 0x00},
1325     {0x35, 0x00},
1326     {0x36, 0xaa},
1327     {0x37, 0xaa},
1328     {0x38, 0xff},
1329     {0x39, 0xff},
1330     {0x3a, 0x00},
1331     {0x3b, 0x00},
1332     {0x3c, 0x00},
1333     {0x3d, 0x03},
1334     {0x3e, 0x1d},
1335     {0x3f, 0x04},
1336     {0x40, 0x00},
1337     {0x41, 0x08},
1338     {0x42, 0x00},
1339     {0x43, 0x08},
1340     {0x44, 0x08},
1341     {0x45, 0x14},
1342     {0x46, 0x05},
1343     {0x47, 0x09},
1344     {0x48, 0x00},
1345     {0x49, 0x00},
1346     {0x4a, 0x00},
1347     {0x4b, 0x00},
1348     {0x4c, 0x09},
1349     {0x4d, 0x90},
1350     {0x4e, 0x00},
1351     {0x4f, 0xc5},
1352     {0x50, 0x15},
1353     {0x51, 0x19},
1354     {0x52, 0x00},
1355     {0x53, 0x00},
1356     {0x54, 0x00},
1357     {0x55, 0x00},
1358     {0x56, 0x00},
1359     {0x57, 0x00},
1360     {0x58, 0x00},
1361     {0x59, 0xb0},
1362     {0x5a, 0x00},
1363     {0x5b, 0x00},
1364     {0x5c, 0x00},
1365     {0x5d, 0x00},
1366     {0x5e, 0x00},
1367     {0x5f, 0x00},
1368     {0x60, 0xb3},
1369     {0x61, 0x81},
1370     {0x62, 0x00},
1371     {0x63, 0x00},
1372     {0x64, 0x00},
1373     {0x65, 0x00},
1374     {0x66, 0x57},
1375     {0x67, 0x6c},
1376     {0x68, 0x00},
1377     {0x69, 0x00},
1378     {0x6a, 0x00},
1379     {0x6b, 0x00},
1380     //{0x6c, 0x80},
1381     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1382     {0x6d, 0x03},
1383     {0x6e, 0x01},
1384     {0x6f, 0x00},
1385     {0x70, 0x00},
1386     {0x71, 0x00},
1387     {0x72, 0x00},
1388     {0x73, 0x00},
1389     {0x74, 0x00},
1390     {0x75, 0x00},
1391     {0x76, 0x00},
1392     {0x77, 0x00},
1393     {0x78, 0x00},
1394     {0x79, 0x00},
1395     {0x7a, 0x00},
1396     {0x7b, 0x00},
1397     {0x7c, 0x00},
1398     {0x7d, 0x00},
1399     {0x7e, 0x00},
1400     {0x7f, 0x00},
1401     {0x80, 0x8c},
1402     {0x81, 0x00},
1403     {0x82, 0x0e},
1404     {0x83, 0x00},
1405     {0x84, 0x00},
1406     {0x85, 0x00},
1407     {0x86, 0x00},
1408     {0x87, 0x00},
1409     {0x88, 0x08},
1410     {0x89, 0x00},
1411     {0x8a, 0x0e},
1412     {0x8b, 0xa7},
1413     {0x8c, 0x88},
1414     {0x8d, 0x47},
1415     {0x8e, 0xaa},
1416     {0x8f, 0x02},
1417     {0x90, 0x00},
1418     {0x91, 0x00},
1419     {0x92, 0x00},
1420     {0x93, 0x00},
1421     {0x94, 0x00},
1422     {0x95, 0x00},
1423     {0x96, 0x00},
1424     {0x97, 0xe3},
1425     {0x98, 0x00},
1426     {0x99, 0x00},
1427     {0x9a, 0x00},
1428     {0x9b, 0x00},
1429     {0x9c, 0x00},
1430     {0x9d, 0x00},
1431     {0x9e, 0x00},
1432     {0x9f, 0x00},
1433     {0xa0, 0x00},
1434     {0xa1, 0x00},
1435     {0xa2, 0x00},
1436     {0xa3, 0x00},
1437     {0xa4, 0x00},
1438     {0xa5, 0x00},
1439     {0xa6, 0x10},
1440     {0xa7, 0x00},
1441     {0xa8, 0x18},
1442     {0xa9, 0x00},
1443     {0xaa, 0x00},
1444     {0xab, 0x00},
1445     {0xac, 0x00},
1446     {0xad, 0x00},
1447     {0xae, 0x00},
1448     {0xaf, 0x18},
1449     {0xb0, 0x18},
1450     {0xb1, 0x30},
1451     {0xb2, 0x00},
1452     {0xb3, 0x00},
1453     {0xb4, 0x00},
1454     {0xb5, 0x00},
1455     {0xb6, 0x00},
1456     {0xb7, 0x00},
1457     {0xb8, 0x00},
1458     {0xb9, 0x00},
1459     {0xba, 0x00},
1460     {0xbb, 0x03},
1461     {0xbc, 0x01},
1462     {0xbd, 0x00},
1463     {0xbe, 0x00},
1464     {0xbf, 0x00},
1465     {0xc0, 0x10},
1466     {0xc1, 0x20},
1467     {0xc2, 0x00},
1468     {0xc3, 0x20},
1469     {0xc4, 0x00},
1470     {0xc5, 0x2c},
1471     {0xc6, 0x1c},
1472     {0xc7, 0x10},
1473     {0xc8, 0x10},
1474     {0xc9, 0x01},
1475     {0xca, 0x68},
1476     {0xcb, 0xa7},
1477     {0xcc, 0x3c},
1478     {0xcd, 0x09},
1479     {0xce, 0x00},
1480     {0xcf, 0x20},
1481     {0xd0, 0x40},
1482     {0xd1, 0x10},
1483     {0xd2, 0x00},
1484     {0xd3, 0x00},
1485     {0xd4, 0x20},
1486     {0xd5, 0x28},
1487     {0xd6, 0xa0},
1488     {0xd7, 0x2a},
1489     {0xd8, 0x00},
1490     {0xd9, 0x00},
1491     {0xda, 0x00},
1492     {0xdb, 0x00},
1493     {0xdc, 0x00},
1494     {0xdd, 0x00},
1495     {0xde, 0x00},
1496     {0xdf, 0x00},
1497     {0xe0, 0x00},
1498     {0xe1, 0xd3},
1499     {0xe2, 0xc0},
1500     {0xe3, 0x00},
1501     {0xe4, 0x00},
1502     {0xe5, 0x10},
1503     {0xe6, 0x00},
1504     {0xe7, 0x12},
1505     {0xe8, 0x12},
1506     {0xe9, 0x34},
1507     {0xea, 0x00},
1508     {0xeb, 0xff},
1509     {0xec, 0x79},
1510     {0xed, 0x20},
1511     {0xee, 0x30},
1512     {0xef, 0x01},
1513     {0xf0, 0x00},
1514     {0xf1, 0x3e},
1515     {0xf2, 0x00},
1516     {0xf3, 0x00},
1517     {0xf4, 0x00},
1518     {0xf5, 0x00},
1519     {0xf6, 0x00},
1520     {0xf7, 0x00},
1521     {0xf8, 0x00},
1522     {0xf9, 0x00},
1523     {0xfa, 0x00},
1524     {0xfb, 0x00},
1525     {0xfc, 0x00},
1526     {0xfd, 0x00},
1527     {0xfe, 0x00},
1528     {0xff, 0x00},
1529 };
1530
1531 #define CB_VT3253B0_AGC 193
1532 // For AIROHA
1533 BYTE byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1534     {0xF0, 0x00},
1535     {0xF1, 0x00},
1536     {0xF0, 0x80},
1537     {0xF0, 0x01},
1538     {0xF1, 0x00},
1539     {0xF0, 0x81},
1540     {0xF0, 0x02},
1541     {0xF1, 0x02},
1542     {0xF0, 0x82},
1543     {0xF0, 0x03},
1544     {0xF1, 0x04},
1545     {0xF0, 0x83},
1546     {0xF0, 0x03},
1547     {0xF1, 0x04},
1548     {0xF0, 0x84},
1549     {0xF0, 0x04},
1550     {0xF1, 0x06},
1551     {0xF0, 0x85},
1552     {0xF0, 0x05},
1553     {0xF1, 0x06},
1554     {0xF0, 0x86},
1555     {0xF0, 0x06},
1556     {0xF1, 0x06},
1557     {0xF0, 0x87},
1558     {0xF0, 0x07},
1559     {0xF1, 0x08},
1560     {0xF0, 0x88},
1561     {0xF0, 0x08},
1562     {0xF1, 0x08},
1563     {0xF0, 0x89},
1564     {0xF0, 0x09},
1565     {0xF1, 0x0A},
1566     {0xF0, 0x8A},
1567     {0xF0, 0x0A},
1568     {0xF1, 0x0A},
1569     {0xF0, 0x8B},
1570     {0xF0, 0x0B},
1571     {0xF1, 0x0C},
1572     {0xF0, 0x8C},
1573     {0xF0, 0x0C},
1574     {0xF1, 0x0C},
1575     {0xF0, 0x8D},
1576     {0xF0, 0x0D},
1577     {0xF1, 0x0E},
1578     {0xF0, 0x8E},
1579     {0xF0, 0x0E},
1580     {0xF1, 0x0E},
1581     {0xF0, 0x8F},
1582     {0xF0, 0x0F},
1583     {0xF1, 0x10},
1584     {0xF0, 0x90},
1585     {0xF0, 0x10},
1586     {0xF1, 0x10},
1587     {0xF0, 0x91},
1588     {0xF0, 0x11},
1589     {0xF1, 0x12},
1590     {0xF0, 0x92},
1591     {0xF0, 0x12},
1592     {0xF1, 0x12},
1593     {0xF0, 0x93},
1594     {0xF0, 0x13},
1595     {0xF1, 0x14},
1596     {0xF0, 0x94},
1597     {0xF0, 0x14},
1598     {0xF1, 0x14},
1599     {0xF0, 0x95},
1600     {0xF0, 0x15},
1601     {0xF1, 0x16},
1602     {0xF0, 0x96},
1603     {0xF0, 0x16},
1604     {0xF1, 0x16},
1605     {0xF0, 0x97},
1606     {0xF0, 0x17},
1607     {0xF1, 0x18},
1608     {0xF0, 0x98},
1609     {0xF0, 0x18},
1610     {0xF1, 0x18},
1611     {0xF0, 0x99},
1612     {0xF0, 0x19},
1613     {0xF1, 0x1A},
1614     {0xF0, 0x9A},
1615     {0xF0, 0x1A},
1616     {0xF1, 0x1A},
1617     {0xF0, 0x9B},
1618     {0xF0, 0x1B},
1619     {0xF1, 0x1C},
1620     {0xF0, 0x9C},
1621     {0xF0, 0x1C},
1622     {0xF1, 0x1C},
1623     {0xF0, 0x9D},
1624     {0xF0, 0x1D},
1625     {0xF1, 0x1E},
1626     {0xF0, 0x9E},
1627     {0xF0, 0x1E},
1628     {0xF1, 0x1E},
1629     {0xF0, 0x9F},
1630     {0xF0, 0x1F},
1631     {0xF1, 0x20},
1632     {0xF0, 0xA0},
1633     {0xF0, 0x20},
1634     {0xF1, 0x20},
1635     {0xF0, 0xA1},
1636     {0xF0, 0x21},
1637     {0xF1, 0x22},
1638     {0xF0, 0xA2},
1639     {0xF0, 0x22},
1640     {0xF1, 0x22},
1641     {0xF0, 0xA3},
1642     {0xF0, 0x23},
1643     {0xF1, 0x24},
1644     {0xF0, 0xA4},
1645     {0xF0, 0x24},
1646     {0xF1, 0x24},
1647     {0xF0, 0xA5},
1648     {0xF0, 0x25},
1649     {0xF1, 0x26},
1650     {0xF0, 0xA6},
1651     {0xF0, 0x26},
1652     {0xF1, 0x26},
1653     {0xF0, 0xA7},
1654     {0xF0, 0x27},
1655     {0xF1, 0x28},
1656     {0xF0, 0xA8},
1657     {0xF0, 0x28},
1658     {0xF1, 0x28},
1659     {0xF0, 0xA9},
1660     {0xF0, 0x29},
1661     {0xF1, 0x2A},
1662     {0xF0, 0xAA},
1663     {0xF0, 0x2A},
1664     {0xF1, 0x2A},
1665     {0xF0, 0xAB},
1666     {0xF0, 0x2B},
1667     {0xF1, 0x2C},
1668     {0xF0, 0xAC},
1669     {0xF0, 0x2C},
1670     {0xF1, 0x2C},
1671     {0xF0, 0xAD},
1672     {0xF0, 0x2D},
1673     {0xF1, 0x2E},
1674     {0xF0, 0xAE},
1675     {0xF0, 0x2E},
1676     {0xF1, 0x2E},
1677     {0xF0, 0xAF},
1678     {0xF0, 0x2F},
1679     {0xF1, 0x30},
1680     {0xF0, 0xB0},
1681     {0xF0, 0x30},
1682     {0xF1, 0x30},
1683     {0xF0, 0xB1},
1684     {0xF0, 0x31},
1685     {0xF1, 0x32},
1686     {0xF0, 0xB2},
1687     {0xF0, 0x32},
1688     {0xF1, 0x32},
1689     {0xF0, 0xB3},
1690     {0xF0, 0x33},
1691     {0xF1, 0x34},
1692     {0xF0, 0xB4},
1693     {0xF0, 0x34},
1694     {0xF1, 0x34},
1695     {0xF0, 0xB5},
1696     {0xF0, 0x35},
1697     {0xF1, 0x36},
1698     {0xF0, 0xB6},
1699     {0xF0, 0x36},
1700     {0xF1, 0x36},
1701     {0xF0, 0xB7},
1702     {0xF0, 0x37},
1703     {0xF1, 0x38},
1704     {0xF0, 0xB8},
1705     {0xF0, 0x38},
1706     {0xF1, 0x38},
1707     {0xF0, 0xB9},
1708     {0xF0, 0x39},
1709     {0xF1, 0x3A},
1710     {0xF0, 0xBA},
1711     {0xF0, 0x3A},
1712     {0xF1, 0x3A},
1713     {0xF0, 0xBB},
1714     {0xF0, 0x3B},
1715     {0xF1, 0x3C},
1716     {0xF0, 0xBC},
1717     {0xF0, 0x3C},
1718     {0xF1, 0x3C},
1719     {0xF0, 0xBD},
1720     {0xF0, 0x3D},
1721     {0xF1, 0x3E},
1722     {0xF0, 0xBE},
1723     {0xF0, 0x3E},
1724     {0xF1, 0x3E},
1725     {0xF0, 0xBF},
1726     {0xF0, 0x00},
1727 };
1728
1729 const WORD awcFrameTime[MAX_RATE] =
1730 {10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
1731
1732
1733 /*---------------------  Static Functions  --------------------------*/
1734
1735 static
1736 ULONG
1737 s_ulGetRatio(PSDevice pDevice);
1738
1739 static
1740 VOID
1741 s_vChangeAntenna(
1742     IN PSDevice pDevice
1743     );
1744
1745 static
1746 VOID
1747 s_vChangeAntenna (
1748     IN PSDevice pDevice
1749     )
1750 {
1751
1752 #ifdef  PLICE_DEBUG
1753         //printk("Enter s_vChangeAntenna:original RxMode is %d,TxMode is %d\n",pDevice->byRxAntennaMode,pDevice->byTxAntennaMode);
1754 #endif
1755     if ( pDevice->dwRxAntennaSel == 0) {
1756         pDevice->dwRxAntennaSel=1;
1757         if (pDevice->bTxRxAntInv == TRUE)
1758             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1759         else
1760             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1761     } else {
1762         pDevice->dwRxAntennaSel=0;
1763         if (pDevice->bTxRxAntInv == TRUE)
1764             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1765         else
1766             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1767     }
1768     if ( pDevice->dwTxAntennaSel == 0) {
1769         pDevice->dwTxAntennaSel=1;
1770         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_B);
1771     } else {
1772         pDevice->dwTxAntennaSel=0;
1773         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_A);
1774     }
1775 }
1776
1777
1778 /*---------------------  Export Variables  --------------------------*/
1779 /*
1780  * Description: Calculate data frame transmitting time
1781  *
1782  * Parameters:
1783  *  In:
1784  *      byPreambleType  - Preamble Type
1785  *      byPktType        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1786  *      cbFrameLength   - Baseband Type
1787  *      wRate           - Tx Rate
1788  *  Out:
1789  *
1790  * Return Value: FrameTime
1791  *
1792  */
1793 UINT
1794 BBuGetFrameTime (
1795     IN BYTE byPreambleType,
1796     IN BYTE byPktType,
1797     IN UINT cbFrameLength,
1798     IN WORD wRate
1799     )
1800 {
1801     UINT uFrameTime;
1802     UINT uPreamble;
1803     UINT uTmp;
1804     UINT uRateIdx = (UINT)wRate;
1805     UINT uRate = 0;
1806
1807
1808     if (uRateIdx > RATE_54M) {
1809         return 0;
1810     }
1811
1812     uRate = (UINT)awcFrameTime[uRateIdx];
1813
1814     if (uRateIdx <= 3) {          //CCK mode
1815
1816         if (byPreambleType == 1) {//Short
1817             uPreamble = 96;
1818         } else {
1819             uPreamble = 192;
1820         }
1821         uFrameTime = (cbFrameLength * 80) / uRate;  //?????
1822         uTmp = (uFrameTime * uRate) / 80;
1823         if (cbFrameLength != uTmp) {
1824             uFrameTime ++;
1825         }
1826
1827         return (uPreamble + uFrameTime);
1828     }
1829     else {
1830         uFrameTime = (cbFrameLength * 8 + 22) / uRate;   //????????
1831         uTmp = ((uFrameTime * uRate) - 22) / 8;
1832         if(cbFrameLength != uTmp) {
1833             uFrameTime ++;
1834         }
1835         uFrameTime = uFrameTime * 4;    //???????
1836         if(byPktType != PK_TYPE_11A) {
1837             uFrameTime += 6;     //??????
1838         }
1839         return (20 + uFrameTime); //??????
1840     }
1841 }
1842
1843 /*
1844  * Description: Caculate Length, Service, and Signal fields of Phy for Tx
1845  *
1846  * Parameters:
1847  *  In:
1848  *      pDevice         - Device Structure
1849  *      cbFrameLength   - Tx Frame Length
1850  *      wRate           - Tx Rate
1851  *  Out:
1852  *      pwPhyLen        - pointer to Phy Length field
1853  *      pbyPhySrv       - pointer to Phy Service field
1854  *      pbyPhySgn       - pointer to Phy Signal field
1855  *
1856  * Return Value: none
1857  *
1858  */
1859 VOID
1860 BBvCaculateParameter (
1861     IN  PSDevice pDevice,
1862     IN  UINT cbFrameLength,
1863     IN  WORD wRate,
1864     IN  BYTE byPacketType,
1865     OUT PWORD pwPhyLen,
1866     OUT PBYTE pbyPhySrv,
1867     OUT PBYTE pbyPhySgn
1868     )
1869 {
1870     UINT cbBitCount;
1871     UINT cbUsCount = 0;
1872     UINT cbTmp;
1873     BOOL bExtBit;
1874     BYTE byPreambleType = pDevice->byPreambleType;
1875     BOOL bCCK = pDevice->bCCK;
1876
1877     cbBitCount = cbFrameLength * 8;
1878     bExtBit = FALSE;
1879
1880     switch (wRate) {
1881     case RATE_1M :
1882         cbUsCount = cbBitCount;
1883         *pbyPhySgn = 0x00;
1884         break;
1885
1886     case RATE_2M :
1887         cbUsCount = cbBitCount / 2;
1888         if (byPreambleType == 1)
1889             *pbyPhySgn = 0x09;
1890         else // long preamble
1891             *pbyPhySgn = 0x01;
1892         break;
1893
1894     case RATE_5M :
1895         if (bCCK == FALSE)
1896             cbBitCount ++;
1897         cbUsCount = (cbBitCount * 10) / 55;
1898         cbTmp = (cbUsCount * 55) / 10;
1899         if (cbTmp != cbBitCount)
1900             cbUsCount ++;
1901         if (byPreambleType == 1)
1902             *pbyPhySgn = 0x0a;
1903         else // long preamble
1904             *pbyPhySgn = 0x02;
1905         break;
1906
1907     case RATE_11M :
1908
1909         if (bCCK == FALSE)
1910             cbBitCount ++;
1911         cbUsCount = cbBitCount / 11;
1912         cbTmp = cbUsCount * 11;
1913         if (cbTmp != cbBitCount) {
1914             cbUsCount ++;
1915             if ((cbBitCount - cbTmp) <= 3)
1916                 bExtBit = TRUE;
1917         }
1918         if (byPreambleType == 1)
1919             *pbyPhySgn = 0x0b;
1920         else // long preamble
1921             *pbyPhySgn = 0x03;
1922         break;
1923
1924     case RATE_6M :
1925         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1926             *pbyPhySgn = 0x9B; //1001 1011
1927         }
1928         else {//11g, 2.4GHZ
1929             *pbyPhySgn = 0x8B; //1000 1011
1930         }
1931         break;
1932
1933     case RATE_9M :
1934         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1935             *pbyPhySgn = 0x9F; //1001 1111
1936         }
1937         else {//11g, 2.4GHZ
1938             *pbyPhySgn = 0x8F; //1000 1111
1939         }
1940         break;
1941
1942     case RATE_12M :
1943         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1944             *pbyPhySgn = 0x9A; //1001 1010
1945         }
1946         else {//11g, 2.4GHZ
1947             *pbyPhySgn = 0x8A; //1000 1010
1948         }
1949         break;
1950
1951     case RATE_18M :
1952         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1953             *pbyPhySgn = 0x9E; //1001 1110
1954         }
1955         else {//11g, 2.4GHZ
1956             *pbyPhySgn = 0x8E; //1000 1110
1957         }
1958         break;
1959
1960     case RATE_24M :
1961         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1962             *pbyPhySgn = 0x99; //1001 1001
1963         }
1964         else {//11g, 2.4GHZ
1965             *pbyPhySgn = 0x89; //1000 1001
1966         }
1967         break;
1968
1969     case RATE_36M :
1970         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1971             *pbyPhySgn = 0x9D; //1001 1101
1972         }
1973         else {//11g, 2.4GHZ
1974             *pbyPhySgn = 0x8D; //1000 1101
1975         }
1976         break;
1977
1978     case RATE_48M :
1979         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1980             *pbyPhySgn = 0x98; //1001 1000
1981         }
1982         else {//11g, 2.4GHZ
1983             *pbyPhySgn = 0x88; //1000 1000
1984         }
1985         break;
1986
1987     case RATE_54M :
1988         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1989             *pbyPhySgn = 0x9C; //1001 1100
1990         }
1991         else {//11g, 2.4GHZ
1992             *pbyPhySgn = 0x8C; //1000 1100
1993         }
1994         break;
1995
1996     default :
1997         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1998             *pbyPhySgn = 0x9C; //1001 1100
1999         }
2000         else {//11g, 2.4GHZ
2001             *pbyPhySgn = 0x8C; //1000 1100
2002         }
2003         break;
2004     }
2005
2006     if (byPacketType == PK_TYPE_11B) {
2007         *pbyPhySrv = 0x00;
2008         if (bExtBit)
2009             *pbyPhySrv = *pbyPhySrv | 0x80;
2010         *pwPhyLen = (WORD)cbUsCount;
2011     }
2012     else {
2013         *pbyPhySrv = 0x00;
2014         *pwPhyLen = (WORD)cbFrameLength;
2015     }
2016 }
2017
2018 /*
2019  * Description: Read a byte from BASEBAND, by embeded programming
2020  *
2021  * Parameters:
2022  *  In:
2023  *      dwIoBase    - I/O base address
2024  *      byBBAddr    - address of register in Baseband
2025  *  Out:
2026  *      pbyData     - data read
2027  *
2028  * Return Value: TRUE if succeeded; FALSE if failed.
2029  *
2030  */
2031 BOOL BBbReadEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, PBYTE pbyData)
2032 {
2033     WORD    ww;
2034     BYTE    byValue;
2035
2036     // BB reg offset
2037     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2038
2039     // turn on REGR
2040     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
2041     // W_MAX_TIMEOUT is the timeout period
2042     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2043         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2044         if (BITbIsBitOn(byValue, BBREGCTL_DONE))
2045             break;
2046     }
2047
2048     // get BB data
2049     VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
2050
2051     if (ww == W_MAX_TIMEOUT) {
2052         DBG_PORT80(0x30);
2053         DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x30)\n");
2054         return FALSE;
2055     }
2056     return TRUE;
2057 }
2058
2059
2060 /*
2061  * Description: Write a Byte to BASEBAND, by embeded programming
2062  *
2063  * Parameters:
2064  *  In:
2065  *      dwIoBase    - I/O base address
2066  *      byBBAddr    - address of register in Baseband
2067  *      byData      - data to write
2068  *  Out:
2069  *      none
2070  *
2071  * Return Value: TRUE if succeeded; FALSE if failed.
2072  *
2073  */
2074 BOOL BBbWriteEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byData)
2075 {
2076     WORD    ww;
2077     BYTE    byValue;
2078
2079     // BB reg offset
2080     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2081     // set BB data
2082     VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2083
2084     // turn on BBREGCTL_REGW
2085     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2086     // W_MAX_TIMEOUT is the timeout period
2087     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2088         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2089         if (BITbIsBitOn(byValue, BBREGCTL_DONE))
2090             break;
2091     }
2092
2093     if (ww == W_MAX_TIMEOUT) {
2094         DBG_PORT80(0x31);
2095         DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x31)\n");
2096         return FALSE;
2097     }
2098     return TRUE;
2099 }
2100
2101
2102 /*
2103  * Description: Test if all bits are set for the Baseband register
2104  *
2105  * Parameters:
2106  *  In:
2107  *      dwIoBase    - I/O base address
2108  *      byBBAddr    - address of register in Baseband
2109  *      byTestBits  - TestBits
2110  *  Out:
2111  *      none
2112  *
2113  * Return Value: TRUE if all TestBits are set; FALSE otherwise.
2114  *
2115  */
2116 BOOL BBbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2117 {
2118     BYTE byOrgData;
2119
2120     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2121     return BITbIsAllBitsOn(byOrgData, byTestBits);
2122 }
2123
2124
2125 /*
2126  * Description: Test if all bits are clear for the Baseband register
2127  *
2128  * Parameters:
2129  *  In:
2130  *      dwIoBase    - I/O base address
2131  *      byBBAddr    - address of register in Baseband
2132  *      byTestBits  - TestBits
2133  *  Out:
2134  *      none
2135  *
2136  * Return Value: TRUE if all TestBits are clear; FALSE otherwise.
2137  *
2138  */
2139 BOOL BBbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2140 {
2141     BYTE byOrgData;
2142
2143     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2144     return BITbIsAllBitsOff(byOrgData, byTestBits);
2145 }
2146
2147 /*
2148  * Description: VIA VT3253 Baseband chip init function
2149  *
2150  * Parameters:
2151  *  In:
2152  *      dwIoBase    - I/O base address
2153  *      byRevId     - Revision ID
2154  *      byRFType    - RF type
2155  *  Out:
2156  *      none
2157  *
2158  * Return Value: TRUE if succeeded; FALSE if failed.
2159  *
2160  */
2161
2162 BOOL BBbVT3253Init (PSDevice pDevice)
2163 {
2164     BOOL       bResult = TRUE;
2165     int        ii;
2166     DWORD_PTR  dwIoBase = pDevice->PortOffset;
2167     BYTE       byRFType = pDevice->byRFType;
2168     BYTE       byLocalID = pDevice->byLocalID;
2169
2170     if (byRFType == RF_RFMD2959) {
2171         if (byLocalID <= REV_ID_VT3253_A1) {
2172             for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) {
2173                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253InitTab_RFMD[ii][0],byVT3253InitTab_RFMD[ii][1]);
2174             }
2175         } else {
2176             for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) {
2177                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_RFMD[ii][0],byVT3253B0_RFMD[ii][1]);
2178             }
2179             for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) {
2180                     bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC4_RFMD2959[ii][0],byVT3253B0_AGC4_RFMD2959[ii][1]);
2181             }
2182             VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2183             MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2184         }
2185         pDevice->abyBBVGA[0] = 0x18;
2186         pDevice->abyBBVGA[1] = 0x0A;
2187         pDevice->abyBBVGA[2] = 0x0;
2188         pDevice->abyBBVGA[3] = 0x0;
2189         pDevice->ldBmThreshold[0] = -70;
2190         pDevice->ldBmThreshold[1] = -50;
2191         pDevice->ldBmThreshold[2] = 0;
2192         pDevice->ldBmThreshold[3] = 0;
2193     } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S) ) {
2194         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2195             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2196         }
2197         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2198             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2199         }
2200         pDevice->abyBBVGA[0] = 0x1C;
2201         pDevice->abyBBVGA[1] = 0x10;
2202         pDevice->abyBBVGA[2] = 0x0;
2203         pDevice->abyBBVGA[3] = 0x0;
2204         pDevice->ldBmThreshold[0] = -70;
2205         pDevice->ldBmThreshold[1] = -48;
2206         pDevice->ldBmThreshold[2] = 0;
2207         pDevice->ldBmThreshold[3] = 0;
2208     } else if (byRFType == RF_UW2451) {
2209         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2210                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2211         }
2212         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2213             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2214         }
2215         VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2216         MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2217
2218         pDevice->abyBBVGA[0] = 0x14;
2219         pDevice->abyBBVGA[1] = 0x0A;
2220         pDevice->abyBBVGA[2] = 0x0;
2221         pDevice->abyBBVGA[3] = 0x0;
2222         pDevice->ldBmThreshold[0] = -60;
2223         pDevice->ldBmThreshold[1] = -50;
2224         pDevice->ldBmThreshold[2] = 0;
2225         pDevice->ldBmThreshold[3] = 0;
2226     } else if (byRFType == RF_UW2452) {
2227         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2228             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2229         }
2230         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2231         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2232         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2233         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2234         // Select VC1/VC2, CR215 = 0x02->0x06
2235         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2236
2237         //{{RobertYu:20050125, request by Jack
2238         bResult &= BBbWriteEmbeded(dwIoBase,0x90,0x20);
2239         bResult &= BBbWriteEmbeded(dwIoBase,0x97,0xeb);
2240         //}}
2241
2242         //{{RobertYu:20050221, request by Jack
2243         bResult &= BBbWriteEmbeded(dwIoBase,0xa6,0x00);
2244         bResult &= BBbWriteEmbeded(dwIoBase,0xa8,0x30);
2245         //}}
2246         bResult &= BBbWriteEmbeded(dwIoBase,0xb0,0x58);
2247
2248         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2249             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2250         }
2251         //VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); // RobertYu: 20050104, 20050131 disable PA_Delay
2252         //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2253
2254         pDevice->abyBBVGA[0] = 0x14;
2255         pDevice->abyBBVGA[1] = 0x0A;
2256         pDevice->abyBBVGA[2] = 0x0;
2257         pDevice->abyBBVGA[3] = 0x0;
2258         pDevice->ldBmThreshold[0] = -60;
2259         pDevice->ldBmThreshold[1] = -50;
2260         pDevice->ldBmThreshold[2] = 0;
2261         pDevice->ldBmThreshold[3] = 0;
2262     //}} RobertYu
2263
2264     } else if (byRFType == RF_VT3226) {
2265         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2266             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2267         }
2268         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2269             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2270         }
2271         pDevice->abyBBVGA[0] = 0x1C;
2272         pDevice->abyBBVGA[1] = 0x10;
2273         pDevice->abyBBVGA[2] = 0x0;
2274         pDevice->abyBBVGA[3] = 0x0;
2275         pDevice->ldBmThreshold[0] = -70;
2276         pDevice->ldBmThreshold[1] = -48;
2277         pDevice->ldBmThreshold[2] = 0;
2278         pDevice->ldBmThreshold[3] = 0;
2279         // Fix VT3226 DFC system timing issue
2280         MACvSetRFLE_LatchBase(dwIoBase);
2281          //{{ RobertYu: 20050104
2282     } else if (byRFType == RF_AIROHA7230) {
2283         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2284             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2285         }
2286
2287         //{{ RobertYu:20050223, request by JerryChung
2288         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2289         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2290         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2291         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2292         // Select VC1/VC2, CR215 = 0x02->0x06
2293         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2294         //}}
2295
2296         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2297             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2298         }
2299         pDevice->abyBBVGA[0] = 0x1C;
2300         pDevice->abyBBVGA[1] = 0x10;
2301         pDevice->abyBBVGA[2] = 0x0;
2302         pDevice->abyBBVGA[3] = 0x0;
2303         pDevice->ldBmThreshold[0] = -70;
2304         pDevice->ldBmThreshold[1] = -48;
2305         pDevice->ldBmThreshold[2] = 0;
2306         pDevice->ldBmThreshold[3] = 0;
2307     //}} RobertYu
2308     } else {
2309         // No VGA Table now
2310         pDevice->bUpdateBBVGA = FALSE;
2311         pDevice->abyBBVGA[0] = 0x1C;
2312     }
2313
2314     if (byLocalID > REV_ID_VT3253_A1) {
2315         BBbWriteEmbeded(dwIoBase, 0x04, 0x7F);
2316         BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);
2317     }
2318
2319     return bResult;
2320 }
2321
2322
2323
2324 /*
2325  * Description: Read All Baseband Registers
2326  *
2327  * Parameters:
2328  *  In:
2329  *      dwIoBase    - I/O base address
2330  *      pbyBBRegs   - Point to struct that stores Baseband Registers
2331  *  Out:
2332  *      none
2333  *
2334  * Return Value: none
2335  *
2336  */
2337 VOID BBvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyBBRegs)
2338 {
2339     int  ii;
2340     BYTE byBase = 1;
2341     for (ii = 0; ii < BB_MAX_CONTEXT_SIZE; ii++) {
2342         BBbReadEmbeded(dwIoBase, (BYTE)(ii*byBase), pbyBBRegs);
2343         pbyBBRegs += byBase;
2344     }
2345 }
2346
2347 /*
2348  * Description: Turn on BaseBand Loopback mode
2349  *
2350  * Parameters:
2351  *  In:
2352  *      dwIoBase    - I/O base address
2353  *      bCCK        - If CCK is set
2354  *  Out:
2355  *      none
2356  *
2357  * Return Value: none
2358  *
2359  */
2360
2361
2362 void BBvLoopbackOn (PSDevice pDevice)
2363 {
2364     BYTE      byData;
2365     DWORD_PTR dwIoBase = pDevice->PortOffset;
2366
2367     //CR C9 = 0x00
2368     BBbReadEmbeded(dwIoBase, 0xC9, &pDevice->byBBCRc9);//CR201
2369     BBbWriteEmbeded(dwIoBase, 0xC9, 0);
2370     BBbReadEmbeded(dwIoBase, 0x4D, &pDevice->byBBCR4d);//CR77
2371     BBbWriteEmbeded(dwIoBase, 0x4D, 0x90);
2372
2373     //CR 88 = 0x02(CCK), 0x03(OFDM)
2374     BBbReadEmbeded(dwIoBase, 0x88, &pDevice->byBBCR88);//CR136
2375
2376     if (pDevice->uConnectionRate <= RATE_11M) { //CCK
2377         // Enable internal digital loopback: CR33 |= 0000 0001
2378         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2379         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData | 0x01));//CR33
2380         // CR154 = 0x00
2381         BBbWriteEmbeded(dwIoBase, 0x9A, 0);   //CR154
2382
2383         BBbWriteEmbeded(dwIoBase, 0x88, 0x02);//CR239
2384     }
2385     else { //OFDM
2386         // Enable internal digital loopback:CR154 |= 0000 0001
2387         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2388         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData | 0x01));//CR154
2389         // CR33 = 0x00
2390         BBbWriteEmbeded(dwIoBase, 0x21, 0);   //CR33
2391
2392         BBbWriteEmbeded(dwIoBase, 0x88, 0x03);//CR239
2393     }
2394
2395     //CR14 = 0x00
2396     BBbWriteEmbeded(dwIoBase, 0x0E, 0);//CR14
2397
2398     // Disable TX_IQUN
2399     BBbReadEmbeded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
2400     BBbWriteEmbeded(pDevice->PortOffset, 0x09, (BYTE)(pDevice->byBBCR09 & 0xDE));
2401 }
2402
2403 /*
2404  * Description: Turn off BaseBand Loopback mode
2405  *
2406  * Parameters:
2407  *  In:
2408  *      pDevice         - Device Structure
2409  *
2410  *  Out:
2411  *      none
2412  *
2413  * Return Value: none
2414  *
2415  */
2416 void BBvLoopbackOff (PSDevice pDevice)
2417 {
2418     BYTE      byData;
2419     DWORD_PTR dwIoBase = pDevice->PortOffset;
2420
2421     BBbWriteEmbeded(dwIoBase, 0xC9, pDevice->byBBCRc9);//CR201
2422     BBbWriteEmbeded(dwIoBase, 0x88, pDevice->byBBCR88);//CR136
2423     BBbWriteEmbeded(dwIoBase, 0x09, pDevice->byBBCR09);//CR136
2424     BBbWriteEmbeded(dwIoBase, 0x4D, pDevice->byBBCR4d);//CR77
2425
2426     if (pDevice->uConnectionRate <= RATE_11M) { // CCK
2427         // Set the CR33 Bit2 to disable internal Loopback.
2428         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2429         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData & 0xFE));//CR33
2430     }
2431     else { // OFDM
2432         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2433         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData & 0xFE));//CR154
2434     }
2435     BBbReadEmbeded(dwIoBase, 0x0E, &byData);//CR14
2436     BBbWriteEmbeded(dwIoBase, 0x0E, (BYTE)(byData | 0x80));//CR14
2437
2438 }
2439
2440
2441
2442 /*
2443  * Description: Set ShortSlotTime mode
2444  *
2445  * Parameters:
2446  *  In:
2447  *      pDevice     - Device Structure
2448  *  Out:
2449  *      none
2450  *
2451  * Return Value: none
2452  *
2453  */
2454 VOID
2455 BBvSetShortSlotTime (PSDevice pDevice)
2456 {
2457     BYTE byBBRxConf=0;
2458     BYTE byBBVGA=0;
2459
2460     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2461
2462     if (pDevice->bShortSlotTime) {
2463         byBBRxConf &= 0xDF;//1101 1111
2464     } else {
2465         byBBRxConf |= 0x20;//0010 0000
2466     }
2467
2468     // patch for 3253B0 Baseband with Cardbus module
2469     BBbReadEmbeded(pDevice->PortOffset, 0xE7, &byBBVGA);
2470     if (byBBVGA == pDevice->abyBBVGA[0]) {
2471         byBBRxConf |= 0x20;//0010 0000
2472     }
2473
2474     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2475
2476 }
2477
2478 VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
2479 {
2480     BYTE byBBRxConf=0;
2481
2482     BBbWriteEmbeded(pDevice->PortOffset, 0xE7, byData);
2483
2484     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2485     // patch for 3253B0 Baseband with Cardbus module
2486     if (byData == pDevice->abyBBVGA[0]) {
2487         byBBRxConf |= 0x20;//0010 0000
2488     } else if (pDevice->bShortSlotTime) {
2489         byBBRxConf &= 0xDF;//1101 1111
2490     } else {
2491         byBBRxConf |= 0x20;//0010 0000
2492     }
2493     pDevice->byBBVGACurrent = byData;
2494     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2495 }
2496
2497
2498 /*
2499  * Description: Baseband SoftwareReset
2500  *
2501  * Parameters:
2502  *  In:
2503  *      dwIoBase    - I/O base address
2504  *  Out:
2505  *      none
2506  *
2507  * Return Value: none
2508  *
2509  */
2510 VOID
2511 BBvSoftwareReset (DWORD_PTR dwIoBase)
2512 {
2513     BBbWriteEmbeded(dwIoBase, 0x50, 0x40);
2514     BBbWriteEmbeded(dwIoBase, 0x50, 0);
2515     BBbWriteEmbeded(dwIoBase, 0x9C, 0x01);
2516     BBbWriteEmbeded(dwIoBase, 0x9C, 0);
2517 }
2518
2519 /*
2520  * Description: Baseband Power Save Mode ON
2521  *
2522  * Parameters:
2523  *  In:
2524  *      dwIoBase    - I/O base address
2525  *  Out:
2526  *      none
2527  *
2528  * Return Value: none
2529  *
2530  */
2531 VOID
2532 BBvPowerSaveModeON (DWORD_PTR dwIoBase)
2533 {
2534     BYTE byOrgData;
2535
2536     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2537     byOrgData |= BIT0;
2538     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2539 }
2540
2541 /*
2542  * Description: Baseband Power Save Mode OFF
2543  *
2544  * Parameters:
2545  *  In:
2546  *      dwIoBase    - I/O base address
2547  *  Out:
2548  *      none
2549  *
2550  * Return Value: none
2551  *
2552  */
2553 VOID
2554 BBvPowerSaveModeOFF (DWORD_PTR dwIoBase)
2555 {
2556     BYTE byOrgData;
2557
2558     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2559     byOrgData &= ~(BIT0);
2560     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2561 }
2562
2563 /*
2564  * Description: Set Tx Antenna mode
2565  *
2566  * Parameters:
2567  *  In:
2568  *      pDevice          - Device Structure
2569  *      byAntennaMode    - Antenna Mode
2570  *  Out:
2571  *      none
2572  *
2573  * Return Value: none
2574  *
2575  */
2576
2577 VOID
2578 BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2579 {
2580     BYTE byBBTxConf;
2581
2582 #ifdef  PLICE_DEBUG
2583         //printk("Enter BBvSetTxAntennaMode\n");
2584 #endif
2585     BBbReadEmbeded(dwIoBase, 0x09, &byBBTxConf);//CR09
2586     if (byAntennaMode == ANT_DIVERSITY) {
2587         // bit 1 is diversity
2588         byBBTxConf |= 0x02;
2589     } else if (byAntennaMode == ANT_A) {
2590         // bit 2 is ANTSEL
2591         byBBTxConf &= 0xF9; // 1111 1001
2592     } else if (byAntennaMode == ANT_B) {
2593 #ifdef  PLICE_DEBUG
2594         //printk("BBvSetTxAntennaMode:ANT_B\n");
2595 #endif
2596         byBBTxConf &= 0xFD; // 1111 1101
2597         byBBTxConf |= 0x04;
2598     }
2599     BBbWriteEmbeded(dwIoBase, 0x09, byBBTxConf);//CR09
2600 }
2601
2602
2603
2604
2605 /*
2606  * Description: Set Rx Antenna mode
2607  *
2608  * Parameters:
2609  *  In:
2610  *      pDevice          - Device Structure
2611  *      byAntennaMode    - Antenna Mode
2612  *  Out:
2613  *      none
2614  *
2615  * Return Value: none
2616  *
2617  */
2618
2619 VOID
2620 BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2621 {
2622     BYTE byBBRxConf;
2623
2624     BBbReadEmbeded(dwIoBase, 0x0A, &byBBRxConf);//CR10
2625     if (byAntennaMode == ANT_DIVERSITY) {
2626         byBBRxConf |= 0x01;
2627
2628     } else if (byAntennaMode == ANT_A) {
2629         byBBRxConf &= 0xFC; // 1111 1100
2630     } else if (byAntennaMode == ANT_B) {
2631         byBBRxConf &= 0xFE; // 1111 1110
2632         byBBRxConf |= 0x02;
2633     }
2634     BBbWriteEmbeded(dwIoBase, 0x0A, byBBRxConf);//CR10
2635 }
2636
2637
2638 /*
2639  * Description: BBvSetDeepSleep
2640  *
2641  * Parameters:
2642  *  In:
2643  *      pDevice          - Device Structure
2644  *  Out:
2645  *      none
2646  *
2647  * Return Value: none
2648  *
2649  */
2650 VOID
2651 BBvSetDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2652 {
2653     BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12
2654     BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13
2655 }
2656
2657 VOID
2658 BBvExitDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2659 {
2660     BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12
2661     BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);//CR13
2662 }
2663
2664
2665
2666 static
2667 ULONG
2668 s_ulGetRatio (PSDevice pDevice)
2669 {
2670 ULONG   ulRatio = 0;
2671 ULONG   ulMaxPacket;
2672 ULONG   ulPacketNum;
2673
2674     //This is a thousand-ratio
2675     ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
2676     if ( pDevice->uNumSQ3[RATE_54M] != 0 ) {
2677         ulPacketNum = pDevice->uNumSQ3[RATE_54M];
2678         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2679         //ulRatio = (pDevice->uNumSQ3[RATE_54M] * 1000 / pDevice->uDiversityCnt);
2680         ulRatio += TOP_RATE_54M;
2681     }
2682     if ( pDevice->uNumSQ3[RATE_48M] > ulMaxPacket ) {
2683         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M];
2684         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2685         //ulRatio = (pDevice->uNumSQ3[RATE_48M] * 1000 / pDevice->uDiversityCnt);
2686         ulRatio += TOP_RATE_48M;
2687         ulMaxPacket = pDevice->uNumSQ3[RATE_48M];
2688     }
2689     if ( pDevice->uNumSQ3[RATE_36M] > ulMaxPacket ) {
2690         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2691                       pDevice->uNumSQ3[RATE_36M];
2692         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2693         //ulRatio = (pDevice->uNumSQ3[RATE_36M] * 1000 / pDevice->uDiversityCnt);
2694         ulRatio += TOP_RATE_36M;
2695         ulMaxPacket = pDevice->uNumSQ3[RATE_36M];
2696     }
2697     if ( pDevice->uNumSQ3[RATE_24M] > ulMaxPacket ) {
2698         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2699                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M];
2700         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2701         //ulRatio = (pDevice->uNumSQ3[RATE_24M] * 1000 / pDevice->uDiversityCnt);
2702         ulRatio += TOP_RATE_24M;
2703         ulMaxPacket = pDevice->uNumSQ3[RATE_24M];
2704     }
2705     if ( pDevice->uNumSQ3[RATE_18M] > ulMaxPacket ) {
2706         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2707                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2708                       pDevice->uNumSQ3[RATE_18M];
2709         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2710         //ulRatio = (pDevice->uNumSQ3[RATE_18M] * 1000 / pDevice->uDiversityCnt);
2711         ulRatio += TOP_RATE_18M;
2712         ulMaxPacket = pDevice->uNumSQ3[RATE_18M];
2713     }
2714     if ( pDevice->uNumSQ3[RATE_12M] > ulMaxPacket ) {
2715         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2716                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2717                       pDevice->uNumSQ3[RATE_18M] + pDevice->uNumSQ3[RATE_12M];
2718         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2719         //ulRatio = (pDevice->uNumSQ3[RATE_12M] * 1000 / pDevice->uDiversityCnt);
2720         ulRatio += TOP_RATE_12M;
2721         ulMaxPacket = pDevice->uNumSQ3[RATE_12M];
2722     }
2723     if ( pDevice->uNumSQ3[RATE_11M] > ulMaxPacket ) {
2724         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2725                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2726                       pDevice->uNumSQ3[RATE_6M] - pDevice->uNumSQ3[RATE_9M];
2727         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2728         //ulRatio = (pDevice->uNumSQ3[RATE_11M] * 1000 / pDevice->uDiversityCnt);
2729         ulRatio += TOP_RATE_11M;
2730         ulMaxPacket = pDevice->uNumSQ3[RATE_11M];
2731     }
2732     if ( pDevice->uNumSQ3[RATE_9M] > ulMaxPacket ) {
2733         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2734                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2735                       pDevice->uNumSQ3[RATE_6M];
2736         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2737         //ulRatio = (pDevice->uNumSQ3[RATE_9M] * 1000 / pDevice->uDiversityCnt);
2738         ulRatio += TOP_RATE_9M;
2739         ulMaxPacket = pDevice->uNumSQ3[RATE_9M];
2740     }
2741     if ( pDevice->uNumSQ3[RATE_6M] > ulMaxPacket ) {
2742         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2743                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M];
2744         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2745         //ulRatio = (pDevice->uNumSQ3[RATE_6M] * 1000 / pDevice->uDiversityCnt);
2746         ulRatio += TOP_RATE_6M;
2747         ulMaxPacket = pDevice->uNumSQ3[RATE_6M];
2748     }
2749     if ( pDevice->uNumSQ3[RATE_5M] > ulMaxPacket ) {
2750         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2751                       pDevice->uNumSQ3[RATE_2M];
2752         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2753         //ulRatio = (pDevice->uNumSQ3[RATE_5M] * 1000 / pDevice->uDiversityCnt);
2754         ulRatio += TOP_RATE_55M;
2755         ulMaxPacket = pDevice->uNumSQ3[RATE_5M];
2756     }
2757     if ( pDevice->uNumSQ3[RATE_2M] > ulMaxPacket ) {
2758         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M];
2759         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2760         //ulRatio = (pDevice->uNumSQ3[RATE_2M]  * 1000 / pDevice->uDiversityCnt);
2761         ulRatio += TOP_RATE_2M;
2762         ulMaxPacket = pDevice->uNumSQ3[RATE_2M];
2763     }
2764     if ( pDevice->uNumSQ3[RATE_1M] > ulMaxPacket ) {
2765         ulPacketNum = pDevice->uDiversityCnt;
2766         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2767         //ulRatio = (pDevice->uNumSQ3[RATE_1M]  * 1000 / pDevice->uDiversityCnt);
2768         ulRatio += TOP_RATE_1M;
2769     }
2770
2771     return ulRatio;
2772 }
2773
2774
2775 VOID
2776 BBvClearAntDivSQ3Value (PSDevice pDevice)
2777 {
2778     UINT    ii;
2779
2780     pDevice->uDiversityCnt = 0;
2781     for (ii = 0; ii < MAX_RATE; ii++) {
2782         pDevice->uNumSQ3[ii] = 0;
2783     }
2784 }
2785
2786
2787 /*
2788  * Description: Antenna Diversity
2789  *
2790  * Parameters:
2791  *  In:
2792  *      pDevice          - Device Structure
2793  *      byRSR            - RSR from received packet
2794  *      bySQ3            - SQ3 value from received packet
2795  *  Out:
2796  *      none
2797  *
2798  * Return Value: none
2799  *
2800  */
2801
2802 VOID
2803 BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
2804 {
2805
2806     if ((byRxRate >= MAX_RATE) || (pDevice->wAntDiversityMaxRate >= MAX_RATE)) {
2807         return;
2808     }
2809     pDevice->uDiversityCnt++;
2810    // DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pDevice->uDiversityCnt = %d\n", (int)pDevice->uDiversityCnt);
2811
2812     pDevice->uNumSQ3[byRxRate]++;
2813
2814     if (pDevice->byAntennaState == 0) {
2815
2816         if (pDevice->uDiversityCnt > pDevice->ulDiversityNValue) {
2817             DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ulDiversityNValue=[%d],54M-[%d]\n",
2818                           (int)pDevice->ulDiversityNValue, (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate]);
2819
2820             if (pDevice->uNumSQ3[pDevice->wAntDiversityMaxRate] < pDevice->uDiversityCnt/2) {
2821
2822                 pDevice->ulRatio_State0 = s_ulGetRatio(pDevice);
2823                 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State0, rate = [%08x]\n", (int)pDevice->ulRatio_State0);
2824
2825                 if ( pDevice->byTMax == 0 )
2826                     return;
2827                 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1.[%08x], uNumSQ3[%d]=%d, %d\n",
2828                               (int)pDevice->ulRatio_State0, (int)pDevice->wAntDiversityMaxRate,
2829                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2830 #ifdef  PLICE_DEBUG
2831                 //printk("BBvAntennaDiversity1:call s_vChangeAntenna\n");
2832 #endif
2833                 s_vChangeAntenna(pDevice);
2834                 pDevice->byAntennaState = 1;
2835                 del_timer(&pDevice->TimerSQ3Tmax3);
2836                 del_timer(&pDevice->TimerSQ3Tmax2);
2837                 pDevice->TimerSQ3Tmax1.expires =  RUN_AT(pDevice->byTMax * HZ);
2838                 add_timer(&pDevice->TimerSQ3Tmax1);
2839
2840             } else {
2841
2842                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2843                 add_timer(&pDevice->TimerSQ3Tmax3);
2844             }
2845             BBvClearAntDivSQ3Value(pDevice);
2846
2847         }
2848     } else { //byAntennaState == 1
2849
2850         if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
2851
2852             del_timer(&pDevice->TimerSQ3Tmax1);
2853
2854             pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2855             DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2856                           (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2857
2858             if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
2859                 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2860                               (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2861                               (int)pDevice->wAntDiversityMaxRate,
2862                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2863 #ifdef  PLICE_DEBUG
2864                 //printk("BBvAntennaDiversity2:call s_vChangeAntenna\n");
2865 #endif
2866                                 s_vChangeAntenna(pDevice);
2867                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2868                 pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2869                 add_timer(&pDevice->TimerSQ3Tmax3);
2870                 add_timer(&pDevice->TimerSQ3Tmax2);
2871             }
2872             pDevice->byAntennaState = 0;
2873             BBvClearAntDivSQ3Value(pDevice);
2874         }
2875     } //byAntennaState
2876 }
2877
2878 /*+
2879  *
2880  * Description:
2881  *  Timer for SQ3 antenna diversity
2882  *
2883  * Parameters:
2884  *  In:
2885  *  Out:
2886  *      none
2887  *
2888  * Return Value: none
2889  *
2890 -*/
2891
2892 VOID
2893 TimerSQ3CallBack (
2894     IN  HANDLE      hDeviceContext
2895     )
2896 {
2897     PSDevice        pDevice = (PSDevice)hDeviceContext;
2898
2899     DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack...");
2900
2901
2902     spin_lock_irq(&pDevice->lock);
2903
2904     DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.[%08x][%08x], %d\n",(int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1, (int)pDevice->uDiversityCnt);
2905 #ifdef  PLICE_DEBUG
2906                 //printk("TimerSQ3CallBack1:call s_vChangeAntenna\n");
2907 #endif
2908
2909     s_vChangeAntenna(pDevice);
2910     pDevice->byAntennaState = 0;
2911     BBvClearAntDivSQ3Value(pDevice);
2912
2913     pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2914     pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2915     add_timer(&pDevice->TimerSQ3Tmax3);
2916     add_timer(&pDevice->TimerSQ3Tmax2);
2917
2918     spin_unlock_irq(&pDevice->lock);
2919
2920     return;
2921 }
2922
2923
2924 /*+
2925  *
2926  * Description:
2927  *  Timer for SQ3 antenna diversity
2928  *
2929  * Parameters:
2930  *  In:
2931  *      pvSysSpec1
2932  *      hDeviceContext - Pointer to the adapter
2933  *      pvSysSpec2
2934  *      pvSysSpec3
2935  *  Out:
2936  *      none
2937  *
2938  * Return Value: none
2939  *
2940 -*/
2941
2942 VOID
2943 TimerState1CallBack (
2944     IN  HANDLE      hDeviceContext
2945     )
2946 {
2947     PSDevice        pDevice = (PSDevice)hDeviceContext;
2948
2949     DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerState1CallBack...");
2950
2951     spin_lock_irq(&pDevice->lock);
2952     if (pDevice->uDiversityCnt < pDevice->ulDiversityMValue/100) {
2953 #ifdef  PLICE_DEBUG
2954                 //printk("TimerSQ3CallBack2:call s_vChangeAntenna\n");
2955 #endif
2956
2957                 s_vChangeAntenna(pDevice);
2958         pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2959         pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2960         add_timer(&pDevice->TimerSQ3Tmax3);
2961         add_timer(&pDevice->TimerSQ3Tmax2);
2962     } else {
2963         pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2964         DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2965                       (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2966
2967         if ( pDevice->ulRatio_State1 < pDevice->ulRatio_State0 ) {
2968             DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2969                           (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2970                           (int)pDevice->wAntDiversityMaxRate,
2971                           (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2972 #ifdef  PLICE_DEBUG
2973                 //printk("TimerSQ3CallBack3:call s_vChangeAntenna\n");
2974 #endif
2975
2976                         s_vChangeAntenna(pDevice);
2977
2978             pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2979             pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2980             add_timer(&pDevice->TimerSQ3Tmax3);
2981             add_timer(&pDevice->TimerSQ3Tmax2);
2982         }
2983     }
2984     pDevice->byAntennaState = 0;
2985     BBvClearAntDivSQ3Value(pDevice);
2986     spin_unlock_irq(&pDevice->lock);
2987
2988     return;
2989 }
2990