sfc: Use netif_set_real_num_{rx,tx}_queues()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / sfc / efx.c
blobfa6e0207de17747785b5f610d627481d95469a69
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
25 #include "efx.h"
26 #include "mdio_10g.h"
27 #include "nic.h"
29 #include "mcdi.h"
30 #include "workarounds.h"
32 /**************************************************************************
34 * Type name strings
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 /* Interrupt mode names (see INT_MODE())) */
72 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
73 const char *efx_interrupt_mode_names[] = {
74 [EFX_INT_MODE_MSIX] = "MSI-X",
75 [EFX_INT_MODE_MSI] = "MSI",
76 [EFX_INT_MODE_LEGACY] = "legacy",
79 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
80 const char *efx_reset_type_names[] = {
81 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
82 [RESET_TYPE_ALL] = "ALL",
83 [RESET_TYPE_WORLD] = "WORLD",
84 [RESET_TYPE_DISABLE] = "DISABLE",
85 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
86 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
87 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
88 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
89 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
90 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
91 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
94 #define EFX_MAX_MTU (9 * 1024)
96 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
97 * queued onto this work queue. This is not a per-nic work queue, because
98 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
100 static struct workqueue_struct *reset_workqueue;
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static unsigned int separate_tx_channels;
117 module_param(separate_tx_channels, uint, 0444);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
122 * NAPI devices.
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
127 * monitor. On Falcon-based NICs, this will:
128 * - Check the on-board hardware monitor;
129 * - Poll the link state and reconfigure the hardware as necessary.
131 unsigned int efx_monitor_interval = 1 * HZ;
133 /* This controls whether or not the driver will initialise devices
134 * with invalid MAC addresses stored in the EEPROM or flash. If true,
135 * such devices will be initialised with a random locally-generated
136 * MAC address. This allows for loading the sfc_mtd driver to
137 * reprogram the flash, even if the flash contents (including the MAC
138 * address) have previously been erased.
140 static unsigned int allow_bad_hwaddr;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * The default for RX should strike a balance between increasing the
146 * round-trip latency and reducing overhead.
148 static unsigned int rx_irq_mod_usec = 60;
150 /* Initial interrupt moderation settings. They can be modified after
151 * module load with ethtool.
153 * This default is chosen to ensure that a 10G link does not go idle
154 * while a TX queue is stopped after it has become full. A queue is
155 * restarted when it drops below half full. The time this takes (assuming
156 * worst case 3 descriptors per packet and 1024 descriptors) is
157 * 512 / 3 * 1.2 = 205 usec.
159 static unsigned int tx_irq_mod_usec = 150;
161 /* This is the first interrupt mode to try out of:
162 * 0 => MSI-X
163 * 1 => MSI
164 * 2 => legacy
166 static unsigned int interrupt_mode;
168 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
169 * i.e. the number of CPUs among which we may distribute simultaneous
170 * interrupt handling.
172 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
173 * The default (0) means to assign an interrupt to each package (level II cache)
175 static unsigned int rss_cpus;
176 module_param(rss_cpus, uint, 0444);
177 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
179 static int phy_flash_cfg;
180 module_param(phy_flash_cfg, int, 0644);
181 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
183 static unsigned irq_adapt_low_thresh = 10000;
184 module_param(irq_adapt_low_thresh, uint, 0644);
185 MODULE_PARM_DESC(irq_adapt_low_thresh,
186 "Threshold score for reducing IRQ moderation");
188 static unsigned irq_adapt_high_thresh = 20000;
189 module_param(irq_adapt_high_thresh, uint, 0644);
190 MODULE_PARM_DESC(irq_adapt_high_thresh,
191 "Threshold score for increasing IRQ moderation");
193 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
194 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
195 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
196 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
197 module_param(debug, uint, 0);
198 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
200 /**************************************************************************
202 * Utility functions and prototypes
204 *************************************************************************/
206 static void efx_remove_channels(struct efx_nic *efx);
207 static void efx_remove_port(struct efx_nic *efx);
208 static void efx_fini_napi(struct efx_nic *efx);
209 static void efx_fini_struct(struct efx_nic *efx);
210 static void efx_start_all(struct efx_nic *efx);
211 static void efx_stop_all(struct efx_nic *efx);
213 #define EFX_ASSERT_RESET_SERIALISED(efx) \
214 do { \
215 if ((efx->state == STATE_RUNNING) || \
216 (efx->state == STATE_DISABLED)) \
217 ASSERT_RTNL(); \
218 } while (0)
220 /**************************************************************************
222 * Event queue processing
224 *************************************************************************/
226 /* Process channel's event queue
228 * This function is responsible for processing the event queue of a
229 * single channel. The caller must guarantee that this function will
230 * never be concurrently called more than once on the same channel,
231 * though different channels may be being processed concurrently.
233 static int efx_process_channel(struct efx_channel *channel, int budget)
235 struct efx_nic *efx = channel->efx;
236 int spent;
238 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
239 !channel->enabled))
240 return 0;
242 spent = efx_nic_process_eventq(channel, budget);
243 if (spent == 0)
244 return 0;
246 /* Deliver last RX packet. */
247 if (channel->rx_pkt) {
248 __efx_rx_packet(channel, channel->rx_pkt,
249 channel->rx_pkt_csummed);
250 channel->rx_pkt = NULL;
253 efx_rx_strategy(channel);
255 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
257 return spent;
260 /* Mark channel as finished processing
262 * Note that since we will not receive further interrupts for this
263 * channel before we finish processing and call the eventq_read_ack()
264 * method, there is no need to use the interrupt hold-off timers.
266 static inline void efx_channel_processed(struct efx_channel *channel)
268 /* The interrupt handler for this channel may set work_pending
269 * as soon as we acknowledge the events we've seen. Make sure
270 * it's cleared before then. */
271 channel->work_pending = false;
272 smp_wmb();
274 efx_nic_eventq_read_ack(channel);
277 /* NAPI poll handler
279 * NAPI guarantees serialisation of polls of the same device, which
280 * provides the guarantee required by efx_process_channel().
282 static int efx_poll(struct napi_struct *napi, int budget)
284 struct efx_channel *channel =
285 container_of(napi, struct efx_channel, napi_str);
286 struct efx_nic *efx = channel->efx;
287 int spent;
289 netif_vdbg(efx, intr, efx->net_dev,
290 "channel %d NAPI poll executing on CPU %d\n",
291 channel->channel, raw_smp_processor_id());
293 spent = efx_process_channel(channel, budget);
295 if (spent < budget) {
296 if (channel->channel < efx->n_rx_channels &&
297 efx->irq_rx_adaptive &&
298 unlikely(++channel->irq_count == 1000)) {
299 if (unlikely(channel->irq_mod_score <
300 irq_adapt_low_thresh)) {
301 if (channel->irq_moderation > 1) {
302 channel->irq_moderation -= 1;
303 efx->type->push_irq_moderation(channel);
305 } else if (unlikely(channel->irq_mod_score >
306 irq_adapt_high_thresh)) {
307 if (channel->irq_moderation <
308 efx->irq_rx_moderation) {
309 channel->irq_moderation += 1;
310 efx->type->push_irq_moderation(channel);
313 channel->irq_count = 0;
314 channel->irq_mod_score = 0;
317 /* There is no race here; although napi_disable() will
318 * only wait for napi_complete(), this isn't a problem
319 * since efx_channel_processed() will have no effect if
320 * interrupts have already been disabled.
322 napi_complete(napi);
323 efx_channel_processed(channel);
326 return spent;
329 /* Process the eventq of the specified channel immediately on this CPU
331 * Disable hardware generated interrupts, wait for any existing
332 * processing to finish, then directly poll (and ack ) the eventq.
333 * Finally reenable NAPI and interrupts.
335 * Since we are touching interrupts the caller should hold the suspend lock
337 void efx_process_channel_now(struct efx_channel *channel)
339 struct efx_nic *efx = channel->efx;
341 BUG_ON(channel->channel >= efx->n_channels);
342 BUG_ON(!channel->enabled);
344 /* Disable interrupts and wait for ISRs to complete */
345 efx_nic_disable_interrupts(efx);
346 if (efx->legacy_irq)
347 synchronize_irq(efx->legacy_irq);
348 if (channel->irq)
349 synchronize_irq(channel->irq);
351 /* Wait for any NAPI processing to complete */
352 napi_disable(&channel->napi_str);
354 /* Poll the channel */
355 efx_process_channel(channel, channel->eventq_mask + 1);
357 /* Ack the eventq. This may cause an interrupt to be generated
358 * when they are reenabled */
359 efx_channel_processed(channel);
361 napi_enable(&channel->napi_str);
362 efx_nic_enable_interrupts(efx);
365 /* Create event queue
366 * Event queue memory allocations are done only once. If the channel
367 * is reset, the memory buffer will be reused; this guards against
368 * errors during channel reset and also simplifies interrupt handling.
370 static int efx_probe_eventq(struct efx_channel *channel)
372 struct efx_nic *efx = channel->efx;
373 unsigned long entries;
375 netif_dbg(channel->efx, probe, channel->efx->net_dev,
376 "chan %d create event queue\n", channel->channel);
378 /* Build an event queue with room for one event per tx and rx buffer,
379 * plus some extra for link state events and MCDI completions. */
380 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
381 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
382 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
384 return efx_nic_probe_eventq(channel);
387 /* Prepare channel's event queue */
388 static void efx_init_eventq(struct efx_channel *channel)
390 netif_dbg(channel->efx, drv, channel->efx->net_dev,
391 "chan %d init event queue\n", channel->channel);
393 channel->eventq_read_ptr = 0;
395 efx_nic_init_eventq(channel);
398 static void efx_fini_eventq(struct efx_channel *channel)
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d fini event queue\n", channel->channel);
403 efx_nic_fini_eventq(channel);
406 static void efx_remove_eventq(struct efx_channel *channel)
408 netif_dbg(channel->efx, drv, channel->efx->net_dev,
409 "chan %d remove event queue\n", channel->channel);
411 efx_nic_remove_eventq(channel);
414 /**************************************************************************
416 * Channel handling
418 *************************************************************************/
420 /* Allocate and initialise a channel structure, optionally copying
421 * parameters (but not resources) from an old channel structure. */
422 static struct efx_channel *
423 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
425 struct efx_channel *channel;
426 struct efx_rx_queue *rx_queue;
427 struct efx_tx_queue *tx_queue;
428 int j;
430 if (old_channel) {
431 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
432 if (!channel)
433 return NULL;
435 *channel = *old_channel;
437 memset(&channel->eventq, 0, sizeof(channel->eventq));
439 rx_queue = &channel->rx_queue;
440 rx_queue->buffer = NULL;
441 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
443 for (j = 0; j < EFX_TXQ_TYPES; j++) {
444 tx_queue = &channel->tx_queue[j];
445 if (tx_queue->channel)
446 tx_queue->channel = channel;
447 tx_queue->buffer = NULL;
448 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
450 } else {
451 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
452 if (!channel)
453 return NULL;
455 channel->efx = efx;
456 channel->channel = i;
458 for (j = 0; j < EFX_TXQ_TYPES; j++) {
459 tx_queue = &channel->tx_queue[j];
460 tx_queue->efx = efx;
461 tx_queue->queue = i * EFX_TXQ_TYPES + j;
462 tx_queue->channel = channel;
466 spin_lock_init(&channel->tx_stop_lock);
467 atomic_set(&channel->tx_stop_count, 1);
469 rx_queue = &channel->rx_queue;
470 rx_queue->efx = efx;
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
474 return channel;
477 static int efx_probe_channel(struct efx_channel *channel)
479 struct efx_tx_queue *tx_queue;
480 struct efx_rx_queue *rx_queue;
481 int rc;
483 netif_dbg(channel->efx, probe, channel->efx->net_dev,
484 "creating channel %d\n", channel->channel);
486 rc = efx_probe_eventq(channel);
487 if (rc)
488 goto fail1;
490 efx_for_each_channel_tx_queue(tx_queue, channel) {
491 rc = efx_probe_tx_queue(tx_queue);
492 if (rc)
493 goto fail2;
496 efx_for_each_channel_rx_queue(rx_queue, channel) {
497 rc = efx_probe_rx_queue(rx_queue);
498 if (rc)
499 goto fail3;
502 channel->n_rx_frm_trunc = 0;
504 return 0;
506 fail3:
507 efx_for_each_channel_rx_queue(rx_queue, channel)
508 efx_remove_rx_queue(rx_queue);
509 fail2:
510 efx_for_each_channel_tx_queue(tx_queue, channel)
511 efx_remove_tx_queue(tx_queue);
512 fail1:
513 return rc;
517 static void efx_set_channel_names(struct efx_nic *efx)
519 struct efx_channel *channel;
520 const char *type = "";
521 int number;
523 efx_for_each_channel(channel, efx) {
524 number = channel->channel;
525 if (efx->n_channels > efx->n_rx_channels) {
526 if (channel->channel < efx->n_rx_channels) {
527 type = "-rx";
528 } else {
529 type = "-tx";
530 number -= efx->n_rx_channels;
533 snprintf(efx->channel_name[channel->channel],
534 sizeof(efx->channel_name[0]),
535 "%s%s-%d", efx->name, type, number);
539 static int efx_probe_channels(struct efx_nic *efx)
541 struct efx_channel *channel;
542 int rc;
544 /* Restart special buffer allocation */
545 efx->next_buffer_table = 0;
547 efx_for_each_channel(channel, efx) {
548 rc = efx_probe_channel(channel);
549 if (rc) {
550 netif_err(efx, probe, efx->net_dev,
551 "failed to create channel %d\n",
552 channel->channel);
553 goto fail;
556 efx_set_channel_names(efx);
558 return 0;
560 fail:
561 efx_remove_channels(efx);
562 return rc;
565 /* Channels are shutdown and reinitialised whilst the NIC is running
566 * to propagate configuration changes (mtu, checksum offload), or
567 * to clear hardware error conditions
569 static void efx_init_channels(struct efx_nic *efx)
571 struct efx_tx_queue *tx_queue;
572 struct efx_rx_queue *rx_queue;
573 struct efx_channel *channel;
575 /* Calculate the rx buffer allocation parameters required to
576 * support the current MTU, including padding for header
577 * alignment and overruns.
579 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
580 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
581 efx->type->rx_buffer_hash_size +
582 efx->type->rx_buffer_padding);
583 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
584 sizeof(struct efx_rx_page_state));
586 /* Initialise the channels */
587 efx_for_each_channel(channel, efx) {
588 netif_dbg(channel->efx, drv, channel->efx->net_dev,
589 "init chan %d\n", channel->channel);
591 efx_init_eventq(channel);
593 efx_for_each_channel_tx_queue(tx_queue, channel)
594 efx_init_tx_queue(tx_queue);
596 /* The rx buffer allocation strategy is MTU dependent */
597 efx_rx_strategy(channel);
599 efx_for_each_channel_rx_queue(rx_queue, channel)
600 efx_init_rx_queue(rx_queue);
602 WARN_ON(channel->rx_pkt != NULL);
603 efx_rx_strategy(channel);
607 /* This enables event queue processing and packet transmission.
609 * Note that this function is not allowed to fail, since that would
610 * introduce too much complexity into the suspend/resume path.
612 static void efx_start_channel(struct efx_channel *channel)
614 struct efx_rx_queue *rx_queue;
616 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
617 "starting chan %d\n", channel->channel);
619 /* The interrupt handler for this channel may set work_pending
620 * as soon as we enable it. Make sure it's cleared before
621 * then. Similarly, make sure it sees the enabled flag set. */
622 channel->work_pending = false;
623 channel->enabled = true;
624 smp_wmb();
626 /* Fill the queues before enabling NAPI */
627 efx_for_each_channel_rx_queue(rx_queue, channel)
628 efx_fast_push_rx_descriptors(rx_queue);
630 napi_enable(&channel->napi_str);
633 /* This disables event queue processing and packet transmission.
634 * This function does not guarantee that all queue processing
635 * (e.g. RX refill) is complete.
637 static void efx_stop_channel(struct efx_channel *channel)
639 if (!channel->enabled)
640 return;
642 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
643 "stop chan %d\n", channel->channel);
645 channel->enabled = false;
646 napi_disable(&channel->napi_str);
649 static void efx_fini_channels(struct efx_nic *efx)
651 struct efx_channel *channel;
652 struct efx_tx_queue *tx_queue;
653 struct efx_rx_queue *rx_queue;
654 int rc;
656 EFX_ASSERT_RESET_SERIALISED(efx);
657 BUG_ON(efx->port_enabled);
659 rc = efx_nic_flush_queues(efx);
660 if (rc && EFX_WORKAROUND_7803(efx)) {
661 /* Schedule a reset to recover from the flush failure. The
662 * descriptor caches reference memory we're about to free,
663 * but falcon_reconfigure_mac_wrapper() won't reconnect
664 * the MACs because of the pending reset. */
665 netif_err(efx, drv, efx->net_dev,
666 "Resetting to recover from flush failure\n");
667 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 } else if (rc) {
669 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 } else {
671 netif_dbg(efx, drv, efx->net_dev,
672 "successfully flushed all queues\n");
675 efx_for_each_channel(channel, efx) {
676 netif_dbg(channel->efx, drv, channel->efx->net_dev,
677 "shut down chan %d\n", channel->channel);
679 efx_for_each_channel_rx_queue(rx_queue, channel)
680 efx_fini_rx_queue(rx_queue);
681 efx_for_each_channel_tx_queue(tx_queue, channel)
682 efx_fini_tx_queue(tx_queue);
683 efx_fini_eventq(channel);
687 static void efx_remove_channel(struct efx_channel *channel)
689 struct efx_tx_queue *tx_queue;
690 struct efx_rx_queue *rx_queue;
692 netif_dbg(channel->efx, drv, channel->efx->net_dev,
693 "destroy chan %d\n", channel->channel);
695 efx_for_each_channel_rx_queue(rx_queue, channel)
696 efx_remove_rx_queue(rx_queue);
697 efx_for_each_channel_tx_queue(tx_queue, channel)
698 efx_remove_tx_queue(tx_queue);
699 efx_remove_eventq(channel);
702 static void efx_remove_channels(struct efx_nic *efx)
704 struct efx_channel *channel;
706 efx_for_each_channel(channel, efx)
707 efx_remove_channel(channel);
711 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
713 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
714 u32 old_rxq_entries, old_txq_entries;
715 unsigned i;
716 int rc;
718 efx_stop_all(efx);
719 efx_fini_channels(efx);
721 /* Clone channels */
722 memset(other_channel, 0, sizeof(other_channel));
723 for (i = 0; i < efx->n_channels; i++) {
724 channel = efx_alloc_channel(efx, i, efx->channel[i]);
725 if (!channel) {
726 rc = -ENOMEM;
727 goto out;
729 other_channel[i] = channel;
732 /* Swap entry counts and channel pointers */
733 old_rxq_entries = efx->rxq_entries;
734 old_txq_entries = efx->txq_entries;
735 efx->rxq_entries = rxq_entries;
736 efx->txq_entries = txq_entries;
737 for (i = 0; i < efx->n_channels; i++) {
738 channel = efx->channel[i];
739 efx->channel[i] = other_channel[i];
740 other_channel[i] = channel;
743 rc = efx_probe_channels(efx);
744 if (rc)
745 goto rollback;
747 /* Destroy old channels */
748 for (i = 0; i < efx->n_channels; i++)
749 efx_remove_channel(other_channel[i]);
750 out:
751 /* Free unused channel structures */
752 for (i = 0; i < efx->n_channels; i++)
753 kfree(other_channel[i]);
755 efx_init_channels(efx);
756 efx_start_all(efx);
757 return rc;
759 rollback:
760 /* Swap back */
761 efx->rxq_entries = old_rxq_entries;
762 efx->txq_entries = old_txq_entries;
763 for (i = 0; i < efx->n_channels; i++) {
764 channel = efx->channel[i];
765 efx->channel[i] = other_channel[i];
766 other_channel[i] = channel;
768 goto out;
771 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
773 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
776 /**************************************************************************
778 * Port handling
780 **************************************************************************/
782 /* This ensures that the kernel is kept informed (via
783 * netif_carrier_on/off) of the link status, and also maintains the
784 * link status's stop on the port's TX queue.
786 void efx_link_status_changed(struct efx_nic *efx)
788 struct efx_link_state *link_state = &efx->link_state;
790 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
791 * that no events are triggered between unregister_netdev() and the
792 * driver unloading. A more general condition is that NETDEV_CHANGE
793 * can only be generated between NETDEV_UP and NETDEV_DOWN */
794 if (!netif_running(efx->net_dev))
795 return;
797 if (efx->port_inhibited) {
798 netif_carrier_off(efx->net_dev);
799 return;
802 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
803 efx->n_link_state_changes++;
805 if (link_state->up)
806 netif_carrier_on(efx->net_dev);
807 else
808 netif_carrier_off(efx->net_dev);
811 /* Status message for kernel log */
812 if (link_state->up) {
813 netif_info(efx, link, efx->net_dev,
814 "link up at %uMbps %s-duplex (MTU %d)%s\n",
815 link_state->speed, link_state->fd ? "full" : "half",
816 efx->net_dev->mtu,
817 (efx->promiscuous ? " [PROMISC]" : ""));
818 } else {
819 netif_info(efx, link, efx->net_dev, "link down\n");
824 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
826 efx->link_advertising = advertising;
827 if (advertising) {
828 if (advertising & ADVERTISED_Pause)
829 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
830 else
831 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
832 if (advertising & ADVERTISED_Asym_Pause)
833 efx->wanted_fc ^= EFX_FC_TX;
837 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
839 efx->wanted_fc = wanted_fc;
840 if (efx->link_advertising) {
841 if (wanted_fc & EFX_FC_RX)
842 efx->link_advertising |= (ADVERTISED_Pause |
843 ADVERTISED_Asym_Pause);
844 else
845 efx->link_advertising &= ~(ADVERTISED_Pause |
846 ADVERTISED_Asym_Pause);
847 if (wanted_fc & EFX_FC_TX)
848 efx->link_advertising ^= ADVERTISED_Asym_Pause;
852 static void efx_fini_port(struct efx_nic *efx);
854 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
855 * the MAC appropriately. All other PHY configuration changes are pushed
856 * through phy_op->set_settings(), and pushed asynchronously to the MAC
857 * through efx_monitor().
859 * Callers must hold the mac_lock
861 int __efx_reconfigure_port(struct efx_nic *efx)
863 enum efx_phy_mode phy_mode;
864 int rc;
866 WARN_ON(!mutex_is_locked(&efx->mac_lock));
868 /* Serialise the promiscuous flag with efx_set_multicast_list. */
869 if (efx_dev_registered(efx)) {
870 netif_addr_lock_bh(efx->net_dev);
871 netif_addr_unlock_bh(efx->net_dev);
874 /* Disable PHY transmit in mac level loopbacks */
875 phy_mode = efx->phy_mode;
876 if (LOOPBACK_INTERNAL(efx))
877 efx->phy_mode |= PHY_MODE_TX_DISABLED;
878 else
879 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
881 rc = efx->type->reconfigure_port(efx);
883 if (rc)
884 efx->phy_mode = phy_mode;
886 return rc;
889 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
890 * disabled. */
891 int efx_reconfigure_port(struct efx_nic *efx)
893 int rc;
895 EFX_ASSERT_RESET_SERIALISED(efx);
897 mutex_lock(&efx->mac_lock);
898 rc = __efx_reconfigure_port(efx);
899 mutex_unlock(&efx->mac_lock);
901 return rc;
904 /* Asynchronous work item for changing MAC promiscuity and multicast
905 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
906 * MAC directly. */
907 static void efx_mac_work(struct work_struct *data)
909 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
911 mutex_lock(&efx->mac_lock);
912 if (efx->port_enabled) {
913 efx->type->push_multicast_hash(efx);
914 efx->mac_op->reconfigure(efx);
916 mutex_unlock(&efx->mac_lock);
919 static int efx_probe_port(struct efx_nic *efx)
921 int rc;
923 netif_dbg(efx, probe, efx->net_dev, "create port\n");
925 if (phy_flash_cfg)
926 efx->phy_mode = PHY_MODE_SPECIAL;
928 /* Connect up MAC/PHY operations table */
929 rc = efx->type->probe_port(efx);
930 if (rc)
931 return rc;
933 /* Sanity check MAC address */
934 if (is_valid_ether_addr(efx->mac_address)) {
935 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
936 } else {
937 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
938 efx->mac_address);
939 if (!allow_bad_hwaddr) {
940 rc = -EINVAL;
941 goto err;
943 random_ether_addr(efx->net_dev->dev_addr);
944 netif_info(efx, probe, efx->net_dev,
945 "using locally-generated MAC %pM\n",
946 efx->net_dev->dev_addr);
949 return 0;
951 err:
952 efx->type->remove_port(efx);
953 return rc;
956 static int efx_init_port(struct efx_nic *efx)
958 int rc;
960 netif_dbg(efx, drv, efx->net_dev, "init port\n");
962 mutex_lock(&efx->mac_lock);
964 rc = efx->phy_op->init(efx);
965 if (rc)
966 goto fail1;
968 efx->port_initialized = true;
970 /* Reconfigure the MAC before creating dma queues (required for
971 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
972 efx->mac_op->reconfigure(efx);
974 /* Ensure the PHY advertises the correct flow control settings */
975 rc = efx->phy_op->reconfigure(efx);
976 if (rc)
977 goto fail2;
979 mutex_unlock(&efx->mac_lock);
980 return 0;
982 fail2:
983 efx->phy_op->fini(efx);
984 fail1:
985 mutex_unlock(&efx->mac_lock);
986 return rc;
989 static void efx_start_port(struct efx_nic *efx)
991 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
992 BUG_ON(efx->port_enabled);
994 mutex_lock(&efx->mac_lock);
995 efx->port_enabled = true;
997 /* efx_mac_work() might have been scheduled after efx_stop_port(),
998 * and then cancelled by efx_flush_all() */
999 efx->type->push_multicast_hash(efx);
1000 efx->mac_op->reconfigure(efx);
1002 mutex_unlock(&efx->mac_lock);
1005 /* Prevent efx_mac_work() and efx_monitor() from working */
1006 static void efx_stop_port(struct efx_nic *efx)
1008 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1010 mutex_lock(&efx->mac_lock);
1011 efx->port_enabled = false;
1012 mutex_unlock(&efx->mac_lock);
1014 /* Serialise against efx_set_multicast_list() */
1015 if (efx_dev_registered(efx)) {
1016 netif_addr_lock_bh(efx->net_dev);
1017 netif_addr_unlock_bh(efx->net_dev);
1021 static void efx_fini_port(struct efx_nic *efx)
1023 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1025 if (!efx->port_initialized)
1026 return;
1028 efx->phy_op->fini(efx);
1029 efx->port_initialized = false;
1031 efx->link_state.up = false;
1032 efx_link_status_changed(efx);
1035 static void efx_remove_port(struct efx_nic *efx)
1037 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1039 efx->type->remove_port(efx);
1042 /**************************************************************************
1044 * NIC handling
1046 **************************************************************************/
1048 /* This configures the PCI device to enable I/O and DMA. */
1049 static int efx_init_io(struct efx_nic *efx)
1051 struct pci_dev *pci_dev = efx->pci_dev;
1052 dma_addr_t dma_mask = efx->type->max_dma_mask;
1053 int rc;
1055 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1057 rc = pci_enable_device(pci_dev);
1058 if (rc) {
1059 netif_err(efx, probe, efx->net_dev,
1060 "failed to enable PCI device\n");
1061 goto fail1;
1064 pci_set_master(pci_dev);
1066 /* Set the PCI DMA mask. Try all possibilities from our
1067 * genuine mask down to 32 bits, because some architectures
1068 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1069 * masks event though they reject 46 bit masks.
1071 while (dma_mask > 0x7fffffffUL) {
1072 if (pci_dma_supported(pci_dev, dma_mask) &&
1073 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1074 break;
1075 dma_mask >>= 1;
1077 if (rc) {
1078 netif_err(efx, probe, efx->net_dev,
1079 "could not find a suitable DMA mask\n");
1080 goto fail2;
1082 netif_dbg(efx, probe, efx->net_dev,
1083 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1084 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1085 if (rc) {
1086 /* pci_set_consistent_dma_mask() is not *allowed* to
1087 * fail with a mask that pci_set_dma_mask() accepted,
1088 * but just in case...
1090 netif_err(efx, probe, efx->net_dev,
1091 "failed to set consistent DMA mask\n");
1092 goto fail2;
1095 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1096 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1097 if (rc) {
1098 netif_err(efx, probe, efx->net_dev,
1099 "request for memory BAR failed\n");
1100 rc = -EIO;
1101 goto fail3;
1103 efx->membase = ioremap_nocache(efx->membase_phys,
1104 efx->type->mem_map_size);
1105 if (!efx->membase) {
1106 netif_err(efx, probe, efx->net_dev,
1107 "could not map memory BAR at %llx+%x\n",
1108 (unsigned long long)efx->membase_phys,
1109 efx->type->mem_map_size);
1110 rc = -ENOMEM;
1111 goto fail4;
1113 netif_dbg(efx, probe, efx->net_dev,
1114 "memory BAR at %llx+%x (virtual %p)\n",
1115 (unsigned long long)efx->membase_phys,
1116 efx->type->mem_map_size, efx->membase);
1118 return 0;
1120 fail4:
1121 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1122 fail3:
1123 efx->membase_phys = 0;
1124 fail2:
1125 pci_disable_device(efx->pci_dev);
1126 fail1:
1127 return rc;
1130 static void efx_fini_io(struct efx_nic *efx)
1132 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1134 if (efx->membase) {
1135 iounmap(efx->membase);
1136 efx->membase = NULL;
1139 if (efx->membase_phys) {
1140 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1141 efx->membase_phys = 0;
1144 pci_disable_device(efx->pci_dev);
1147 /* Get number of channels wanted. Each channel will have its own IRQ,
1148 * 1 RX queue and/or 2 TX queues. */
1149 static int efx_wanted_channels(void)
1151 cpumask_var_t core_mask;
1152 int count;
1153 int cpu;
1155 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1156 printk(KERN_WARNING
1157 "sfc: RSS disabled due to allocation failure\n");
1158 return 1;
1161 count = 0;
1162 for_each_online_cpu(cpu) {
1163 if (!cpumask_test_cpu(cpu, core_mask)) {
1164 ++count;
1165 cpumask_or(core_mask, core_mask,
1166 topology_core_cpumask(cpu));
1170 free_cpumask_var(core_mask);
1171 return count;
1174 /* Probe the number and type of interrupts we are able to obtain, and
1175 * the resulting numbers of channels and RX queues.
1177 static void efx_probe_interrupts(struct efx_nic *efx)
1179 int max_channels =
1180 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1181 int rc, i;
1183 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1184 struct msix_entry xentries[EFX_MAX_CHANNELS];
1185 int n_channels;
1187 n_channels = efx_wanted_channels();
1188 if (separate_tx_channels)
1189 n_channels *= 2;
1190 n_channels = min(n_channels, max_channels);
1192 for (i = 0; i < n_channels; i++)
1193 xentries[i].entry = i;
1194 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1195 if (rc > 0) {
1196 netif_err(efx, drv, efx->net_dev,
1197 "WARNING: Insufficient MSI-X vectors"
1198 " available (%d < %d).\n", rc, n_channels);
1199 netif_err(efx, drv, efx->net_dev,
1200 "WARNING: Performance may be reduced.\n");
1201 EFX_BUG_ON_PARANOID(rc >= n_channels);
1202 n_channels = rc;
1203 rc = pci_enable_msix(efx->pci_dev, xentries,
1204 n_channels);
1207 if (rc == 0) {
1208 efx->n_channels = n_channels;
1209 if (separate_tx_channels) {
1210 efx->n_tx_channels =
1211 max(efx->n_channels / 2, 1U);
1212 efx->n_rx_channels =
1213 max(efx->n_channels -
1214 efx->n_tx_channels, 1U);
1215 } else {
1216 efx->n_tx_channels = efx->n_channels;
1217 efx->n_rx_channels = efx->n_channels;
1219 for (i = 0; i < n_channels; i++)
1220 efx_get_channel(efx, i)->irq =
1221 xentries[i].vector;
1222 } else {
1223 /* Fall back to single channel MSI */
1224 efx->interrupt_mode = EFX_INT_MODE_MSI;
1225 netif_err(efx, drv, efx->net_dev,
1226 "could not enable MSI-X\n");
1230 /* Try single interrupt MSI */
1231 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1232 efx->n_channels = 1;
1233 efx->n_rx_channels = 1;
1234 efx->n_tx_channels = 1;
1235 rc = pci_enable_msi(efx->pci_dev);
1236 if (rc == 0) {
1237 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1238 } else {
1239 netif_err(efx, drv, efx->net_dev,
1240 "could not enable MSI\n");
1241 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1245 /* Assume legacy interrupts */
1246 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1247 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1248 efx->n_rx_channels = 1;
1249 efx->n_tx_channels = 1;
1250 efx->legacy_irq = efx->pci_dev->irq;
1254 static void efx_remove_interrupts(struct efx_nic *efx)
1256 struct efx_channel *channel;
1258 /* Remove MSI/MSI-X interrupts */
1259 efx_for_each_channel(channel, efx)
1260 channel->irq = 0;
1261 pci_disable_msi(efx->pci_dev);
1262 pci_disable_msix(efx->pci_dev);
1264 /* Remove legacy interrupt */
1265 efx->legacy_irq = 0;
1268 struct efx_tx_queue *
1269 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1271 unsigned tx_channel_offset =
1272 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1273 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1274 type >= EFX_TXQ_TYPES);
1275 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1278 static void efx_set_channels(struct efx_nic *efx)
1280 struct efx_channel *channel;
1281 struct efx_tx_queue *tx_queue;
1282 unsigned tx_channel_offset =
1283 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1285 /* Channel pointers were set in efx_init_struct() but we now
1286 * need to clear them for TX queues in any RX-only channels. */
1287 efx_for_each_channel(channel, efx) {
1288 if (channel->channel - tx_channel_offset >=
1289 efx->n_tx_channels) {
1290 efx_for_each_channel_tx_queue(tx_queue, channel)
1291 tx_queue->channel = NULL;
1296 static int efx_probe_nic(struct efx_nic *efx)
1298 size_t i;
1299 int rc;
1301 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1303 /* Carry out hardware-type specific initialisation */
1304 rc = efx->type->probe(efx);
1305 if (rc)
1306 return rc;
1308 /* Determine the number of channels and queues by trying to hook
1309 * in MSI-X interrupts. */
1310 efx_probe_interrupts(efx);
1312 if (efx->n_channels > 1)
1313 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1314 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1315 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1317 efx_set_channels(efx);
1318 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1319 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1321 /* Initialise the interrupt moderation settings */
1322 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1324 return 0;
1327 static void efx_remove_nic(struct efx_nic *efx)
1329 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1331 efx_remove_interrupts(efx);
1332 efx->type->remove(efx);
1335 /**************************************************************************
1337 * NIC startup/shutdown
1339 *************************************************************************/
1341 static int efx_probe_all(struct efx_nic *efx)
1343 int rc;
1345 rc = efx_probe_nic(efx);
1346 if (rc) {
1347 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1348 goto fail1;
1351 rc = efx_probe_port(efx);
1352 if (rc) {
1353 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1354 goto fail2;
1357 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1358 rc = efx_probe_channels(efx);
1359 if (rc)
1360 goto fail3;
1362 rc = efx_probe_filters(efx);
1363 if (rc) {
1364 netif_err(efx, probe, efx->net_dev,
1365 "failed to create filter tables\n");
1366 goto fail4;
1369 return 0;
1371 fail4:
1372 efx_remove_channels(efx);
1373 fail3:
1374 efx_remove_port(efx);
1375 fail2:
1376 efx_remove_nic(efx);
1377 fail1:
1378 return rc;
1381 /* Called after previous invocation(s) of efx_stop_all, restarts the
1382 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1383 * and ensures that the port is scheduled to be reconfigured.
1384 * This function is safe to call multiple times when the NIC is in any
1385 * state. */
1386 static void efx_start_all(struct efx_nic *efx)
1388 struct efx_channel *channel;
1390 EFX_ASSERT_RESET_SERIALISED(efx);
1392 /* Check that it is appropriate to restart the interface. All
1393 * of these flags are safe to read under just the rtnl lock */
1394 if (efx->port_enabled)
1395 return;
1396 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1397 return;
1398 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1399 return;
1401 /* Mark the port as enabled so port reconfigurations can start, then
1402 * restart the transmit interface early so the watchdog timer stops */
1403 efx_start_port(efx);
1405 efx_for_each_channel(channel, efx) {
1406 if (efx_dev_registered(efx))
1407 efx_wake_queue(channel);
1408 efx_start_channel(channel);
1411 efx_nic_enable_interrupts(efx);
1413 /* Switch to event based MCDI completions after enabling interrupts.
1414 * If a reset has been scheduled, then we need to stay in polled mode.
1415 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1416 * reset_pending [modified from an atomic context], we instead guarantee
1417 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1418 efx_mcdi_mode_event(efx);
1419 if (efx->reset_pending != RESET_TYPE_NONE)
1420 efx_mcdi_mode_poll(efx);
1422 /* Start the hardware monitor if there is one. Otherwise (we're link
1423 * event driven), we have to poll the PHY because after an event queue
1424 * flush, we could have a missed a link state change */
1425 if (efx->type->monitor != NULL) {
1426 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1427 efx_monitor_interval);
1428 } else {
1429 mutex_lock(&efx->mac_lock);
1430 if (efx->phy_op->poll(efx))
1431 efx_link_status_changed(efx);
1432 mutex_unlock(&efx->mac_lock);
1435 efx->type->start_stats(efx);
1438 /* Flush all delayed work. Should only be called when no more delayed work
1439 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1440 * since we're holding the rtnl_lock at this point. */
1441 static void efx_flush_all(struct efx_nic *efx)
1443 /* Make sure the hardware monitor is stopped */
1444 cancel_delayed_work_sync(&efx->monitor_work);
1445 /* Stop scheduled port reconfigurations */
1446 cancel_work_sync(&efx->mac_work);
1449 /* Quiesce hardware and software without bringing the link down.
1450 * Safe to call multiple times, when the nic and interface is in any
1451 * state. The caller is guaranteed to subsequently be in a position
1452 * to modify any hardware and software state they see fit without
1453 * taking locks. */
1454 static void efx_stop_all(struct efx_nic *efx)
1456 struct efx_channel *channel;
1458 EFX_ASSERT_RESET_SERIALISED(efx);
1460 /* port_enabled can be read safely under the rtnl lock */
1461 if (!efx->port_enabled)
1462 return;
1464 efx->type->stop_stats(efx);
1466 /* Switch to MCDI polling on Siena before disabling interrupts */
1467 efx_mcdi_mode_poll(efx);
1469 /* Disable interrupts and wait for ISR to complete */
1470 efx_nic_disable_interrupts(efx);
1471 if (efx->legacy_irq)
1472 synchronize_irq(efx->legacy_irq);
1473 efx_for_each_channel(channel, efx) {
1474 if (channel->irq)
1475 synchronize_irq(channel->irq);
1478 /* Stop all NAPI processing and synchronous rx refills */
1479 efx_for_each_channel(channel, efx)
1480 efx_stop_channel(channel);
1482 /* Stop all asynchronous port reconfigurations. Since all
1483 * event processing has already been stopped, there is no
1484 * window to loose phy events */
1485 efx_stop_port(efx);
1487 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1488 efx_flush_all(efx);
1490 /* Stop the kernel transmit interface late, so the watchdog
1491 * timer isn't ticking over the flush */
1492 if (efx_dev_registered(efx)) {
1493 struct efx_channel *channel;
1494 efx_for_each_channel(channel, efx)
1495 efx_stop_queue(channel);
1496 netif_tx_lock_bh(efx->net_dev);
1497 netif_tx_unlock_bh(efx->net_dev);
1501 static void efx_remove_all(struct efx_nic *efx)
1503 efx_remove_filters(efx);
1504 efx_remove_channels(efx);
1505 efx_remove_port(efx);
1506 efx_remove_nic(efx);
1509 /**************************************************************************
1511 * Interrupt moderation
1513 **************************************************************************/
1515 static unsigned irq_mod_ticks(int usecs, int resolution)
1517 if (usecs <= 0)
1518 return 0; /* cannot receive interrupts ahead of time :-) */
1519 if (usecs < resolution)
1520 return 1; /* never round down to 0 */
1521 return usecs / resolution;
1524 /* Set interrupt moderation parameters */
1525 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1526 bool rx_adaptive)
1528 struct efx_channel *channel;
1529 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1530 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1532 EFX_ASSERT_RESET_SERIALISED(efx);
1534 efx->irq_rx_adaptive = rx_adaptive;
1535 efx->irq_rx_moderation = rx_ticks;
1536 efx_for_each_channel(channel, efx) {
1537 if (efx_channel_get_rx_queue(channel))
1538 channel->irq_moderation = rx_ticks;
1539 else if (efx_channel_get_tx_queue(channel, 0))
1540 channel->irq_moderation = tx_ticks;
1544 /**************************************************************************
1546 * Hardware monitor
1548 **************************************************************************/
1550 /* Run periodically off the general workqueue */
1551 static void efx_monitor(struct work_struct *data)
1553 struct efx_nic *efx = container_of(data, struct efx_nic,
1554 monitor_work.work);
1556 netif_vdbg(efx, timer, efx->net_dev,
1557 "hardware monitor executing on CPU %d\n",
1558 raw_smp_processor_id());
1559 BUG_ON(efx->type->monitor == NULL);
1561 /* If the mac_lock is already held then it is likely a port
1562 * reconfiguration is already in place, which will likely do
1563 * most of the work of monitor() anyway. */
1564 if (mutex_trylock(&efx->mac_lock)) {
1565 if (efx->port_enabled)
1566 efx->type->monitor(efx);
1567 mutex_unlock(&efx->mac_lock);
1570 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1571 efx_monitor_interval);
1574 /**************************************************************************
1576 * ioctls
1578 *************************************************************************/
1580 /* Net device ioctl
1581 * Context: process, rtnl_lock() held.
1583 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1585 struct efx_nic *efx = netdev_priv(net_dev);
1586 struct mii_ioctl_data *data = if_mii(ifr);
1588 EFX_ASSERT_RESET_SERIALISED(efx);
1590 /* Convert phy_id from older PRTAD/DEVAD format */
1591 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1592 (data->phy_id & 0xfc00) == 0x0400)
1593 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1595 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1598 /**************************************************************************
1600 * NAPI interface
1602 **************************************************************************/
1604 static int efx_init_napi(struct efx_nic *efx)
1606 struct efx_channel *channel;
1608 efx_for_each_channel(channel, efx) {
1609 channel->napi_dev = efx->net_dev;
1610 netif_napi_add(channel->napi_dev, &channel->napi_str,
1611 efx_poll, napi_weight);
1613 return 0;
1616 static void efx_fini_napi(struct efx_nic *efx)
1618 struct efx_channel *channel;
1620 efx_for_each_channel(channel, efx) {
1621 if (channel->napi_dev)
1622 netif_napi_del(&channel->napi_str);
1623 channel->napi_dev = NULL;
1627 /**************************************************************************
1629 * Kernel netpoll interface
1631 *************************************************************************/
1633 #ifdef CONFIG_NET_POLL_CONTROLLER
1635 /* Although in the common case interrupts will be disabled, this is not
1636 * guaranteed. However, all our work happens inside the NAPI callback,
1637 * so no locking is required.
1639 static void efx_netpoll(struct net_device *net_dev)
1641 struct efx_nic *efx = netdev_priv(net_dev);
1642 struct efx_channel *channel;
1644 efx_for_each_channel(channel, efx)
1645 efx_schedule_channel(channel);
1648 #endif
1650 /**************************************************************************
1652 * Kernel net device interface
1654 *************************************************************************/
1656 /* Context: process, rtnl_lock() held. */
1657 static int efx_net_open(struct net_device *net_dev)
1659 struct efx_nic *efx = netdev_priv(net_dev);
1660 EFX_ASSERT_RESET_SERIALISED(efx);
1662 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1663 raw_smp_processor_id());
1665 if (efx->state == STATE_DISABLED)
1666 return -EIO;
1667 if (efx->phy_mode & PHY_MODE_SPECIAL)
1668 return -EBUSY;
1669 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1670 return -EIO;
1672 /* Notify the kernel of the link state polled during driver load,
1673 * before the monitor starts running */
1674 efx_link_status_changed(efx);
1676 efx_start_all(efx);
1677 return 0;
1680 /* Context: process, rtnl_lock() held.
1681 * Note that the kernel will ignore our return code; this method
1682 * should really be a void.
1684 static int efx_net_stop(struct net_device *net_dev)
1686 struct efx_nic *efx = netdev_priv(net_dev);
1688 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1689 raw_smp_processor_id());
1691 if (efx->state != STATE_DISABLED) {
1692 /* Stop the device and flush all the channels */
1693 efx_stop_all(efx);
1694 efx_fini_channels(efx);
1695 efx_init_channels(efx);
1698 return 0;
1701 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1702 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1704 struct efx_nic *efx = netdev_priv(net_dev);
1705 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1707 spin_lock_bh(&efx->stats_lock);
1708 efx->type->update_stats(efx);
1709 spin_unlock_bh(&efx->stats_lock);
1711 stats->rx_packets = mac_stats->rx_packets;
1712 stats->tx_packets = mac_stats->tx_packets;
1713 stats->rx_bytes = mac_stats->rx_bytes;
1714 stats->tx_bytes = mac_stats->tx_bytes;
1715 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1716 stats->multicast = mac_stats->rx_multicast;
1717 stats->collisions = mac_stats->tx_collision;
1718 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1719 mac_stats->rx_length_error);
1720 stats->rx_crc_errors = mac_stats->rx_bad;
1721 stats->rx_frame_errors = mac_stats->rx_align_error;
1722 stats->rx_fifo_errors = mac_stats->rx_overflow;
1723 stats->rx_missed_errors = mac_stats->rx_missed;
1724 stats->tx_window_errors = mac_stats->tx_late_collision;
1726 stats->rx_errors = (stats->rx_length_errors +
1727 stats->rx_crc_errors +
1728 stats->rx_frame_errors +
1729 mac_stats->rx_symbol_error);
1730 stats->tx_errors = (stats->tx_window_errors +
1731 mac_stats->tx_bad);
1733 return stats;
1736 /* Context: netif_tx_lock held, BHs disabled. */
1737 static void efx_watchdog(struct net_device *net_dev)
1739 struct efx_nic *efx = netdev_priv(net_dev);
1741 netif_err(efx, tx_err, efx->net_dev,
1742 "TX stuck with port_enabled=%d: resetting channels\n",
1743 efx->port_enabled);
1745 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1749 /* Context: process, rtnl_lock() held. */
1750 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1752 struct efx_nic *efx = netdev_priv(net_dev);
1753 int rc = 0;
1755 EFX_ASSERT_RESET_SERIALISED(efx);
1757 if (new_mtu > EFX_MAX_MTU)
1758 return -EINVAL;
1760 efx_stop_all(efx);
1762 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1764 efx_fini_channels(efx);
1766 mutex_lock(&efx->mac_lock);
1767 /* Reconfigure the MAC before enabling the dma queues so that
1768 * the RX buffers don't overflow */
1769 net_dev->mtu = new_mtu;
1770 efx->mac_op->reconfigure(efx);
1771 mutex_unlock(&efx->mac_lock);
1773 efx_init_channels(efx);
1775 efx_start_all(efx);
1776 return rc;
1779 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1781 struct efx_nic *efx = netdev_priv(net_dev);
1782 struct sockaddr *addr = data;
1783 char *new_addr = addr->sa_data;
1785 EFX_ASSERT_RESET_SERIALISED(efx);
1787 if (!is_valid_ether_addr(new_addr)) {
1788 netif_err(efx, drv, efx->net_dev,
1789 "invalid ethernet MAC address requested: %pM\n",
1790 new_addr);
1791 return -EINVAL;
1794 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1796 /* Reconfigure the MAC */
1797 mutex_lock(&efx->mac_lock);
1798 efx->mac_op->reconfigure(efx);
1799 mutex_unlock(&efx->mac_lock);
1801 return 0;
1804 /* Context: netif_addr_lock held, BHs disabled. */
1805 static void efx_set_multicast_list(struct net_device *net_dev)
1807 struct efx_nic *efx = netdev_priv(net_dev);
1808 struct netdev_hw_addr *ha;
1809 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1810 u32 crc;
1811 int bit;
1813 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1815 /* Build multicast hash table */
1816 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1817 memset(mc_hash, 0xff, sizeof(*mc_hash));
1818 } else {
1819 memset(mc_hash, 0x00, sizeof(*mc_hash));
1820 netdev_for_each_mc_addr(ha, net_dev) {
1821 crc = ether_crc_le(ETH_ALEN, ha->addr);
1822 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1823 set_bit_le(bit, mc_hash->byte);
1826 /* Broadcast packets go through the multicast hash filter.
1827 * ether_crc_le() of the broadcast address is 0xbe2612ff
1828 * so we always add bit 0xff to the mask.
1830 set_bit_le(0xff, mc_hash->byte);
1833 if (efx->port_enabled)
1834 queue_work(efx->workqueue, &efx->mac_work);
1835 /* Otherwise efx_start_port() will do this */
1838 static const struct net_device_ops efx_netdev_ops = {
1839 .ndo_open = efx_net_open,
1840 .ndo_stop = efx_net_stop,
1841 .ndo_get_stats64 = efx_net_stats,
1842 .ndo_tx_timeout = efx_watchdog,
1843 .ndo_start_xmit = efx_hard_start_xmit,
1844 .ndo_validate_addr = eth_validate_addr,
1845 .ndo_do_ioctl = efx_ioctl,
1846 .ndo_change_mtu = efx_change_mtu,
1847 .ndo_set_mac_address = efx_set_mac_address,
1848 .ndo_set_multicast_list = efx_set_multicast_list,
1849 #ifdef CONFIG_NET_POLL_CONTROLLER
1850 .ndo_poll_controller = efx_netpoll,
1851 #endif
1854 static void efx_update_name(struct efx_nic *efx)
1856 strcpy(efx->name, efx->net_dev->name);
1857 efx_mtd_rename(efx);
1858 efx_set_channel_names(efx);
1861 static int efx_netdev_event(struct notifier_block *this,
1862 unsigned long event, void *ptr)
1864 struct net_device *net_dev = ptr;
1866 if (net_dev->netdev_ops == &efx_netdev_ops &&
1867 event == NETDEV_CHANGENAME)
1868 efx_update_name(netdev_priv(net_dev));
1870 return NOTIFY_DONE;
1873 static struct notifier_block efx_netdev_notifier = {
1874 .notifier_call = efx_netdev_event,
1877 static ssize_t
1878 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1880 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1881 return sprintf(buf, "%d\n", efx->phy_type);
1883 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1885 static int efx_register_netdev(struct efx_nic *efx)
1887 struct net_device *net_dev = efx->net_dev;
1888 int rc;
1890 net_dev->watchdog_timeo = 5 * HZ;
1891 net_dev->irq = efx->pci_dev->irq;
1892 net_dev->netdev_ops = &efx_netdev_ops;
1893 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1895 /* Clear MAC statistics */
1896 efx->mac_op->update_stats(efx);
1897 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1899 rtnl_lock();
1901 rc = dev_alloc_name(net_dev, net_dev->name);
1902 if (rc < 0)
1903 goto fail_locked;
1904 efx_update_name(efx);
1906 rc = register_netdevice(net_dev);
1907 if (rc)
1908 goto fail_locked;
1910 /* Always start with carrier off; PHY events will detect the link */
1911 netif_carrier_off(efx->net_dev);
1913 rtnl_unlock();
1915 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1916 if (rc) {
1917 netif_err(efx, drv, efx->net_dev,
1918 "failed to init net dev attributes\n");
1919 goto fail_registered;
1922 return 0;
1924 fail_locked:
1925 rtnl_unlock();
1926 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1927 return rc;
1929 fail_registered:
1930 unregister_netdev(net_dev);
1931 return rc;
1934 static void efx_unregister_netdev(struct efx_nic *efx)
1936 struct efx_channel *channel;
1937 struct efx_tx_queue *tx_queue;
1939 if (!efx->net_dev)
1940 return;
1942 BUG_ON(netdev_priv(efx->net_dev) != efx);
1944 /* Free up any skbs still remaining. This has to happen before
1945 * we try to unregister the netdev as running their destructors
1946 * may be needed to get the device ref. count to 0. */
1947 efx_for_each_channel(channel, efx) {
1948 efx_for_each_channel_tx_queue(tx_queue, channel)
1949 efx_release_tx_buffers(tx_queue);
1952 if (efx_dev_registered(efx)) {
1953 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1954 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1955 unregister_netdev(efx->net_dev);
1959 /**************************************************************************
1961 * Device reset and suspend
1963 **************************************************************************/
1965 /* Tears down the entire software state and most of the hardware state
1966 * before reset. */
1967 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1969 EFX_ASSERT_RESET_SERIALISED(efx);
1971 efx_stop_all(efx);
1972 mutex_lock(&efx->mac_lock);
1973 mutex_lock(&efx->spi_lock);
1975 efx_fini_channels(efx);
1976 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1977 efx->phy_op->fini(efx);
1978 efx->type->fini(efx);
1981 /* This function will always ensure that the locks acquired in
1982 * efx_reset_down() are released. A failure return code indicates
1983 * that we were unable to reinitialise the hardware, and the
1984 * driver should be disabled. If ok is false, then the rx and tx
1985 * engines are not restarted, pending a RESET_DISABLE. */
1986 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1988 int rc;
1990 EFX_ASSERT_RESET_SERIALISED(efx);
1992 rc = efx->type->init(efx);
1993 if (rc) {
1994 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1995 goto fail;
1998 if (!ok)
1999 goto fail;
2001 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2002 rc = efx->phy_op->init(efx);
2003 if (rc)
2004 goto fail;
2005 if (efx->phy_op->reconfigure(efx))
2006 netif_err(efx, drv, efx->net_dev,
2007 "could not restore PHY settings\n");
2010 efx->mac_op->reconfigure(efx);
2012 efx_init_channels(efx);
2013 efx_restore_filters(efx);
2015 mutex_unlock(&efx->spi_lock);
2016 mutex_unlock(&efx->mac_lock);
2018 efx_start_all(efx);
2020 return 0;
2022 fail:
2023 efx->port_initialized = false;
2025 mutex_unlock(&efx->spi_lock);
2026 mutex_unlock(&efx->mac_lock);
2028 return rc;
2031 /* Reset the NIC using the specified method. Note that the reset may
2032 * fail, in which case the card will be left in an unusable state.
2034 * Caller must hold the rtnl_lock.
2036 int efx_reset(struct efx_nic *efx, enum reset_type method)
2038 int rc, rc2;
2039 bool disabled;
2041 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2042 RESET_TYPE(method));
2044 efx_reset_down(efx, method);
2046 rc = efx->type->reset(efx, method);
2047 if (rc) {
2048 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2049 goto out;
2052 /* Allow resets to be rescheduled. */
2053 efx->reset_pending = RESET_TYPE_NONE;
2055 /* Reinitialise bus-mastering, which may have been turned off before
2056 * the reset was scheduled. This is still appropriate, even in the
2057 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2058 * can respond to requests. */
2059 pci_set_master(efx->pci_dev);
2061 out:
2062 /* Leave device stopped if necessary */
2063 disabled = rc || method == RESET_TYPE_DISABLE;
2064 rc2 = efx_reset_up(efx, method, !disabled);
2065 if (rc2) {
2066 disabled = true;
2067 if (!rc)
2068 rc = rc2;
2071 if (disabled) {
2072 dev_close(efx->net_dev);
2073 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2074 efx->state = STATE_DISABLED;
2075 } else {
2076 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2078 return rc;
2081 /* The worker thread exists so that code that cannot sleep can
2082 * schedule a reset for later.
2084 static void efx_reset_work(struct work_struct *data)
2086 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2088 if (efx->reset_pending == RESET_TYPE_NONE)
2089 return;
2091 /* If we're not RUNNING then don't reset. Leave the reset_pending
2092 * flag set so that efx_pci_probe_main will be retried */
2093 if (efx->state != STATE_RUNNING) {
2094 netif_info(efx, drv, efx->net_dev,
2095 "scheduled reset quenched. NIC not RUNNING\n");
2096 return;
2099 rtnl_lock();
2100 (void)efx_reset(efx, efx->reset_pending);
2101 rtnl_unlock();
2104 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2106 enum reset_type method;
2108 if (efx->reset_pending != RESET_TYPE_NONE) {
2109 netif_info(efx, drv, efx->net_dev,
2110 "quenching already scheduled reset\n");
2111 return;
2114 switch (type) {
2115 case RESET_TYPE_INVISIBLE:
2116 case RESET_TYPE_ALL:
2117 case RESET_TYPE_WORLD:
2118 case RESET_TYPE_DISABLE:
2119 method = type;
2120 break;
2121 case RESET_TYPE_RX_RECOVERY:
2122 case RESET_TYPE_RX_DESC_FETCH:
2123 case RESET_TYPE_TX_DESC_FETCH:
2124 case RESET_TYPE_TX_SKIP:
2125 method = RESET_TYPE_INVISIBLE;
2126 break;
2127 case RESET_TYPE_MC_FAILURE:
2128 default:
2129 method = RESET_TYPE_ALL;
2130 break;
2133 if (method != type)
2134 netif_dbg(efx, drv, efx->net_dev,
2135 "scheduling %s reset for %s\n",
2136 RESET_TYPE(method), RESET_TYPE(type));
2137 else
2138 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2139 RESET_TYPE(method));
2141 efx->reset_pending = method;
2143 /* efx_process_channel() will no longer read events once a
2144 * reset is scheduled. So switch back to poll'd MCDI completions. */
2145 efx_mcdi_mode_poll(efx);
2147 queue_work(reset_workqueue, &efx->reset_work);
2150 /**************************************************************************
2152 * List of NICs we support
2154 **************************************************************************/
2156 /* PCI device ID table */
2157 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2158 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2159 .driver_data = (unsigned long) &falcon_a1_nic_type},
2160 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2161 .driver_data = (unsigned long) &falcon_b0_nic_type},
2162 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2163 .driver_data = (unsigned long) &siena_a0_nic_type},
2164 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2165 .driver_data = (unsigned long) &siena_a0_nic_type},
2166 {0} /* end of list */
2169 /**************************************************************************
2171 * Dummy PHY/MAC operations
2173 * Can be used for some unimplemented operations
2174 * Needed so all function pointers are valid and do not have to be tested
2175 * before use
2177 **************************************************************************/
2178 int efx_port_dummy_op_int(struct efx_nic *efx)
2180 return 0;
2182 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2183 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
2186 bool efx_port_dummy_op_poll(struct efx_nic *efx)
2188 return false;
2191 static struct efx_phy_operations efx_dummy_phy_operations = {
2192 .init = efx_port_dummy_op_int,
2193 .reconfigure = efx_port_dummy_op_int,
2194 .poll = efx_port_dummy_op_poll,
2195 .fini = efx_port_dummy_op_void,
2198 /**************************************************************************
2200 * Data housekeeping
2202 **************************************************************************/
2204 /* This zeroes out and then fills in the invariants in a struct
2205 * efx_nic (including all sub-structures).
2207 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2208 struct pci_dev *pci_dev, struct net_device *net_dev)
2210 int i;
2212 /* Initialise common structures */
2213 memset(efx, 0, sizeof(*efx));
2214 spin_lock_init(&efx->biu_lock);
2215 mutex_init(&efx->mdio_lock);
2216 mutex_init(&efx->spi_lock);
2217 #ifdef CONFIG_SFC_MTD
2218 INIT_LIST_HEAD(&efx->mtd_list);
2219 #endif
2220 INIT_WORK(&efx->reset_work, efx_reset_work);
2221 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2222 efx->pci_dev = pci_dev;
2223 efx->msg_enable = debug;
2224 efx->state = STATE_INIT;
2225 efx->reset_pending = RESET_TYPE_NONE;
2226 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2228 efx->net_dev = net_dev;
2229 efx->rx_checksum_enabled = true;
2230 spin_lock_init(&efx->stats_lock);
2231 mutex_init(&efx->mac_lock);
2232 efx->mac_op = type->default_mac_ops;
2233 efx->phy_op = &efx_dummy_phy_operations;
2234 efx->mdio.dev = net_dev;
2235 INIT_WORK(&efx->mac_work, efx_mac_work);
2237 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2238 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2239 if (!efx->channel[i])
2240 goto fail;
2243 efx->type = type;
2245 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2247 /* Higher numbered interrupt modes are less capable! */
2248 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2249 interrupt_mode);
2251 /* Would be good to use the net_dev name, but we're too early */
2252 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2253 pci_name(pci_dev));
2254 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2255 if (!efx->workqueue)
2256 goto fail;
2258 return 0;
2260 fail:
2261 efx_fini_struct(efx);
2262 return -ENOMEM;
2265 static void efx_fini_struct(struct efx_nic *efx)
2267 int i;
2269 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2270 kfree(efx->channel[i]);
2272 if (efx->workqueue) {
2273 destroy_workqueue(efx->workqueue);
2274 efx->workqueue = NULL;
2278 /**************************************************************************
2280 * PCI interface
2282 **************************************************************************/
2284 /* Main body of final NIC shutdown code
2285 * This is called only at module unload (or hotplug removal).
2287 static void efx_pci_remove_main(struct efx_nic *efx)
2289 efx_nic_fini_interrupt(efx);
2290 efx_fini_channels(efx);
2291 efx_fini_port(efx);
2292 efx->type->fini(efx);
2293 efx_fini_napi(efx);
2294 efx_remove_all(efx);
2297 /* Final NIC shutdown
2298 * This is called only at module unload (or hotplug removal).
2300 static void efx_pci_remove(struct pci_dev *pci_dev)
2302 struct efx_nic *efx;
2304 efx = pci_get_drvdata(pci_dev);
2305 if (!efx)
2306 return;
2308 /* Mark the NIC as fini, then stop the interface */
2309 rtnl_lock();
2310 efx->state = STATE_FINI;
2311 dev_close(efx->net_dev);
2313 /* Allow any queued efx_resets() to complete */
2314 rtnl_unlock();
2316 efx_unregister_netdev(efx);
2318 efx_mtd_remove(efx);
2320 /* Wait for any scheduled resets to complete. No more will be
2321 * scheduled from this point because efx_stop_all() has been
2322 * called, we are no longer registered with driverlink, and
2323 * the net_device's have been removed. */
2324 cancel_work_sync(&efx->reset_work);
2326 efx_pci_remove_main(efx);
2328 efx_fini_io(efx);
2329 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2331 pci_set_drvdata(pci_dev, NULL);
2332 efx_fini_struct(efx);
2333 free_netdev(efx->net_dev);
2336 /* Main body of NIC initialisation
2337 * This is called at module load (or hotplug insertion, theoretically).
2339 static int efx_pci_probe_main(struct efx_nic *efx)
2341 int rc;
2343 /* Do start-of-day initialisation */
2344 rc = efx_probe_all(efx);
2345 if (rc)
2346 goto fail1;
2348 rc = efx_init_napi(efx);
2349 if (rc)
2350 goto fail2;
2352 rc = efx->type->init(efx);
2353 if (rc) {
2354 netif_err(efx, probe, efx->net_dev,
2355 "failed to initialise NIC\n");
2356 goto fail3;
2359 rc = efx_init_port(efx);
2360 if (rc) {
2361 netif_err(efx, probe, efx->net_dev,
2362 "failed to initialise port\n");
2363 goto fail4;
2366 efx_init_channels(efx);
2368 rc = efx_nic_init_interrupt(efx);
2369 if (rc)
2370 goto fail5;
2372 return 0;
2374 fail5:
2375 efx_fini_channels(efx);
2376 efx_fini_port(efx);
2377 fail4:
2378 efx->type->fini(efx);
2379 fail3:
2380 efx_fini_napi(efx);
2381 fail2:
2382 efx_remove_all(efx);
2383 fail1:
2384 return rc;
2387 /* NIC initialisation
2389 * This is called at module load (or hotplug insertion,
2390 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2391 * sets up and registers the network devices with the kernel and hooks
2392 * the interrupt service routine. It does not prepare the device for
2393 * transmission; this is left to the first time one of the network
2394 * interfaces is brought up (i.e. efx_net_open).
2396 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2397 const struct pci_device_id *entry)
2399 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2400 struct net_device *net_dev;
2401 struct efx_nic *efx;
2402 int i, rc;
2404 /* Allocate and initialise a struct net_device and struct efx_nic */
2405 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2406 if (!net_dev)
2407 return -ENOMEM;
2408 net_dev->features |= (type->offload_features | NETIF_F_SG |
2409 NETIF_F_HIGHDMA | NETIF_F_TSO |
2410 NETIF_F_GRO);
2411 if (type->offload_features & NETIF_F_V6_CSUM)
2412 net_dev->features |= NETIF_F_TSO6;
2413 /* Mask for features that also apply to VLAN devices */
2414 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2415 NETIF_F_HIGHDMA | NETIF_F_TSO);
2416 efx = netdev_priv(net_dev);
2417 pci_set_drvdata(pci_dev, efx);
2418 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2419 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2420 if (rc)
2421 goto fail1;
2423 netif_info(efx, probe, efx->net_dev,
2424 "Solarflare Communications NIC detected\n");
2426 /* Set up basic I/O (BAR mappings etc) */
2427 rc = efx_init_io(efx);
2428 if (rc)
2429 goto fail2;
2431 /* No serialisation is required with the reset path because
2432 * we're in STATE_INIT. */
2433 for (i = 0; i < 5; i++) {
2434 rc = efx_pci_probe_main(efx);
2436 /* Serialise against efx_reset(). No more resets will be
2437 * scheduled since efx_stop_all() has been called, and we
2438 * have not and never have been registered with either
2439 * the rtnetlink or driverlink layers. */
2440 cancel_work_sync(&efx->reset_work);
2442 if (rc == 0) {
2443 if (efx->reset_pending != RESET_TYPE_NONE) {
2444 /* If there was a scheduled reset during
2445 * probe, the NIC is probably hosed anyway */
2446 efx_pci_remove_main(efx);
2447 rc = -EIO;
2448 } else {
2449 break;
2453 /* Retry if a recoverably reset event has been scheduled */
2454 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2455 (efx->reset_pending != RESET_TYPE_ALL))
2456 goto fail3;
2458 efx->reset_pending = RESET_TYPE_NONE;
2461 if (rc) {
2462 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2463 goto fail4;
2466 /* Switch to the running state before we expose the device to the OS,
2467 * so that dev_open()|efx_start_all() will actually start the device */
2468 efx->state = STATE_RUNNING;
2470 rc = efx_register_netdev(efx);
2471 if (rc)
2472 goto fail5;
2474 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2476 rtnl_lock();
2477 efx_mtd_probe(efx); /* allowed to fail */
2478 rtnl_unlock();
2479 return 0;
2481 fail5:
2482 efx_pci_remove_main(efx);
2483 fail4:
2484 fail3:
2485 efx_fini_io(efx);
2486 fail2:
2487 efx_fini_struct(efx);
2488 fail1:
2489 WARN_ON(rc > 0);
2490 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2491 free_netdev(net_dev);
2492 return rc;
2495 static int efx_pm_freeze(struct device *dev)
2497 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2499 efx->state = STATE_FINI;
2501 netif_device_detach(efx->net_dev);
2503 efx_stop_all(efx);
2504 efx_fini_channels(efx);
2506 return 0;
2509 static int efx_pm_thaw(struct device *dev)
2511 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2513 efx->state = STATE_INIT;
2515 efx_init_channels(efx);
2517 mutex_lock(&efx->mac_lock);
2518 efx->phy_op->reconfigure(efx);
2519 mutex_unlock(&efx->mac_lock);
2521 efx_start_all(efx);
2523 netif_device_attach(efx->net_dev);
2525 efx->state = STATE_RUNNING;
2527 efx->type->resume_wol(efx);
2529 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2530 queue_work(reset_workqueue, &efx->reset_work);
2532 return 0;
2535 static int efx_pm_poweroff(struct device *dev)
2537 struct pci_dev *pci_dev = to_pci_dev(dev);
2538 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2540 efx->type->fini(efx);
2542 efx->reset_pending = RESET_TYPE_NONE;
2544 pci_save_state(pci_dev);
2545 return pci_set_power_state(pci_dev, PCI_D3hot);
2548 /* Used for both resume and restore */
2549 static int efx_pm_resume(struct device *dev)
2551 struct pci_dev *pci_dev = to_pci_dev(dev);
2552 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2553 int rc;
2555 rc = pci_set_power_state(pci_dev, PCI_D0);
2556 if (rc)
2557 return rc;
2558 pci_restore_state(pci_dev);
2559 rc = pci_enable_device(pci_dev);
2560 if (rc)
2561 return rc;
2562 pci_set_master(efx->pci_dev);
2563 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2564 if (rc)
2565 return rc;
2566 rc = efx->type->init(efx);
2567 if (rc)
2568 return rc;
2569 efx_pm_thaw(dev);
2570 return 0;
2573 static int efx_pm_suspend(struct device *dev)
2575 int rc;
2577 efx_pm_freeze(dev);
2578 rc = efx_pm_poweroff(dev);
2579 if (rc)
2580 efx_pm_resume(dev);
2581 return rc;
2584 static struct dev_pm_ops efx_pm_ops = {
2585 .suspend = efx_pm_suspend,
2586 .resume = efx_pm_resume,
2587 .freeze = efx_pm_freeze,
2588 .thaw = efx_pm_thaw,
2589 .poweroff = efx_pm_poweroff,
2590 .restore = efx_pm_resume,
2593 static struct pci_driver efx_pci_driver = {
2594 .name = KBUILD_MODNAME,
2595 .id_table = efx_pci_table,
2596 .probe = efx_pci_probe,
2597 .remove = efx_pci_remove,
2598 .driver.pm = &efx_pm_ops,
2601 /**************************************************************************
2603 * Kernel module interface
2605 *************************************************************************/
2607 module_param(interrupt_mode, uint, 0444);
2608 MODULE_PARM_DESC(interrupt_mode,
2609 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2611 static int __init efx_init_module(void)
2613 int rc;
2615 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2617 rc = register_netdevice_notifier(&efx_netdev_notifier);
2618 if (rc)
2619 goto err_notifier;
2621 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2622 if (!reset_workqueue) {
2623 rc = -ENOMEM;
2624 goto err_reset;
2627 rc = pci_register_driver(&efx_pci_driver);
2628 if (rc < 0)
2629 goto err_pci;
2631 return 0;
2633 err_pci:
2634 destroy_workqueue(reset_workqueue);
2635 err_reset:
2636 unregister_netdevice_notifier(&efx_netdev_notifier);
2637 err_notifier:
2638 return rc;
2641 static void __exit efx_exit_module(void)
2643 printk(KERN_INFO "Solarflare NET driver unloading\n");
2645 pci_unregister_driver(&efx_pci_driver);
2646 destroy_workqueue(reset_workqueue);
2647 unregister_netdevice_notifier(&efx_netdev_notifier);
2651 module_init(efx_init_module);
2652 module_exit(efx_exit_module);
2654 MODULE_AUTHOR("Solarflare Communications and "
2655 "Michael Brown <mbrown@fensystems.co.uk>");
2656 MODULE_DESCRIPTION("Solarflare Communications network driver");
2657 MODULE_LICENSE("GPL");
2658 MODULE_DEVICE_TABLE(pci, efx_pci_table);