drivers/staging/iio/dac/ad5686.c

   1 /*
   2  * AD5686R, AD5685R, AD5684R Digital to analog converters  driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/gpio.h>
  11 #include <linux/fs.h>
  12 #include <linux/device.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 #include "../iio.h"
  20 #include "../sysfs.h"
  21 #include "dac.h"
  22
  23 #define AD5686_DAC_CHANNELS                     4
  24
  25 #define AD5686_ADDR(x)                          ((x) << 16)
  26 #define AD5686_CMD(x)                           ((x) << 20)
  27
  28 #define AD5686_ADDR_DAC0                        0x1
  29 #define AD5686_ADDR_DAC1                        0x2
  30 #define AD5686_ADDR_DAC2                        0x4
  31 #define AD5686_ADDR_DAC3                        0x8
  32 #define AD5686_ADDR_ALL_DAC                     0xF
  33
  34 #define AD5686_CMD_NOOP                         0x0
  35 #define AD5686_CMD_WRITE_INPUT_N                0x1
  36 #define AD5686_CMD_UPDATE_DAC_N                 0x2
  37 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  38 #define AD5686_CMD_POWERDOWN_DAC                0x4
  39 #define AD5686_CMD_LDAC_MASK                    0x5
  40 #define AD5686_CMD_RESET                        0x6
  41 #define AD5686_CMD_INTERNAL_REFER_SETUP         0x7
  42 #define AD5686_CMD_DAISY_CHAIN_ENABLE           0x8
  43 #define AD5686_CMD_READBACK_ENABLE              0x9
  44
  45 #define AD5686_LDAC_PWRDN_NONE                  0x0
  46 #define AD5686_LDAC_PWRDN_1K                    0x1
  47 #define AD5686_LDAC_PWRDN_100K                  0x2
  48 #define AD5686_LDAC_PWRDN_3STATE                0x3
  49
  50 /**
  51  * struct ad5686_chip_info - chip specific information
  52  * @int_vref_mv:        AD5620/40/60: the internal reference voltage
  53  * @channel:            channel specification
  54 */
  55
  56 struct ad5686_chip_info {
  57         u16                             int_vref_mv;
  58         struct iio_chan_spec            channel[AD5686_DAC_CHANNELS];
  59 };
  60
  61 /**
  62  * struct ad5446_state - driver instance specific data
  63  * @spi:                spi_device
  64  * @chip_info:          chip model specific constants, available modes etc
  65  * @reg:                supply regulator
  66  * @vref_mv:            actual reference voltage used
  67  * @pwr_down_mask:      power down mask
  68  * @pwr_down_mode:      current power down mode
  69  * @data:               spi transfer buffers
  70  */
  71
  72 struct ad5686_state {
  73         struct spi_device               *spi;
  74         const struct ad5686_chip_info   *chip_info;
  75         struct regulator                *reg;
  76         unsigned short                  vref_mv;
  77         unsigned                        pwr_down_mask;
  78         unsigned                        pwr_down_mode;
  79         /*
  80          * DMA (thus cache coherency maintenance) requires the
  81          * transfer buffers to live in their own cache lines.
  82          */
  83
  84         union {
  85                 u32 d32;
  86                 u8 d8[4];
  87         } data[3] ____cacheline_aligned;
  88 };
  89
  90 /**
  91  * ad5686_supported_device_ids:
  92  */
  93
  94 enum ad5686_supported_device_ids {
  95         ID_AD5684,
  96         ID_AD5685,
  97         ID_AD5686,
  98 };
  99
 100 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
 101         [ID_AD5684] = {
 102                 .channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
 103                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 104                                     AD5686_ADDR_DAC0,
 105                                     0, IIO_ST('u', 12, 16, 4), 0),
 106                 .channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
 107                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 108                                     AD5686_ADDR_DAC1,
 109                                     1, IIO_ST('u', 12, 16, 4), 0),
 110                 .channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
 111                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 112                                     AD5686_ADDR_DAC2,
 113                                     2, IIO_ST('u', 12, 16, 4), 0),
 114                 .channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
 115                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 116                                     AD5686_ADDR_DAC3,
 117                                     3, IIO_ST('u', 12, 16, 4), 0),
 118                 .int_vref_mv = 2500,
 119         },
 120         [ID_AD5685] = {
 121                 .channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
 122                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 123                                     AD5686_ADDR_DAC0,
 124                                     0, IIO_ST('u', 14, 16, 2), 0),
 125                 .channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
 126                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 127                                     AD5686_ADDR_DAC1,
 128                                     1, IIO_ST('u', 14, 16, 2), 0),
 129                 .channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
 130                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 131                                     AD5686_ADDR_DAC2,
 132                                     2, IIO_ST('u', 14, 16, 2), 0),
 133                 .channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
 134                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 135                                     AD5686_ADDR_DAC3,
 136                                     3, IIO_ST('u', 14, 16, 2), 0),
 137                 .int_vref_mv = 2500,
 138         },
 139         [ID_AD5686] = {
 140                 .channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
 141                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 142                                     AD5686_ADDR_DAC0,
 143                                     0, IIO_ST('u', 16, 16, 0), 0),
 144                 .channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
 145                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 146                                     AD5686_ADDR_DAC1,
 147                                     1, IIO_ST('u', 16, 16, 0), 0),
 148                 .channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
 149                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 150                                     AD5686_ADDR_DAC2,
 151                                     2, IIO_ST('u', 16, 16, 0), 0),
 152                 .channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
 153                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 154                                     AD5686_ADDR_DAC3,
 155                                     3, IIO_ST('u', 16, 16, 0), 0),
 156                 .int_vref_mv = 2500,
 157         },
 158 };
 159
 160 static int ad5686_spi_write(struct ad5686_state *st,
 161                              u8 cmd, u8 addr, u16 val, u8 shift)
 162 {
 163         val <<= shift;
 164
 165         st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
 166                               AD5686_ADDR(addr) |
 167                               val);
 168
 169         return spi_write(st->spi, &st->data[0].d8[1], 3);
 170 }
 171
 172 static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
 173 {
 174         struct spi_transfer t[] = {
 175                 {
 176                         .tx_buf = &st->data[0].d8[1],
 177                         .len = 3,
 178                         .cs_change = 1,
 179                 }, {
 180                         .tx_buf = &st->data[1].d8[1],
 181                         .rx_buf = &st->data[2].d8[1],
 182                         .len = 3,
 183                 },
 184         };
 185         struct spi_message m;
 186         int ret;
 187
 188         spi_message_init(&m);
 189         spi_message_add_tail(&t[0], &m);
 190         spi_message_add_tail(&t[1], &m);
 191
 192         st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
 193                               AD5686_ADDR(addr));
 194         st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
 195
 196         ret = spi_sync(st->spi, &m);
 197         if (ret < 0)
 198                 return ret;
 199
 200         return be32_to_cpu(st->data[2].d32);
 201 }
 202
 203 static ssize_t ad5686_read_powerdown_mode(struct device *dev,
 204                                       struct device_attribute *attr, char *buf)
 205 {
 206         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 207         struct ad5686_state *st = iio_priv(indio_dev);
 208         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 209
 210         char mode[][15] = {"", "1kohm_to_gnd", "100kohm_to_gnd", "three_state"};
 211
 212         return sprintf(buf, "%s\n", mode[(st->pwr_down_mode >>
 213                                          (this_attr->address * 2)) & 0x3]);
 214 }
 215
 216 static ssize_t ad5686_write_powerdown_mode(struct device *dev,
 217                                        struct device_attribute *attr,
 218                                        const char *buf, size_t len)
 219 {
 220         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 221         struct ad5686_state *st = iio_priv(indio_dev);
 222         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 223         unsigned mode;
 224
 225         if (sysfs_streq(buf, "1kohm_to_gnd"))
 226                 mode = AD5686_LDAC_PWRDN_1K;
 227         else if (sysfs_streq(buf, "100kohm_to_gnd"))
 228                 mode = AD5686_LDAC_PWRDN_100K;
 229         else if (sysfs_streq(buf, "three_state"))
 230                 mode = AD5686_LDAC_PWRDN_3STATE;
 231         else
 232                 return  -EINVAL;
 233
 234         st->pwr_down_mode &= ~(0x3 << (this_attr->address * 2));
 235         st->pwr_down_mode |= (mode << (this_attr->address * 2));
 236
 237         return len;
 238 }
 239
 240 static ssize_t ad5686_read_dac_powerdown(struct device *dev,
 241                                            struct device_attribute *attr,
 242                                            char *buf)
 243 {
 244         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 245         struct ad5686_state *st = iio_priv(indio_dev);
 246         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 247
 248         return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
 249                         (0x3 << (this_attr->address * 2))));
 250 }
 251
 252 static ssize_t ad5686_write_dac_powerdown(struct device *dev,
 253                                             struct device_attribute *attr,
 254                                             const char *buf, size_t len)
 255 {
 256         bool readin;
 257         int ret;
 258         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 259         struct ad5686_state *st = iio_priv(indio_dev);
 260         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 261
 262         ret = strtobool(buf, &readin);
 263         if (ret)
 264                 return ret;
 265
 266         if (readin == true)
 267                 st->pwr_down_mask |= (0x3 << (this_attr->address * 2));
 268         else
 269                 st->pwr_down_mask &= ~(0x3 << (this_attr->address * 2));
 270
 271         ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
 272                                st->pwr_down_mask & st->pwr_down_mode, 0);
 273
 274         return ret ? ret : len;
 275 }
 276
 277 static IIO_CONST_ATTR(out_powerdown_mode_available,
 278                         "1kohm_to_gnd 100kohm_to_gnd three_state");
 279
 280 #define IIO_DEV_ATTR_DAC_POWERDOWN_MODE(_num) \
 281         IIO_DEVICE_ATTR(out##_num##_powerdown_mode, S_IRUGO | S_IWUSR,  \
 282                         ad5686_read_powerdown_mode,                     \
 283                         ad5686_write_powerdown_mode, _num)
 284
 285 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(0);
 286 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(1);
 287 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(2);
 288 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(3);
 289
 290 #define IIO_DEV_ATTR_DAC_POWERDOWN(_num)        \
 291         IIO_DEVICE_ATTR(out##_num##_powerdown, S_IRUGO | S_IWUSR,       \
 292                         ad5686_read_dac_powerdown,                      \
 293                         ad5686_write_dac_powerdown, _num)
 294
 295 static IIO_DEV_ATTR_DAC_POWERDOWN(0);
 296 static IIO_DEV_ATTR_DAC_POWERDOWN(1);
 297 static IIO_DEV_ATTR_DAC_POWERDOWN(2);
 298 static IIO_DEV_ATTR_DAC_POWERDOWN(3);
 299
 300 static struct attribute *ad5686_attributes[] = {
 301         &iio_dev_attr_out0_powerdown.dev_attr.attr,
 302         &iio_dev_attr_out1_powerdown.dev_attr.attr,
 303         &iio_dev_attr_out2_powerdown.dev_attr.attr,
 304         &iio_dev_attr_out3_powerdown.dev_attr.attr,
 305         &iio_dev_attr_out0_powerdown_mode.dev_attr.attr,
 306         &iio_dev_attr_out1_powerdown_mode.dev_attr.attr,
 307         &iio_dev_attr_out2_powerdown_mode.dev_attr.attr,
 308         &iio_dev_attr_out3_powerdown_mode.dev_attr.attr,
 309         &iio_const_attr_out_powerdown_mode_available.dev_attr.attr,
 310         NULL,
 311 };
 312
 313 static const struct attribute_group ad5686_attribute_group = {
 314         .attrs = ad5686_attributes,
 315 };
 316
 317 static int ad5686_read_raw(struct iio_dev *indio_dev,
 318                            struct iio_chan_spec const *chan,
 319                            int *val,
 320                            int *val2,
 321                            long m)
 322 {
 323         struct ad5686_state *st = iio_priv(indio_dev);
 324         unsigned long scale_uv;
 325         int ret;
 326
 327         switch (m) {
 328         case 0:
 329                 mutex_lock(&indio_dev->mlock);
 330                 ret = ad5686_spi_read(st, chan->address);
 331                 mutex_unlock(&indio_dev->mlock);
 332                 if (ret < 0)
 333                         return ret;
 334                 *val = ret;
 335                 return IIO_VAL_INT;
 336                 break;
 337         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
 338                 scale_uv = (st->vref_mv * 100000)
 339                         >> (chan->scan_type.realbits);
 340                 *val =  scale_uv / 100000;
 341                 *val2 = (scale_uv % 100000) * 10;
 342                 return IIO_VAL_INT_PLUS_MICRO;
 343
 344         }
 345         return -EINVAL;
 346 }
 347
 348 static int ad5686_write_raw(struct iio_dev *indio_dev,
 349                                struct iio_chan_spec const *chan,
 350                                int val,
 351                                int val2,
 352                                long mask)
 353 {
 354         struct ad5686_state *st = iio_priv(indio_dev);
 355         int ret;
 356
 357         switch (mask) {
 358         case 0:
 359                 if (val > (1 << chan->scan_type.realbits))
 360                         return -EINVAL;
 361
 362                 mutex_lock(&indio_dev->mlock);
 363                 ret = ad5686_spi_write(st,
 364                                  AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
 365                                  chan->address,
 366                                  val,
 367                                  chan->scan_type.shift);
 368                 mutex_unlock(&indio_dev->mlock);
 369                 break;
 370         default:
 371                 ret = -EINVAL;
 372         }
 373
 374         return ret;
 375 }
 376
 377 static const struct iio_info ad5686_info = {
 378         .read_raw = ad5686_read_raw,
 379         .write_raw = ad5686_write_raw,
 380         .attrs = &ad5686_attribute_group,
 381         .driver_module = THIS_MODULE,
 382 };
 383
 384 static int __devinit ad5686_probe(struct spi_device *spi)
 385 {
 386         struct ad5686_state *st;
 387         struct iio_dev *indio_dev;
 388         int ret, regdone = 0, voltage_uv = 0;
 389
 390         indio_dev = iio_allocate_device(sizeof(*st));
 391         if (indio_dev == NULL)
 392                 return  -ENOMEM;
 393
 394         st = iio_priv(indio_dev);
 395         spi_set_drvdata(spi, indio_dev);
 396
 397         st->reg = regulator_get(&spi->dev, "vcc");
 398         if (!IS_ERR(st->reg)) {
 399                 ret = regulator_enable(st->reg);
 400                 if (ret)
 401                         goto error_put_reg;
 402
 403                 voltage_uv = regulator_get_voltage(st->reg);
 404         }
 405
 406         st->chip_info =
 407                 &ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 408
 409         if (voltage_uv)
 410                 st->vref_mv = voltage_uv / 1000;
 411         else
 412                 st->vref_mv = st->chip_info->int_vref_mv;
 413
 414         st->spi = spi;
 415
 416         indio_dev->dev.parent = &spi->dev;
 417         indio_dev->name = spi_get_device_id(spi)->name;
 418         indio_dev->info = &ad5686_info;
 419         indio_dev->modes = INDIO_DIRECT_MODE;
 420         indio_dev->channels = st->chip_info->channel;
 421         indio_dev->num_channels = AD5686_DAC_CHANNELS;
 422
 423         ret = iio_device_register(indio_dev);
 424         if (ret)
 425                 goto error_disable_reg;
 426
 427         regdone = 1;
 428         ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
 429                                 !!voltage_uv, 0);
 430         if (ret)
 431                 goto error_disable_reg;
 432
 433         return 0;
 434
 435 error_disable_reg:
 436         if (!IS_ERR(st->reg))
 437                 regulator_disable(st->reg);
 438 error_put_reg:
 439         if (!IS_ERR(st->reg))
 440                 regulator_put(st->reg);
 441
 442         if (regdone)
 443                 iio_device_unregister(indio_dev);
 444         else
 445                 iio_free_device(indio_dev);
 446
 447         return ret;
 448 }
 449
 450 static int __devexit ad5686_remove(struct spi_device *spi)
 451 {
 452         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 453         struct ad5686_state *st = iio_priv(indio_dev);
 454         struct regulator *reg = st->reg;
 455
 456         if (!IS_ERR(reg)) {
 457                 regulator_disable(reg);
 458                 regulator_put(reg);
 459         }
 460
 461         iio_device_unregister(indio_dev);
 462
 463         return 0;
 464 }
 465
 466 static const struct spi_device_id ad5686_id[] = {
 467         {"ad5684", ID_AD5684},
 468         {"ad5685", ID_AD5685},
 469         {"ad5686", ID_AD5686},
 470         {}
 471 };
 472
 473 static struct spi_driver ad5686_driver = {
 474         .driver = {
 475                    .name = "ad5686",
 476                    .owner = THIS_MODULE,
 477                    },
 478         .probe = ad5686_probe,
 479         .remove = __devexit_p(ad5686_remove),
 480         .id_table = ad5686_id,
 481 };
 482
 483 static __init int ad5686_spi_init(void)
 484 {
 485         return spi_register_driver(&ad5686_driver);
 486 }
 487 module_init(ad5686_spi_init);
 488
 489 static __exit void ad5686_spi_exit(void)
 490 {
 491         spi_unregister_driver(&ad5686_driver);
 492 }
 493 module_exit(ad5686_spi_exit);
 494
 495 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 496 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
 497 MODULE_LICENSE("GPL v2");