staging: brcm80211: change packet buffer type to native struct sk_buff
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / brcm80211 / brcmfmac / bcmsdh_sdmmc.c
blob3d3a428fa279e9cfec10160035254a02047e0725
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 #include <linux/types.h>
17 #include <linux/netdevice.h>
18 #include <bcmdefs.h>
19 #include <bcmdevs.h>
20 #include <bcmendian.h>
21 #include <osl.h>
22 #include <bcmutils.h>
23 #include <sdio.h> /* SDIO Device and Protocol Specs */
24 #include <sdioh.h> /* SDIO Host Controller Specification */
25 #include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */
26 #include <sdiovar.h> /* ioctl/iovars */
28 #include <linux/mmc/core.h>
29 #include <linux/mmc/sdio_func.h>
30 #include <linux/mmc/sdio_ids.h>
32 #include <dngl_stats.h>
33 #include <dhd.h>
35 #if defined(CONFIG_PM_SLEEP)
36 #include <linux/suspend.h>
37 extern volatile bool dhd_mmc_suspend;
38 #endif
39 #include "bcmsdh_sdmmc.h"
41 extern int sdio_function_init(void);
42 extern void sdio_function_cleanup(void);
44 #if !defined(OOB_INTR_ONLY)
45 static void IRQHandler(struct sdio_func *func);
46 static void IRQHandlerF2(struct sdio_func *func);
47 #endif /* !defined(OOB_INTR_ONLY) */
48 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr);
49 extern int sdio_reset_comm(struct mmc_card *card);
51 extern PBCMSDH_SDMMC_INSTANCE gInstance;
53 uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */
54 uint sd_f2_blocksize = 512; /* Default blocksize */
56 uint sd_divisor = 2; /* Default 48MHz/2 = 24MHz */
58 uint sd_power = 1; /* Default to SD Slot powered ON */
59 uint sd_clock = 1; /* Default to SD Clock turned ON */
60 uint sd_hiok = false; /* Don't use hi-speed mode by default */
61 uint sd_msglevel = 0x01;
62 uint sd_use_dma = true;
63 DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
64 DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
65 DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
66 DHD_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait);
68 #define DMA_ALIGN_MASK 0x03
70 int sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
71 int regsize, u32 *data);
73 static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd)
75 int err_ret;
76 u32 fbraddr;
77 u8 func;
79 sd_trace(("%s\n", __func__));
81 /* Get the Card's common CIS address */
82 sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0);
83 sd->func_cis_ptr[0] = sd->com_cis_ptr;
84 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
85 sd->com_cis_ptr));
87 /* Get the Card's function CIS (for each function) */
88 for (fbraddr = SDIOD_FBR_STARTADDR, func = 1;
89 func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
90 sd->func_cis_ptr[func] =
91 sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr);
92 sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func,
93 sd->func_cis_ptr[func]));
96 sd->func_cis_ptr[0] = sd->com_cis_ptr;
97 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
98 sd->com_cis_ptr));
100 /* Enable Function 1 */
101 sdio_claim_host(gInstance->func[1]);
102 err_ret = sdio_enable_func(gInstance->func[1]);
103 sdio_release_host(gInstance->func[1]);
104 if (err_ret) {
105 sd_err(("bcmsdh_sdmmc: Failed to enable F1 Err: 0x%08x",
106 err_ret));
109 return false;
113 * Public entry points & extern's
115 extern sdioh_info_t *sdioh_attach(struct osl_info *osh, void *bar0, uint irq)
117 sdioh_info_t *sd;
118 int err_ret;
120 sd_trace(("%s\n", __func__));
122 if (gInstance == NULL) {
123 sd_err(("%s: SDIO Device not present\n", __func__));
124 return NULL;
127 sd = kzalloc(sizeof(sdioh_info_t), GFP_ATOMIC);
128 if (sd == NULL) {
129 sd_err(("sdioh_attach: out of memory\n"));
130 return NULL;
132 sd->osh = osh;
133 if (sdioh_sdmmc_osinit(sd) != 0) {
134 sd_err(("%s:sdioh_sdmmc_osinit() failed\n", __func__));
135 kfree(sd);
136 return NULL;
139 sd->num_funcs = 2;
140 sd->sd_blockmode = true;
141 sd->use_client_ints = true;
142 sd->client_block_size[0] = 64;
144 gInstance->sd = sd;
146 /* Claim host controller */
147 sdio_claim_host(gInstance->func[1]);
149 sd->client_block_size[1] = 64;
150 err_ret = sdio_set_block_size(gInstance->func[1], 64);
151 if (err_ret)
152 sd_err(("bcmsdh_sdmmc: Failed to set F1 blocksize\n"));
154 /* Release host controller F1 */
155 sdio_release_host(gInstance->func[1]);
157 if (gInstance->func[2]) {
158 /* Claim host controller F2 */
159 sdio_claim_host(gInstance->func[2]);
161 sd->client_block_size[2] = sd_f2_blocksize;
162 err_ret =
163 sdio_set_block_size(gInstance->func[2], sd_f2_blocksize);
164 if (err_ret)
165 sd_err(("bcmsdh_sdmmc: Failed to set F2 blocksize "
166 "to %d\n", sd_f2_blocksize));
168 /* Release host controller F2 */
169 sdio_release_host(gInstance->func[2]);
172 sdioh_sdmmc_card_enablefuncs(sd);
174 sd_trace(("%s: Done\n", __func__));
175 return sd;
178 extern SDIOH_API_RC sdioh_detach(struct osl_info *osh, sdioh_info_t *sd)
180 sd_trace(("%s\n", __func__));
182 if (sd) {
184 /* Disable Function 2 */
185 sdio_claim_host(gInstance->func[2]);
186 sdio_disable_func(gInstance->func[2]);
187 sdio_release_host(gInstance->func[2]);
189 /* Disable Function 1 */
190 sdio_claim_host(gInstance->func[1]);
191 sdio_disable_func(gInstance->func[1]);
192 sdio_release_host(gInstance->func[1]);
194 /* deregister irq */
195 sdioh_sdmmc_osfree(sd);
197 kfree(sd);
199 return SDIOH_API_RC_SUCCESS;
202 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
204 extern SDIOH_API_RC sdioh_enable_func_intr(void)
206 u8 reg;
207 int err;
209 if (gInstance->func[0]) {
210 sdio_claim_host(gInstance->func[0]);
212 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
213 if (err) {
214 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
215 __func__, err));
216 sdio_release_host(gInstance->func[0]);
217 return SDIOH_API_RC_FAIL;
220 /* Enable F1 and F2 interrupts, set master enable */
221 reg |=
222 (INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN |
223 INTR_CTL_MASTER_EN);
225 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
226 sdio_release_host(gInstance->func[0]);
228 if (err) {
229 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
230 __func__, err));
231 return SDIOH_API_RC_FAIL;
235 return SDIOH_API_RC_SUCCESS;
238 extern SDIOH_API_RC sdioh_disable_func_intr(void)
240 u8 reg;
241 int err;
243 if (gInstance->func[0]) {
244 sdio_claim_host(gInstance->func[0]);
245 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
246 if (err) {
247 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
248 __func__, err));
249 sdio_release_host(gInstance->func[0]);
250 return SDIOH_API_RC_FAIL;
253 reg &= ~(INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN);
254 /* Disable master interrupt with the last function interrupt */
255 if (!(reg & 0xFE))
256 reg = 0;
257 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
259 sdio_release_host(gInstance->func[0]);
260 if (err) {
261 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
262 __func__, err));
263 return SDIOH_API_RC_FAIL;
266 return SDIOH_API_RC_SUCCESS;
268 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
270 /* Configure callback to client when we recieve client interrupt */
271 extern SDIOH_API_RC
272 sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh)
274 sd_trace(("%s: Entering\n", __func__));
275 if (fn == NULL) {
276 sd_err(("%s: interrupt handler is NULL, not registering\n",
277 __func__));
278 return SDIOH_API_RC_FAIL;
280 #if !defined(OOB_INTR_ONLY)
281 sd->intr_handler = fn;
282 sd->intr_handler_arg = argh;
283 sd->intr_handler_valid = true;
285 /* register and unmask irq */
286 if (gInstance->func[2]) {
287 sdio_claim_host(gInstance->func[2]);
288 sdio_claim_irq(gInstance->func[2], IRQHandlerF2);
289 sdio_release_host(gInstance->func[2]);
292 if (gInstance->func[1]) {
293 sdio_claim_host(gInstance->func[1]);
294 sdio_claim_irq(gInstance->func[1], IRQHandler);
295 sdio_release_host(gInstance->func[1]);
297 #elif defined(HW_OOB)
298 sdioh_enable_func_intr();
299 #endif /* defined(OOB_INTR_ONLY) */
300 return SDIOH_API_RC_SUCCESS;
303 extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd)
305 sd_trace(("%s: Entering\n", __func__));
307 #if !defined(OOB_INTR_ONLY)
308 if (gInstance->func[1]) {
309 /* register and unmask irq */
310 sdio_claim_host(gInstance->func[1]);
311 sdio_release_irq(gInstance->func[1]);
312 sdio_release_host(gInstance->func[1]);
315 if (gInstance->func[2]) {
316 /* Claim host controller F2 */
317 sdio_claim_host(gInstance->func[2]);
318 sdio_release_irq(gInstance->func[2]);
319 /* Release host controller F2 */
320 sdio_release_host(gInstance->func[2]);
323 sd->intr_handler_valid = false;
324 sd->intr_handler = NULL;
325 sd->intr_handler_arg = NULL;
326 #elif defined(HW_OOB)
327 sdioh_disable_func_intr();
328 #endif /* !defined(OOB_INTR_ONLY) */
329 return SDIOH_API_RC_SUCCESS;
332 extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff)
334 sd_trace(("%s: Entering\n", __func__));
335 *onoff = sd->client_intr_enabled;
336 return SDIOH_API_RC_SUCCESS;
339 #if defined(DHD_DEBUG)
340 extern bool sdioh_interrupt_pending(sdioh_info_t *sd)
342 return 0;
344 #endif
346 uint sdioh_query_iofnum(sdioh_info_t *sd)
348 return sd->num_funcs;
351 /* IOVar table */
352 enum {
353 IOV_MSGLEVEL = 1,
354 IOV_BLOCKMODE,
355 IOV_BLOCKSIZE,
356 IOV_DMA,
357 IOV_USEINTS,
358 IOV_NUMINTS,
359 IOV_NUMLOCALINTS,
360 IOV_HOSTREG,
361 IOV_DEVREG,
362 IOV_DIVISOR,
363 IOV_SDMODE,
364 IOV_HISPEED,
365 IOV_HCIREGS,
366 IOV_POWER,
367 IOV_CLOCK,
368 IOV_RXCHAIN
371 const bcm_iovar_t sdioh_iovars[] = {
372 {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0},
373 {"sd_blockmode", IOV_BLOCKMODE, 0, IOVT_BOOL, 0},
374 {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) |
375 size) */
376 {"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0},
377 {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0},
378 {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0},
379 {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0},
380 {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
382 {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
384 {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0}
386 {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0}
388 {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0}
390 {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100}
392 {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0}
394 {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0}
396 {NULL, 0, 0, 0, 0}
400 sdioh_iovar_op(sdioh_info_t *si, const char *name,
401 void *params, int plen, void *arg, int len, bool set)
403 const bcm_iovar_t *vi = NULL;
404 int bcmerror = 0;
405 int val_size;
406 s32 int_val = 0;
407 bool bool_val;
408 u32 actionid;
410 ASSERT(name);
411 ASSERT(len >= 0);
413 /* Get must have return space; Set does not take qualifiers */
414 ASSERT(set || (arg && len));
415 ASSERT(!set || (!params && !plen));
417 sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"),
418 name));
420 vi = bcm_iovar_lookup(sdioh_iovars, name);
421 if (vi == NULL) {
422 bcmerror = BCME_UNSUPPORTED;
423 goto exit;
426 bcmerror = bcm_iovar_lencheck(vi, arg, len, set);
427 if (bcmerror != 0)
428 goto exit;
430 /* Set up params so get and set can share the convenience variables */
431 if (params == NULL) {
432 params = arg;
433 plen = len;
436 if (vi->type == IOVT_VOID)
437 val_size = 0;
438 else if (vi->type == IOVT_BUFFER)
439 val_size = len;
440 else
441 val_size = sizeof(int);
443 if (plen >= (int)sizeof(int_val))
444 bcopy(params, &int_val, sizeof(int_val));
446 bool_val = (int_val != 0) ? true : false;
448 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
449 switch (actionid) {
450 case IOV_GVAL(IOV_MSGLEVEL):
451 int_val = (s32) sd_msglevel;
452 bcopy(&int_val, arg, val_size);
453 break;
455 case IOV_SVAL(IOV_MSGLEVEL):
456 sd_msglevel = int_val;
457 break;
459 case IOV_GVAL(IOV_BLOCKMODE):
460 int_val = (s32) si->sd_blockmode;
461 bcopy(&int_val, arg, val_size);
462 break;
464 case IOV_SVAL(IOV_BLOCKMODE):
465 si->sd_blockmode = (bool) int_val;
466 /* Haven't figured out how to make non-block mode with DMA */
467 break;
469 case IOV_GVAL(IOV_BLOCKSIZE):
470 if ((u32) int_val > si->num_funcs) {
471 bcmerror = BCME_BADARG;
472 break;
474 int_val = (s32) si->client_block_size[int_val];
475 bcopy(&int_val, arg, val_size);
476 break;
478 case IOV_SVAL(IOV_BLOCKSIZE):
480 uint func = ((u32) int_val >> 16);
481 uint blksize = (u16) int_val;
482 uint maxsize;
484 if (func > si->num_funcs) {
485 bcmerror = BCME_BADARG;
486 break;
489 switch (func) {
490 case 0:
491 maxsize = 32;
492 break;
493 case 1:
494 maxsize = BLOCK_SIZE_4318;
495 break;
496 case 2:
497 maxsize = BLOCK_SIZE_4328;
498 break;
499 default:
500 maxsize = 0;
502 if (blksize > maxsize) {
503 bcmerror = BCME_BADARG;
504 break;
506 if (!blksize)
507 blksize = maxsize;
509 /* Now set it */
510 si->client_block_size[func] = blksize;
512 break;
515 case IOV_GVAL(IOV_RXCHAIN):
516 int_val = false;
517 bcopy(&int_val, arg, val_size);
518 break;
520 case IOV_GVAL(IOV_DMA):
521 int_val = (s32) si->sd_use_dma;
522 bcopy(&int_val, arg, val_size);
523 break;
525 case IOV_SVAL(IOV_DMA):
526 si->sd_use_dma = (bool) int_val;
527 break;
529 case IOV_GVAL(IOV_USEINTS):
530 int_val = (s32) si->use_client_ints;
531 bcopy(&int_val, arg, val_size);
532 break;
534 case IOV_SVAL(IOV_USEINTS):
535 si->use_client_ints = (bool) int_val;
536 if (si->use_client_ints)
537 si->intmask |= CLIENT_INTR;
538 else
539 si->intmask &= ~CLIENT_INTR;
541 break;
543 case IOV_GVAL(IOV_DIVISOR):
544 int_val = (u32) sd_divisor;
545 bcopy(&int_val, arg, val_size);
546 break;
548 case IOV_SVAL(IOV_DIVISOR):
549 sd_divisor = int_val;
550 break;
552 case IOV_GVAL(IOV_POWER):
553 int_val = (u32) sd_power;
554 bcopy(&int_val, arg, val_size);
555 break;
557 case IOV_SVAL(IOV_POWER):
558 sd_power = int_val;
559 break;
561 case IOV_GVAL(IOV_CLOCK):
562 int_val = (u32) sd_clock;
563 bcopy(&int_val, arg, val_size);
564 break;
566 case IOV_SVAL(IOV_CLOCK):
567 sd_clock = int_val;
568 break;
570 case IOV_GVAL(IOV_SDMODE):
571 int_val = (u32) sd_sdmode;
572 bcopy(&int_val, arg, val_size);
573 break;
575 case IOV_SVAL(IOV_SDMODE):
576 sd_sdmode = int_val;
577 break;
579 case IOV_GVAL(IOV_HISPEED):
580 int_val = (u32) sd_hiok;
581 bcopy(&int_val, arg, val_size);
582 break;
584 case IOV_SVAL(IOV_HISPEED):
585 sd_hiok = int_val;
586 break;
588 case IOV_GVAL(IOV_NUMINTS):
589 int_val = (s32) si->intrcount;
590 bcopy(&int_val, arg, val_size);
591 break;
593 case IOV_GVAL(IOV_NUMLOCALINTS):
594 int_val = (s32) 0;
595 bcopy(&int_val, arg, val_size);
596 break;
598 case IOV_GVAL(IOV_HOSTREG):
600 sdreg_t *sd_ptr = (sdreg_t *) params;
602 if (sd_ptr->offset < SD_SysAddr
603 || sd_ptr->offset > SD_MaxCurCap) {
604 sd_err(("%s: bad offset 0x%x\n", __func__,
605 sd_ptr->offset));
606 bcmerror = BCME_BADARG;
607 break;
610 sd_trace(("%s: rreg%d at offset %d\n", __func__,
611 (sd_ptr->offset & 1) ? 8
612 : ((sd_ptr->offset & 2) ? 16 : 32),
613 sd_ptr->offset));
614 if (sd_ptr->offset & 1)
615 int_val = 8; /* sdioh_sdmmc_rreg8(si,
616 sd_ptr->offset); */
617 else if (sd_ptr->offset & 2)
618 int_val = 16; /* sdioh_sdmmc_rreg16(si,
619 sd_ptr->offset); */
620 else
621 int_val = 32; /* sdioh_sdmmc_rreg(si,
622 sd_ptr->offset); */
624 bcopy(&int_val, arg, sizeof(int_val));
625 break;
628 case IOV_SVAL(IOV_HOSTREG):
630 sdreg_t *sd_ptr = (sdreg_t *) params;
632 if (sd_ptr->offset < SD_SysAddr
633 || sd_ptr->offset > SD_MaxCurCap) {
634 sd_err(("%s: bad offset 0x%x\n", __func__,
635 sd_ptr->offset));
636 bcmerror = BCME_BADARG;
637 break;
640 sd_trace(("%s: wreg%d value 0x%08x at offset %d\n",
641 __func__, sd_ptr->value,
642 (sd_ptr->offset & 1) ? 8
643 : ((sd_ptr->offset & 2) ? 16 : 32),
644 sd_ptr->offset));
645 break;
648 case IOV_GVAL(IOV_DEVREG):
650 sdreg_t *sd_ptr = (sdreg_t *) params;
651 u8 data = 0;
653 if (sdioh_cfg_read
654 (si, sd_ptr->func, sd_ptr->offset, &data)) {
655 bcmerror = BCME_SDIO_ERROR;
656 break;
659 int_val = (int)data;
660 bcopy(&int_val, arg, sizeof(int_val));
661 break;
664 case IOV_SVAL(IOV_DEVREG):
666 sdreg_t *sd_ptr = (sdreg_t *) params;
667 u8 data = (u8) sd_ptr->value;
669 if (sdioh_cfg_write
670 (si, sd_ptr->func, sd_ptr->offset, &data)) {
671 bcmerror = BCME_SDIO_ERROR;
672 break;
674 break;
677 default:
678 bcmerror = BCME_UNSUPPORTED;
679 break;
681 exit:
683 return bcmerror;
686 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
688 SDIOH_API_RC sdioh_enable_hw_oob_intr(sdioh_info_t *sd, bool enable)
690 SDIOH_API_RC status;
691 u8 data;
693 if (enable)
694 data = 3; /* enable hw oob interrupt */
695 else
696 data = 4; /* disable hw oob interrupt */
697 data |= 4; /* Active HIGH */
699 status = sdioh_request_byte(sd, SDIOH_WRITE, 0, 0xf2, &data);
700 return status;
702 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
704 extern SDIOH_API_RC
705 sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
707 SDIOH_API_RC status;
708 /* No lock needed since sdioh_request_byte does locking */
709 status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data);
710 return status;
713 extern SDIOH_API_RC
714 sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
716 /* No lock needed since sdioh_request_byte does locking */
717 SDIOH_API_RC status;
718 status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data);
719 return status;
722 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr)
724 /* read 24 bits and return valid 17 bit addr */
725 int i;
726 u32 scratch, regdata;
727 u8 *ptr = (u8 *)&scratch;
728 for (i = 0; i < 3; i++) {
729 if ((sdioh_sdmmc_card_regread(sd, 0, regaddr, 1, &regdata)) !=
730 SUCCESS)
731 sd_err(("%s: Can't read!\n", __func__));
733 *ptr++ = (u8) regdata;
734 regaddr++;
737 /* Only the lower 17-bits are valid */
738 scratch = ltoh32(scratch);
739 scratch &= 0x0001FFFF;
740 return scratch;
743 extern SDIOH_API_RC
744 sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length)
746 u32 count;
747 int offset;
748 u32 foo;
749 u8 *cis = cisd;
751 sd_trace(("%s: Func = %d\n", __func__, func));
753 if (!sd->func_cis_ptr[func]) {
754 bzero(cis, length);
755 sd_err(("%s: no func_cis_ptr[%d]\n", __func__, func));
756 return SDIOH_API_RC_FAIL;
759 sd_err(("%s: func_cis_ptr[%d]=0x%04x\n", __func__, func,
760 sd->func_cis_ptr[func]));
762 for (count = 0; count < length; count++) {
763 offset = sd->func_cis_ptr[func] + count;
764 if (sdioh_sdmmc_card_regread(sd, 0, offset, 1, &foo) < 0) {
765 sd_err(("%s: regread failed: Can't read CIS\n",
766 __func__));
767 return SDIOH_API_RC_FAIL;
770 *cis = (u8) (foo & 0xff);
771 cis++;
774 return SDIOH_API_RC_SUCCESS;
777 extern SDIOH_API_RC
778 sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
779 u8 *byte)
781 int err_ret;
783 sd_info(("%s: rw=%d, func=%d, addr=0x%05x\n", __func__, rw, func,
784 regaddr));
786 DHD_PM_RESUME_WAIT(sdioh_request_byte_wait);
787 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
788 if (rw) { /* CMD52 Write */
789 if (func == 0) {
790 /* Can only directly write to some F0 registers.
791 * Handle F2 enable
792 * as a special case.
794 if (regaddr == SDIOD_CCCR_IOEN) {
795 if (gInstance->func[2]) {
796 sdio_claim_host(gInstance->func[2]);
797 if (*byte & SDIO_FUNC_ENABLE_2) {
798 /* Enable Function 2 */
799 err_ret =
800 sdio_enable_func
801 (gInstance->func[2]);
802 if (err_ret)
803 sd_err(("bcmsdh_sdmmc: enable F2 failed:%d",
804 err_ret));
805 } else {
806 /* Disable Function 2 */
807 err_ret =
808 sdio_disable_func
809 (gInstance->func[2]);
810 if (err_ret)
811 sd_err(("bcmsdh_sdmmc: Disab F2 failed:%d",
812 err_ret));
814 sdio_release_host(gInstance->func[2]);
817 #if defined(MMC_SDIO_ABORT)
818 /* to allow abort command through F1 */
819 else if (regaddr == SDIOD_CCCR_IOABORT) {
820 sdio_claim_host(gInstance->func[func]);
822 * this sdio_f0_writeb() can be replaced
823 * with another api
824 * depending upon MMC driver change.
825 * As of this time, this is temporaray one
827 sdio_writeb(gInstance->func[func], *byte,
828 regaddr, &err_ret);
829 sdio_release_host(gInstance->func[func]);
831 #endif /* MMC_SDIO_ABORT */
832 else if (regaddr < 0xF0) {
833 sd_err(("bcmsdh_sdmmc: F0 Wr:0x%02x: write "
834 "disallowed\n", regaddr));
835 } else {
836 /* Claim host controller, perform F0 write,
837 and release */
838 sdio_claim_host(gInstance->func[func]);
839 sdio_f0_writeb(gInstance->func[func], *byte,
840 regaddr, &err_ret);
841 sdio_release_host(gInstance->func[func]);
843 } else {
844 /* Claim host controller, perform Fn write,
845 and release */
846 sdio_claim_host(gInstance->func[func]);
847 sdio_writeb(gInstance->func[func], *byte, regaddr,
848 &err_ret);
849 sdio_release_host(gInstance->func[func]);
851 } else { /* CMD52 Read */
852 /* Claim host controller, perform Fn read, and release */
853 sdio_claim_host(gInstance->func[func]);
855 if (func == 0) {
856 *byte =
857 sdio_f0_readb(gInstance->func[func], regaddr,
858 &err_ret);
859 } else {
860 *byte =
861 sdio_readb(gInstance->func[func], regaddr,
862 &err_ret);
865 sdio_release_host(gInstance->func[func]);
868 if (err_ret)
869 sd_err(("bcmsdh_sdmmc: Failed to %s byte F%d:@0x%05x=%02x, "
870 "Err: %d\n", rw ? "Write" : "Read", func, regaddr,
871 *byte, err_ret));
873 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
876 extern SDIOH_API_RC
877 sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func,
878 uint addr, u32 *word, uint nbytes)
880 int err_ret = SDIOH_API_RC_FAIL;
882 if (func == 0) {
883 sd_err(("%s: Only CMD52 allowed to F0.\n", __func__));
884 return SDIOH_API_RC_FAIL;
887 sd_info(("%s: cmd_type=%d, rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
888 __func__, cmd_type, rw, func, addr, nbytes));
890 DHD_PM_RESUME_WAIT(sdioh_request_word_wait);
891 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
892 /* Claim host controller */
893 sdio_claim_host(gInstance->func[func]);
895 if (rw) { /* CMD52 Write */
896 if (nbytes == 4) {
897 sdio_writel(gInstance->func[func], *word, addr,
898 &err_ret);
899 } else if (nbytes == 2) {
900 sdio_writew(gInstance->func[func], (*word & 0xFFFF),
901 addr, &err_ret);
902 } else {
903 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
905 } else { /* CMD52 Read */
906 if (nbytes == 4) {
907 *word =
908 sdio_readl(gInstance->func[func], addr, &err_ret);
909 } else if (nbytes == 2) {
910 *word =
911 sdio_readw(gInstance->func[func], addr,
912 &err_ret) & 0xFFFF;
913 } else {
914 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
918 /* Release host controller */
919 sdio_release_host(gInstance->func[func]);
921 if (err_ret) {
922 sd_err(("bcmsdh_sdmmc: Failed to %s word, Err: 0x%08x",
923 rw ? "Write" : "Read", err_ret));
926 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
929 static SDIOH_API_RC
930 sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func,
931 uint addr, struct sk_buff *pkt)
933 bool fifo = (fix_inc == SDIOH_DATA_FIX);
934 u32 SGCount = 0;
935 int err_ret = 0;
937 struct sk_buff *pnext;
939 sd_trace(("%s: Enter\n", __func__));
941 ASSERT(pkt);
942 DHD_PM_RESUME_WAIT(sdioh_request_packet_wait);
943 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
945 /* Claim host controller */
946 sdio_claim_host(gInstance->func[func]);
947 for (pnext = pkt; pnext; pnext = PKTNEXT(pnext)) {
948 uint pkt_len = PKTLEN(pnext);
949 pkt_len += 3;
950 pkt_len &= 0xFFFFFFFC;
952 #ifdef CONFIG_MMC_MSM7X00A
953 if ((pkt_len % 64) == 32) {
954 sd_trace(("%s: Rounding up TX packet +=32\n",
955 __func__));
956 pkt_len += 32;
958 #endif /* CONFIG_MMC_MSM7X00A */
959 /* Make sure the packet is aligned properly.
960 * If it isn't, then this
961 * is the fault of sdioh_request_buffer() which
962 * is supposed to give
963 * us something we can work with.
965 ASSERT(((u32) (PKTDATA(pkt)) & DMA_ALIGN_MASK) == 0);
967 if ((write) && (!fifo)) {
968 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
969 ((u8 *) PKTDATA(pnext)),
970 pkt_len);
971 } else if (write) {
972 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
973 ((u8 *) PKTDATA(pnext)),
974 pkt_len);
975 } else if (fifo) {
976 err_ret = sdio_readsb(gInstance->func[func],
977 ((u8 *) PKTDATA(pnext)),
978 addr, pkt_len);
979 } else {
980 err_ret = sdio_memcpy_fromio(gInstance->func[func],
981 ((u8 *) PKTDATA(pnext)),
982 addr, pkt_len);
985 if (err_ret) {
986 sd_err(("%s: %s FAILED %p[%d], addr=0x%05x, pkt_len=%d,"
987 "ERR=0x%08x\n", __func__,
988 (write) ? "TX" : "RX",
989 pnext, SGCount, addr, pkt_len, err_ret));
990 } else {
991 sd_trace(("%s: %s xfr'd %p[%d], addr=0x%05x, len=%d\n",
992 __func__,
993 (write) ? "TX" : "RX",
994 pnext, SGCount, addr, pkt_len));
997 if (!fifo)
998 addr += pkt_len;
999 SGCount++;
1003 /* Release host controller */
1004 sdio_release_host(gInstance->func[func]);
1006 sd_trace(("%s: Exit\n", __func__));
1007 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
1011 * This function takes a buffer or packet, and fixes everything up
1012 * so that in the
1013 * end, a DMA-able packet is created.
1015 * A buffer does not have an associated packet pointer,
1016 * and may or may not be aligned.
1017 * A packet may consist of a single packet, or a packet chain.
1018 * If it is a packet chain,
1019 * then all the packets in the chain must be properly aligned.
1020 * If the packet data is not
1021 * aligned, then there may only be one packet, and in this case,
1022 * it is copied to a new
1023 * aligned packet.
1026 extern SDIOH_API_RC
1027 sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
1028 uint func, uint addr, uint reg_width, uint buflen_u,
1029 u8 *buffer, struct sk_buff *pkt)
1031 SDIOH_API_RC Status;
1032 struct sk_buff *mypkt = NULL;
1034 sd_trace(("%s: Enter\n", __func__));
1036 DHD_PM_RESUME_WAIT(sdioh_request_buffer_wait);
1037 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
1038 /* Case 1: we don't have a packet. */
1039 if (pkt == NULL) {
1040 sd_data(("%s: Creating new %s Packet, len=%d\n",
1041 __func__, write ? "TX" : "RX", buflen_u));
1042 mypkt = PKTGET(sd->osh, buflen_u, write ? true : false);
1043 if (!mypkt) {
1044 sd_err(("%s: PKTGET failed: len %d\n",
1045 __func__, buflen_u));
1046 return SDIOH_API_RC_FAIL;
1049 /* For a write, copy the buffer data into the packet. */
1050 if (write)
1051 bcopy(buffer, PKTDATA(mypkt), buflen_u);
1053 Status =
1054 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
1056 /* For a read, copy the packet data back to the buffer. */
1057 if (!write)
1058 bcopy(PKTDATA(mypkt), buffer, buflen_u);
1060 PKTFREE(sd->osh, mypkt, write ? true : false);
1061 } else if (((u32) (PKTDATA(pkt)) & DMA_ALIGN_MASK) != 0) {
1062 /* Case 2: We have a packet, but it is unaligned. */
1064 /* In this case, we cannot have a chain. */
1065 ASSERT(PKTNEXT(pkt) == NULL);
1067 sd_data(("%s: Creating aligned %s Packet, len=%d\n",
1068 __func__, write ? "TX" : "RX", PKTLEN(pkt)));
1069 mypkt = PKTGET(sd->osh, PKTLEN(pkt), write ? true : false);
1070 if (!mypkt) {
1071 sd_err(("%s: PKTGET failed: len %d\n",
1072 __func__, PKTLEN(pkt)));
1073 return SDIOH_API_RC_FAIL;
1076 /* For a write, copy the buffer data into the packet. */
1077 if (write)
1078 bcopy(PKTDATA(pkt), PKTDATA(mypkt), PKTLEN(pkt));
1080 Status =
1081 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
1083 /* For a read, copy the packet data back to the buffer. */
1084 if (!write)
1085 bcopy(PKTDATA(mypkt), PKTDATA(pkt), PKTLEN(mypkt));
1087 PKTFREE(sd->osh, mypkt, write ? true : false);
1088 } else { /* case 3: We have a packet and
1089 it is aligned. */
1090 sd_data(("%s: Aligned %s Packet, direct DMA\n",
1091 __func__, write ? "Tx" : "Rx"));
1092 Status =
1093 sdioh_request_packet(sd, fix_inc, write, func, addr, pkt);
1096 return Status;
1099 /* this function performs "abort" for both of host & device */
1100 extern int sdioh_abort(sdioh_info_t *sd, uint func)
1102 #if defined(MMC_SDIO_ABORT)
1103 char t_func = (char)func;
1104 #endif /* defined(MMC_SDIO_ABORT) */
1105 sd_trace(("%s: Enter\n", __func__));
1107 #if defined(MMC_SDIO_ABORT)
1108 /* issue abort cmd52 command through F1 */
1109 sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT,
1110 &t_func);
1111 #endif /* defined(MMC_SDIO_ABORT) */
1113 sd_trace(("%s: Exit\n", __func__));
1114 return SDIOH_API_RC_SUCCESS;
1117 /* Reset and re-initialize the device */
1118 int sdioh_sdio_reset(sdioh_info_t *si)
1120 sd_trace(("%s: Enter\n", __func__));
1121 sd_trace(("%s: Exit\n", __func__));
1122 return SDIOH_API_RC_SUCCESS;
1125 /* Disable device interrupt */
1126 void sdioh_sdmmc_devintr_off(sdioh_info_t *sd)
1128 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1129 sd->intmask &= ~CLIENT_INTR;
1132 /* Enable device interrupt */
1133 void sdioh_sdmmc_devintr_on(sdioh_info_t *sd)
1135 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1136 sd->intmask |= CLIENT_INTR;
1139 /* Read client card reg */
1141 sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
1142 int regsize, u32 *data)
1145 if ((func == 0) || (regsize == 1)) {
1146 u8 temp = 0;
1148 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1149 *data = temp;
1150 *data &= 0xff;
1151 sd_data(("%s: byte read data=0x%02x\n", __func__, *data));
1152 } else {
1153 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data,
1154 regsize);
1155 if (regsize == 2)
1156 *data &= 0xffff;
1158 sd_data(("%s: word read data=0x%08x\n", __func__, *data));
1161 return SUCCESS;
1164 #if !defined(OOB_INTR_ONLY)
1165 /* bcmsdh_sdmmc interrupt handler */
1166 static void IRQHandler(struct sdio_func *func)
1168 sdioh_info_t *sd;
1170 sd_trace(("bcmsdh_sdmmc: ***IRQHandler\n"));
1171 sd = gInstance->sd;
1173 ASSERT(sd != NULL);
1174 sdio_release_host(gInstance->func[0]);
1176 if (sd->use_client_ints) {
1177 sd->intrcount++;
1178 ASSERT(sd->intr_handler);
1179 ASSERT(sd->intr_handler_arg);
1180 (sd->intr_handler) (sd->intr_handler_arg);
1181 } else {
1182 sd_err(("bcmsdh_sdmmc: ***IRQHandler\n"));
1184 sd_err(("%s: Not ready for intr: enabled %d, handler %p\n",
1185 __func__, sd->client_intr_enabled, sd->intr_handler));
1188 sdio_claim_host(gInstance->func[0]);
1191 /* bcmsdh_sdmmc interrupt handler for F2 (dummy handler) */
1192 static void IRQHandlerF2(struct sdio_func *func)
1194 sdioh_info_t *sd;
1196 sd_trace(("bcmsdh_sdmmc: ***IRQHandlerF2\n"));
1198 sd = gInstance->sd;
1200 ASSERT(sd != NULL);
1202 #endif /* !defined(OOB_INTR_ONLY) */
1204 #ifdef NOTUSED
1205 /* Write client card reg */
1206 static int
1207 sdioh_sdmmc_card_regwrite(sdioh_info_t *sd, int func, u32 regaddr,
1208 int regsize, u32 data)
1211 if ((func == 0) || (regsize == 1)) {
1212 u8 temp;
1214 temp = data & 0xff;
1215 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1216 sd_data(("%s: byte write data=0x%02x\n", __func__, data));
1217 } else {
1218 if (regsize == 2)
1219 data &= 0xffff;
1221 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, &data,
1222 regsize);
1224 sd_data(("%s: word write data=0x%08x\n", __func__, data));
1227 return SUCCESS;
1229 #endif /* NOTUSED */
1231 int sdioh_start(sdioh_info_t *si, int stage)
1233 return 0;
1236 int sdioh_stop(sdioh_info_t *si)
1238 return 0;